MIPS: malta: Add support for SMP EVA

Allow secondary cores to program their segment control registers
during smp bootstrap code. This enables EVA on Malta SMP
configurations

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>

2 files changed, 7 insertions, 1 deletions

diff --git a/arch/mips/include/asm/mach-malta/kernel-entry-init.h b/arch/mips/include/asm/mach-malta/kernel-entry-init.h
index 9bace9c746d4..7c5e17a17849 100644
--- a/arch/mips/include/asm/mach-malta/kernel-entry-init.h
+++ b/arch/mips/include/asm/mach-malta/kernel-entry-init.h
@@ -154,6 +154,12 @@ nonsc_processor:
  * Do SMP slave processor setup necessary before we can safely execute C code.
  */
         .macro  smp_slave_setup
+#ifdef CONFIG_EVA
+        sync
+        ehb
+        mfc0    t1, CP0_CONFIG
+        eva_entry
+#endif
         .endm
 
 #endif /* __ASM_MACH_MIPS_KERNEL_ENTRY_INIT_H */
diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S
index 7b6a5b3e3acf..e712dcf18b2d 100644
--- a/arch/mips/kernel/head.S
+++ b/arch/mips/kernel/head.S
@@ -175,8 +175,8 @@ NESTED(smp_bootstrap, 16, sp)
         DMT     10      # dmt t2 /* t0, t1 are used by CLI and setup_c0_status() */
         jal     mips_ihb
 #endif /* CONFIG_MIPS_MT_SMTC */
-        setup_c0_status_sec
         smp_slave_setup
+        setup_c0_status_sec
 #ifdef CONFIG_MIPS_MT_SMTC
         andi    t2, t2, VPECONTROL_TE
         beqz    t2, 2f