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authorJesse Barnes <jbarnes@virtuousgeek.org>2011-08-03 12:22:56 -0400
committerKeith Packard <keithp@keithp.com>2011-08-03 20:43:15 -0400
commitc0864cb39c68696e80657360eba63da5e743b7aa (patch)
treeb78746a6c542923e9d9aa6e829a7f34cc449871b
parent45187ace97f7b3deb559b25348ccb7e301c158c9 (diff)
drm/i915/hdmi: HDMI source product description infoframe support
Set an SPD infoframe if the sink supports it. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Keith Packard <keithp@keithp.com>
-rw-r--r--drivers/gpu/drm/i915/intel_drv.h21
-rw-r--r--drivers/gpu/drm/i915/intel_hdmi.c16
2 files changed, 37 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 2f47dcf0b367..7b330e76a435 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -184,6 +184,22 @@ struct intel_crtc {
184#define DIP_VERSION_AVI 0x2 184#define DIP_VERSION_AVI 0x2
185#define DIP_LEN_AVI 13 185#define DIP_LEN_AVI 13
186 186
187#define DIP_TYPE_SPD 0x3
188#define DIP_VERSION_SPD 0x1
189#define DIP_LEN_SPD 25
190#define DIP_SPD_UNKNOWN 0
191#define DIP_SPD_DSTB 0x1
192#define DIP_SPD_DVDP 0x2
193#define DIP_SPD_DVHS 0x3
194#define DIP_SPD_HDDVR 0x4
195#define DIP_SPD_DVC 0x5
196#define DIP_SPD_DSC 0x6
197#define DIP_SPD_VCD 0x7
198#define DIP_SPD_GAME 0x8
199#define DIP_SPD_PC 0x9
200#define DIP_SPD_BD 0xa
201#define DIP_SPD_SCD 0xb
202
187struct dip_infoframe { 203struct dip_infoframe {
188 uint8_t type; /* HB0 */ 204 uint8_t type; /* HB0 */
189 uint8_t ver; /* HB1 */ 205 uint8_t ver; /* HB1 */
@@ -208,6 +224,11 @@ struct dip_infoframe {
208 uint16_t left_bar_end; 224 uint16_t left_bar_end;
209 uint16_t right_bar_start; 225 uint16_t right_bar_start;
210 } avi; 226 } avi;
227 struct {
228 uint8_t vn[8];
229 uint8_t pd[16];
230 uint8_t sdi;
231 } spd;
211 uint8_t payload[27]; 232 uint8_t payload[27];
212 } __attribute__ ((packed)) body; 233 } __attribute__ ((packed)) body;
213} __attribute__((packed)); 234} __attribute__((packed));
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index d43cebdea1ee..226ba830f383 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -201,6 +201,21 @@ static void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder)
201 intel_set_infoframe(encoder, &avi_if); 201 intel_set_infoframe(encoder, &avi_if);
202} 202}
203 203
204static void intel_hdmi_set_spd_infoframe(struct drm_encoder *encoder)
205{
206 struct dip_infoframe spd_if;
207
208 memset(&spd_if, 0, sizeof(spd_if));
209 spd_if.type = DIP_TYPE_SPD;
210 spd_if.ver = DIP_VERSION_SPD;
211 spd_if.len = DIP_LEN_SPD;
212 strcpy(spd_if.body.spd.vn, "Intel");
213 strcpy(spd_if.body.spd.pd, "Integrated gfx");
214 spd_if.body.spd.sdi = DIP_SPD_PC;
215
216 intel_set_infoframe(encoder, &spd_if);
217}
218
204static void intel_hdmi_mode_set(struct drm_encoder *encoder, 219static void intel_hdmi_mode_set(struct drm_encoder *encoder,
205 struct drm_display_mode *mode, 220 struct drm_display_mode *mode,
206 struct drm_display_mode *adjusted_mode) 221 struct drm_display_mode *adjusted_mode)
@@ -245,6 +260,7 @@ static void intel_hdmi_mode_set(struct drm_encoder *encoder,
245 POSTING_READ(intel_hdmi->sdvox_reg); 260 POSTING_READ(intel_hdmi->sdvox_reg);
246 261
247 intel_hdmi_set_avi_infoframe(encoder); 262 intel_hdmi_set_avi_infoframe(encoder);
263 intel_hdmi_set_spd_infoframe(encoder);
248} 264}
249 265
250static void intel_hdmi_dpms(struct drm_encoder *encoder, int mode) 266static void intel_hdmi_dpms(struct drm_encoder *encoder, int mode)