diff options
author | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2013-11-13 07:46:17 -0500 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2013-11-25 03:08:29 -0500 |
commit | bc41f9f138bd93b82b08f84ca55b7da2acb847b3 (patch) | |
tree | bfa26dab911d73ddc1f0df2a9d0361401818cd07 | |
parent | 6ce4eac1f600b34f2f7f58f9cd8f0503d79e42ae (diff) |
sh-pfc: r8a7791: Fix DU pin groups organisation
Rename the sync_1 group to sync as the device has a single sync pin
group for the DU, move the cde_disp mux array right after the
corresponding pins array, and split the clk_in pins in three separate
groups as the pins can be used independently.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r-- | drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 36 |
1 files changed, 27 insertions, 9 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c index bf76a654c02f..d26c16360161 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c | |||
@@ -1730,11 +1730,11 @@ static const unsigned int du_clk_out_1_pins[] = { | |||
1730 | static const unsigned int du_clk_out_1_mux[] = { | 1730 | static const unsigned int du_clk_out_1_mux[] = { |
1731 | DU1_DOTCLKOUT1_MARK | 1731 | DU1_DOTCLKOUT1_MARK |
1732 | }; | 1732 | }; |
1733 | static const unsigned int du_sync_1_pins[] = { | 1733 | static const unsigned int du_sync_pins[] = { |
1734 | /* EXVSYNC/VSYNC, EXHSYNC/HSYNC, EXDISP/EXODDF/EXCDE */ | 1734 | /* EXVSYNC/VSYNC, EXHSYNC/HSYNC, EXDISP/EXODDF/EXCDE */ |
1735 | RCAR_GP_PIN(3, 29), RCAR_GP_PIN(3, 28), RCAR_GP_PIN(3, 27), | 1735 | RCAR_GP_PIN(3, 29), RCAR_GP_PIN(3, 28), RCAR_GP_PIN(3, 27), |
1736 | }; | 1736 | }; |
1737 | static const unsigned int du_sync_1_mux[] = { | 1737 | static const unsigned int du_sync_mux[] = { |
1738 | DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK, | 1738 | DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK, |
1739 | DU1_EXVSYNC_DU1_VSYNC_MARK, DU1_EXHSYNC_DU1_HSYNC_MARK | 1739 | DU1_EXVSYNC_DU1_VSYNC_MARK, DU1_EXHSYNC_DU1_HSYNC_MARK |
1740 | }; | 1740 | }; |
@@ -1742,6 +1742,9 @@ static const unsigned int du_cde_disp_pins[] = { | |||
1742 | /* CDE DISP */ | 1742 | /* CDE DISP */ |
1743 | RCAR_GP_PIN(3, 31), RCAR_GP_PIN(3, 30), | 1743 | RCAR_GP_PIN(3, 31), RCAR_GP_PIN(3, 30), |
1744 | }; | 1744 | }; |
1745 | static const unsigned int du_cde_disp_mux[] = { | ||
1746 | DU1_CDE_MARK, DU1_DISP_MARK | ||
1747 | }; | ||
1745 | static const unsigned int du0_clk_in_pins[] = { | 1748 | static const unsigned int du0_clk_in_pins[] = { |
1746 | /* CLKIN */ | 1749 | /* CLKIN */ |
1747 | RCAR_GP_PIN(6, 31), | 1750 | RCAR_GP_PIN(6, 31), |
@@ -1749,15 +1752,26 @@ static const unsigned int du0_clk_in_pins[] = { | |||
1749 | static const unsigned int du0_clk_in_mux[] = { | 1752 | static const unsigned int du0_clk_in_mux[] = { |
1750 | DU0_DOTCLKIN_MARK | 1753 | DU0_DOTCLKIN_MARK |
1751 | }; | 1754 | }; |
1752 | static const unsigned int du_cde_disp_mux[] = { | ||
1753 | DU1_CDE_MARK, DU1_DISP_MARK | ||
1754 | }; | ||
1755 | static const unsigned int du1_clk_in_pins[] = { | 1755 | static const unsigned int du1_clk_in_pins[] = { |
1756 | /* CLKIN */ | 1756 | /* CLKIN */ |
1757 | RCAR_GP_PIN(7, 20), RCAR_GP_PIN(7, 19), RCAR_GP_PIN(3, 24), | 1757 | RCAR_GP_PIN(3, 24), |
1758 | }; | 1758 | }; |
1759 | static const unsigned int du1_clk_in_mux[] = { | 1759 | static const unsigned int du1_clk_in_mux[] = { |
1760 | DU1_DOTCLKIN_C_MARK, DU1_DOTCLKIN_B_MARK, DU1_DOTCLKIN_MARK | 1760 | DU1_DOTCLKIN_MARK |
1761 | }; | ||
1762 | static const unsigned int du1_clk_in_b_pins[] = { | ||
1763 | /* CLKIN */ | ||
1764 | RCAR_GP_PIN(7, 19), | ||
1765 | }; | ||
1766 | static const unsigned int du1_clk_in_b_mux[] = { | ||
1767 | DU1_DOTCLKIN_B_MARK, | ||
1768 | }; | ||
1769 | static const unsigned int du1_clk_in_c_pins[] = { | ||
1770 | /* CLKIN */ | ||
1771 | RCAR_GP_PIN(7, 20), | ||
1772 | }; | ||
1773 | static const unsigned int du1_clk_in_c_mux[] = { | ||
1774 | DU1_DOTCLKIN_C_MARK, | ||
1761 | }; | 1775 | }; |
1762 | /* - ETH -------------------------------------------------------------------- */ | 1776 | /* - ETH -------------------------------------------------------------------- */ |
1763 | static const unsigned int eth_link_pins[] = { | 1777 | static const unsigned int eth_link_pins[] = { |
@@ -2670,10 +2684,12 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { | |||
2670 | SH_PFC_PIN_GROUP(du_rgb888), | 2684 | SH_PFC_PIN_GROUP(du_rgb888), |
2671 | SH_PFC_PIN_GROUP(du_clk_out_0), | 2685 | SH_PFC_PIN_GROUP(du_clk_out_0), |
2672 | SH_PFC_PIN_GROUP(du_clk_out_1), | 2686 | SH_PFC_PIN_GROUP(du_clk_out_1), |
2673 | SH_PFC_PIN_GROUP(du_sync_1), | 2687 | SH_PFC_PIN_GROUP(du_sync), |
2674 | SH_PFC_PIN_GROUP(du_cde_disp), | 2688 | SH_PFC_PIN_GROUP(du_cde_disp), |
2675 | SH_PFC_PIN_GROUP(du0_clk_in), | 2689 | SH_PFC_PIN_GROUP(du0_clk_in), |
2676 | SH_PFC_PIN_GROUP(du1_clk_in), | 2690 | SH_PFC_PIN_GROUP(du1_clk_in), |
2691 | SH_PFC_PIN_GROUP(du1_clk_in_b), | ||
2692 | SH_PFC_PIN_GROUP(du1_clk_in_c), | ||
2677 | SH_PFC_PIN_GROUP(eth_link), | 2693 | SH_PFC_PIN_GROUP(eth_link), |
2678 | SH_PFC_PIN_GROUP(eth_magic), | 2694 | SH_PFC_PIN_GROUP(eth_magic), |
2679 | SH_PFC_PIN_GROUP(eth_mdio), | 2695 | SH_PFC_PIN_GROUP(eth_mdio), |
@@ -2805,7 +2821,7 @@ static const char * const du_groups[] = { | |||
2805 | "du_rgb888", | 2821 | "du_rgb888", |
2806 | "du_clk_out_0", | 2822 | "du_clk_out_0", |
2807 | "du_clk_out_1", | 2823 | "du_clk_out_1", |
2808 | "du_sync_1", | 2824 | "du_sync", |
2809 | "du_cde_disp", | 2825 | "du_cde_disp", |
2810 | }; | 2826 | }; |
2811 | 2827 | ||
@@ -2815,6 +2831,8 @@ static const char * const du0_groups[] = { | |||
2815 | 2831 | ||
2816 | static const char * const du1_groups[] = { | 2832 | static const char * const du1_groups[] = { |
2817 | "du1_clk_in", | 2833 | "du1_clk_in", |
2834 | "du1_clk_in_b", | ||
2835 | "du1_clk_in_c", | ||
2818 | }; | 2836 | }; |
2819 | 2837 | ||
2820 | static const char * const eth_groups[] = { | 2838 | static const char * const eth_groups[] = { |