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authorSantosh Shilimkar <santosh.shilimkar@ti.com>2010-02-15 07:33:37 -0500
committerTony Lindgren <tony@atomide.com>2010-02-23 13:57:40 -0500
commitb7ebb10b0a9793effa4a74a3c29049b44c6b8176 (patch)
tree3559425a0c9b4759b25cc95b2690d139cfdfcc96
parente03d37d85909fd9b09e78087c57b45972a7664ad (diff)
omap2/3/4: ioremap omap_globals module
This is a clean-up patch towards dynamic allocation of IO space instead of using harcoded macros to calculate virtual addresses. Also update the sdrc, prcm and control module to allocate iospace dynamically Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com> Reviewed-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r--arch/arm/mach-omap2/control.c6
-rw-r--r--arch/arm/mach-omap2/prcm.c16
-rw-r--r--arch/arm/mach-omap2/sdrc.c11
-rw-r--r--arch/arm/plat-omap/common.c38
-rw-r--r--arch/arm/plat-omap/include/plat/common.h18
5 files changed, 57 insertions, 32 deletions
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index cdd1f35636dd..43f8a33655d4 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -140,7 +140,11 @@ static struct omap3_control_regs control_context;
140 140
141void __init omap2_set_globals_control(struct omap_globals *omap2_globals) 141void __init omap2_set_globals_control(struct omap_globals *omap2_globals)
142{ 142{
143 omap2_ctrl_base = omap2_globals->ctrl; 143 /* Static mapping, never released */
144 if (omap2_globals->ctrl) {
145 omap2_ctrl_base = ioremap(omap2_globals->ctrl, SZ_4K);
146 WARN_ON(!omap2_ctrl_base);
147 }
144} 148}
145 149
146void __iomem *omap_ctrl_base_get(void) 150void __iomem *omap_ctrl_base_get(void)
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index e8e121a41d6d..338d5f67ef0d 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -279,9 +279,19 @@ int omap2_cm_wait_idlest(void __iomem *reg, u32 mask, const char *name)
279 279
280void __init omap2_set_globals_prcm(struct omap_globals *omap2_globals) 280void __init omap2_set_globals_prcm(struct omap_globals *omap2_globals)
281{ 281{
282 prm_base = omap2_globals->prm; 282 /* Static mapping, never released */
283 cm_base = omap2_globals->cm; 283 if (omap2_globals->prm) {
284 cm2_base = omap2_globals->cm2; 284 prm_base = ioremap(omap2_globals->prm, SZ_8K);
285 WARN_ON(!prm_base);
286 }
287 if (omap2_globals->cm) {
288 cm_base = ioremap(omap2_globals->cm, SZ_8K);
289 WARN_ON(!cm_base);
290 }
291 if (omap2_globals->cm2) {
292 cm2_base = ioremap(omap2_globals->cm2, SZ_8K);
293 WARN_ON(!cm2_base);
294 }
285} 295}
286 296
287#ifdef CONFIG_ARCH_OMAP3 297#ifdef CONFIG_ARCH_OMAP3
diff --git a/arch/arm/mach-omap2/sdrc.c b/arch/arm/mach-omap2/sdrc.c
index cbfbd142e946..4c65f5628b39 100644
--- a/arch/arm/mach-omap2/sdrc.c
+++ b/arch/arm/mach-omap2/sdrc.c
@@ -119,8 +119,15 @@ int omap2_sdrc_get_params(unsigned long r,
119 119
120void __init omap2_set_globals_sdrc(struct omap_globals *omap2_globals) 120void __init omap2_set_globals_sdrc(struct omap_globals *omap2_globals)
121{ 121{
122 omap2_sdrc_base = omap2_globals->sdrc; 122 /* Static mapping, never released */
123 omap2_sms_base = omap2_globals->sms; 123 if (omap2_globals->sdrc) {
124 omap2_sdrc_base = ioremap(omap2_globals->sdrc, SZ_64K);
125 WARN_ON(!omap2_sdrc_base);
126 }
127 if (omap2_globals->sms) {
128 omap2_sms_base = ioremap(omap2_globals->sms, SZ_64K);
129 WARN_ON(!omap2_sms_base);
130 }
124} 131}
125 132
126/** 133/**
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index 4f29e8c0f539..088c1a03b946 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -256,11 +256,11 @@ static void __init __omap2_set_globals(struct omap_globals *omap2_globals)
256static struct omap_globals omap242x_globals = { 256static struct omap_globals omap242x_globals = {
257 .class = OMAP242X_CLASS, 257 .class = OMAP242X_CLASS,
258 .tap = OMAP2_L4_IO_ADDRESS(0x48014000), 258 .tap = OMAP2_L4_IO_ADDRESS(0x48014000),
259 .sdrc = OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE), 259 .sdrc = OMAP2420_SDRC_BASE,
260 .sms = OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE), 260 .sms = OMAP2420_SMS_BASE,
261 .ctrl = OMAP2_L4_IO_ADDRESS(OMAP2420_CTRL_BASE), 261 .ctrl = OMAP2420_CTRL_BASE,
262 .prm = OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE), 262 .prm = OMAP2420_PRM_BASE,
263 .cm = OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE), 263 .cm = OMAP2420_CM_BASE,
264 .uart1_phys = OMAP2_UART1_BASE, 264 .uart1_phys = OMAP2_UART1_BASE,
265 .uart2_phys = OMAP2_UART2_BASE, 265 .uart2_phys = OMAP2_UART2_BASE,
266 .uart3_phys = OMAP2_UART3_BASE, 266 .uart3_phys = OMAP2_UART3_BASE,
@@ -277,11 +277,11 @@ void __init omap2_set_globals_242x(void)
277static struct omap_globals omap243x_globals = { 277static struct omap_globals omap243x_globals = {
278 .class = OMAP243X_CLASS, 278 .class = OMAP243X_CLASS,
279 .tap = OMAP2_L4_IO_ADDRESS(0x4900a000), 279 .tap = OMAP2_L4_IO_ADDRESS(0x4900a000),
280 .sdrc = OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE), 280 .sdrc = OMAP243X_SDRC_BASE,
281 .sms = OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE), 281 .sms = OMAP243X_SMS_BASE,
282 .ctrl = OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE), 282 .ctrl = OMAP243X_CTRL_BASE,
283 .prm = OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE), 283 .prm = OMAP2430_PRM_BASE,
284 .cm = OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE), 284 .cm = OMAP2430_CM_BASE,
285 .uart1_phys = OMAP2_UART1_BASE, 285 .uart1_phys = OMAP2_UART1_BASE,
286 .uart2_phys = OMAP2_UART2_BASE, 286 .uart2_phys = OMAP2_UART2_BASE,
287 .uart3_phys = OMAP2_UART3_BASE, 287 .uart3_phys = OMAP2_UART3_BASE,
@@ -298,11 +298,11 @@ void __init omap2_set_globals_243x(void)
298static struct omap_globals omap3_globals = { 298static struct omap_globals omap3_globals = {
299 .class = OMAP343X_CLASS, 299 .class = OMAP343X_CLASS,
300 .tap = OMAP2_L4_IO_ADDRESS(0x4830A000), 300 .tap = OMAP2_L4_IO_ADDRESS(0x4830A000),
301 .sdrc = OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE), 301 .sdrc = OMAP343X_SDRC_BASE,
302 .sms = OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE), 302 .sms = OMAP343X_SMS_BASE,
303 .ctrl = OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE), 303 .ctrl = OMAP343X_CTRL_BASE,
304 .prm = OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE), 304 .prm = OMAP3430_PRM_BASE,
305 .cm = OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), 305 .cm = OMAP3430_CM_BASE,
306 .uart1_phys = OMAP3_UART1_BASE, 306 .uart1_phys = OMAP3_UART1_BASE,
307 .uart2_phys = OMAP3_UART2_BASE, 307 .uart2_phys = OMAP3_UART2_BASE,
308 .uart3_phys = OMAP3_UART3_BASE, 308 .uart3_phys = OMAP3_UART3_BASE,
@@ -325,10 +325,10 @@ void __init omap2_set_globals_36xx(void)
325static struct omap_globals omap4_globals = { 325static struct omap_globals omap4_globals = {
326 .class = OMAP443X_CLASS, 326 .class = OMAP443X_CLASS,
327 .tap = OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE), 327 .tap = OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
328 .ctrl = OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE), 328 .ctrl = OMAP443X_CTRL_BASE,
329 .prm = OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE), 329 .prm = OMAP4430_PRM_BASE,
330 .cm = OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE), 330 .cm = OMAP4430_CM_BASE,
331 .cm2 = OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE), 331 .cm2 = OMAP4430_CM2_BASE,
332 .uart1_phys = OMAP4_UART1_BASE, 332 .uart1_phys = OMAP4_UART1_BASE,
333 .uart2_phys = OMAP4_UART2_BASE, 333 .uart2_phys = OMAP4_UART2_BASE,
334 .uart3_phys = OMAP4_UART3_BASE, 334 .uart3_phys = OMAP4_UART3_BASE,
diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h
index e04a58ec53a2..7556e271942e 100644
--- a/arch/arm/plat-omap/include/plat/common.h
+++ b/arch/arm/plat-omap/include/plat/common.h
@@ -37,16 +37,20 @@ extern void __iomem *gic_cpu_base_addr;
37extern void omap_map_common_io(void); 37extern void omap_map_common_io(void);
38extern struct sys_timer omap_timer; 38extern struct sys_timer omap_timer;
39 39
40/* IO bases for various OMAP processors */ 40/*
41 * IO bases for various OMAP processors
42 * Except the tap base, rest all the io bases
43 * listed are physical addresses.
44 */
41struct omap_globals { 45struct omap_globals {
42 u32 class; /* OMAP class to detect */ 46 u32 class; /* OMAP class to detect */
43 void __iomem *tap; /* Control module ID code */ 47 void __iomem *tap; /* Control module ID code */
44 void __iomem *sdrc; /* SDRAM Controller */ 48 unsigned long sdrc; /* SDRAM Controller */
45 void __iomem *sms; /* SDRAM Memory Scheduler */ 49 unsigned long sms; /* SDRAM Memory Scheduler */
46 void __iomem *ctrl; /* System Control Module */ 50 unsigned long ctrl; /* System Control Module */
47 void __iomem *prm; /* Power and Reset Management */ 51 unsigned long prm; /* Power and Reset Management */
48 void __iomem *cm; /* Clock Management */ 52 unsigned long cm; /* Clock Management */
49 void __iomem *cm2; 53 unsigned long cm2;
50 unsigned long uart1_phys; 54 unsigned long uart1_phys;
51 unsigned long uart2_phys; 55 unsigned long uart2_phys;
52 unsigned long uart3_phys; 56 unsigned long uart3_phys;