diff options
| author | Xudong Hao <xudong.hao@intel.com> | 2012-05-28 07:33:34 -0400 |
|---|---|---|
| committer | Avi Kivity <avi@redhat.com> | 2012-06-05 09:31:02 -0400 |
| commit | aaf07bc291c828189ae5221b370905a89bbb859d (patch) | |
| tree | 9a5828db4334683ed9a3bb060819bcc6f598d781 | |
| parent | c1a7b32a14138f908df52d7c53b5ce3415ec6b50 (diff) | |
KVM: VMX: Add EPT A/D bits definitions
Signed-off-by: Haitao Shan <haitao.shan@intel.com>
Signed-off-by: Xudong Hao <xudong.hao@intel.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
| -rw-r--r-- | arch/x86/include/asm/vmx.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h index 31f180c21ce9..de007c272730 100644 --- a/arch/x86/include/asm/vmx.h +++ b/arch/x86/include/asm/vmx.h | |||
| @@ -404,6 +404,7 @@ enum vmcs_field { | |||
| 404 | #define VMX_EPTP_WB_BIT (1ull << 14) | 404 | #define VMX_EPTP_WB_BIT (1ull << 14) |
| 405 | #define VMX_EPT_2MB_PAGE_BIT (1ull << 16) | 405 | #define VMX_EPT_2MB_PAGE_BIT (1ull << 16) |
| 406 | #define VMX_EPT_1GB_PAGE_BIT (1ull << 17) | 406 | #define VMX_EPT_1GB_PAGE_BIT (1ull << 17) |
| 407 | #define VMX_EPT_AD_BIT (1ull << 21) | ||
| 407 | #define VMX_EPT_EXTENT_INDIVIDUAL_BIT (1ull << 24) | 408 | #define VMX_EPT_EXTENT_INDIVIDUAL_BIT (1ull << 24) |
| 408 | #define VMX_EPT_EXTENT_CONTEXT_BIT (1ull << 25) | 409 | #define VMX_EPT_EXTENT_CONTEXT_BIT (1ull << 25) |
| 409 | #define VMX_EPT_EXTENT_GLOBAL_BIT (1ull << 26) | 410 | #define VMX_EPT_EXTENT_GLOBAL_BIT (1ull << 26) |
| @@ -415,11 +416,14 @@ enum vmcs_field { | |||
| 415 | #define VMX_EPT_MAX_GAW 0x4 | 416 | #define VMX_EPT_MAX_GAW 0x4 |
| 416 | #define VMX_EPT_MT_EPTE_SHIFT 3 | 417 | #define VMX_EPT_MT_EPTE_SHIFT 3 |
| 417 | #define VMX_EPT_GAW_EPTP_SHIFT 3 | 418 | #define VMX_EPT_GAW_EPTP_SHIFT 3 |
| 419 | #define VMX_EPT_AD_ENABLE_BIT (1ull << 6) | ||
| 418 | #define VMX_EPT_DEFAULT_MT 0x6ull | 420 | #define VMX_EPT_DEFAULT_MT 0x6ull |
| 419 | #define VMX_EPT_READABLE_MASK 0x1ull | 421 | #define VMX_EPT_READABLE_MASK 0x1ull |
| 420 | #define VMX_EPT_WRITABLE_MASK 0x2ull | 422 | #define VMX_EPT_WRITABLE_MASK 0x2ull |
| 421 | #define VMX_EPT_EXECUTABLE_MASK 0x4ull | 423 | #define VMX_EPT_EXECUTABLE_MASK 0x4ull |
| 422 | #define VMX_EPT_IPAT_BIT (1ull << 6) | 424 | #define VMX_EPT_IPAT_BIT (1ull << 6) |
| 425 | #define VMX_EPT_ACCESS_BIT (1ull << 8) | ||
| 426 | #define VMX_EPT_DIRTY_BIT (1ull << 9) | ||
| 423 | 427 | ||
| 424 | #define VMX_EPT_IDENTITY_PAGETABLE_ADDR 0xfffbc000ul | 428 | #define VMX_EPT_IDENTITY_PAGETABLE_ADDR 0xfffbc000ul |
| 425 | 429 | ||