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authorLinus Torvalds <torvalds@linux-foundation.org>2010-02-04 19:08:42 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2010-02-04 19:08:42 -0500
commit9d82d5efafb033a761b5e6eb720f5bbba5c0813b (patch)
tree54e3ed5f410da0a6a10c0671180988a9391e42dd
parenta9861b50378ce29212ae2b39ee2d56b2058748cf (diff)
parent301fe8eeee02c570c5bd30537aff9456f7f7955c (diff)
Merge branch 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
* 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6: omap: Disable serial port autoidle by default omap: Fix access to already released memory in clk_debugfs_register_one() omap: Fix arch/arm/mach-omap2/mux.c: Off by one error omap: Fix 3630 mux errors OMAP2/3: GPMC: ensure valid clock pointer OMAP2/3: IRQ: ensure valid base address ARCH OMAP : enable ARCH_HAS_HOLES_MEMORYMODEL for OMAP omap: Remove old unused defines for OMAP_32KSYNCT_BASE omap: define _toggle_gpio_edge_triggering only for OMAP1
-rw-r--r--arch/arm/Kconfig1
-rw-r--r--arch/arm/mach-omap2/gpmc.c5
-rw-r--r--arch/arm/mach-omap2/irq.c4
-rw-r--r--arch/arm/mach-omap2/mux.c10
-rw-r--r--arch/arm/mach-omap2/mux34xx.c47
-rw-r--r--arch/arm/mach-omap2/serial.c11
-rw-r--r--arch/arm/plat-omap/clock.c4
-rw-r--r--arch/arm/plat-omap/gpio.c4
-rw-r--r--arch/arm/plat-omap/omap_device.c10
9 files changed, 77 insertions, 19 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 4c33ca82f9b1..184a6bd54825 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -702,6 +702,7 @@ config ARCH_OMAP
702 select ARCH_HAS_CPUFREQ 702 select ARCH_HAS_CPUFREQ
703 select GENERIC_TIME 703 select GENERIC_TIME
704 select GENERIC_CLOCKEVENTS 704 select GENERIC_CLOCKEVENTS
705 select ARCH_HAS_HOLES_MEMORYMODEL
705 help 706 help
706 Support for TI's OMAP platform (OMAP1 and OMAP2). 707 Support for TI's OMAP platform (OMAP1 and OMAP2).
707 708
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 3f1334f62e7a..7027cdc1ba49 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -505,7 +505,7 @@ static void __init gpmc_mem_init(void)
505void __init gpmc_init(void) 505void __init gpmc_init(void)
506{ 506{
507 u32 l; 507 u32 l;
508 char *ck; 508 char *ck = NULL;
509 509
510 if (cpu_is_omap24xx()) { 510 if (cpu_is_omap24xx()) {
511 ck = "core_l3_ck"; 511 ck = "core_l3_ck";
@@ -521,6 +521,9 @@ void __init gpmc_init(void)
521 l = OMAP44XX_GPMC_BASE; 521 l = OMAP44XX_GPMC_BASE;
522 } 522 }
523 523
524 if (WARN_ON(!ck))
525 return;
526
524 gpmc_l3_clk = clk_get(NULL, ck); 527 gpmc_l3_clk = clk_get(NULL, ck);
525 if (IS_ERR(gpmc_l3_clk)) { 528 if (IS_ERR(gpmc_l3_clk)) {
526 printk(KERN_ERR "Could not get GPMC clock %s\n", ck); 529 printk(KERN_ERR "Could not get GPMC clock %s\n", ck);
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 27054025da2b..26aeef560aa3 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -194,7 +194,7 @@ void __init omap_init_irq(void)
194 int i; 194 int i;
195 195
196 for (i = 0; i < ARRAY_SIZE(irq_banks); i++) { 196 for (i = 0; i < ARRAY_SIZE(irq_banks); i++) {
197 unsigned long base; 197 unsigned long base = 0;
198 struct omap_irq_bank *bank = irq_banks + i; 198 struct omap_irq_bank *bank = irq_banks + i;
199 199
200 if (cpu_is_omap24xx()) 200 if (cpu_is_omap24xx())
@@ -202,6 +202,8 @@ void __init omap_init_irq(void)
202 else if (cpu_is_omap34xx()) 202 else if (cpu_is_omap34xx())
203 base = OMAP34XX_IC_BASE; 203 base = OMAP34XX_IC_BASE;
204 204
205 BUG_ON(!base);
206
205 /* Static mapping, never released */ 207 /* Static mapping, never released */
206 bank->base_reg = ioremap(base, SZ_4K); 208 bank->base_reg = ioremap(base, SZ_4K);
207 if (!bank->base_reg) { 209 if (!bank->base_reg) {
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 3f59bd12cbbf..5fedc50c58e4 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -486,7 +486,7 @@ int __init omap_mux_init_signal(char *muxname, int val)
486static inline void omap_mux_decode(struct seq_file *s, u16 val) 486static inline void omap_mux_decode(struct seq_file *s, u16 val)
487{ 487{
488 char *flags[OMAP_MUX_MAX_NR_FLAGS]; 488 char *flags[OMAP_MUX_MAX_NR_FLAGS];
489 char mode[14]; 489 char mode[sizeof("OMAP_MUX_MODE") + 1];
490 int i = -1; 490 int i = -1;
491 491
492 sprintf(mode, "OMAP_MUX_MODE%d", val & 0x7); 492 sprintf(mode, "OMAP_MUX_MODE%d", val & 0x7);
@@ -553,6 +553,7 @@ static int omap_mux_dbg_board_show(struct seq_file *s, void *unused)
553 if (!m0_name) 553 if (!m0_name)
554 continue; 554 continue;
555 555
556 /* REVISIT: Needs to be updated if mode0 names get longer */
556 for (i = 0; i < OMAP_MUX_DEFNAME_LEN; i++) { 557 for (i = 0; i < OMAP_MUX_DEFNAME_LEN; i++) {
557 if (m0_name[i] == '\0') { 558 if (m0_name[i] == '\0') {
558 m0_def[i] = m0_name[i]; 559 m0_def[i] = m0_name[i];
@@ -968,6 +969,13 @@ static void __init omap_mux_init_list(struct omap_mux *superset)
968 } 969 }
969#endif 970#endif
970 971
972#if defined(CONFIG_OMAP_MUX) && defined(CONFIG_DEBUG_FS)
973 if (!superset->muxnames || !superset->muxnames[0]) {
974 superset++;
975 continue;
976 }
977#endif
978
971 entry = omap_mux_list_add(superset); 979 entry = omap_mux_list_add(superset);
972 if (!entry) { 980 if (!entry) {
973 printk(KERN_ERR "mux: Could not add entry\n"); 981 printk(KERN_ERR "mux: Could not add entry\n");
diff --git a/arch/arm/mach-omap2/mux34xx.c b/arch/arm/mach-omap2/mux34xx.c
index 68e0a595f9a1..07aa7b3c95f7 100644
--- a/arch/arm/mach-omap2/mux34xx.c
+++ b/arch/arm/mach-omap2/mux34xx.c
@@ -649,6 +649,53 @@ static struct omap_mux __initdata omap3_muxmodes[] = {
649 _OMAP3_MUXENTRY(UART3_TX_IRTX, 166, 649 _OMAP3_MUXENTRY(UART3_TX_IRTX, 166,
650 "uart3_tx_irtx", NULL, NULL, NULL, 650 "uart3_tx_irtx", NULL, NULL, NULL,
651 "gpio_166", NULL, NULL, "safe_mode"), 651 "gpio_166", NULL, NULL, "safe_mode"),
652
653 /* Only on 3630, see omap36xx_cbp_subset for the signals */
654 _OMAP3_MUXENTRY(GPMC_A11, 0,
655 NULL, NULL, NULL, NULL,
656 NULL, NULL, NULL, NULL),
657 _OMAP3_MUXENTRY(SAD2D_MBUSFLAG, 0,
658 NULL, NULL, NULL, NULL,
659 NULL, NULL, NULL, NULL),
660 _OMAP3_MUXENTRY(SAD2D_MREAD, 0,
661 NULL, NULL, NULL, NULL,
662 NULL, NULL, NULL, NULL),
663 _OMAP3_MUXENTRY(SAD2D_MWRITE, 0,
664 NULL, NULL, NULL, NULL,
665 NULL, NULL, NULL, NULL),
666 _OMAP3_MUXENTRY(SAD2D_SBUSFLAG, 0,
667 NULL, NULL, NULL, NULL,
668 NULL, NULL, NULL, NULL),
669 _OMAP3_MUXENTRY(SAD2D_SREAD, 0,
670 NULL, NULL, NULL, NULL,
671 NULL, NULL, NULL, NULL),
672 _OMAP3_MUXENTRY(SAD2D_SWRITE, 0,
673 NULL, NULL, NULL, NULL,
674 NULL, NULL, NULL, NULL),
675 _OMAP3_MUXENTRY(GPMC_A11, 0,
676 NULL, NULL, NULL, NULL,
677 NULL, NULL, NULL, NULL),
678 _OMAP3_MUXENTRY(SAD2D_MCAD28, 0,
679 NULL, NULL, NULL, NULL,
680 NULL, NULL, NULL, NULL),
681 _OMAP3_MUXENTRY(SAD2D_MCAD29, 0,
682 NULL, NULL, NULL, NULL,
683 NULL, NULL, NULL, NULL),
684 _OMAP3_MUXENTRY(SAD2D_MCAD32, 0,
685 NULL, NULL, NULL, NULL,
686 NULL, NULL, NULL, NULL),
687 _OMAP3_MUXENTRY(SAD2D_MCAD33, 0,
688 NULL, NULL, NULL, NULL,
689 NULL, NULL, NULL, NULL),
690 _OMAP3_MUXENTRY(SAD2D_MCAD34, 0,
691 NULL, NULL, NULL, NULL,
692 NULL, NULL, NULL, NULL),
693 _OMAP3_MUXENTRY(SAD2D_MCAD35, 0,
694 NULL, NULL, NULL, NULL,
695 NULL, NULL, NULL, NULL),
696 _OMAP3_MUXENTRY(SAD2D_MCAD36, 0,
697 NULL, NULL, NULL, NULL,
698 NULL, NULL, NULL, NULL),
652 { .reg_offset = OMAP_MUX_TERMINATOR }, 699 { .reg_offset = OMAP_MUX_TERMINATOR },
653}; 700};
654 701
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 8c964bec8159..e10a02df6e1d 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -36,7 +36,13 @@
36#define UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV 0x52 36#define UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV 0x52
37#define UART_OMAP_WER 0x17 /* Wake-up enable register */ 37#define UART_OMAP_WER 0x17 /* Wake-up enable register */
38 38
39#define DEFAULT_TIMEOUT (5 * HZ) 39/*
40 * NOTE: By default the serial timeout is disabled as it causes lost characters
41 * over the serial ports. This means that the UART clocks will stay on until
42 * disabled via sysfs. This also causes that any deeper omap sleep states are
43 * blocked.
44 */
45#define DEFAULT_TIMEOUT 0
40 46
41struct omap_uart_state { 47struct omap_uart_state {
42 int num; 48 int num;
@@ -422,7 +428,8 @@ static void omap_uart_idle_init(struct omap_uart_state *uart)
422 uart->timeout = DEFAULT_TIMEOUT; 428 uart->timeout = DEFAULT_TIMEOUT;
423 setup_timer(&uart->timer, omap_uart_idle_timer, 429 setup_timer(&uart->timer, omap_uart_idle_timer,
424 (unsigned long) uart); 430 (unsigned long) uart);
425 mod_timer(&uart->timer, jiffies + uart->timeout); 431 if (uart->timeout)
432 mod_timer(&uart->timer, jiffies + uart->timeout);
426 omap_uart_smart_idle_enable(uart, 0); 433 omap_uart_smart_idle_enable(uart, 0);
427 434
428 if (cpu_is_omap34xx()) { 435 if (cpu_is_omap34xx()) {
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
index d9f8c844c385..4becbdd1935c 100644
--- a/arch/arm/plat-omap/clock.c
+++ b/arch/arm/plat-omap/clock.c
@@ -391,7 +391,7 @@ static struct dentry *clk_debugfs_root;
391static int clk_debugfs_register_one(struct clk *c) 391static int clk_debugfs_register_one(struct clk *c)
392{ 392{
393 int err; 393 int err;
394 struct dentry *d, *child; 394 struct dentry *d, *child, *child_tmp;
395 struct clk *pa = c->parent; 395 struct clk *pa = c->parent;
396 char s[255]; 396 char s[255];
397 char *p = s; 397 char *p = s;
@@ -423,7 +423,7 @@ static int clk_debugfs_register_one(struct clk *c)
423 423
424err_out: 424err_out:
425 d = c->dent; 425 d = c->dent;
426 list_for_each_entry(child, &d->d_subdirs, d_u.d_child) 426 list_for_each_entry_safe(child, child_tmp, &d->d_subdirs, d_u.d_child)
427 debugfs_remove(child); 427 debugfs_remove(child);
428 debugfs_remove(c->dent); 428 debugfs_remove(c->dent);
429 return err; 429 return err;
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index d17620c50c28..d2422c766cca 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -750,6 +750,7 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
750} 750}
751#endif 751#endif
752 752
753#ifdef CONFIG_ARCH_OMAP1
753/* 754/*
754 * This only applies to chips that can't do both rising and falling edge 755 * This only applies to chips that can't do both rising and falling edge
755 * detection at once. For all other chips, this function is a noop. 756 * detection at once. For all other chips, this function is a noop.
@@ -760,11 +761,9 @@ static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio)
760 u32 l = 0; 761 u32 l = 0;
761 762
762 switch (bank->method) { 763 switch (bank->method) {
763#ifdef CONFIG_ARCH_OMAP1
764 case METHOD_MPUIO: 764 case METHOD_MPUIO:
765 reg += OMAP_MPUIO_GPIO_INT_EDGE; 765 reg += OMAP_MPUIO_GPIO_INT_EDGE;
766 break; 766 break;
767#endif
768#ifdef CONFIG_ARCH_OMAP15XX 767#ifdef CONFIG_ARCH_OMAP15XX
769 case METHOD_GPIO_1510: 768 case METHOD_GPIO_1510:
770 reg += OMAP1510_GPIO_INT_CONTROL; 769 reg += OMAP1510_GPIO_INT_CONTROL;
@@ -787,6 +786,7 @@ static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio)
787 786
788 __raw_writel(l, reg); 787 __raw_writel(l, reg);
789} 788}
789#endif
790 790
791static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) 791static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
792{ 792{
diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c
index 1e5648d3e3d8..2ed72013c2e2 100644
--- a/arch/arm/plat-omap/omap_device.c
+++ b/arch/arm/plat-omap/omap_device.c
@@ -89,16 +89,6 @@
89#define USE_WAKEUP_LAT 0 89#define USE_WAKEUP_LAT 0
90#define IGNORE_WAKEUP_LAT 1 90#define IGNORE_WAKEUP_LAT 1
91 91
92/* XXX this should be moved into a separate file */
93#if defined(CONFIG_ARCH_OMAP2420)
94# define OMAP_32KSYNCT_BASE 0x48004000
95#elif defined(CONFIG_ARCH_OMAP2430)
96# define OMAP_32KSYNCT_BASE 0x49020000
97#elif defined(CONFIG_ARCH_OMAP3430)
98# define OMAP_32KSYNCT_BASE 0x48320000
99#else
100# error Unknown OMAP device
101#endif
102 92
103/* Private functions */ 93/* Private functions */
104 94