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authorDaniel Vetter <daniel.vetter@ffwll.ch>2012-11-14 11:14:04 -0500
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-01-20 07:11:14 -0500
commit99584db33ba4f864777e2cfef5329ed1bf13f714 (patch)
tree92a59dfbe491e625d5b752ba1519e29afbb69e4a
parent4b5aed62121eddfc47fd8f2739ca6b802b97390e (diff)
drm/i915: extract hangcheck/reset/error_state state into substruct
This has been sprinkled all over the place in dev_priv. I think it'd be good to also move all the code into a separate file like i915_gem_error.c, but that's for another patch. Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r--drivers/gpu/drm/i915/i915_debugfs.c10
-rw-r--r--drivers/gpu/drm/i915/i915_dma.c6
-rw-r--r--drivers/gpu/drm/i915/i915_drv.c8
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h39
-rw-r--r--drivers/gpu/drm/i915/i915_gem.c10
-rw-r--r--drivers/gpu/drm/i915/i915_irq.c59
-rw-r--r--drivers/gpu/drm/i915/intel_ringbuffer.c2
7 files changed, 73 insertions, 61 deletions
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 90a6fc506dd5..3b1bf4e70d94 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -814,11 +814,11 @@ static int i915_error_state_open(struct inode *inode, struct file *file)
814 814
815 error_priv->dev = dev; 815 error_priv->dev = dev;
816 816
817 spin_lock_irqsave(&dev_priv->error_lock, flags); 817 spin_lock_irqsave(&dev_priv->gpu_error.lock, flags);
818 error_priv->error = dev_priv->first_error; 818 error_priv->error = dev_priv->gpu_error.first_error;
819 if (error_priv->error) 819 if (error_priv->error)
820 kref_get(&error_priv->error->ref); 820 kref_get(&error_priv->error->ref);
821 spin_unlock_irqrestore(&dev_priv->error_lock, flags); 821 spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags);
822 822
823 return single_open(file, i915_error_state, error_priv); 823 return single_open(file, i915_error_state, error_priv);
824} 824}
@@ -1727,7 +1727,7 @@ i915_ring_stop_read(struct file *filp,
1727 int len; 1727 int len;
1728 1728
1729 len = snprintf(buf, sizeof(buf), 1729 len = snprintf(buf, sizeof(buf),
1730 "0x%08x\n", dev_priv->stop_rings); 1730 "0x%08x\n", dev_priv->gpu_error.stop_rings);
1731 1731
1732 if (len > sizeof(buf)) 1732 if (len > sizeof(buf))
1733 len = sizeof(buf); 1733 len = sizeof(buf);
@@ -1763,7 +1763,7 @@ i915_ring_stop_write(struct file *filp,
1763 if (ret) 1763 if (ret)
1764 return ret; 1764 return ret;
1765 1765
1766 dev_priv->stop_rings = val; 1766 dev_priv->gpu_error.stop_rings = val;
1767 mutex_unlock(&dev->struct_mutex); 1767 mutex_unlock(&dev->struct_mutex);
1768 1768
1769 return cnt; 1769 return cnt;
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 3f70178c63ca..11c7aa80e29b 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1605,7 +1605,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
1605 pci_enable_msi(dev->pdev); 1605 pci_enable_msi(dev->pdev);
1606 1606
1607 spin_lock_init(&dev_priv->irq_lock); 1607 spin_lock_init(&dev_priv->irq_lock);
1608 spin_lock_init(&dev_priv->error_lock); 1608 spin_lock_init(&dev_priv->gpu_error.lock);
1609 spin_lock_init(&dev_priv->rps.lock); 1609 spin_lock_init(&dev_priv->rps.lock);
1610 mutex_init(&dev_priv->dpio_lock); 1610 mutex_init(&dev_priv->dpio_lock);
1611 1611
@@ -1725,8 +1725,8 @@ int i915_driver_unload(struct drm_device *dev)
1725 } 1725 }
1726 1726
1727 /* Free error state after interrupts are fully disabled. */ 1727 /* Free error state after interrupts are fully disabled. */
1728 del_timer_sync(&dev_priv->hangcheck_timer); 1728 del_timer_sync(&dev_priv->gpu_error.hangcheck_timer);
1729 cancel_work_sync(&dev_priv->error_work); 1729 cancel_work_sync(&dev_priv->gpu_error.work);
1730 i915_destroy_error_state(dev); 1730 i915_destroy_error_state(dev);
1731 1731
1732 if (dev->pdev->msi_enabled) 1732 if (dev->pdev->msi_enabled)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index c8cbc32fe8db..3ff8e73f4341 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -779,9 +779,9 @@ int intel_gpu_reset(struct drm_device *dev)
779 } 779 }
780 780
781 /* Also reset the gpu hangman. */ 781 /* Also reset the gpu hangman. */
782 if (dev_priv->stop_rings) { 782 if (dev_priv->gpu_error.stop_rings) {
783 DRM_DEBUG("Simulated gpu hang, resetting stop_rings\n"); 783 DRM_DEBUG("Simulated gpu hang, resetting stop_rings\n");
784 dev_priv->stop_rings = 0; 784 dev_priv->gpu_error.stop_rings = 0;
785 if (ret == -ENODEV) { 785 if (ret == -ENODEV) {
786 DRM_ERROR("Reset not implemented, but ignoring " 786 DRM_ERROR("Reset not implemented, but ignoring "
787 "error for simulated gpu hangs\n"); 787 "error for simulated gpu hangs\n");
@@ -820,12 +820,12 @@ int i915_reset(struct drm_device *dev)
820 i915_gem_reset(dev); 820 i915_gem_reset(dev);
821 821
822 ret = -ENODEV; 822 ret = -ENODEV;
823 if (get_seconds() - dev_priv->last_gpu_reset < 5) 823 if (get_seconds() - dev_priv->gpu_error.last_reset < 5)
824 DRM_ERROR("GPU hanging too fast, declaring wedged!\n"); 824 DRM_ERROR("GPU hanging too fast, declaring wedged!\n");
825 else 825 else
826 ret = intel_gpu_reset(dev); 826 ret = intel_gpu_reset(dev);
827 827
828 dev_priv->last_gpu_reset = get_seconds(); 828 dev_priv->gpu_error.last_reset = get_seconds();
829 if (ret) { 829 if (ret) {
830 DRM_ERROR("Failed to reset chip.\n"); 830 DRM_ERROR("Failed to reset chip.\n");
831 mutex_unlock(&dev->struct_mutex); 831 mutex_unlock(&dev->struct_mutex);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index ea3226852ea8..dfe0e747c4f7 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -766,6 +766,28 @@ struct i915_gem_mm {
766 u32 object_count; 766 u32 object_count;
767}; 767};
768 768
769struct i915_gpu_error {
770 /* For hangcheck timer */
771#define DRM_I915_HANGCHECK_PERIOD 1500 /* in ms */
772#define DRM_I915_HANGCHECK_JIFFIES msecs_to_jiffies(DRM_I915_HANGCHECK_PERIOD)
773 struct timer_list hangcheck_timer;
774 int hangcheck_count;
775 uint32_t last_acthd[I915_NUM_RINGS];
776 uint32_t prev_instdone[I915_NUM_INSTDONE_REG];
777
778 /* For reset and error_state handling. */
779 spinlock_t lock;
780 /* Protected by the above dev->gpu_error.lock. */
781 struct drm_i915_error_state *first_error;
782 struct work_struct work;
783 struct completion completion;
784
785 unsigned long last_reset;
786
787 /* For gpu hang simulation. */
788 unsigned int stop_rings;
789};
790
769typedef struct drm_i915_private { 791typedef struct drm_i915_private {
770 struct drm_device *dev; 792 struct drm_device *dev;
771 struct kmem_cache *slab; 793 struct kmem_cache *slab;
@@ -829,16 +851,6 @@ typedef struct drm_i915_private {
829 int num_pipe; 851 int num_pipe;
830 int num_pch_pll; 852 int num_pch_pll;
831 853
832 /* For hangcheck timer */
833#define DRM_I915_HANGCHECK_PERIOD 1500 /* in ms */
834#define DRM_I915_HANGCHECK_JIFFIES msecs_to_jiffies(DRM_I915_HANGCHECK_PERIOD)
835 struct timer_list hangcheck_timer;
836 int hangcheck_count;
837 uint32_t last_acthd[I915_NUM_RINGS];
838 uint32_t prev_instdone[I915_NUM_INSTDONE_REG];
839
840 unsigned int stop_rings;
841
842 unsigned long cfb_size; 854 unsigned long cfb_size;
843 unsigned int cfb_fb; 855 unsigned int cfb_fb;
844 enum plane cfb_plane; 856 enum plane cfb_plane;
@@ -886,11 +898,6 @@ typedef struct drm_i915_private {
886 898
887 unsigned int fsb_freq, mem_freq, is_ddr3; 899 unsigned int fsb_freq, mem_freq, is_ddr3;
888 900
889 spinlock_t error_lock;
890 /* Protected by dev->error_lock. */
891 struct drm_i915_error_state *first_error;
892 struct work_struct error_work;
893 struct completion error_completion;
894 struct workqueue_struct *wq; 901 struct workqueue_struct *wq;
895 902
896 /* Display functions */ 903 /* Display functions */
@@ -949,7 +956,7 @@ typedef struct drm_i915_private {
949 struct drm_mm_node *compressed_fb; 956 struct drm_mm_node *compressed_fb;
950 struct drm_mm_node *compressed_llb; 957 struct drm_mm_node *compressed_llb;
951 958
952 unsigned long last_gpu_reset; 959 struct i915_gpu_error gpu_error;
953 960
954 /* list of fbdev register on this device */ 961 /* list of fbdev register on this device */
955 struct intel_fbdev *fbdev; 962 struct intel_fbdev *fbdev;
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index e4132ffb7609..95e022e7a26e 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -90,7 +90,7 @@ static int
90i915_gem_wait_for_error(struct drm_device *dev) 90i915_gem_wait_for_error(struct drm_device *dev)
91{ 91{
92 struct drm_i915_private *dev_priv = dev->dev_private; 92 struct drm_i915_private *dev_priv = dev->dev_private;
93 struct completion *x = &dev_priv->error_completion; 93 struct completion *x = &dev_priv->gpu_error.completion;
94 unsigned long flags; 94 unsigned long flags;
95 int ret; 95 int ret;
96 96
@@ -943,7 +943,7 @@ i915_gem_check_wedge(struct drm_i915_private *dev_priv,
943 bool interruptible) 943 bool interruptible)
944{ 944{
945 if (atomic_read(&dev_priv->mm.wedged)) { 945 if (atomic_read(&dev_priv->mm.wedged)) {
946 struct completion *x = &dev_priv->error_completion; 946 struct completion *x = &dev_priv->gpu_error.completion;
947 bool recovery_complete; 947 bool recovery_complete;
948 unsigned long flags; 948 unsigned long flags;
949 949
@@ -2045,7 +2045,7 @@ i915_add_request(struct intel_ring_buffer *ring,
2045 2045
2046 if (!dev_priv->mm.suspended) { 2046 if (!dev_priv->mm.suspended) {
2047 if (i915_enable_hangcheck) { 2047 if (i915_enable_hangcheck) {
2048 mod_timer(&dev_priv->hangcheck_timer, 2048 mod_timer(&dev_priv->gpu_error.hangcheck_timer,
2049 round_jiffies_up(jiffies + DRM_I915_HANGCHECK_JIFFIES)); 2049 round_jiffies_up(jiffies + DRM_I915_HANGCHECK_JIFFIES));
2050 } 2050 }
2051 if (was_empty) { 2051 if (was_empty) {
@@ -3803,7 +3803,7 @@ i915_gem_idle(struct drm_device *dev)
3803 * And not confound mm.suspended! 3803 * And not confound mm.suspended!
3804 */ 3804 */
3805 dev_priv->mm.suspended = 1; 3805 dev_priv->mm.suspended = 1;
3806 del_timer_sync(&dev_priv->hangcheck_timer); 3806 del_timer_sync(&dev_priv->gpu_error.hangcheck_timer);
3807 3807
3808 i915_kernel_lost_context(dev); 3808 i915_kernel_lost_context(dev);
3809 i915_gem_cleanup_ringbuffer(dev); 3809 i915_gem_cleanup_ringbuffer(dev);
@@ -4064,7 +4064,7 @@ i915_gem_load(struct drm_device *dev)
4064 INIT_LIST_HEAD(&dev_priv->fence_regs[i].lru_list); 4064 INIT_LIST_HEAD(&dev_priv->fence_regs[i].lru_list);
4065 INIT_DELAYED_WORK(&dev_priv->mm.retire_work, 4065 INIT_DELAYED_WORK(&dev_priv->mm.retire_work,
4066 i915_gem_retire_work_handler); 4066 i915_gem_retire_work_handler);
4067 init_completion(&dev_priv->error_completion); 4067 init_completion(&dev_priv->gpu_error.completion);
4068 4068
4069 /* On GEN3 we really need to make sure the ARB C3 LP bit is set */ 4069 /* On GEN3 we really need to make sure the ARB C3 LP bit is set */
4070 if (IS_GEN3(dev)) { 4070 if (IS_GEN3(dev)) {
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index cc49a6ddc052..c768ebdf8a27 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -356,8 +356,8 @@ static void notify_ring(struct drm_device *dev,
356 356
357 wake_up_all(&ring->irq_queue); 357 wake_up_all(&ring->irq_queue);
358 if (i915_enable_hangcheck) { 358 if (i915_enable_hangcheck) {
359 dev_priv->hangcheck_count = 0; 359 dev_priv->gpu_error.hangcheck_count = 0;
360 mod_timer(&dev_priv->hangcheck_timer, 360 mod_timer(&dev_priv->gpu_error.hangcheck_timer,
361 round_jiffies_up(jiffies + DRM_I915_HANGCHECK_JIFFIES)); 361 round_jiffies_up(jiffies + DRM_I915_HANGCHECK_JIFFIES));
362 } 362 }
363} 363}
@@ -863,7 +863,7 @@ done:
863static void i915_error_work_func(struct work_struct *work) 863static void i915_error_work_func(struct work_struct *work)
864{ 864{
865 drm_i915_private_t *dev_priv = container_of(work, drm_i915_private_t, 865 drm_i915_private_t *dev_priv = container_of(work, drm_i915_private_t,
866 error_work); 866 gpu_error.work);
867 struct drm_device *dev = dev_priv->dev; 867 struct drm_device *dev = dev_priv->dev;
868 char *error_event[] = { "ERROR=1", NULL }; 868 char *error_event[] = { "ERROR=1", NULL };
869 char *reset_event[] = { "RESET=1", NULL }; 869 char *reset_event[] = { "RESET=1", NULL };
@@ -878,7 +878,7 @@ static void i915_error_work_func(struct work_struct *work)
878 atomic_set(&dev_priv->mm.wedged, 0); 878 atomic_set(&dev_priv->mm.wedged, 0);
879 kobject_uevent_env(&dev->primary->kdev.kobj, KOBJ_CHANGE, reset_done_event); 879 kobject_uevent_env(&dev->primary->kdev.kobj, KOBJ_CHANGE, reset_done_event);
880 } 880 }
881 complete_all(&dev_priv->error_completion); 881 complete_all(&dev_priv->gpu_error.completion);
882 } 882 }
883} 883}
884 884
@@ -1255,9 +1255,9 @@ static void i915_capture_error_state(struct drm_device *dev)
1255 unsigned long flags; 1255 unsigned long flags;
1256 int i, pipe; 1256 int i, pipe;
1257 1257
1258 spin_lock_irqsave(&dev_priv->error_lock, flags); 1258 spin_lock_irqsave(&dev_priv->gpu_error.lock, flags);
1259 error = dev_priv->first_error; 1259 error = dev_priv->gpu_error.first_error;
1260 spin_unlock_irqrestore(&dev_priv->error_lock, flags); 1260 spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags);
1261 if (error) 1261 if (error)
1262 return; 1262 return;
1263 1263
@@ -1341,12 +1341,12 @@ static void i915_capture_error_state(struct drm_device *dev)
1341 error->overlay = intel_overlay_capture_error_state(dev); 1341 error->overlay = intel_overlay_capture_error_state(dev);
1342 error->display = intel_display_capture_error_state(dev); 1342 error->display = intel_display_capture_error_state(dev);
1343 1343
1344 spin_lock_irqsave(&dev_priv->error_lock, flags); 1344 spin_lock_irqsave(&dev_priv->gpu_error.lock, flags);
1345 if (dev_priv->first_error == NULL) { 1345 if (dev_priv->gpu_error.first_error == NULL) {
1346 dev_priv->first_error = error; 1346 dev_priv->gpu_error.first_error = error;
1347 error = NULL; 1347 error = NULL;
1348 } 1348 }
1349 spin_unlock_irqrestore(&dev_priv->error_lock, flags); 1349 spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags);
1350 1350
1351 if (error) 1351 if (error)
1352 i915_error_state_free(&error->ref); 1352 i915_error_state_free(&error->ref);
@@ -1358,10 +1358,10 @@ void i915_destroy_error_state(struct drm_device *dev)
1358 struct drm_i915_error_state *error; 1358 struct drm_i915_error_state *error;
1359 unsigned long flags; 1359 unsigned long flags;
1360 1360
1361 spin_lock_irqsave(&dev_priv->error_lock, flags); 1361 spin_lock_irqsave(&dev_priv->gpu_error.lock, flags);
1362 error = dev_priv->first_error; 1362 error = dev_priv->gpu_error.first_error;
1363 dev_priv->first_error = NULL; 1363 dev_priv->gpu_error.first_error = NULL;
1364 spin_unlock_irqrestore(&dev_priv->error_lock, flags); 1364 spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags);
1365 1365
1366 if (error) 1366 if (error)
1367 kref_put(&error->ref, i915_error_state_free); 1367 kref_put(&error->ref, i915_error_state_free);
@@ -1482,7 +1482,7 @@ void i915_handle_error(struct drm_device *dev, bool wedged)
1482 i915_report_and_clear_eir(dev); 1482 i915_report_and_clear_eir(dev);
1483 1483
1484 if (wedged) { 1484 if (wedged) {
1485 INIT_COMPLETION(dev_priv->error_completion); 1485 INIT_COMPLETION(dev_priv->gpu_error.completion);
1486 atomic_set(&dev_priv->mm.wedged, 1); 1486 atomic_set(&dev_priv->mm.wedged, 1);
1487 1487
1488 /* 1488 /*
@@ -1492,7 +1492,7 @@ void i915_handle_error(struct drm_device *dev, bool wedged)
1492 wake_up_all(&ring->irq_queue); 1492 wake_up_all(&ring->irq_queue);
1493 } 1493 }
1494 1494
1495 queue_work(dev_priv->wq, &dev_priv->error_work); 1495 queue_work(dev_priv->wq, &dev_priv->gpu_error.work);
1496} 1496}
1497 1497
1498static void i915_pageflip_stall_check(struct drm_device *dev, int pipe) 1498static void i915_pageflip_stall_check(struct drm_device *dev, int pipe)
@@ -1723,7 +1723,7 @@ static bool i915_hangcheck_hung(struct drm_device *dev)
1723{ 1723{
1724 drm_i915_private_t *dev_priv = dev->dev_private; 1724 drm_i915_private_t *dev_priv = dev->dev_private;
1725 1725
1726 if (dev_priv->hangcheck_count++ > 1) { 1726 if (dev_priv->gpu_error.hangcheck_count++ > 1) {
1727 bool hung = true; 1727 bool hung = true;
1728 1728
1729 DRM_ERROR("Hangcheck timer elapsed... GPU hung\n"); 1729 DRM_ERROR("Hangcheck timer elapsed... GPU hung\n");
@@ -1782,25 +1782,29 @@ void i915_hangcheck_elapsed(unsigned long data)
1782 goto repeat; 1782 goto repeat;
1783 } 1783 }
1784 1784
1785 dev_priv->hangcheck_count = 0; 1785 dev_priv->gpu_error.hangcheck_count = 0;
1786 return; 1786 return;
1787 } 1787 }
1788 1788
1789 i915_get_extra_instdone(dev, instdone); 1789 i915_get_extra_instdone(dev, instdone);
1790 if (memcmp(dev_priv->last_acthd, acthd, sizeof(acthd)) == 0 && 1790 if (memcmp(dev_priv->gpu_error.last_acthd, acthd,
1791 memcmp(dev_priv->prev_instdone, instdone, sizeof(instdone)) == 0) { 1791 sizeof(acthd)) == 0 &&
1792 memcmp(dev_priv->gpu_error.prev_instdone, instdone,
1793 sizeof(instdone)) == 0) {
1792 if (i915_hangcheck_hung(dev)) 1794 if (i915_hangcheck_hung(dev))
1793 return; 1795 return;
1794 } else { 1796 } else {
1795 dev_priv->hangcheck_count = 0; 1797 dev_priv->gpu_error.hangcheck_count = 0;
1796 1798
1797 memcpy(dev_priv->last_acthd, acthd, sizeof(acthd)); 1799 memcpy(dev_priv->gpu_error.last_acthd, acthd,
1798 memcpy(dev_priv->prev_instdone, instdone, sizeof(instdone)); 1800 sizeof(acthd));
1801 memcpy(dev_priv->gpu_error.prev_instdone, instdone,
1802 sizeof(instdone));
1799 } 1803 }
1800 1804
1801repeat: 1805repeat:
1802 /* Reset timer case chip hangs without another request being added */ 1806 /* Reset timer case chip hangs without another request being added */
1803 mod_timer(&dev_priv->hangcheck_timer, 1807 mod_timer(&dev_priv->gpu_error.hangcheck_timer,
1804 round_jiffies_up(jiffies + DRM_I915_HANGCHECK_JIFFIES)); 1808 round_jiffies_up(jiffies + DRM_I915_HANGCHECK_JIFFIES));
1805} 1809}
1806 1810
@@ -2769,11 +2773,12 @@ void intel_irq_init(struct drm_device *dev)
2769 struct drm_i915_private *dev_priv = dev->dev_private; 2773 struct drm_i915_private *dev_priv = dev->dev_private;
2770 2774
2771 INIT_WORK(&dev_priv->hotplug_work, i915_hotplug_work_func); 2775 INIT_WORK(&dev_priv->hotplug_work, i915_hotplug_work_func);
2772 INIT_WORK(&dev_priv->error_work, i915_error_work_func); 2776 INIT_WORK(&dev_priv->gpu_error.work, i915_error_work_func);
2773 INIT_WORK(&dev_priv->rps.work, gen6_pm_rps_work); 2777 INIT_WORK(&dev_priv->rps.work, gen6_pm_rps_work);
2774 INIT_WORK(&dev_priv->l3_parity.error_work, ivybridge_parity_work); 2778 INIT_WORK(&dev_priv->l3_parity.error_work, ivybridge_parity_work);
2775 2779
2776 setup_timer(&dev_priv->hangcheck_timer, i915_hangcheck_elapsed, 2780 setup_timer(&dev_priv->gpu_error.hangcheck_timer,
2781 i915_hangcheck_elapsed,
2777 (unsigned long) dev); 2782 (unsigned long) dev);
2778 2783
2779 pm_qos_add_request(&dev_priv->pm_qos, PM_QOS_CPU_DMA_LATENCY, PM_QOS_DEFAULT_VALUE); 2784 pm_qos_add_request(&dev_priv->pm_qos, PM_QOS_CPU_DMA_LATENCY, PM_QOS_DEFAULT_VALUE);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index ce1d07487402..d6b06aa4c05c 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1491,7 +1491,7 @@ void intel_ring_advance(struct intel_ring_buffer *ring)
1491 struct drm_i915_private *dev_priv = ring->dev->dev_private; 1491 struct drm_i915_private *dev_priv = ring->dev->dev_private;
1492 1492
1493 ring->tail &= ring->size - 1; 1493 ring->tail &= ring->size - 1;
1494 if (dev_priv->stop_rings & intel_ring_flag(ring)) 1494 if (dev_priv->gpu_error.stop_rings & intel_ring_flag(ring))
1495 return; 1495 return;
1496 ring->write_tail(ring, ring->tail); 1496 ring->write_tail(ring, ring->tail);
1497} 1497}