diff options
author | Arnd Bergmann <arnd@arndb.de> | 2014-07-26 11:54:21 -0400 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2014-07-26 11:54:21 -0400 |
commit | 944483d0330bb497549977aa9649be6b7d0ede37 (patch) | |
tree | 545d9c5498e0dbe7697b36ad50379a815b48ec1b | |
parent | 03eea7cda20128f97fa281650ada69fe19194d56 (diff) | |
parent | fd9f5edf6e7e8a666f3672fd809f3289c2da388a (diff) |
Merge branch 'next/fixes-non-critical' into next/soc
This resolves a nontrivial conflict against a bug fix
in another branch.
Conflicts:
arch/arm/mach-exynos/pm.c
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-rw-r--r-- | MAINTAINERS | 1 | ||||
-rw-r--r-- | arch/arm/boot/dts/omap5.dtsi | 60 | ||||
-rw-r--r-- | arch/arm/mach-exynos/platsmp.c | 66 | ||||
-rw-r--r-- | arch/arm/mach-exynos/pm.c | 66 | ||||
-rw-r--r-- | arch/arm/mach-omap1/ocpi.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-omap2/gpmc-nand.c | 79 | ||||
-rw-r--r-- | arch/arm/mach-omap2/usb-tusb6010.c | 1 |
7 files changed, 164 insertions, 110 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index 16458d98594f..fb784e03db0d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS | |||
@@ -1364,6 +1364,7 @@ F: drivers/pinctrl/pinctrl-st.c | |||
1364 | F: drivers/media/rc/st_rc.c | 1364 | F: drivers/media/rc/st_rc.c |
1365 | F: drivers/i2c/busses/i2c-st.c | 1365 | F: drivers/i2c/busses/i2c-st.c |
1366 | F: drivers/tty/serial/st-asc.c | 1366 | F: drivers/tty/serial/st-asc.c |
1367 | F: drivers/mmc/host/sdhci-st.c | ||
1367 | 1368 | ||
1368 | ARM/TECHNOLOGIC SYSTEMS TS7250 MACHINE SUPPORT | 1369 | ARM/TECHNOLOGIC SYSTEMS TS7250 MACHINE SUPPORT |
1369 | M: Lennert Buytenhek <kernel@wantstofly.org> | 1370 | M: Lennert Buytenhek <kernel@wantstofly.org> |
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index cbf6a173088a..fc8df1739f39 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi | |||
@@ -987,6 +987,66 @@ | |||
987 | dma-names = "audio_tx"; | 987 | dma-names = "audio_tx"; |
988 | }; | 988 | }; |
989 | }; | 989 | }; |
990 | |||
991 | abb_mpu: regulator-abb-mpu { | ||
992 | compatible = "ti,abb-v2"; | ||
993 | regulator-name = "abb_mpu"; | ||
994 | #address-cells = <0>; | ||
995 | #size-cells = <0>; | ||
996 | clocks = <&sys_clkin>; | ||
997 | ti,settling-time = <50>; | ||
998 | ti,clock-cycles = <16>; | ||
999 | |||
1000 | reg = <0x4ae07cdc 0x8>, <0x4ae06014 0x4>, | ||
1001 | <0x4a0021c4 0x8>, <0x4ae0c318 0x4>; | ||
1002 | reg-names = "base-address", "int-address", | ||
1003 | "efuse-address", "ldo-address"; | ||
1004 | ti,tranxdone-status-mask = <0x80>; | ||
1005 | /* LDOVBBMPU_MUX_CTRL */ | ||
1006 | ti,ldovbb-override-mask = <0x400>; | ||
1007 | /* LDOVBBMPU_VSET_OUT */ | ||
1008 | ti,ldovbb-vset-mask = <0x1F>; | ||
1009 | |||
1010 | /* | ||
1011 | * NOTE: only FBB mode used but actual vset will | ||
1012 | * determine final biasing | ||
1013 | */ | ||
1014 | ti,abb_info = < | ||
1015 | /*uV ABB efuse rbb_m fbb_m vset_m*/ | ||
1016 | 1060000 0 0x0 0 0x02000000 0x01F00000 | ||
1017 | 1250000 0 0x4 0 0x02000000 0x01F00000 | ||
1018 | >; | ||
1019 | }; | ||
1020 | |||
1021 | abb_mm: regulator-abb-mm { | ||
1022 | compatible = "ti,abb-v2"; | ||
1023 | regulator-name = "abb_mm"; | ||
1024 | #address-cells = <0>; | ||
1025 | #size-cells = <0>; | ||
1026 | clocks = <&sys_clkin>; | ||
1027 | ti,settling-time = <50>; | ||
1028 | ti,clock-cycles = <16>; | ||
1029 | |||
1030 | reg = <0x4ae07ce4 0x8>, <0x4ae06010 0x4>, | ||
1031 | <0x4a0021a4 0x8>, <0x4ae0c314 0x4>; | ||
1032 | reg-names = "base-address", "int-address", | ||
1033 | "efuse-address", "ldo-address"; | ||
1034 | ti,tranxdone-status-mask = <0x80000000>; | ||
1035 | /* LDOVBBMM_MUX_CTRL */ | ||
1036 | ti,ldovbb-override-mask = <0x400>; | ||
1037 | /* LDOVBBMM_VSET_OUT */ | ||
1038 | ti,ldovbb-vset-mask = <0x1F>; | ||
1039 | |||
1040 | /* | ||
1041 | * NOTE: only FBB mode used but actual vset will | ||
1042 | * determine final biasing | ||
1043 | */ | ||
1044 | ti,abb_info = < | ||
1045 | /*uV ABB efuse rbb_m fbb_m vset_m*/ | ||
1046 | 1025000 0 0x0 0 0x02000000 0x01F00000 | ||
1047 | 1120000 0 0x4 0 0x02000000 0x01F00000 | ||
1048 | >; | ||
1049 | }; | ||
990 | }; | 1050 | }; |
991 | }; | 1051 | }; |
992 | 1052 | ||
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c index 7c829989859c..2207598ce049 100644 --- a/arch/arm/mach-exynos/platsmp.c +++ b/arch/arm/mach-exynos/platsmp.c | |||
@@ -33,6 +33,72 @@ | |||
33 | 33 | ||
34 | extern void exynos4_secondary_startup(void); | 34 | extern void exynos4_secondary_startup(void); |
35 | 35 | ||
36 | /** | ||
37 | * exynos_core_power_down : power down the specified cpu | ||
38 | * @cpu : the cpu to power down | ||
39 | * | ||
40 | * Power down the specified cpu. The sequence must be finished by a | ||
41 | * call to cpu_do_idle() | ||
42 | * | ||
43 | */ | ||
44 | void exynos_cpu_power_down(int cpu) | ||
45 | { | ||
46 | pmu_raw_writel(0, EXYNOS_ARM_CORE_CONFIGURATION(cpu)); | ||
47 | } | ||
48 | |||
49 | /** | ||
50 | * exynos_cpu_power_up : power up the specified cpu | ||
51 | * @cpu : the cpu to power up | ||
52 | * | ||
53 | * Power up the specified cpu | ||
54 | */ | ||
55 | void exynos_cpu_power_up(int cpu) | ||
56 | { | ||
57 | pmu_raw_writel(S5P_CORE_LOCAL_PWR_EN, | ||
58 | EXYNOS_ARM_CORE_CONFIGURATION(cpu)); | ||
59 | } | ||
60 | |||
61 | /** | ||
62 | * exynos_cpu_power_state : returns the power state of the cpu | ||
63 | * @cpu : the cpu to retrieve the power state from | ||
64 | * | ||
65 | */ | ||
66 | int exynos_cpu_power_state(int cpu) | ||
67 | { | ||
68 | return (pmu_raw_readl(EXYNOS_ARM_CORE_STATUS(cpu)) & | ||
69 | S5P_CORE_LOCAL_PWR_EN); | ||
70 | } | ||
71 | |||
72 | /** | ||
73 | * exynos_cluster_power_down : power down the specified cluster | ||
74 | * @cluster : the cluster to power down | ||
75 | */ | ||
76 | void exynos_cluster_power_down(int cluster) | ||
77 | { | ||
78 | pmu_raw_writel(0, EXYNOS_COMMON_CONFIGURATION(cluster)); | ||
79 | } | ||
80 | |||
81 | /** | ||
82 | * exynos_cluster_power_up : power up the specified cluster | ||
83 | * @cluster : the cluster to power up | ||
84 | */ | ||
85 | void exynos_cluster_power_up(int cluster) | ||
86 | { | ||
87 | pmu_raw_writel(S5P_CORE_LOCAL_PWR_EN, | ||
88 | EXYNOS_COMMON_CONFIGURATION(cluster)); | ||
89 | } | ||
90 | |||
91 | /** | ||
92 | * exynos_cluster_power_state : returns the power state of the cluster | ||
93 | * @cluster : the cluster to retrieve the power state from | ||
94 | * | ||
95 | */ | ||
96 | int exynos_cluster_power_state(int cluster) | ||
97 | { | ||
98 | return (pmu_raw_readl(EXYNOS_COMMON_STATUS(cluster)) & | ||
99 | S5P_CORE_LOCAL_PWR_EN); | ||
100 | } | ||
101 | |||
36 | static inline void __iomem *cpu_boot_reg_base(void) | 102 | static inline void __iomem *cpu_boot_reg_base(void) |
37 | { | 103 | { |
38 | if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1) | 104 | if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1) |
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c index c4c6d98ada52..3e046a986e60 100644 --- a/arch/arm/mach-exynos/pm.c +++ b/arch/arm/mach-exynos/pm.c | |||
@@ -100,72 +100,6 @@ static int exynos_irq_set_wake(struct irq_data *data, unsigned int state) | |||
100 | return -ENOENT; | 100 | return -ENOENT; |
101 | } | 101 | } |
102 | 102 | ||
103 | /** | ||
104 | * exynos_core_power_down : power down the specified cpu | ||
105 | * @cpu : the cpu to power down | ||
106 | * | ||
107 | * Power down the specified cpu. The sequence must be finished by a | ||
108 | * call to cpu_do_idle() | ||
109 | * | ||
110 | */ | ||
111 | void exynos_cpu_power_down(int cpu) | ||
112 | { | ||
113 | pmu_raw_writel(0, EXYNOS_ARM_CORE_CONFIGURATION(cpu)); | ||
114 | } | ||
115 | |||
116 | /** | ||
117 | * exynos_cpu_power_up : power up the specified cpu | ||
118 | * @cpu : the cpu to power up | ||
119 | * | ||
120 | * Power up the specified cpu | ||
121 | */ | ||
122 | void exynos_cpu_power_up(int cpu) | ||
123 | { | ||
124 | pmu_raw_writel(S5P_CORE_LOCAL_PWR_EN, | ||
125 | EXYNOS_ARM_CORE_CONFIGURATION(cpu)); | ||
126 | } | ||
127 | |||
128 | /** | ||
129 | * exynos_cpu_power_state : returns the power state of the cpu | ||
130 | * @cpu : the cpu to retrieve the power state from | ||
131 | * | ||
132 | */ | ||
133 | int exynos_cpu_power_state(int cpu) | ||
134 | { | ||
135 | return (pmu_raw_readl(EXYNOS_ARM_CORE_STATUS(cpu)) & | ||
136 | S5P_CORE_LOCAL_PWR_EN); | ||
137 | } | ||
138 | |||
139 | /** | ||
140 | * exynos_cluster_power_down : power down the specified cluster | ||
141 | * @cluster : the cluster to power down | ||
142 | */ | ||
143 | void exynos_cluster_power_down(int cluster) | ||
144 | { | ||
145 | pmu_raw_writel(0, EXYNOS_COMMON_CONFIGURATION(cluster)); | ||
146 | } | ||
147 | |||
148 | /** | ||
149 | * exynos_cluster_power_up : power up the specified cluster | ||
150 | * @cluster : the cluster to power up | ||
151 | */ | ||
152 | void exynos_cluster_power_up(int cluster) | ||
153 | { | ||
154 | pmu_raw_writel(S5P_CORE_LOCAL_PWR_EN, | ||
155 | EXYNOS_COMMON_CONFIGURATION(cluster)); | ||
156 | } | ||
157 | |||
158 | /** | ||
159 | * exynos_cluster_power_state : returns the power state of the cluster | ||
160 | * @cluster : the cluster to retrieve the power state from | ||
161 | * | ||
162 | */ | ||
163 | int exynos_cluster_power_state(int cluster) | ||
164 | { | ||
165 | return (pmu_raw_readl(EXYNOS_COMMON_STATUS(cluster)) & | ||
166 | S5P_CORE_LOCAL_PWR_EN); | ||
167 | } | ||
168 | |||
169 | #define EXYNOS_BOOT_VECTOR_ADDR (samsung_rev() == EXYNOS4210_REV_1_1 ? \ | 103 | #define EXYNOS_BOOT_VECTOR_ADDR (samsung_rev() == EXYNOS4210_REV_1_1 ? \ |
170 | pmu_base_addr + S5P_INFORM7 : \ | 104 | pmu_base_addr + S5P_INFORM7 : \ |
171 | (samsung_rev() == EXYNOS4210_REV_1_0 ? \ | 105 | (samsung_rev() == EXYNOS4210_REV_1_0 ? \ |
diff --git a/arch/arm/mach-omap1/ocpi.c b/arch/arm/mach-omap1/ocpi.c index 238170cab5b7..44a3d19eb481 100644 --- a/arch/arm/mach-omap1/ocpi.c +++ b/arch/arm/mach-omap1/ocpi.c | |||
@@ -55,7 +55,6 @@ static struct clk *ocpi_ck; | |||
55 | 55 | ||
56 | /* | 56 | /* |
57 | * Enables device access to OMAP buses via the OCPI bridge | 57 | * Enables device access to OMAP buses via the OCPI bridge |
58 | * FIXME: Add locking | ||
59 | */ | 58 | */ |
60 | int ocpi_enable(void) | 59 | int ocpi_enable(void) |
61 | { | 60 | { |
diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c index 17cd39360afe..7ab486eeb769 100644 --- a/arch/arm/mach-omap2/gpmc-nand.c +++ b/arch/arm/mach-omap2/gpmc-nand.c | |||
@@ -24,25 +24,6 @@ | |||
24 | /* minimum size for IO mapping */ | 24 | /* minimum size for IO mapping */ |
25 | #define NAND_IO_SIZE 4 | 25 | #define NAND_IO_SIZE 4 |
26 | 26 | ||
27 | static struct resource gpmc_nand_resource[] = { | ||
28 | { | ||
29 | .flags = IORESOURCE_MEM, | ||
30 | }, | ||
31 | { | ||
32 | .flags = IORESOURCE_IRQ, | ||
33 | }, | ||
34 | { | ||
35 | .flags = IORESOURCE_IRQ, | ||
36 | }, | ||
37 | }; | ||
38 | |||
39 | static struct platform_device gpmc_nand_device = { | ||
40 | .name = "omap2-nand", | ||
41 | .id = 0, | ||
42 | .num_resources = ARRAY_SIZE(gpmc_nand_resource), | ||
43 | .resource = gpmc_nand_resource, | ||
44 | }; | ||
45 | |||
46 | static bool gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt) | 27 | static bool gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt) |
47 | { | 28 | { |
48 | /* platforms which support all ECC schemes */ | 29 | /* platforms which support all ECC schemes */ |
@@ -93,43 +74,41 @@ int gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data, | |||
93 | { | 74 | { |
94 | int err = 0; | 75 | int err = 0; |
95 | struct gpmc_settings s; | 76 | struct gpmc_settings s; |
96 | struct device *dev = &gpmc_nand_device.dev; | 77 | struct platform_device *pdev; |
97 | 78 | struct resource gpmc_nand_res[] = { | |
98 | memset(&s, 0, sizeof(struct gpmc_settings)); | 79 | { .flags = IORESOURCE_MEM, }, |
80 | { .flags = IORESOURCE_IRQ, }, | ||
81 | { .flags = IORESOURCE_IRQ, }, | ||
82 | }; | ||
99 | 83 | ||
100 | gpmc_nand_device.dev.platform_data = gpmc_nand_data; | 84 | BUG_ON(gpmc_nand_data->cs >= GPMC_CS_NUM); |
101 | 85 | ||
102 | err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE, | 86 | err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE, |
103 | (unsigned long *)&gpmc_nand_resource[0].start); | 87 | (unsigned long *)&gpmc_nand_res[0].start); |
104 | if (err < 0) { | 88 | if (err < 0) { |
105 | dev_err(dev, "Cannot request GPMC CS %d, error %d\n", | 89 | pr_err("omap2-gpmc: Cannot request GPMC CS %d, error %d\n", |
106 | gpmc_nand_data->cs, err); | 90 | gpmc_nand_data->cs, err); |
107 | return err; | 91 | return err; |
108 | } | 92 | } |
109 | 93 | gpmc_nand_res[0].end = gpmc_nand_res[0].start + NAND_IO_SIZE - 1; | |
110 | gpmc_nand_resource[0].end = gpmc_nand_resource[0].start + | 94 | gpmc_nand_res[1].start = gpmc_get_client_irq(GPMC_IRQ_FIFOEVENTENABLE); |
111 | NAND_IO_SIZE - 1; | 95 | gpmc_nand_res[2].start = gpmc_get_client_irq(GPMC_IRQ_COUNT_EVENT); |
112 | |||
113 | gpmc_nand_resource[1].start = | ||
114 | gpmc_get_client_irq(GPMC_IRQ_FIFOEVENTENABLE); | ||
115 | gpmc_nand_resource[2].start = | ||
116 | gpmc_get_client_irq(GPMC_IRQ_COUNT_EVENT); | ||
117 | 96 | ||
118 | if (gpmc_t) { | 97 | if (gpmc_t) { |
119 | err = gpmc_cs_set_timings(gpmc_nand_data->cs, gpmc_t); | 98 | err = gpmc_cs_set_timings(gpmc_nand_data->cs, gpmc_t); |
120 | if (err < 0) { | 99 | if (err < 0) { |
121 | dev_err(dev, "Unable to set gpmc timings: %d\n", err); | 100 | pr_err("omap2-gpmc: Unable to set gpmc timings: %d\n", err); |
122 | return err; | 101 | return err; |
123 | } | 102 | } |
124 | } | 103 | } |
125 | 104 | ||
105 | memset(&s, 0, sizeof(struct gpmc_settings)); | ||
126 | if (gpmc_nand_data->of_node) | 106 | if (gpmc_nand_data->of_node) |
127 | gpmc_read_settings_dt(gpmc_nand_data->of_node, &s); | 107 | gpmc_read_settings_dt(gpmc_nand_data->of_node, &s); |
128 | else | 108 | else |
129 | gpmc_set_legacy(gpmc_nand_data, &s); | 109 | gpmc_set_legacy(gpmc_nand_data, &s); |
130 | 110 | ||
131 | s.device_nand = true; | 111 | s.device_nand = true; |
132 | |||
133 | err = gpmc_cs_program_settings(gpmc_nand_data->cs, &s); | 112 | err = gpmc_cs_program_settings(gpmc_nand_data->cs, &s); |
134 | if (err < 0) | 113 | if (err < 0) |
135 | goto out_free_cs; | 114 | goto out_free_cs; |
@@ -141,18 +120,34 @@ int gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data, | |||
141 | gpmc_update_nand_reg(&gpmc_nand_data->reg, gpmc_nand_data->cs); | 120 | gpmc_update_nand_reg(&gpmc_nand_data->reg, gpmc_nand_data->cs); |
142 | 121 | ||
143 | if (!gpmc_hwecc_bch_capable(gpmc_nand_data->ecc_opt)) { | 122 | if (!gpmc_hwecc_bch_capable(gpmc_nand_data->ecc_opt)) { |
144 | dev_err(dev, "Unsupported NAND ECC scheme selected\n"); | 123 | pr_err("omap2-nand: Unsupported NAND ECC scheme selected\n"); |
145 | return -EINVAL; | 124 | err = -EINVAL; |
125 | goto out_free_cs; | ||
146 | } | 126 | } |
147 | 127 | ||
148 | err = platform_device_register(&gpmc_nand_device); | 128 | |
149 | if (err < 0) { | 129 | pdev = platform_device_alloc("omap2-nand", gpmc_nand_data->cs); |
150 | dev_err(dev, "Unable to register NAND device\n"); | 130 | if (pdev) { |
151 | goto out_free_cs; | 131 | err = platform_device_add_resources(pdev, gpmc_nand_res, |
132 | ARRAY_SIZE(gpmc_nand_res)); | ||
133 | if (!err) | ||
134 | pdev->dev.platform_data = gpmc_nand_data; | ||
135 | } else { | ||
136 | err = -ENOMEM; | ||
137 | } | ||
138 | if (err) | ||
139 | goto out_free_pdev; | ||
140 | |||
141 | err = platform_device_add(pdev); | ||
142 | if (err) { | ||
143 | dev_err(&pdev->dev, "Unable to register NAND device\n"); | ||
144 | goto out_free_pdev; | ||
152 | } | 145 | } |
153 | 146 | ||
154 | return 0; | 147 | return 0; |
155 | 148 | ||
149 | out_free_pdev: | ||
150 | platform_device_put(pdev); | ||
156 | out_free_cs: | 151 | out_free_cs: |
157 | gpmc_cs_free(gpmc_nand_data->cs); | 152 | gpmc_cs_free(gpmc_nand_data->cs); |
158 | 153 | ||
diff --git a/arch/arm/mach-omap2/usb-tusb6010.c b/arch/arm/mach-omap2/usb-tusb6010.c index e832bc7b8e2d..8333400898fb 100644 --- a/arch/arm/mach-omap2/usb-tusb6010.c +++ b/arch/arm/mach-omap2/usb-tusb6010.c | |||
@@ -95,7 +95,6 @@ static int tusb_set_sync_mode(unsigned sysclk_ps) | |||
95 | dev_t.t_avdp_w = t_scsnh_advnh; | 95 | dev_t.t_avdp_w = t_scsnh_advnh; |
96 | dev_t.cyc_aavdh_we = 3; | 96 | dev_t.cyc_aavdh_we = 3; |
97 | dev_t.cyc_wpl = 6; | 97 | dev_t.cyc_wpl = 6; |
98 | dev_t.t_ce_rdyz = 7000; | ||
99 | 98 | ||
100 | gpmc_calc_timings(&t, &tusb_sync, &dev_t); | 99 | gpmc_calc_timings(&t, &tusb_sync, &dev_t); |
101 | 100 | ||