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authorTang Yuantian <Yuantian.Tang@freescale.com>2015-01-15 01:03:41 -0500
committerMichael Turquette <mturquette@linaro.org>2015-01-20 13:09:12 -0500
commit93a17c058f610398739c8b930ff3c83a0c0b0120 (patch)
treebdfabfc3da30d61591792629b621a495d488395a
parent57bfd7ee6fa9811481e6d67ff18aa90951dd974e (diff)
clk: ppc-corenet: rename driver to clk-qoriq
Freescale introduced new ARM-based socs which using the compatible clock IP block with PowerPC-based socs'. So this driver can be used on both platforms. Updated relevant descriptions and renamed this driver to better represent its meaning and keep the function of driver untouched. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by: Michael Turquette <mturquette@linaro.org>
-rw-r--r--Documentation/devicetree/bindings/clock/qoriq-clock.txt5
-rw-r--r--drivers/clk/Kconfig10
-rw-r--r--drivers/clk/Makefile2
-rw-r--r--drivers/clk/clk-qoriq.c (renamed from drivers/clk/clk-ppc-corenet.c)6
-rw-r--r--drivers/cpufreq/Kconfig.powerpc2
5 files changed, 13 insertions, 12 deletions
diff --git a/Documentation/devicetree/bindings/clock/qoriq-clock.txt b/Documentation/devicetree/bindings/clock/qoriq-clock.txt
index 266ff9d23229..df4a259a6898 100644
--- a/Documentation/devicetree/bindings/clock/qoriq-clock.txt
+++ b/Documentation/devicetree/bindings/clock/qoriq-clock.txt
@@ -1,6 +1,6 @@
1* Clock Block on Freescale CoreNet Platforms 1* Clock Block on Freescale QorIQ Platforms
2 2
3Freescale CoreNet chips take primary clocking input from the external 3Freescale qoriq chips take primary clocking input from the external
4SYSCLK signal. The SYSCLK input (frequency) is multiplied using 4SYSCLK signal. The SYSCLK input (frequency) is multiplied using
5multiple phase locked loops (PLL) to create a variety of frequencies 5multiple phase locked loops (PLL) to create a variety of frequencies
6which can then be passed to a variety of internal logic, including 6which can then be passed to a variety of internal logic, including
@@ -29,6 +29,7 @@ Required properties:
29 * "fsl,t4240-clockgen" 29 * "fsl,t4240-clockgen"
30 * "fsl,b4420-clockgen" 30 * "fsl,b4420-clockgen"
31 * "fsl,b4860-clockgen" 31 * "fsl,b4860-clockgen"
32 * "fsl,ls1021a-clockgen"
32 Chassis clock strings include: 33 Chassis clock strings include:
33 * "fsl,qoriq-clockgen-1.0": for chassis 1.0 clocks 34 * "fsl,qoriq-clockgen-1.0": for chassis 1.0 clocks
34 * "fsl,qoriq-clockgen-2.0": for chassis 2.0 clocks 35 * "fsl,qoriq-clockgen-2.0": for chassis 2.0 clocks
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 975af6a3c20d..1c0832d9475a 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -101,12 +101,12 @@ config COMMON_CLK_AXI_CLKGEN
101 Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx 101 Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
102 FPGAs. It is commonly used in Analog Devices' reference designs. 102 FPGAs. It is commonly used in Analog Devices' reference designs.
103 103
104config CLK_PPC_CORENET 104config CLK_QORIQ
105 bool "Clock driver for PowerPC corenet platforms" 105 bool "Clock driver for Freescale QorIQ platforms"
106 depends on PPC_E500MC && OF 106 depends on (PPC_E500MC || ARM) && OF
107 ---help--- 107 ---help---
108 This adds the clock driver support for Freescale PowerPC corenet 108 This adds the clock driver support for Freescale QorIQ platforms
109 platforms using common clock framework. 109 using common clock framework.
110 110
111config COMMON_CLK_XGENE 111config COMMON_CLK_XGENE
112 bool "Clock driver for APM XGene SoC" 112 bool "Clock driver for APM XGene SoC"
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 929e11a3546e..fcabb0e5ce18 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -31,7 +31,7 @@ obj-$(CONFIG_ARCH_MOXART) += clk-moxart.o
31obj-$(CONFIG_ARCH_NOMADIK) += clk-nomadik.o 31obj-$(CONFIG_ARCH_NOMADIK) += clk-nomadik.o
32obj-$(CONFIG_ARCH_NSPIRE) += clk-nspire.o 32obj-$(CONFIG_ARCH_NSPIRE) += clk-nspire.o
33obj-$(CONFIG_COMMON_CLK_PALMAS) += clk-palmas.o 33obj-$(CONFIG_COMMON_CLK_PALMAS) += clk-palmas.o
34obj-$(CONFIG_CLK_PPC_CORENET) += clk-ppc-corenet.o 34obj-$(CONFIG_CLK_QORIQ) += clk-qoriq.o
35obj-$(CONFIG_COMMON_CLK_RK808) += clk-rk808.o 35obj-$(CONFIG_COMMON_CLK_RK808) += clk-rk808.o
36obj-$(CONFIG_COMMON_CLK_S2MPS11) += clk-s2mps11.o 36obj-$(CONFIG_COMMON_CLK_S2MPS11) += clk-s2mps11.o
37obj-$(CONFIG_COMMON_CLK_SI5351) += clk-si5351.o 37obj-$(CONFIG_COMMON_CLK_SI5351) += clk-si5351.o
diff --git a/drivers/clk/clk-ppc-corenet.c b/drivers/clk/clk-qoriq.c
index 5e9bb18a5249..f9b7eb43ac69 100644
--- a/drivers/clk/clk-ppc-corenet.c
+++ b/drivers/clk/clk-qoriq.c
@@ -5,7 +5,7 @@
5 * it under the terms of the GNU General Public License version 2 as 5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation. 6 * published by the Free Software Foundation.
7 * 7 *
8 * clock driver for Freescale PowerPC corenet SoCs. 8 * clock driver for Freescale QorIQ SoCs.
9 */ 9 */
10#include <linux/clk-provider.h> 10#include <linux/clk-provider.h>
11#include <linux/io.h> 11#include <linux/io.h>
@@ -166,7 +166,7 @@ static void __init core_pll_init(struct device_node *np)
166 166
167 base = of_iomap(np, 0); 167 base = of_iomap(np, 0);
168 if (!base) { 168 if (!base) {
169 pr_err("clk-ppc: iomap error\n"); 169 pr_err("clk-qoriq: iomap error\n");
170 return; 170 return;
171 } 171 }
172 172
@@ -260,7 +260,7 @@ static void __init sysclk_init(struct device_node *node)
260 u32 rate; 260 u32 rate;
261 261
262 if (!np) { 262 if (!np) {
263 pr_err("ppc-clk: could not get parent node\n"); 263 pr_err("qoriq-clk: could not get parent node\n");
264 return; 264 return;
265 } 265 }
266 266
diff --git a/drivers/cpufreq/Kconfig.powerpc b/drivers/cpufreq/Kconfig.powerpc
index 72564b701b4a..7ea24413cee6 100644
--- a/drivers/cpufreq/Kconfig.powerpc
+++ b/drivers/cpufreq/Kconfig.powerpc
@@ -26,7 +26,7 @@ config CPU_FREQ_MAPLE
26config PPC_CORENET_CPUFREQ 26config PPC_CORENET_CPUFREQ
27 tristate "CPU frequency scaling driver for Freescale E500MC SoCs" 27 tristate "CPU frequency scaling driver for Freescale E500MC SoCs"
28 depends on PPC_E500MC && OF && COMMON_CLK 28 depends on PPC_E500MC && OF && COMMON_CLK
29 select CLK_PPC_CORENET 29 select CLK_QORIQ
30 help 30 help
31 This adds the CPUFreq driver support for Freescale e500mc, 31 This adds the CPUFreq driver support for Freescale e500mc,
32 e5500 and e6500 series SoCs which are capable of changing 32 e5500 and e6500 series SoCs which are capable of changing