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authorOlof Johansson <olof@lixom.net>2012-09-20 19:35:21 -0400
committerOlof Johansson <olof@lixom.net>2012-09-20 19:35:21 -0400
commit928487a1ceca5cd7e41bd78fa4a10098d8cc1ca9 (patch)
tree98ffaef4e16a6784520a31ed61a8706dc247dd10
parent2203747c97712975accc5e69bdaf1ad38a691635 (diff)
parent98025c8c754391f5ea962fad788a6f2af02cb886 (diff)
Merge branch 'samsung/cleanup' into next/cleanup
From Kukjin Kim: Here, there are cleanup patches for Samsung v3.7 and most of them are related to cleanup Samsung specific gpio API. * samsung/cleanup: gpio: samsung: Update documentation ARM: S3C24XX: Use module_platform_driver macro in mach-osiris-dvs.c ARM: S3C24XX: Use module_platform_driver macro in h1940-bluetooth.c gpio-samsung: Remove now unused s3c2410_gpio* API ARM: S3C24XX: Remove obsolete GPIO API declarations ARM: S3C24XX: Convert users of s3c2410_gpio_setpin to gpiolib API ARM: EXYNOS: cleanup unused code related to GPS
-rw-r--r--Documentation/arm/Samsung-S3C24XX/GPIO.txt82
-rw-r--r--Documentation/arm/Samsung/GPIO.txt8
-rw-r--r--arch/arm/mach-exynos/clock-exynos5.c9
-rw-r--r--arch/arm/mach-exynos/include/mach/map.h1
-rw-r--r--arch/arm/mach-s3c24xx/h1940-bluetooth.c14
-rw-r--r--arch/arm/mach-s3c24xx/mach-anubis.c3
-rw-r--r--arch/arm/mach-s3c24xx/mach-jive.c12
-rw-r--r--arch/arm/mach-s3c24xx/mach-mini2440.c4
-rw-r--r--arch/arm/mach-s3c24xx/mach-nexcoder.c22
-rw-r--r--arch/arm/mach-s3c24xx/mach-osiris-dvs.c13
-rw-r--r--arch/arm/mach-s3c24xx/mach-osiris.c7
-rw-r--r--arch/arm/plat-samsung/include/plat/gpio-fns.h97
-rw-r--r--drivers/gpio/gpio-samsung.c40
13 files changed, 55 insertions, 257 deletions
diff --git a/Documentation/arm/Samsung-S3C24XX/GPIO.txt b/Documentation/arm/Samsung-S3C24XX/GPIO.txt
index 816d6071669e..8b46c79679c4 100644
--- a/Documentation/arm/Samsung-S3C24XX/GPIO.txt
+++ b/Documentation/arm/Samsung-S3C24XX/GPIO.txt
@@ -1,4 +1,4 @@
1 S3C2410 GPIO Control 1 S3C24XX GPIO Control
2 ==================== 2 ====================
3 3
4Introduction 4Introduction
@@ -12,7 +12,7 @@ Introduction
12 of the s3c2410 GPIO system, please read the Samsung provided 12 of the s3c2410 GPIO system, please read the Samsung provided
13 data-sheet/users manual to find out the complete list. 13 data-sheet/users manual to find out the complete list.
14 14
15 See Documentation/arm/Samsung/GPIO.txt for the core implemetation. 15 See Documentation/arm/Samsung/GPIO.txt for the core implementation.
16 16
17 17
18GPIOLIB 18GPIOLIB
@@ -41,8 +41,8 @@ GPIOLIB
41GPIOLIB conversion 41GPIOLIB conversion
42------------------ 42------------------
43 43
44If you need to convert your board or driver to use gpiolib from the exiting 44If you need to convert your board or driver to use gpiolib from the phased
45s3c2410 api, then here are some notes on the process. 45out s3c2410 API, then here are some notes on the process.
46 46
471) If your board is exclusively using an GPIO, say to control peripheral 471) If your board is exclusively using an GPIO, say to control peripheral
48 power, then it will require to claim the gpio with gpio_request() before 48 power, then it will require to claim the gpio with gpio_request() before
@@ -55,7 +55,7 @@ s3c2410 api, then here are some notes on the process.
55 as they have the same arguments, and can either take the pin specific 55 as they have the same arguments, and can either take the pin specific
56 values, or the more generic special-function-number arguments. 56 values, or the more generic special-function-number arguments.
57 57
583) s3c2410_gpio_pullup() changs have the problem that whilst the 583) s3c2410_gpio_pullup() changes have the problem that whilst the
59 s3c2410_gpio_pullup(x, 1) can be easily translated to the 59 s3c2410_gpio_pullup(x, 1) can be easily translated to the
60 s3c_gpio_setpull(x, S3C_GPIO_PULL_NONE), the s3c2410_gpio_pullup(x, 0) 60 s3c_gpio_setpull(x, S3C_GPIO_PULL_NONE), the s3c2410_gpio_pullup(x, 0)
61 are not so easy. 61 are not so easy.
@@ -74,7 +74,7 @@ s3c2410 api, then here are some notes on the process.
74 when using gpio_get_value() on an output pin (s3c2410_gpio_getpin 74 when using gpio_get_value() on an output pin (s3c2410_gpio_getpin
75 would return the value the pin is supposed to be outputting). 75 would return the value the pin is supposed to be outputting).
76 76
776) s3c2410_gpio_getirq() should be directly replacable with the 776) s3c2410_gpio_getirq() should be directly replaceable with the
78 gpio_to_irq() call. 78 gpio_to_irq() call.
79 79
80The s3c2410_gpio and gpio_ calls have always operated on the same gpio 80The s3c2410_gpio and gpio_ calls have always operated on the same gpio
@@ -105,7 +105,7 @@ PIN Numbers
105----------- 105-----------
106 106
107 Each pin has an unique number associated with it in regs-gpio.h, 107 Each pin has an unique number associated with it in regs-gpio.h,
108 eg S3C2410_GPA(0) or S3C2410_GPF(1). These defines are used to tell 108 e.g. S3C2410_GPA(0) or S3C2410_GPF(1). These defines are used to tell
109 the GPIO functions which pin is to be used. 109 the GPIO functions which pin is to be used.
110 110
111 With the conversion to gpiolib, there is no longer a direct conversion 111 With the conversion to gpiolib, there is no longer a direct conversion
@@ -120,31 +120,27 @@ Configuring a pin
120 The following function allows the configuration of a given pin to 120 The following function allows the configuration of a given pin to
121 be changed. 121 be changed.
122 122
123 void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function); 123 void s3c_gpio_cfgpin(unsigned int pin, unsigned int function);
124 124
125 Eg: 125 e.g.:
126 126
127 s3c2410_gpio_cfgpin(S3C2410_GPA(0), S3C2410_GPA0_ADDR0); 127 s3c_gpio_cfgpin(S3C2410_GPA(0), S3C_GPIO_SFN(1));
128 s3c2410_gpio_cfgpin(S3C2410_GPE(8), S3C2410_GPE8_SDDAT1); 128 s3c_gpio_cfgpin(S3C2410_GPE(8), S3C_GPIO_SFN(2));
129 129
130 which would turn GPA(0) into the lowest Address line A0, and set 130 which would turn GPA(0) into the lowest Address line A0, and set
131 GPE(8) to be connected to the SDIO/MMC controller's SDDAT1 line. 131 GPE(8) to be connected to the SDIO/MMC controller's SDDAT1 line.
132 132
133 The s3c_gpio_cfgpin() call is a functional replacement for this call.
134
135 133
136Reading the current configuration 134Reading the current configuration
137--------------------------------- 135---------------------------------
138 136
139 The current configuration of a pin can be read by using: 137 The current configuration of a pin can be read by using standard
138 gpiolib function:
140 139
141 s3c2410_gpio_getcfg(unsigned int pin); 140 s3c_gpio_getcfg(unsigned int pin);
142 141
143 The return value will be from the same set of values which can be 142 The return value will be from the same set of values which can be
144 passed to s3c2410_gpio_cfgpin(). 143 passed to s3c_gpio_cfgpin().
145
146 The s3c_gpio_getcfg() call should be a functional replacement for
147 this call.
148 144
149 145
150Configuring a pull-up resistor 146Configuring a pull-up resistor
@@ -154,61 +150,33 @@ Configuring a pull-up resistor
154 pull-up resistors enabled. This can be configured by the following 150 pull-up resistors enabled. This can be configured by the following
155 function: 151 function:
156 152
157 void s3c2410_gpio_pullup(unsigned int pin, unsigned int to); 153 void s3c_gpio_setpull(unsigned int pin, unsigned int to);
158
159 Where the to value is zero to set the pull-up off, and 1 to enable
160 the specified pull-up. Any other values are currently undefined.
161
162 The s3c_gpio_setpull() offers similar functionality, but with the
163 ability to encode whether the pull is up or down. Currently there
164 is no 'just on' state, so up or down must be selected.
165
166
167Getting the state of a PIN
168--------------------------
169
170 The state of a pin can be read by using the function:
171
172 unsigned int s3c2410_gpio_getpin(unsigned int pin);
173 154
174 This will return either zero or non-zero. Do not count on this 155 Where the to value is S3C_GPIO_PULL_NONE to set the pull-up off,
175 function returning 1 if the pin is set. 156 and S3C_GPIO_PULL_UP to enable the specified pull-up. Any other
157 values are currently undefined.
176 158
177 This call is now implemented by the relevant gpiolib calls, convert
178 your board or driver to use gpiolib.
179
180
181Setting the state of a PIN
182--------------------------
183
184 The value an pin is outputing can be modified by using the following:
185 159
186 void s3c2410_gpio_setpin(unsigned int pin, unsigned int to); 160Getting and setting the state of a PIN
161--------------------------------------
187 162
188 Which sets the given pin to the value. Use 0 to write 0, and 1 to 163 These calls are now implemented by the relevant gpiolib calls, convert
189 set the output to 1.
190
191 This call is now implemented by the relevant gpiolib calls, convert
192 your board or driver to use gpiolib. 164 your board or driver to use gpiolib.
193 165
194 166
195Getting the IRQ number associated with a PIN 167Getting the IRQ number associated with a PIN
196-------------------------------------------- 168--------------------------------------------
197 169
198 The following function can map the given pin number to an IRQ 170 A standard gpiolib function can map the given pin number to an IRQ
199 number to pass to the IRQ system. 171 number to pass to the IRQ system.
200 172
201 int s3c2410_gpio_getirq(unsigned int pin); 173 int gpio_to_irq(unsigned int pin);
202 174
203 Note, not all pins have an IRQ. 175 Note, not all pins have an IRQ.
204 176
205 This call is now implemented by the relevant gpiolib calls, convert
206 your board or driver to use gpiolib.
207
208 177
209Authour 178Author
210------- 179-------
211 180
212
213Ben Dooks, 03 October 2004 181Ben Dooks, 03 October 2004
214Copyright 2004 Ben Dooks, Simtec Electronics 182Copyright 2004 Ben Dooks, Simtec Electronics
diff --git a/Documentation/arm/Samsung/GPIO.txt b/Documentation/arm/Samsung/GPIO.txt
index 513f2562c1a3..795adfd88081 100644
--- a/Documentation/arm/Samsung/GPIO.txt
+++ b/Documentation/arm/Samsung/GPIO.txt
@@ -5,14 +5,14 @@ Introduction
5------------ 5------------
6 6
7This outlines the Samsung GPIO implementation and the architecture 7This outlines the Samsung GPIO implementation and the architecture
8specific calls provided alongisde the drivers/gpio core. 8specific calls provided alongside the drivers/gpio core.
9 9
10 10
11S3C24XX (Legacy) 11S3C24XX (Legacy)
12---------------- 12----------------
13 13
14See Documentation/arm/Samsung-S3C24XX/GPIO.txt for more information 14See Documentation/arm/Samsung-S3C24XX/GPIO.txt for more information
15about these devices. Their implementation is being brought into line 15about these devices. Their implementation has been brought into line
16with the core samsung implementation described in this document. 16with the core samsung implementation described in this document.
17 17
18 18
@@ -29,7 +29,7 @@ GPIO numbering is synchronised between the Samsung and gpiolib system.
29PIN configuration 29PIN configuration
30----------------- 30-----------------
31 31
32Pin configuration is specific to the Samsung architecutre, with each SoC 32Pin configuration is specific to the Samsung architecture, with each SoC
33registering the necessary information for the core gpio configuration 33registering the necessary information for the core gpio configuration
34implementation to configure pins as necessary. 34implementation to configure pins as necessary.
35 35
@@ -38,5 +38,3 @@ driver or machine to change gpio configuration.
38 38
39See arch/arm/plat-samsung/include/plat/gpio-cfg.h for more information 39See arch/arm/plat-samsung/include/plat/gpio-cfg.h for more information
40on these functions. 40on these functions.
41
42
diff --git a/arch/arm/mach-exynos/clock-exynos5.c b/arch/arm/mach-exynos/clock-exynos5.c
index 774533c67066..3b00e299b624 100644
--- a/arch/arm/mach-exynos/clock-exynos5.c
+++ b/arch/arm/mach-exynos/clock-exynos5.c
@@ -166,11 +166,6 @@ static int exynos5_clk_ip_gen_ctrl(struct clk *clk, int enable)
166 return s5p_gatectrl(EXYNOS5_CLKGATE_IP_GEN, clk, enable); 166 return s5p_gatectrl(EXYNOS5_CLKGATE_IP_GEN, clk, enable);
167} 167}
168 168
169static int exynos5_clk_ip_gps_ctrl(struct clk *clk, int enable)
170{
171 return s5p_gatectrl(EXYNOS5_CLKGATE_IP_GPS, clk, enable);
172}
173
174static int exynos5_clk_ip_mfc_ctrl(struct clk *clk, int enable) 169static int exynos5_clk_ip_mfc_ctrl(struct clk *clk, int enable)
175{ 170{
176 return s5p_gatectrl(EXYNOS5_CLKGATE_IP_MFC, clk, enable); 171 return s5p_gatectrl(EXYNOS5_CLKGATE_IP_MFC, clk, enable);
@@ -672,10 +667,6 @@ static struct clk exynos5_init_clocks_off[] = {
672 .enable = exynos5_clk_ip_fsys_ctrl, 667 .enable = exynos5_clk_ip_fsys_ctrl,
673 .ctrlbit = (1 << 7), 668 .ctrlbit = (1 << 7),
674 }, { 669 }, {
675 .name = "gps",
676 .enable = exynos5_clk_ip_gps_ctrl,
677 .ctrlbit = ((1 << 3) | (1 << 2) | (1 << 0)),
678 }, {
679 .name = "nfcon", 670 .name = "nfcon",
680 .enable = exynos5_clk_ip_fsys_ctrl, 671 .enable = exynos5_clk_ip_fsys_ctrl,
681 .ctrlbit = (1 << 22), 672 .ctrlbit = (1 << 22),
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index c72b675b3e4b..9d1f3ac86db2 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -131,7 +131,6 @@
131#define EXYNOS5_PA_SYSMMU_JPEG 0x11F20000 131#define EXYNOS5_PA_SYSMMU_JPEG 0x11F20000
132#define EXYNOS5_PA_SYSMMU_IOP 0x12360000 132#define EXYNOS5_PA_SYSMMU_IOP 0x12360000
133#define EXYNOS5_PA_SYSMMU_RTIC 0x12370000 133#define EXYNOS5_PA_SYSMMU_RTIC 0x12370000
134#define EXYNOS5_PA_SYSMMU_GPS 0x12630000
135#define EXYNOS5_PA_SYSMMU_ISP 0x13260000 134#define EXYNOS5_PA_SYSMMU_ISP 0x13260000
136#define EXYNOS5_PA_SYSMMU_DRC 0x12370000 135#define EXYNOS5_PA_SYSMMU_DRC 0x12370000
137#define EXYNOS5_PA_SYSMMU_SCALERC 0x13280000 136#define EXYNOS5_PA_SYSMMU_SCALERC 0x13280000
diff --git a/arch/arm/mach-s3c24xx/h1940-bluetooth.c b/arch/arm/mach-s3c24xx/h1940-bluetooth.c
index a5eeb62ce1c2..57aee916bdb1 100644
--- a/arch/arm/mach-s3c24xx/h1940-bluetooth.c
+++ b/arch/arm/mach-s3c24xx/h1940-bluetooth.c
@@ -138,19 +138,7 @@ static struct platform_driver h1940bt_driver = {
138 .remove = h1940bt_remove, 138 .remove = h1940bt_remove,
139}; 139};
140 140
141 141module_platform_driver(h1940bt_driver);
142static int __init h1940bt_init(void)
143{
144 return platform_driver_register(&h1940bt_driver);
145}
146
147static void __exit h1940bt_exit(void)
148{
149 platform_driver_unregister(&h1940bt_driver);
150}
151
152module_init(h1940bt_init);
153module_exit(h1940bt_exit);
154 142
155MODULE_AUTHOR("Arnaud Patard <arnaud.patard@rtp-net.org>"); 143MODULE_AUTHOR("Arnaud Patard <arnaud.patard@rtp-net.org>");
156MODULE_DESCRIPTION("Driver for the iPAQ H1940 bluetooth chip"); 144MODULE_DESCRIPTION("Driver for the iPAQ H1940 bluetooth chip");
diff --git a/arch/arm/mach-s3c24xx/mach-anubis.c b/arch/arm/mach-s3c24xx/mach-anubis.c
index 5a7d0c0010f7..0c7ed7a2b0cd 100644
--- a/arch/arm/mach-s3c24xx/mach-anubis.c
+++ b/arch/arm/mach-s3c24xx/mach-anubis.c
@@ -424,7 +424,8 @@ static void __init anubis_map_io(void)
424 anubis_nand_sets[0].nr_partitions = ARRAY_SIZE(anubis_default_nand_part_large); 424 anubis_nand_sets[0].nr_partitions = ARRAY_SIZE(anubis_default_nand_part_large);
425 } else { 425 } else {
426 /* ensure that the GPIO is setup */ 426 /* ensure that the GPIO is setup */
427 s3c2410_gpio_setpin(S3C2410_GPA(0), 1); 427 gpio_request_one(S3C2410_GPA(0), GPIOF_OUT_INIT_HIGH, NULL);
428 gpio_free(S3C2410_GPA(0));
428 } 429 }
429} 430}
430 431
diff --git a/arch/arm/mach-s3c24xx/mach-jive.c b/arch/arm/mach-s3c24xx/mach-jive.c
index ae73ba34ecc6..471334715c37 100644
--- a/arch/arm/mach-s3c24xx/mach-jive.c
+++ b/arch/arm/mach-s3c24xx/mach-jive.c
@@ -512,8 +512,8 @@ static void jive_power_off(void)
512{ 512{
513 printk(KERN_INFO "powering system down...\n"); 513 printk(KERN_INFO "powering system down...\n");
514 514
515 s3c2410_gpio_setpin(S3C2410_GPC(5), 1); 515 gpio_request_one(S3C2410_GPC(5), GPIOF_OUT_INIT_HIGH, NULL);
516 s3c_gpio_cfgpin(S3C2410_GPC(5), S3C2410_GPIO_OUTPUT); 516 gpio_free(S3C2410_GPC(5));
517} 517}
518 518
519static void __init jive_machine_init(void) 519static void __init jive_machine_init(void)
@@ -623,11 +623,11 @@ static void __init jive_machine_init(void)
623 gpio_request(S3C2410_GPB(7), "jive spi"); 623 gpio_request(S3C2410_GPB(7), "jive spi");
624 gpio_direction_output(S3C2410_GPB(7), 1); 624 gpio_direction_output(S3C2410_GPB(7), 1);
625 625
626 s3c2410_gpio_setpin(S3C2410_GPB(6), 0); 626 gpio_request_one(S3C2410_GPB(6), GPIOF_OUT_INIT_LOW, NULL);
627 s3c_gpio_cfgpin(S3C2410_GPB(6), S3C2410_GPIO_OUTPUT); 627 gpio_free(S3C2410_GPB(6));
628 628
629 s3c2410_gpio_setpin(S3C2410_GPG(8), 1); 629 gpio_request_one(S3C2410_GPG(8), GPIOF_OUT_INIT_HIGH, NULL);
630 s3c_gpio_cfgpin(S3C2410_GPG(8), S3C2410_GPIO_OUTPUT); 630 gpio_free(S3C2410_GPG(8));
631 631
632 /* initialise the WM8750 spi */ 632 /* initialise the WM8750 spi */
633 633
diff --git a/arch/arm/mach-s3c24xx/mach-mini2440.c b/arch/arm/mach-s3c24xx/mach-mini2440.c
index bd6d2525debe..734bbfe5ea22 100644
--- a/arch/arm/mach-s3c24xx/mach-mini2440.c
+++ b/arch/arm/mach-s3c24xx/mach-mini2440.c
@@ -638,9 +638,9 @@ static void __init mini2440_init(void)
638 gpio_free(S3C2410_GPG(4)); 638 gpio_free(S3C2410_GPG(4));
639 639
640 /* remove pullup on optional PWM backlight -- unused on 3.5 and 7"s */ 640 /* remove pullup on optional PWM backlight -- unused on 3.5 and 7"s */
641 gpio_request_one(S3C2410_GPB(1), GPIOF_IN, NULL);
641 s3c_gpio_setpull(S3C2410_GPB(1), S3C_GPIO_PULL_UP); 642 s3c_gpio_setpull(S3C2410_GPB(1), S3C_GPIO_PULL_UP);
642 s3c2410_gpio_setpin(S3C2410_GPB(1), 0); 643 gpio_free(S3C2410_GPB(1));
643 s3c_gpio_cfgpin(S3C2410_GPB(1), S3C2410_GPIO_INPUT);
644 644
645 /* mark the key as input, without pullups (there is one on the board) */ 645 /* mark the key as input, without pullups (there is one on the board) */
646 for (i = 0; i < ARRAY_SIZE(mini2440_buttons); i++) { 646 for (i = 0; i < ARRAY_SIZE(mini2440_buttons); i++) {
diff --git a/arch/arm/mach-s3c24xx/mach-nexcoder.c b/arch/arm/mach-s3c24xx/mach-nexcoder.c
index 5c05ba1c330f..a71a551094ef 100644
--- a/arch/arm/mach-s3c24xx/mach-nexcoder.c
+++ b/arch/arm/mach-s3c24xx/mach-nexcoder.c
@@ -119,17 +119,17 @@ static struct platform_device *nexcoder_devices[] __initdata = {
119 119
120static void __init nexcoder_sensorboard_init(void) 120static void __init nexcoder_sensorboard_init(void)
121{ 121{
122 // Initialize SCCB bus 122 /* Initialize SCCB bus */
123 s3c2410_gpio_setpin(S3C2410_GPE(14), 1); // IICSCL 123 gpio_request_one(S3C2410_GPE(14), GPIOF_OUT_INIT_HIGH, NULL);
124 s3c_gpio_cfgpin(S3C2410_GPE(14), S3C2410_GPIO_OUTPUT); 124 gpio_free(S3C2410_GPE(14)); /* IICSCL */
125 s3c2410_gpio_setpin(S3C2410_GPE(15), 1); // IICSDA 125 gpio_request_one(S3C2410_GPE(15), GPIOF_OUT_INIT_HIGH, NULL);
126 s3c_gpio_cfgpin(S3C2410_GPE(15), S3C2410_GPIO_OUTPUT); 126 gpio_free(S3C2410_GPE(15)); /* IICSDA */
127 127
128 // Power up the sensor board 128 /* Power up the sensor board */
129 s3c2410_gpio_setpin(S3C2410_GPF(1), 1); 129 gpio_request_one(S3C2410_GPF(1), GPIOF_OUT_INIT_HIGH, NULL);
130 s3c_gpio_cfgpin(S3C2410_GPF(1), S3C2410_GPIO_OUTPUT); // CAM_GPIO7 => nLDO_PWRDN 130 gpio_free(S3C2410_GPF(1)); /* CAM_GPIO7 => nLDO_PWRDN */
131 s3c2410_gpio_setpin(S3C2410_GPF(2), 0); 131 gpio_request_one(S3C2410_GPF(2), GPIOF_OUT_INIT_LOW, NULL);
132 s3c_gpio_cfgpin(S3C2410_GPF(2), S3C2410_GPIO_OUTPUT); // CAM_GPIO6 => CAM_PWRDN 132 gpio_free(S3C2410_GPF(2)); /* CAM_GPIO6 => CAM_PWRDN */
133} 133}
134 134
135static void __init nexcoder_map_io(void) 135static void __init nexcoder_map_io(void)
diff --git a/arch/arm/mach-s3c24xx/mach-osiris-dvs.c b/arch/arm/mach-s3c24xx/mach-osiris-dvs.c
index ad2792dfbee1..5876c6ba7500 100644
--- a/arch/arm/mach-s3c24xx/mach-osiris-dvs.c
+++ b/arch/arm/mach-s3c24xx/mach-osiris-dvs.c
@@ -175,18 +175,7 @@ static struct platform_driver osiris_dvs_driver = {
175 }, 175 },
176}; 176};
177 177
178static int __init osiris_dvs_init(void) 178module_platform_driver(osiris_dvs_driver);
179{
180 return platform_driver_register(&osiris_dvs_driver);
181}
182
183static void __exit osiris_dvs_exit(void)
184{
185 platform_driver_unregister(&osiris_dvs_driver);
186}
187
188module_init(osiris_dvs_init);
189module_exit(osiris_dvs_exit);
190 179
191MODULE_DESCRIPTION("Simtec OSIRIS DVS support"); 180MODULE_DESCRIPTION("Simtec OSIRIS DVS support");
192MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); 181MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
diff --git a/arch/arm/mach-s3c24xx/mach-osiris.c b/arch/arm/mach-s3c24xx/mach-osiris.c
index 95d077255024..c0fb3c1bc548 100644
--- a/arch/arm/mach-s3c24xx/mach-osiris.c
+++ b/arch/arm/mach-s3c24xx/mach-osiris.c
@@ -274,8 +274,8 @@ static int osiris_pm_suspend(void)
274 __raw_writeb(tmp, OSIRIS_VA_CTRL0); 274 __raw_writeb(tmp, OSIRIS_VA_CTRL0);
275 275
276 /* ensure that an nRESET is not generated on resume. */ 276 /* ensure that an nRESET is not generated on resume. */
277 s3c2410_gpio_setpin(S3C2410_GPA(21), 1); 277 gpio_request_one(S3C2410_GPA(21), GPIOF_OUT_INIT_HIGH, NULL);
278 s3c_gpio_cfgpin(S3C2410_GPA(21), S3C2410_GPIO_OUTPUT); 278 gpio_free(S3C2410_GPA(21));
279 279
280 return 0; 280 return 0;
281} 281}
@@ -396,7 +396,8 @@ static void __init osiris_map_io(void)
396 osiris_nand_sets[0].nr_partitions = ARRAY_SIZE(osiris_default_nand_part_large); 396 osiris_nand_sets[0].nr_partitions = ARRAY_SIZE(osiris_default_nand_part_large);
397 } else { 397 } else {
398 /* write-protect line to the NAND */ 398 /* write-protect line to the NAND */
399 s3c2410_gpio_setpin(S3C2410_GPA(0), 1); 399 gpio_request_one(S3C2410_GPA(0), GPIOF_OUT_INIT_HIGH, NULL);
400 gpio_free(S3C2410_GPA(0));
400 } 401 }
401 402
402 /* fix bus configuration (nBE settings wrong on ABLE pre v2.20) */ 403 /* fix bus configuration (nBE settings wrong on ABLE pre v2.20) */
diff --git a/arch/arm/plat-samsung/include/plat/gpio-fns.h b/arch/arm/plat-samsung/include/plat/gpio-fns.h
index bab139201761..d1ecef0e38e0 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-fns.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-fns.h
@@ -1,98 +1 @@
1/* arch/arm/mach-s3c2410/include/mach/gpio-fns.h
2 *
3 * Copyright (c) 2003-2009 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C2410 - hardware
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __MACH_GPIO_FNS_H
14#define __MACH_GPIO_FNS_H __FILE__
15
16/* These functions are in the to-be-removed category and it is strongly
17 * encouraged not to use these in new code. They will be marked deprecated
18 * very soon.
19 *
20 * Most of the functionality can be either replaced by the gpiocfg calls
21 * for the s3c platform or by the generic GPIOlib API.
22 *
23 * As of 2.6.35-rc, these will be removed, with the few drivers using them
24 * either replaced or given a wrapper until the calls can be removed.
25*/
26
27#include <plat/gpio-cfg.h> #include <plat/gpio-cfg.h>
28
29static inline void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int cfg)
30{
31 /* 1:1 mapping between cfgpin and setcfg calls at the moment */
32 s3c_gpio_cfgpin(pin, cfg);
33}
34
35/* external functions for GPIO support
36 *
37 * These allow various different clients to access the same GPIO
38 * registers without conflicting. If your driver only owns the entire
39 * GPIO register, then it is safe to ioremap/__raw_{read|write} to it.
40*/
41
42extern unsigned int s3c2410_gpio_getcfg(unsigned int pin);
43
44/* s3c2410_gpio_getirq
45 *
46 * turn the given pin number into the corresponding IRQ number
47 *
48 * returns:
49 * < 0 = no interrupt for this pin
50 * >=0 = interrupt number for the pin
51*/
52
53extern int s3c2410_gpio_getirq(unsigned int pin);
54
55/* s3c2410_gpio_irqfilter
56 *
57 * set the irq filtering on the given pin
58 *
59 * on = 0 => disable filtering
60 * 1 => enable filtering
61 *
62 * config = S3C2410_EINTFLT_PCLK or S3C2410_EINTFLT_EXTCLK orred with
63 * width of filter (0 through 63)
64 *
65 *
66*/
67
68extern int s3c2410_gpio_irqfilter(unsigned int pin, unsigned int on,
69 unsigned int config);
70
71/* s3c2410_gpio_pullup
72 *
73 * This call should be replaced with s3c_gpio_setpull().
74 *
75 * As a note, there is currently no distinction between pull-up and pull-down
76 * in the s3c24xx series devices with only an on/off configuration.
77 */
78
79/* s3c2410_gpio_pullup
80 *
81 * configure the pull-up control on the given pin
82 *
83 * to = 1 => disable the pull-up
84 * 0 => enable the pull-up
85 *
86 * eg;
87 *
88 * s3c2410_gpio_pullup(S3C2410_GPB(0), 0);
89 * s3c2410_gpio_pullup(S3C2410_GPE(8), 0);
90*/
91
92extern void s3c2410_gpio_pullup(unsigned int pin, unsigned int to);
93
94extern void s3c2410_gpio_setpin(unsigned int pin, unsigned int to);
95
96extern unsigned int s3c2410_gpio_getpin(unsigned int pin);
97
98#endif /* __MACH_GPIO_FNS_H */
diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c
index ba126cc04073..1c169324e357 100644
--- a/drivers/gpio/gpio-samsung.c
+++ b/drivers/gpio/gpio-samsung.c
@@ -3131,46 +3131,6 @@ samsung_gpio_pull_t s3c_gpio_getpull(unsigned int pin)
3131} 3131}
3132EXPORT_SYMBOL(s3c_gpio_getpull); 3132EXPORT_SYMBOL(s3c_gpio_getpull);
3133 3133
3134/* gpiolib wrappers until these are totally eliminated */
3135
3136void s3c2410_gpio_pullup(unsigned int pin, unsigned int to)
3137{
3138 int ret;
3139
3140 WARN_ON(to); /* should be none of these left */
3141
3142 if (!to) {
3143 /* if pull is enabled, try first with up, and if that
3144 * fails, try using down */
3145
3146 ret = s3c_gpio_setpull(pin, S3C_GPIO_PULL_UP);
3147 if (ret)
3148 s3c_gpio_setpull(pin, S3C_GPIO_PULL_DOWN);
3149 } else {
3150 s3c_gpio_setpull(pin, S3C_GPIO_PULL_NONE);
3151 }
3152}
3153EXPORT_SYMBOL(s3c2410_gpio_pullup);
3154
3155void s3c2410_gpio_setpin(unsigned int pin, unsigned int to)
3156{
3157 /* do this via gpiolib until all users removed */
3158
3159 gpio_request(pin, "temporary");
3160 gpio_set_value(pin, to);
3161 gpio_free(pin);
3162}
3163EXPORT_SYMBOL(s3c2410_gpio_setpin);
3164
3165unsigned int s3c2410_gpio_getpin(unsigned int pin)
3166{
3167 struct samsung_gpio_chip *chip = samsung_gpiolib_getchip(pin);
3168 unsigned long offs = pin - chip->chip.base;
3169
3170 return __raw_readl(chip->base + 0x04) & (1 << offs);
3171}
3172EXPORT_SYMBOL(s3c2410_gpio_getpin);
3173
3174#ifdef CONFIG_S5P_GPIO_DRVSTR 3134#ifdef CONFIG_S5P_GPIO_DRVSTR
3175s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin) 3135s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin)
3176{ 3136{