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authorLudovic Desroches <ludovic.desroches@atmel.com>2012-06-21 08:47:27 -0400
committerNicolas Ferre <nicolas.ferre@atmel.com>2012-07-02 08:26:59 -0400
commit8fe82a5550a8e97b3f59c74f994b88ed6b3544a3 (patch)
tree0b46bdd7cfe2bb0691bf8c3243f803b478fe4379
parent3e135466745a62b1814edef74c7b4a25e6bda707 (diff)
ARM: at91: sparse irq support
Enable sparse irq support for multisoc image. It involves to add the NR_IRQS_LEGACY offset to static SoC irq number definitions since NR_IRQS_LEGACY irq descs are allocated before AIC requests irq descs allocation. Move NR_AIC_IRQS macro to a more appropiate place with the purpose to remove mach/irqs.h later. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat
-rw-r--r--arch/arm/mach-at91/Kconfig1
-rw-r--r--arch/arm/mach-at91/at91rm9200.c1
-rw-r--r--arch/arm/mach-at91/at91rm9200_devices.c84
-rw-r--r--arch/arm/mach-at91/at91sam9260.c1
-rw-r--r--arch/arm/mach-at91/at91sam9260_devices.c92
-rw-r--r--arch/arm/mach-at91/at91sam9261.c1
-rw-r--r--arch/arm/mach-at91/at91sam9261_devices.c68
-rw-r--r--arch/arm/mach-at91/at91sam9263.c1
-rw-r--r--arch/arm/mach-at91/at91sam9263_devices.c80
-rw-r--r--arch/arm/mach-at91/at91sam926x_time.c2
-rw-r--r--arch/arm/mach-at91/at91sam9g45.c1
-rw-r--r--arch/arm/mach-at91/at91sam9g45_devices.c108
-rw-r--r--arch/arm/mach-at91/at91sam9rl.c1
-rw-r--r--arch/arm/mach-at91/at91sam9rl_devices.c76
-rw-r--r--arch/arm/mach-at91/at91x40.c1
-rw-r--r--arch/arm/mach-at91/include/mach/at91_aic.h3
-rw-r--r--arch/arm/mach-at91/include/mach/irqs.h12
-rw-r--r--arch/arm/mach-at91/irq.c6
-rw-r--r--arch/arm/mach-at91/pm.c1
19 files changed, 271 insertions, 269 deletions
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index e401deaeea19..7d0c40a74d4d 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -30,6 +30,7 @@ config SOC_AT91SAM9
30 bool 30 bool
31 select CPU_ARM926T 31 select CPU_ARM926T
32 select MULTI_IRQ_HANDLER 32 select MULTI_IRQ_HANDLER
33 select SPARSE_IRQ
33 select AT91_SAM9_TIME 34 select AT91_SAM9_TIME
34 select AT91_SAM9_SMC 35 select AT91_SAM9_SMC
35 36
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 26917687fc30..6f50c6722276 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -17,6 +17,7 @@
17#include <asm/mach/map.h> 17#include <asm/mach/map.h>
18#include <asm/system_misc.h> 18#include <asm/system_misc.h>
19#include <mach/at91rm9200.h> 19#include <mach/at91rm9200.h>
20#include <mach/at91_aic.h>
20#include <mach/at91_pmc.h> 21#include <mach/at91_pmc.h>
21#include <mach/at91_st.h> 22#include <mach/at91_st.h>
22#include <mach/cpu.h> 23#include <mach/cpu.h>
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index e6b7d0533dd7..01fb7325fecc 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -41,8 +41,8 @@ static struct resource usbh_resources[] = {
41 .flags = IORESOURCE_MEM, 41 .flags = IORESOURCE_MEM,
42 }, 42 },
43 [1] = { 43 [1] = {
44 .start = AT91RM9200_ID_UHP, 44 .start = NR_IRQS_LEGACY + AT91RM9200_ID_UHP,
45 .end = AT91RM9200_ID_UHP, 45 .end = NR_IRQS_LEGACY + AT91RM9200_ID_UHP,
46 .flags = IORESOURCE_IRQ, 46 .flags = IORESOURCE_IRQ,
47 }, 47 },
48}; 48};
@@ -94,8 +94,8 @@ static struct resource udc_resources[] = {
94 .flags = IORESOURCE_MEM, 94 .flags = IORESOURCE_MEM,
95 }, 95 },
96 [1] = { 96 [1] = {
97 .start = AT91RM9200_ID_UDP, 97 .start = NR_IRQS_LEGACY + AT91RM9200_ID_UDP,
98 .end = AT91RM9200_ID_UDP, 98 .end = NR_IRQS_LEGACY + AT91RM9200_ID_UDP,
99 .flags = IORESOURCE_IRQ, 99 .flags = IORESOURCE_IRQ,
100 }, 100 },
101}; 101};
@@ -145,8 +145,8 @@ static struct resource eth_resources[] = {
145 .flags = IORESOURCE_MEM, 145 .flags = IORESOURCE_MEM,
146 }, 146 },
147 [1] = { 147 [1] = {
148 .start = AT91RM9200_ID_EMAC, 148 .start = NR_IRQS_LEGACY + AT91RM9200_ID_EMAC,
149 .end = AT91RM9200_ID_EMAC, 149 .end = NR_IRQS_LEGACY + AT91RM9200_ID_EMAC,
150 .flags = IORESOURCE_IRQ, 150 .flags = IORESOURCE_IRQ,
151 }, 151 },
152}; 152};
@@ -305,8 +305,8 @@ static struct resource mmc_resources[] = {
305 .flags = IORESOURCE_MEM, 305 .flags = IORESOURCE_MEM,
306 }, 306 },
307 [1] = { 307 [1] = {
308 .start = AT91RM9200_ID_MCI, 308 .start = NR_IRQS_LEGACY + AT91RM9200_ID_MCI,
309 .end = AT91RM9200_ID_MCI, 309 .end = NR_IRQS_LEGACY + AT91RM9200_ID_MCI,
310 .flags = IORESOURCE_IRQ, 310 .flags = IORESOURCE_IRQ,
311 }, 311 },
312}; 312};
@@ -488,8 +488,8 @@ static struct resource twi_resources[] = {
488 .flags = IORESOURCE_MEM, 488 .flags = IORESOURCE_MEM,
489 }, 489 },
490 [1] = { 490 [1] = {
491 .start = AT91RM9200_ID_TWI, 491 .start = NR_IRQS_LEGACY + AT91RM9200_ID_TWI,
492 .end = AT91RM9200_ID_TWI, 492 .end = NR_IRQS_LEGACY + AT91RM9200_ID_TWI,
493 .flags = IORESOURCE_IRQ, 493 .flags = IORESOURCE_IRQ,
494 }, 494 },
495}; 495};
@@ -532,8 +532,8 @@ static struct resource spi_resources[] = {
532 .flags = IORESOURCE_MEM, 532 .flags = IORESOURCE_MEM,
533 }, 533 },
534 [1] = { 534 [1] = {
535 .start = AT91RM9200_ID_SPI, 535 .start = NR_IRQS_LEGACY + AT91RM9200_ID_SPI,
536 .end = AT91RM9200_ID_SPI, 536 .end = NR_IRQS_LEGACY + AT91RM9200_ID_SPI,
537 .flags = IORESOURCE_IRQ, 537 .flags = IORESOURCE_IRQ,
538 }, 538 },
539}; 539};
@@ -598,18 +598,18 @@ static struct resource tcb0_resources[] = {
598 .flags = IORESOURCE_MEM, 598 .flags = IORESOURCE_MEM,
599 }, 599 },
600 [1] = { 600 [1] = {
601 .start = AT91RM9200_ID_TC0, 601 .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC0,
602 .end = AT91RM9200_ID_TC0, 602 .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC0,
603 .flags = IORESOURCE_IRQ, 603 .flags = IORESOURCE_IRQ,
604 }, 604 },
605 [2] = { 605 [2] = {
606 .start = AT91RM9200_ID_TC1, 606 .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC1,
607 .end = AT91RM9200_ID_TC1, 607 .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC1,
608 .flags = IORESOURCE_IRQ, 608 .flags = IORESOURCE_IRQ,
609 }, 609 },
610 [3] = { 610 [3] = {
611 .start = AT91RM9200_ID_TC2, 611 .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC2,
612 .end = AT91RM9200_ID_TC2, 612 .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC2,
613 .flags = IORESOURCE_IRQ, 613 .flags = IORESOURCE_IRQ,
614 }, 614 },
615}; 615};
@@ -628,18 +628,18 @@ static struct resource tcb1_resources[] = {
628 .flags = IORESOURCE_MEM, 628 .flags = IORESOURCE_MEM,
629 }, 629 },
630 [1] = { 630 [1] = {
631 .start = AT91RM9200_ID_TC3, 631 .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC3,
632 .end = AT91RM9200_ID_TC3, 632 .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC3,
633 .flags = IORESOURCE_IRQ, 633 .flags = IORESOURCE_IRQ,
634 }, 634 },
635 [2] = { 635 [2] = {
636 .start = AT91RM9200_ID_TC4, 636 .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC4,
637 .end = AT91RM9200_ID_TC4, 637 .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC4,
638 .flags = IORESOURCE_IRQ, 638 .flags = IORESOURCE_IRQ,
639 }, 639 },
640 [3] = { 640 [3] = {
641 .start = AT91RM9200_ID_TC5, 641 .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC5,
642 .end = AT91RM9200_ID_TC5, 642 .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC5,
643 .flags = IORESOURCE_IRQ, 643 .flags = IORESOURCE_IRQ,
644 }, 644 },
645}; 645};
@@ -673,8 +673,8 @@ static struct resource rtc_resources[] = {
673 .flags = IORESOURCE_MEM, 673 .flags = IORESOURCE_MEM,
674 }, 674 },
675 [1] = { 675 [1] = {
676 .start = AT91_ID_SYS, 676 .start = NR_IRQS_LEGACY + AT91_ID_SYS,
677 .end = AT91_ID_SYS, 677 .end = NR_IRQS_LEGACY + AT91_ID_SYS,
678 .flags = IORESOURCE_IRQ, 678 .flags = IORESOURCE_IRQ,
679 }, 679 },
680}; 680};
@@ -729,8 +729,8 @@ static struct resource ssc0_resources[] = {
729 .flags = IORESOURCE_MEM, 729 .flags = IORESOURCE_MEM,
730 }, 730 },
731 [1] = { 731 [1] = {
732 .start = AT91RM9200_ID_SSC0, 732 .start = NR_IRQS_LEGACY + AT91RM9200_ID_SSC0,
733 .end = AT91RM9200_ID_SSC0, 733 .end = NR_IRQS_LEGACY + AT91RM9200_ID_SSC0,
734 .flags = IORESOURCE_IRQ, 734 .flags = IORESOURCE_IRQ,
735 }, 735 },
736}; 736};
@@ -771,8 +771,8 @@ static struct resource ssc1_resources[] = {
771 .flags = IORESOURCE_MEM, 771 .flags = IORESOURCE_MEM,
772 }, 772 },
773 [1] = { 773 [1] = {
774 .start = AT91RM9200_ID_SSC1, 774 .start = NR_IRQS_LEGACY + AT91RM9200_ID_SSC1,
775 .end = AT91RM9200_ID_SSC1, 775 .end = NR_IRQS_LEGACY + AT91RM9200_ID_SSC1,
776 .flags = IORESOURCE_IRQ, 776 .flags = IORESOURCE_IRQ,
777 }, 777 },
778}; 778};
@@ -813,8 +813,8 @@ static struct resource ssc2_resources[] = {
813 .flags = IORESOURCE_MEM, 813 .flags = IORESOURCE_MEM,
814 }, 814 },
815 [1] = { 815 [1] = {
816 .start = AT91RM9200_ID_SSC2, 816 .start = NR_IRQS_LEGACY + AT91RM9200_ID_SSC2,
817 .end = AT91RM9200_ID_SSC2, 817 .end = NR_IRQS_LEGACY + AT91RM9200_ID_SSC2,
818 .flags = IORESOURCE_IRQ, 818 .flags = IORESOURCE_IRQ,
819 }, 819 },
820}; 820};
@@ -897,8 +897,8 @@ static struct resource dbgu_resources[] = {
897 .flags = IORESOURCE_MEM, 897 .flags = IORESOURCE_MEM,
898 }, 898 },
899 [1] = { 899 [1] = {
900 .start = AT91_ID_SYS, 900 .start = NR_IRQS_LEGACY + AT91_ID_SYS,
901 .end = AT91_ID_SYS, 901 .end = NR_IRQS_LEGACY + AT91_ID_SYS,
902 .flags = IORESOURCE_IRQ, 902 .flags = IORESOURCE_IRQ,
903 }, 903 },
904}; 904};
@@ -935,8 +935,8 @@ static struct resource uart0_resources[] = {
935 .flags = IORESOURCE_MEM, 935 .flags = IORESOURCE_MEM,
936 }, 936 },
937 [1] = { 937 [1] = {
938 .start = AT91RM9200_ID_US0, 938 .start = NR_IRQS_LEGACY + AT91RM9200_ID_US0,
939 .end = AT91RM9200_ID_US0, 939 .end = NR_IRQS_LEGACY + AT91RM9200_ID_US0,
940 .flags = IORESOURCE_IRQ, 940 .flags = IORESOURCE_IRQ,
941 }, 941 },
942}; 942};
@@ -984,8 +984,8 @@ static struct resource uart1_resources[] = {
984 .flags = IORESOURCE_MEM, 984 .flags = IORESOURCE_MEM,
985 }, 985 },
986 [1] = { 986 [1] = {
987 .start = AT91RM9200_ID_US1, 987 .start = NR_IRQS_LEGACY + AT91RM9200_ID_US1,
988 .end = AT91RM9200_ID_US1, 988 .end = NR_IRQS_LEGACY + AT91RM9200_ID_US1,
989 .flags = IORESOURCE_IRQ, 989 .flags = IORESOURCE_IRQ,
990 }, 990 },
991}; 991};
@@ -1035,8 +1035,8 @@ static struct resource uart2_resources[] = {
1035 .flags = IORESOURCE_MEM, 1035 .flags = IORESOURCE_MEM,
1036 }, 1036 },
1037 [1] = { 1037 [1] = {
1038 .start = AT91RM9200_ID_US2, 1038 .start = NR_IRQS_LEGACY + AT91RM9200_ID_US2,
1039 .end = AT91RM9200_ID_US2, 1039 .end = NR_IRQS_LEGACY + AT91RM9200_ID_US2,
1040 .flags = IORESOURCE_IRQ, 1040 .flags = IORESOURCE_IRQ,
1041 }, 1041 },
1042}; 1042};
@@ -1078,8 +1078,8 @@ static struct resource uart3_resources[] = {
1078 .flags = IORESOURCE_MEM, 1078 .flags = IORESOURCE_MEM,
1079 }, 1079 },
1080 [1] = { 1080 [1] = {
1081 .start = AT91RM9200_ID_US3, 1081 .start = NR_IRQS_LEGACY + AT91RM9200_ID_US3,
1082 .end = AT91RM9200_ID_US3, 1082 .end = NR_IRQS_LEGACY + AT91RM9200_ID_US3,
1083 .flags = IORESOURCE_IRQ, 1083 .flags = IORESOURCE_IRQ,
1084 }, 1084 },
1085}; 1085};
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index 2b1e438ed878..30c7f26a4668 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -20,6 +20,7 @@
20#include <mach/cpu.h> 20#include <mach/cpu.h>
21#include <mach/at91_dbgu.h> 21#include <mach/at91_dbgu.h>
22#include <mach/at91sam9260.h> 22#include <mach/at91sam9260.h>
23#include <mach/at91_aic.h>
23#include <mach/at91_pmc.h> 24#include <mach/at91_pmc.h>
24#include <mach/at91_rstc.h> 25#include <mach/at91_rstc.h>
25 26
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index 0ded951f785a..7b9c2ba396ed 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -45,8 +45,8 @@ static struct resource usbh_resources[] = {
45 .flags = IORESOURCE_MEM, 45 .flags = IORESOURCE_MEM,
46 }, 46 },
47 [1] = { 47 [1] = {
48 .start = AT91SAM9260_ID_UHP, 48 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_UHP,
49 .end = AT91SAM9260_ID_UHP, 49 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_UHP,
50 .flags = IORESOURCE_IRQ, 50 .flags = IORESOURCE_IRQ,
51 }, 51 },
52}; 52};
@@ -98,8 +98,8 @@ static struct resource udc_resources[] = {
98 .flags = IORESOURCE_MEM, 98 .flags = IORESOURCE_MEM,
99 }, 99 },
100 [1] = { 100 [1] = {
101 .start = AT91SAM9260_ID_UDP, 101 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_UDP,
102 .end = AT91SAM9260_ID_UDP, 102 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_UDP,
103 .flags = IORESOURCE_IRQ, 103 .flags = IORESOURCE_IRQ,
104 }, 104 },
105}; 105};
@@ -149,8 +149,8 @@ static struct resource eth_resources[] = {
149 .flags = IORESOURCE_MEM, 149 .flags = IORESOURCE_MEM,
150 }, 150 },
151 [1] = { 151 [1] = {
152 .start = AT91SAM9260_ID_EMAC, 152 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_EMAC,
153 .end = AT91SAM9260_ID_EMAC, 153 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_EMAC,
154 .flags = IORESOURCE_IRQ, 154 .flags = IORESOURCE_IRQ,
155 }, 155 },
156}; 156};
@@ -223,8 +223,8 @@ static struct resource mmc_resources[] = {
223 .flags = IORESOURCE_MEM, 223 .flags = IORESOURCE_MEM,
224 }, 224 },
225 [1] = { 225 [1] = {
226 .start = AT91SAM9260_ID_MCI, 226 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI,
227 .end = AT91SAM9260_ID_MCI, 227 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI,
228 .flags = IORESOURCE_IRQ, 228 .flags = IORESOURCE_IRQ,
229 }, 229 },
230}; 230};
@@ -305,8 +305,8 @@ static struct resource mmc_resources[] = {
305 .flags = IORESOURCE_MEM, 305 .flags = IORESOURCE_MEM,
306 }, 306 },
307 [1] = { 307 [1] = {
308 .start = AT91SAM9260_ID_MCI, 308 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI,
309 .end = AT91SAM9260_ID_MCI, 309 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI,
310 .flags = IORESOURCE_IRQ, 310 .flags = IORESOURCE_IRQ,
311 }, 311 },
312}; 312};
@@ -496,8 +496,8 @@ static struct resource twi_resources[] = {
496 .flags = IORESOURCE_MEM, 496 .flags = IORESOURCE_MEM,
497 }, 497 },
498 [1] = { 498 [1] = {
499 .start = AT91SAM9260_ID_TWI, 499 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TWI,
500 .end = AT91SAM9260_ID_TWI, 500 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TWI,
501 .flags = IORESOURCE_IRQ, 501 .flags = IORESOURCE_IRQ,
502 }, 502 },
503}; 503};
@@ -540,8 +540,8 @@ static struct resource spi0_resources[] = {
540 .flags = IORESOURCE_MEM, 540 .flags = IORESOURCE_MEM,
541 }, 541 },
542 [1] = { 542 [1] = {
543 .start = AT91SAM9260_ID_SPI0, 543 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI0,
544 .end = AT91SAM9260_ID_SPI0, 544 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI0,
545 .flags = IORESOURCE_IRQ, 545 .flags = IORESOURCE_IRQ,
546 }, 546 },
547}; 547};
@@ -566,8 +566,8 @@ static struct resource spi1_resources[] = {
566 .flags = IORESOURCE_MEM, 566 .flags = IORESOURCE_MEM,
567 }, 567 },
568 [1] = { 568 [1] = {
569 .start = AT91SAM9260_ID_SPI1, 569 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI1,
570 .end = AT91SAM9260_ID_SPI1, 570 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI1,
571 .flags = IORESOURCE_IRQ, 571 .flags = IORESOURCE_IRQ,
572 }, 572 },
573}; 573};
@@ -652,18 +652,18 @@ static struct resource tcb0_resources[] = {
652 .flags = IORESOURCE_MEM, 652 .flags = IORESOURCE_MEM,
653 }, 653 },
654 [1] = { 654 [1] = {
655 .start = AT91SAM9260_ID_TC0, 655 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC0,
656 .end = AT91SAM9260_ID_TC0, 656 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC0,
657 .flags = IORESOURCE_IRQ, 657 .flags = IORESOURCE_IRQ,
658 }, 658 },
659 [2] = { 659 [2] = {
660 .start = AT91SAM9260_ID_TC1, 660 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC1,
661 .end = AT91SAM9260_ID_TC1, 661 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC1,
662 .flags = IORESOURCE_IRQ, 662 .flags = IORESOURCE_IRQ,
663 }, 663 },
664 [3] = { 664 [3] = {
665 .start = AT91SAM9260_ID_TC2, 665 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC2,
666 .end = AT91SAM9260_ID_TC2, 666 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC2,
667 .flags = IORESOURCE_IRQ, 667 .flags = IORESOURCE_IRQ,
668 }, 668 },
669}; 669};
@@ -682,18 +682,18 @@ static struct resource tcb1_resources[] = {
682 .flags = IORESOURCE_MEM, 682 .flags = IORESOURCE_MEM,
683 }, 683 },
684 [1] = { 684 [1] = {
685 .start = AT91SAM9260_ID_TC3, 685 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC3,
686 .end = AT91SAM9260_ID_TC3, 686 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC3,
687 .flags = IORESOURCE_IRQ, 687 .flags = IORESOURCE_IRQ,
688 }, 688 },
689 [2] = { 689 [2] = {
690 .start = AT91SAM9260_ID_TC4, 690 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC4,
691 .end = AT91SAM9260_ID_TC4, 691 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC4,
692 .flags = IORESOURCE_IRQ, 692 .flags = IORESOURCE_IRQ,
693 }, 693 },
694 [3] = { 694 [3] = {
695 .start = AT91SAM9260_ID_TC5, 695 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC5,
696 .end = AT91SAM9260_ID_TC5, 696 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC5,
697 .flags = IORESOURCE_IRQ, 697 .flags = IORESOURCE_IRQ,
698 }, 698 },
699}; 699};
@@ -807,8 +807,8 @@ static struct resource ssc_resources[] = {
807 .flags = IORESOURCE_MEM, 807 .flags = IORESOURCE_MEM,
808 }, 808 },
809 [1] = { 809 [1] = {
810 .start = AT91SAM9260_ID_SSC, 810 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_SSC,
811 .end = AT91SAM9260_ID_SSC, 811 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_SSC,
812 .flags = IORESOURCE_IRQ, 812 .flags = IORESOURCE_IRQ,
813 }, 813 },
814}; 814};
@@ -882,8 +882,8 @@ static struct resource dbgu_resources[] = {
882 .flags = IORESOURCE_MEM, 882 .flags = IORESOURCE_MEM,
883 }, 883 },
884 [1] = { 884 [1] = {
885 .start = AT91_ID_SYS, 885 .start = NR_IRQS_LEGACY + AT91_ID_SYS,
886 .end = AT91_ID_SYS, 886 .end = NR_IRQS_LEGACY + AT91_ID_SYS,
887 .flags = IORESOURCE_IRQ, 887 .flags = IORESOURCE_IRQ,
888 }, 888 },
889}; 889};
@@ -920,8 +920,8 @@ static struct resource uart0_resources[] = {
920 .flags = IORESOURCE_MEM, 920 .flags = IORESOURCE_MEM,
921 }, 921 },
922 [1] = { 922 [1] = {
923 .start = AT91SAM9260_ID_US0, 923 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US0,
924 .end = AT91SAM9260_ID_US0, 924 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US0,
925 .flags = IORESOURCE_IRQ, 925 .flags = IORESOURCE_IRQ,
926 }, 926 },
927}; 927};
@@ -971,8 +971,8 @@ static struct resource uart1_resources[] = {
971 .flags = IORESOURCE_MEM, 971 .flags = IORESOURCE_MEM,
972 }, 972 },
973 [1] = { 973 [1] = {
974 .start = AT91SAM9260_ID_US1, 974 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US1,
975 .end = AT91SAM9260_ID_US1, 975 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US1,
976 .flags = IORESOURCE_IRQ, 976 .flags = IORESOURCE_IRQ,
977 }, 977 },
978}; 978};
@@ -1014,8 +1014,8 @@ static struct resource uart2_resources[] = {
1014 .flags = IORESOURCE_MEM, 1014 .flags = IORESOURCE_MEM,
1015 }, 1015 },
1016 [1] = { 1016 [1] = {
1017 .start = AT91SAM9260_ID_US2, 1017 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US2,
1018 .end = AT91SAM9260_ID_US2, 1018 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US2,
1019 .flags = IORESOURCE_IRQ, 1019 .flags = IORESOURCE_IRQ,
1020 }, 1020 },
1021}; 1021};
@@ -1057,8 +1057,8 @@ static struct resource uart3_resources[] = {
1057 .flags = IORESOURCE_MEM, 1057 .flags = IORESOURCE_MEM,
1058 }, 1058 },
1059 [1] = { 1059 [1] = {
1060 .start = AT91SAM9260_ID_US3, 1060 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US3,
1061 .end = AT91SAM9260_ID_US3, 1061 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US3,
1062 .flags = IORESOURCE_IRQ, 1062 .flags = IORESOURCE_IRQ,
1063 }, 1063 },
1064}; 1064};
@@ -1100,8 +1100,8 @@ static struct resource uart4_resources[] = {
1100 .flags = IORESOURCE_MEM, 1100 .flags = IORESOURCE_MEM,
1101 }, 1101 },
1102 [1] = { 1102 [1] = {
1103 .start = AT91SAM9260_ID_US4, 1103 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US4,
1104 .end = AT91SAM9260_ID_US4, 1104 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US4,
1105 .flags = IORESOURCE_IRQ, 1105 .flags = IORESOURCE_IRQ,
1106 }, 1106 },
1107}; 1107};
@@ -1138,8 +1138,8 @@ static struct resource uart5_resources[] = {
1138 .flags = IORESOURCE_MEM, 1138 .flags = IORESOURCE_MEM,
1139 }, 1139 },
1140 [1] = { 1140 [1] = {
1141 .start = AT91SAM9260_ID_US5, 1141 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US5,
1142 .end = AT91SAM9260_ID_US5, 1142 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US5,
1143 .flags = IORESOURCE_IRQ, 1143 .flags = IORESOURCE_IRQ,
1144 }, 1144 },
1145}; 1145};
@@ -1357,8 +1357,8 @@ static struct resource adc_resources[] = {
1357 .flags = IORESOURCE_MEM, 1357 .flags = IORESOURCE_MEM,
1358 }, 1358 },
1359 [1] = { 1359 [1] = {
1360 .start = AT91SAM9260_ID_ADC, 1360 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_ADC,
1361 .end = AT91SAM9260_ID_ADC, 1361 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_ADC,
1362 .flags = IORESOURCE_IRQ, 1362 .flags = IORESOURCE_IRQ,
1363 }, 1363 },
1364}; 1364};
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index c77d503d09d1..f40762c5fede 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -19,6 +19,7 @@
19#include <asm/system_misc.h> 19#include <asm/system_misc.h>
20#include <mach/cpu.h> 20#include <mach/cpu.h>
21#include <mach/at91sam9261.h> 21#include <mach/at91sam9261.h>
22#include <mach/at91_aic.h>
22#include <mach/at91_pmc.h> 23#include <mach/at91_pmc.h>
23#include <mach/at91_rstc.h> 24#include <mach/at91_rstc.h>
24 25
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index 9295e90b08ff..8df5c1bdff92 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -45,8 +45,8 @@ static struct resource usbh_resources[] = {
45 .flags = IORESOURCE_MEM, 45 .flags = IORESOURCE_MEM,
46 }, 46 },
47 [1] = { 47 [1] = {
48 .start = AT91SAM9261_ID_UHP, 48 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_UHP,
49 .end = AT91SAM9261_ID_UHP, 49 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_UHP,
50 .flags = IORESOURCE_IRQ, 50 .flags = IORESOURCE_IRQ,
51 }, 51 },
52}; 52};
@@ -98,8 +98,8 @@ static struct resource udc_resources[] = {
98 .flags = IORESOURCE_MEM, 98 .flags = IORESOURCE_MEM,
99 }, 99 },
100 [1] = { 100 [1] = {
101 .start = AT91SAM9261_ID_UDP, 101 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_UDP,
102 .end = AT91SAM9261_ID_UDP, 102 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_UDP,
103 .flags = IORESOURCE_IRQ, 103 .flags = IORESOURCE_IRQ,
104 }, 104 },
105}; 105};
@@ -148,8 +148,8 @@ static struct resource mmc_resources[] = {
148 .flags = IORESOURCE_MEM, 148 .flags = IORESOURCE_MEM,
149 }, 149 },
150 [1] = { 150 [1] = {
151 .start = AT91SAM9261_ID_MCI, 151 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_MCI,
152 .end = AT91SAM9261_ID_MCI, 152 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_MCI,
153 .flags = IORESOURCE_IRQ, 153 .flags = IORESOURCE_IRQ,
154 }, 154 },
155}; 155};
@@ -310,8 +310,8 @@ static struct resource twi_resources[] = {
310 .flags = IORESOURCE_MEM, 310 .flags = IORESOURCE_MEM,
311 }, 311 },
312 [1] = { 312 [1] = {
313 .start = AT91SAM9261_ID_TWI, 313 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TWI,
314 .end = AT91SAM9261_ID_TWI, 314 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TWI,
315 .flags = IORESOURCE_IRQ, 315 .flags = IORESOURCE_IRQ,
316 }, 316 },
317}; 317};
@@ -354,8 +354,8 @@ static struct resource spi0_resources[] = {
354 .flags = IORESOURCE_MEM, 354 .flags = IORESOURCE_MEM,
355 }, 355 },
356 [1] = { 356 [1] = {
357 .start = AT91SAM9261_ID_SPI0, 357 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI0,
358 .end = AT91SAM9261_ID_SPI0, 358 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI0,
359 .flags = IORESOURCE_IRQ, 359 .flags = IORESOURCE_IRQ,
360 }, 360 },
361}; 361};
@@ -380,8 +380,8 @@ static struct resource spi1_resources[] = {
380 .flags = IORESOURCE_MEM, 380 .flags = IORESOURCE_MEM,
381 }, 381 },
382 [1] = { 382 [1] = {
383 .start = AT91SAM9261_ID_SPI1, 383 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI1,
384 .end = AT91SAM9261_ID_SPI1, 384 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI1,
385 .flags = IORESOURCE_IRQ, 385 .flags = IORESOURCE_IRQ,
386 }, 386 },
387}; 387};
@@ -468,8 +468,8 @@ static struct resource lcdc_resources[] = {
468 .flags = IORESOURCE_MEM, 468 .flags = IORESOURCE_MEM,
469 }, 469 },
470 [1] = { 470 [1] = {
471 .start = AT91SAM9261_ID_LCDC, 471 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_LCDC,
472 .end = AT91SAM9261_ID_LCDC, 472 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_LCDC,
473 .flags = IORESOURCE_IRQ, 473 .flags = IORESOURCE_IRQ,
474 }, 474 },
475#if defined(CONFIG_FB_INTSRAM) 475#if defined(CONFIG_FB_INTSRAM)
@@ -566,18 +566,18 @@ static struct resource tcb_resources[] = {
566 .flags = IORESOURCE_MEM, 566 .flags = IORESOURCE_MEM,
567 }, 567 },
568 [1] = { 568 [1] = {
569 .start = AT91SAM9261_ID_TC0, 569 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TC0,
570 .end = AT91SAM9261_ID_TC0, 570 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TC0,
571 .flags = IORESOURCE_IRQ, 571 .flags = IORESOURCE_IRQ,
572 }, 572 },
573 [2] = { 573 [2] = {
574 .start = AT91SAM9261_ID_TC1, 574 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TC1,
575 .end = AT91SAM9261_ID_TC1, 575 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TC1,
576 .flags = IORESOURCE_IRQ, 576 .flags = IORESOURCE_IRQ,
577 }, 577 },
578 [3] = { 578 [3] = {
579 .start = AT91SAM9261_ID_TC2, 579 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TC2,
580 .end = AT91SAM9261_ID_TC2, 580 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TC2,
581 .flags = IORESOURCE_IRQ, 581 .flags = IORESOURCE_IRQ,
582 }, 582 },
583}; 583};
@@ -689,8 +689,8 @@ static struct resource ssc0_resources[] = {
689 .flags = IORESOURCE_MEM, 689 .flags = IORESOURCE_MEM,
690 }, 690 },
691 [1] = { 691 [1] = {
692 .start = AT91SAM9261_ID_SSC0, 692 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC0,
693 .end = AT91SAM9261_ID_SSC0, 693 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC0,
694 .flags = IORESOURCE_IRQ, 694 .flags = IORESOURCE_IRQ,
695 }, 695 },
696}; 696};
@@ -731,8 +731,8 @@ static struct resource ssc1_resources[] = {
731 .flags = IORESOURCE_MEM, 731 .flags = IORESOURCE_MEM,
732 }, 732 },
733 [1] = { 733 [1] = {
734 .start = AT91SAM9261_ID_SSC1, 734 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC1,
735 .end = AT91SAM9261_ID_SSC1, 735 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC1,
736 .flags = IORESOURCE_IRQ, 736 .flags = IORESOURCE_IRQ,
737 }, 737 },
738}; 738};
@@ -773,8 +773,8 @@ static struct resource ssc2_resources[] = {
773 .flags = IORESOURCE_MEM, 773 .flags = IORESOURCE_MEM,
774 }, 774 },
775 [1] = { 775 [1] = {
776 .start = AT91SAM9261_ID_SSC2, 776 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC2,
777 .end = AT91SAM9261_ID_SSC2, 777 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC2,
778 .flags = IORESOURCE_IRQ, 778 .flags = IORESOURCE_IRQ,
779 }, 779 },
780}; 780};
@@ -857,8 +857,8 @@ static struct resource dbgu_resources[] = {
857 .flags = IORESOURCE_MEM, 857 .flags = IORESOURCE_MEM,
858 }, 858 },
859 [1] = { 859 [1] = {
860 .start = AT91_ID_SYS, 860 .start = NR_IRQS_LEGACY + AT91_ID_SYS,
861 .end = AT91_ID_SYS, 861 .end = NR_IRQS_LEGACY + AT91_ID_SYS,
862 .flags = IORESOURCE_IRQ, 862 .flags = IORESOURCE_IRQ,
863 }, 863 },
864}; 864};
@@ -895,8 +895,8 @@ static struct resource uart0_resources[] = {
895 .flags = IORESOURCE_MEM, 895 .flags = IORESOURCE_MEM,
896 }, 896 },
897 [1] = { 897 [1] = {
898 .start = AT91SAM9261_ID_US0, 898 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_US0,
899 .end = AT91SAM9261_ID_US0, 899 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_US0,
900 .flags = IORESOURCE_IRQ, 900 .flags = IORESOURCE_IRQ,
901 }, 901 },
902}; 902};
@@ -938,8 +938,8 @@ static struct resource uart1_resources[] = {
938 .flags = IORESOURCE_MEM, 938 .flags = IORESOURCE_MEM,
939 }, 939 },
940 [1] = { 940 [1] = {
941 .start = AT91SAM9261_ID_US1, 941 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_US1,
942 .end = AT91SAM9261_ID_US1, 942 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_US1,
943 .flags = IORESOURCE_IRQ, 943 .flags = IORESOURCE_IRQ,
944 }, 944 },
945}; 945};
@@ -981,8 +981,8 @@ static struct resource uart2_resources[] = {
981 .flags = IORESOURCE_MEM, 981 .flags = IORESOURCE_MEM,
982 }, 982 },
983 [1] = { 983 [1] = {
984 .start = AT91SAM9261_ID_US2, 984 .start = NR_IRQS_LEGACY + AT91SAM9261_ID_US2,
985 .end = AT91SAM9261_ID_US2, 985 .end = NR_IRQS_LEGACY + AT91SAM9261_ID_US2,
986 .flags = IORESOURCE_IRQ, 986 .flags = IORESOURCE_IRQ,
987 }, 987 },
988}; 988};
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index ed91c7e9f7c2..84b38105231e 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -18,6 +18,7 @@
18#include <asm/mach/map.h> 18#include <asm/mach/map.h>
19#include <asm/system_misc.h> 19#include <asm/system_misc.h>
20#include <mach/at91sam9263.h> 20#include <mach/at91sam9263.h>
21#include <mach/at91_aic.h>
21#include <mach/at91_pmc.h> 22#include <mach/at91_pmc.h>
22#include <mach/at91_rstc.h> 23#include <mach/at91_rstc.h>
23 24
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index 175e0009eaa9..eb6bbf86fb9f 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -44,8 +44,8 @@ static struct resource usbh_resources[] = {
44 .flags = IORESOURCE_MEM, 44 .flags = IORESOURCE_MEM,
45 }, 45 },
46 [1] = { 46 [1] = {
47 .start = AT91SAM9263_ID_UHP, 47 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_UHP,
48 .end = AT91SAM9263_ID_UHP, 48 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_UHP,
49 .flags = IORESOURCE_IRQ, 49 .flags = IORESOURCE_IRQ,
50 }, 50 },
51}; 51};
@@ -104,8 +104,8 @@ static struct resource udc_resources[] = {
104 .flags = IORESOURCE_MEM, 104 .flags = IORESOURCE_MEM,
105 }, 105 },
106 [1] = { 106 [1] = {
107 .start = AT91SAM9263_ID_UDP, 107 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_UDP,
108 .end = AT91SAM9263_ID_UDP, 108 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_UDP,
109 .flags = IORESOURCE_IRQ, 109 .flags = IORESOURCE_IRQ,
110 }, 110 },
111}; 111};
@@ -155,8 +155,8 @@ static struct resource eth_resources[] = {
155 .flags = IORESOURCE_MEM, 155 .flags = IORESOURCE_MEM,
156 }, 156 },
157 [1] = { 157 [1] = {
158 .start = AT91SAM9263_ID_EMAC, 158 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_EMAC,
159 .end = AT91SAM9263_ID_EMAC, 159 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_EMAC,
160 .flags = IORESOURCE_IRQ, 160 .flags = IORESOURCE_IRQ,
161 }, 161 },
162}; 162};
@@ -229,8 +229,8 @@ static struct resource mmc0_resources[] = {
229 .flags = IORESOURCE_MEM, 229 .flags = IORESOURCE_MEM,
230 }, 230 },
231 [1] = { 231 [1] = {
232 .start = AT91SAM9263_ID_MCI0, 232 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI0,
233 .end = AT91SAM9263_ID_MCI0, 233 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI0,
234 .flags = IORESOURCE_IRQ, 234 .flags = IORESOURCE_IRQ,
235 }, 235 },
236}; 236};
@@ -254,8 +254,8 @@ static struct resource mmc1_resources[] = {
254 .flags = IORESOURCE_MEM, 254 .flags = IORESOURCE_MEM,
255 }, 255 },
256 [1] = { 256 [1] = {
257 .start = AT91SAM9263_ID_MCI1, 257 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI1,
258 .end = AT91SAM9263_ID_MCI1, 258 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI1,
259 .flags = IORESOURCE_IRQ, 259 .flags = IORESOURCE_IRQ,
260 }, 260 },
261}; 261};
@@ -567,8 +567,8 @@ static struct resource twi_resources[] = {
567 .flags = IORESOURCE_MEM, 567 .flags = IORESOURCE_MEM,
568 }, 568 },
569 [1] = { 569 [1] = {
570 .start = AT91SAM9263_ID_TWI, 570 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_TWI,
571 .end = AT91SAM9263_ID_TWI, 571 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_TWI,
572 .flags = IORESOURCE_IRQ, 572 .flags = IORESOURCE_IRQ,
573 }, 573 },
574}; 574};
@@ -611,8 +611,8 @@ static struct resource spi0_resources[] = {
611 .flags = IORESOURCE_MEM, 611 .flags = IORESOURCE_MEM,
612 }, 612 },
613 [1] = { 613 [1] = {
614 .start = AT91SAM9263_ID_SPI0, 614 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI0,
615 .end = AT91SAM9263_ID_SPI0, 615 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI0,
616 .flags = IORESOURCE_IRQ, 616 .flags = IORESOURCE_IRQ,
617 }, 617 },
618}; 618};
@@ -637,8 +637,8 @@ static struct resource spi1_resources[] = {
637 .flags = IORESOURCE_MEM, 637 .flags = IORESOURCE_MEM,
638 }, 638 },
639 [1] = { 639 [1] = {
640 .start = AT91SAM9263_ID_SPI1, 640 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI1,
641 .end = AT91SAM9263_ID_SPI1, 641 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI1,
642 .flags = IORESOURCE_IRQ, 642 .flags = IORESOURCE_IRQ,
643 }, 643 },
644}; 644};
@@ -725,8 +725,8 @@ static struct resource ac97_resources[] = {
725 .flags = IORESOURCE_MEM, 725 .flags = IORESOURCE_MEM,
726 }, 726 },
727 [1] = { 727 [1] = {
728 .start = AT91SAM9263_ID_AC97C, 728 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_AC97C,
729 .end = AT91SAM9263_ID_AC97C, 729 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_AC97C,
730 .flags = IORESOURCE_IRQ, 730 .flags = IORESOURCE_IRQ,
731 }, 731 },
732}; 732};
@@ -776,8 +776,8 @@ static struct resource can_resources[] = {
776 .flags = IORESOURCE_MEM, 776 .flags = IORESOURCE_MEM,
777 }, 777 },
778 [1] = { 778 [1] = {
779 .start = AT91SAM9263_ID_CAN, 779 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_CAN,
780 .end = AT91SAM9263_ID_CAN, 780 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_CAN,
781 .flags = IORESOURCE_IRQ, 781 .flags = IORESOURCE_IRQ,
782 }, 782 },
783}; 783};
@@ -816,8 +816,8 @@ static struct resource lcdc_resources[] = {
816 .flags = IORESOURCE_MEM, 816 .flags = IORESOURCE_MEM,
817 }, 817 },
818 [1] = { 818 [1] = {
819 .start = AT91SAM9263_ID_LCDC, 819 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_LCDC,
820 .end = AT91SAM9263_ID_LCDC, 820 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_LCDC,
821 .flags = IORESOURCE_IRQ, 821 .flags = IORESOURCE_IRQ,
822 }, 822 },
823}; 823};
@@ -883,8 +883,8 @@ struct resource isi_resources[] = {
883 .flags = IORESOURCE_MEM, 883 .flags = IORESOURCE_MEM,
884 }, 884 },
885 [1] = { 885 [1] = {
886 .start = AT91SAM9263_ID_ISI, 886 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_ISI,
887 .end = AT91SAM9263_ID_ISI, 887 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_ISI,
888 .flags = IORESOURCE_IRQ, 888 .flags = IORESOURCE_IRQ,
889 }, 889 },
890}; 890};
@@ -940,8 +940,8 @@ static struct resource tcb_resources[] = {
940 .flags = IORESOURCE_MEM, 940 .flags = IORESOURCE_MEM,
941 }, 941 },
942 [1] = { 942 [1] = {
943 .start = AT91SAM9263_ID_TCB, 943 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_TCB,
944 .end = AT91SAM9263_ID_TCB, 944 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_TCB,
945 .flags = IORESOURCE_IRQ, 945 .flags = IORESOURCE_IRQ,
946 }, 946 },
947}; 947};
@@ -1108,8 +1108,8 @@ static struct resource pwm_resources[] = {
1108 .flags = IORESOURCE_MEM, 1108 .flags = IORESOURCE_MEM,
1109 }, 1109 },
1110 [1] = { 1110 [1] = {
1111 .start = AT91SAM9263_ID_PWMC, 1111 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_PWMC,
1112 .end = AT91SAM9263_ID_PWMC, 1112 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_PWMC,
1113 .flags = IORESOURCE_IRQ, 1113 .flags = IORESOURCE_IRQ,
1114 }, 1114 },
1115}; 1115};
@@ -1161,8 +1161,8 @@ static struct resource ssc0_resources[] = {
1161 .flags = IORESOURCE_MEM, 1161 .flags = IORESOURCE_MEM,
1162 }, 1162 },
1163 [1] = { 1163 [1] = {
1164 .start = AT91SAM9263_ID_SSC0, 1164 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC0,
1165 .end = AT91SAM9263_ID_SSC0, 1165 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC0,
1166 .flags = IORESOURCE_IRQ, 1166 .flags = IORESOURCE_IRQ,
1167 }, 1167 },
1168}; 1168};
@@ -1203,8 +1203,8 @@ static struct resource ssc1_resources[] = {
1203 .flags = IORESOURCE_MEM, 1203 .flags = IORESOURCE_MEM,
1204 }, 1204 },
1205 [1] = { 1205 [1] = {
1206 .start = AT91SAM9263_ID_SSC1, 1206 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC1,
1207 .end = AT91SAM9263_ID_SSC1, 1207 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC1,
1208 .flags = IORESOURCE_IRQ, 1208 .flags = IORESOURCE_IRQ,
1209 }, 1209 },
1210}; 1210};
@@ -1284,8 +1284,8 @@ static struct resource dbgu_resources[] = {
1284 .flags = IORESOURCE_MEM, 1284 .flags = IORESOURCE_MEM,
1285 }, 1285 },
1286 [1] = { 1286 [1] = {
1287 .start = AT91_ID_SYS, 1287 .start = NR_IRQS_LEGACY + AT91_ID_SYS,
1288 .end = AT91_ID_SYS, 1288 .end = NR_IRQS_LEGACY + AT91_ID_SYS,
1289 .flags = IORESOURCE_IRQ, 1289 .flags = IORESOURCE_IRQ,
1290 }, 1290 },
1291}; 1291};
@@ -1322,8 +1322,8 @@ static struct resource uart0_resources[] = {
1322 .flags = IORESOURCE_MEM, 1322 .flags = IORESOURCE_MEM,
1323 }, 1323 },
1324 [1] = { 1324 [1] = {
1325 .start = AT91SAM9263_ID_US0, 1325 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_US0,
1326 .end = AT91SAM9263_ID_US0, 1326 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_US0,
1327 .flags = IORESOURCE_IRQ, 1327 .flags = IORESOURCE_IRQ,
1328 }, 1328 },
1329}; 1329};
@@ -1365,8 +1365,8 @@ static struct resource uart1_resources[] = {
1365 .flags = IORESOURCE_MEM, 1365 .flags = IORESOURCE_MEM,
1366 }, 1366 },
1367 [1] = { 1367 [1] = {
1368 .start = AT91SAM9263_ID_US1, 1368 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_US1,
1369 .end = AT91SAM9263_ID_US1, 1369 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_US1,
1370 .flags = IORESOURCE_IRQ, 1370 .flags = IORESOURCE_IRQ,
1371 }, 1371 },
1372}; 1372};
@@ -1408,8 +1408,8 @@ static struct resource uart2_resources[] = {
1408 .flags = IORESOURCE_MEM, 1408 .flags = IORESOURCE_MEM,
1409 }, 1409 },
1410 [1] = { 1410 [1] = {
1411 .start = AT91SAM9263_ID_US2, 1411 .start = NR_IRQS_LEGACY + AT91SAM9263_ID_US2,
1412 .end = AT91SAM9263_ID_US2, 1412 .end = NR_IRQS_LEGACY + AT91SAM9263_ID_US2,
1413 .flags = IORESOURCE_IRQ, 1413 .flags = IORESOURCE_IRQ,
1414 }, 1414 },
1415}; 1415};
diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c
index a94758b42737..ffc0957d7623 100644
--- a/arch/arm/mach-at91/at91sam926x_time.c
+++ b/arch/arm/mach-at91/at91sam926x_time.c
@@ -137,7 +137,7 @@ static struct irqaction at91sam926x_pit_irq = {
137 .name = "at91_tick", 137 .name = "at91_tick",
138 .flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, 138 .flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
139 .handler = at91sam926x_pit_interrupt, 139 .handler = at91sam926x_pit_interrupt,
140 .irq = AT91_ID_SYS, 140 .irq = NR_IRQS_LEGACY + AT91_ID_SYS,
141}; 141};
142 142
143static void at91sam926x_pit_reset(void) 143static void at91sam926x_pit_reset(void)
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 4792682d52b9..977127368a7d 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -18,6 +18,7 @@
18#include <asm/mach/map.h> 18#include <asm/mach/map.h>
19#include <asm/system_misc.h> 19#include <asm/system_misc.h>
20#include <mach/at91sam9g45.h> 20#include <mach/at91sam9g45.h>
21#include <mach/at91_aic.h>
21#include <mach/at91_pmc.h> 22#include <mach/at91_pmc.h>
22#include <mach/cpu.h> 23#include <mach/cpu.h>
23 24
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index 933fc9afe7d0..40fb79df2de0 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -53,8 +53,8 @@ static struct resource hdmac_resources[] = {
53 .flags = IORESOURCE_MEM, 53 .flags = IORESOURCE_MEM,
54 }, 54 },
55 [1] = { 55 [1] = {
56 .start = AT91SAM9G45_ID_DMA, 56 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_DMA,
57 .end = AT91SAM9G45_ID_DMA, 57 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_DMA,
58 .flags = IORESOURCE_IRQ, 58 .flags = IORESOURCE_IRQ,
59 }, 59 },
60}; 60};
@@ -94,8 +94,8 @@ static struct resource usbh_ohci_resources[] = {
94 .flags = IORESOURCE_MEM, 94 .flags = IORESOURCE_MEM,
95 }, 95 },
96 [1] = { 96 [1] = {
97 .start = AT91SAM9G45_ID_UHPHS, 97 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS,
98 .end = AT91SAM9G45_ID_UHPHS, 98 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS,
99 .flags = IORESOURCE_IRQ, 99 .flags = IORESOURCE_IRQ,
100 }, 100 },
101}; 101};
@@ -156,8 +156,8 @@ static struct resource usbh_ehci_resources[] = {
156 .flags = IORESOURCE_MEM, 156 .flags = IORESOURCE_MEM,
157 }, 157 },
158 [1] = { 158 [1] = {
159 .start = AT91SAM9G45_ID_UHPHS, 159 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS,
160 .end = AT91SAM9G45_ID_UHPHS, 160 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS,
161 .flags = IORESOURCE_IRQ, 161 .flags = IORESOURCE_IRQ,
162 }, 162 },
163}; 163};
@@ -213,8 +213,8 @@ static struct resource usba_udc_resources[] = {
213 .flags = IORESOURCE_MEM, 213 .flags = IORESOURCE_MEM,
214 }, 214 },
215 [2] = { 215 [2] = {
216 .start = AT91SAM9G45_ID_UDPHS, 216 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_UDPHS,
217 .end = AT91SAM9G45_ID_UDPHS, 217 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_UDPHS,
218 .flags = IORESOURCE_IRQ, 218 .flags = IORESOURCE_IRQ,
219 }, 219 },
220}; 220};
@@ -296,8 +296,8 @@ static struct resource eth_resources[] = {
296 .flags = IORESOURCE_MEM, 296 .flags = IORESOURCE_MEM,
297 }, 297 },
298 [1] = { 298 [1] = {
299 .start = AT91SAM9G45_ID_EMAC, 299 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_EMAC,
300 .end = AT91SAM9G45_ID_EMAC, 300 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_EMAC,
301 .flags = IORESOURCE_IRQ, 301 .flags = IORESOURCE_IRQ,
302 }, 302 },
303}; 303};
@@ -370,8 +370,8 @@ static struct resource mmc0_resources[] = {
370 .flags = IORESOURCE_MEM, 370 .flags = IORESOURCE_MEM,
371 }, 371 },
372 [1] = { 372 [1] = {
373 .start = AT91SAM9G45_ID_MCI0, 373 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI0,
374 .end = AT91SAM9G45_ID_MCI0, 374 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI0,
375 .flags = IORESOURCE_IRQ, 375 .flags = IORESOURCE_IRQ,
376 }, 376 },
377}; 377};
@@ -395,8 +395,8 @@ static struct resource mmc1_resources[] = {
395 .flags = IORESOURCE_MEM, 395 .flags = IORESOURCE_MEM,
396 }, 396 },
397 [1] = { 397 [1] = {
398 .start = AT91SAM9G45_ID_MCI1, 398 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI1,
399 .end = AT91SAM9G45_ID_MCI1, 399 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI1,
400 .flags = IORESOURCE_IRQ, 400 .flags = IORESOURCE_IRQ,
401 }, 401 },
402}; 402};
@@ -645,8 +645,8 @@ static struct resource twi0_resources[] = {
645 .flags = IORESOURCE_MEM, 645 .flags = IORESOURCE_MEM,
646 }, 646 },
647 [1] = { 647 [1] = {
648 .start = AT91SAM9G45_ID_TWI0, 648 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI0,
649 .end = AT91SAM9G45_ID_TWI0, 649 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI0,
650 .flags = IORESOURCE_IRQ, 650 .flags = IORESOURCE_IRQ,
651 }, 651 },
652}; 652};
@@ -665,8 +665,8 @@ static struct resource twi1_resources[] = {
665 .flags = IORESOURCE_MEM, 665 .flags = IORESOURCE_MEM,
666 }, 666 },
667 [1] = { 667 [1] = {
668 .start = AT91SAM9G45_ID_TWI1, 668 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI1,
669 .end = AT91SAM9G45_ID_TWI1, 669 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI1,
670 .flags = IORESOURCE_IRQ, 670 .flags = IORESOURCE_IRQ,
671 }, 671 },
672}; 672};
@@ -720,8 +720,8 @@ static struct resource spi0_resources[] = {
720 .flags = IORESOURCE_MEM, 720 .flags = IORESOURCE_MEM,
721 }, 721 },
722 [1] = { 722 [1] = {
723 .start = AT91SAM9G45_ID_SPI0, 723 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI0,
724 .end = AT91SAM9G45_ID_SPI0, 724 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI0,
725 .flags = IORESOURCE_IRQ, 725 .flags = IORESOURCE_IRQ,
726 }, 726 },
727}; 727};
@@ -746,8 +746,8 @@ static struct resource spi1_resources[] = {
746 .flags = IORESOURCE_MEM, 746 .flags = IORESOURCE_MEM,
747 }, 747 },
748 [1] = { 748 [1] = {
749 .start = AT91SAM9G45_ID_SPI1, 749 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI1,
750 .end = AT91SAM9G45_ID_SPI1, 750 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI1,
751 .flags = IORESOURCE_IRQ, 751 .flags = IORESOURCE_IRQ,
752 }, 752 },
753}; 753};
@@ -834,8 +834,8 @@ static struct resource ac97_resources[] = {
834 .flags = IORESOURCE_MEM, 834 .flags = IORESOURCE_MEM,
835 }, 835 },
836 [1] = { 836 [1] = {
837 .start = AT91SAM9G45_ID_AC97C, 837 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_AC97C,
838 .end = AT91SAM9G45_ID_AC97C, 838 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_AC97C,
839 .flags = IORESOURCE_IRQ, 839 .flags = IORESOURCE_IRQ,
840 }, 840 },
841}; 841};
@@ -887,8 +887,8 @@ struct resource isi_resources[] = {
887 .flags = IORESOURCE_MEM, 887 .flags = IORESOURCE_MEM,
888 }, 888 },
889 [1] = { 889 [1] = {
890 .start = AT91SAM9G45_ID_ISI, 890 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_ISI,
891 .end = AT91SAM9G45_ID_ISI, 891 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_ISI,
892 .flags = IORESOURCE_IRQ, 892 .flags = IORESOURCE_IRQ,
893 }, 893 },
894}; 894};
@@ -979,8 +979,8 @@ static struct resource lcdc_resources[] = {
979 .flags = IORESOURCE_MEM, 979 .flags = IORESOURCE_MEM,
980 }, 980 },
981 [1] = { 981 [1] = {
982 .start = AT91SAM9G45_ID_LCDC, 982 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_LCDC,
983 .end = AT91SAM9G45_ID_LCDC, 983 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_LCDC,
984 .flags = IORESOURCE_IRQ, 984 .flags = IORESOURCE_IRQ,
985 }, 985 },
986}; 986};
@@ -1054,8 +1054,8 @@ static struct resource tcb0_resources[] = {
1054 .flags = IORESOURCE_MEM, 1054 .flags = IORESOURCE_MEM,
1055 }, 1055 },
1056 [1] = { 1056 [1] = {
1057 .start = AT91SAM9G45_ID_TCB, 1057 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB,
1058 .end = AT91SAM9G45_ID_TCB, 1058 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB,
1059 .flags = IORESOURCE_IRQ, 1059 .flags = IORESOURCE_IRQ,
1060 }, 1060 },
1061}; 1061};
@@ -1075,8 +1075,8 @@ static struct resource tcb1_resources[] = {
1075 .flags = IORESOURCE_MEM, 1075 .flags = IORESOURCE_MEM,
1076 }, 1076 },
1077 [1] = { 1077 [1] = {
1078 .start = AT91SAM9G45_ID_TCB, 1078 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB,
1079 .end = AT91SAM9G45_ID_TCB, 1079 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB,
1080 .flags = IORESOURCE_IRQ, 1080 .flags = IORESOURCE_IRQ,
1081 }, 1081 },
1082}; 1082};
@@ -1110,8 +1110,8 @@ static struct resource rtc_resources[] = {
1110 .flags = IORESOURCE_MEM, 1110 .flags = IORESOURCE_MEM,
1111 }, 1111 },
1112 [1] = { 1112 [1] = {
1113 .start = AT91_ID_SYS, 1113 .start = NR_IRQS_LEGACY + AT91_ID_SYS,
1114 .end = AT91_ID_SYS, 1114 .end = NR_IRQS_LEGACY + AT91_ID_SYS,
1115 .flags = IORESOURCE_IRQ, 1115 .flags = IORESOURCE_IRQ,
1116 }, 1116 },
1117}; 1117};
@@ -1147,8 +1147,8 @@ static struct resource tsadcc_resources[] = {
1147 .flags = IORESOURCE_MEM, 1147 .flags = IORESOURCE_MEM,
1148 }, 1148 },
1149 [1] = { 1149 [1] = {
1150 .start = AT91SAM9G45_ID_TSC, 1150 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC,
1151 .end = AT91SAM9G45_ID_TSC, 1151 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC,
1152 .flags = IORESOURCE_IRQ, 1152 .flags = IORESOURCE_IRQ,
1153 } 1153 }
1154}; 1154};
@@ -1197,8 +1197,8 @@ static struct resource adc_resources[] = {
1197 .flags = IORESOURCE_MEM, 1197 .flags = IORESOURCE_MEM,
1198 }, 1198 },
1199 [1] = { 1199 [1] = {
1200 .start = AT91SAM9G45_ID_TSC, 1200 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC,
1201 .end = AT91SAM9G45_ID_TSC, 1201 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC,
1202 .flags = IORESOURCE_IRQ, 1202 .flags = IORESOURCE_IRQ,
1203 } 1203 }
1204}; 1204};
@@ -1400,8 +1400,8 @@ static struct resource pwm_resources[] = {
1400 .flags = IORESOURCE_MEM, 1400 .flags = IORESOURCE_MEM,
1401 }, 1401 },
1402 [1] = { 1402 [1] = {
1403 .start = AT91SAM9G45_ID_PWMC, 1403 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_PWMC,
1404 .end = AT91SAM9G45_ID_PWMC, 1404 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_PWMC,
1405 .flags = IORESOURCE_IRQ, 1405 .flags = IORESOURCE_IRQ,
1406 }, 1406 },
1407}; 1407};
@@ -1453,8 +1453,8 @@ static struct resource ssc0_resources[] = {
1453 .flags = IORESOURCE_MEM, 1453 .flags = IORESOURCE_MEM,
1454 }, 1454 },
1455 [1] = { 1455 [1] = {
1456 .start = AT91SAM9G45_ID_SSC0, 1456 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC0,
1457 .end = AT91SAM9G45_ID_SSC0, 1457 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC0,
1458 .flags = IORESOURCE_IRQ, 1458 .flags = IORESOURCE_IRQ,
1459 }, 1459 },
1460}; 1460};
@@ -1495,8 +1495,8 @@ static struct resource ssc1_resources[] = {
1495 .flags = IORESOURCE_MEM, 1495 .flags = IORESOURCE_MEM,
1496 }, 1496 },
1497 [1] = { 1497 [1] = {
1498 .start = AT91SAM9G45_ID_SSC1, 1498 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC1,
1499 .end = AT91SAM9G45_ID_SSC1, 1499 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC1,
1500 .flags = IORESOURCE_IRQ, 1500 .flags = IORESOURCE_IRQ,
1501 }, 1501 },
1502}; 1502};
@@ -1575,8 +1575,8 @@ static struct resource dbgu_resources[] = {
1575 .flags = IORESOURCE_MEM, 1575 .flags = IORESOURCE_MEM,
1576 }, 1576 },
1577 [1] = { 1577 [1] = {
1578 .start = AT91_ID_SYS, 1578 .start = NR_IRQS_LEGACY + AT91_ID_SYS,
1579 .end = AT91_ID_SYS, 1579 .end = NR_IRQS_LEGACY + AT91_ID_SYS,
1580 .flags = IORESOURCE_IRQ, 1580 .flags = IORESOURCE_IRQ,
1581 }, 1581 },
1582}; 1582};
@@ -1613,8 +1613,8 @@ static struct resource uart0_resources[] = {
1613 .flags = IORESOURCE_MEM, 1613 .flags = IORESOURCE_MEM,
1614 }, 1614 },
1615 [1] = { 1615 [1] = {
1616 .start = AT91SAM9G45_ID_US0, 1616 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US0,
1617 .end = AT91SAM9G45_ID_US0, 1617 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US0,
1618 .flags = IORESOURCE_IRQ, 1618 .flags = IORESOURCE_IRQ,
1619 }, 1619 },
1620}; 1620};
@@ -1656,8 +1656,8 @@ static struct resource uart1_resources[] = {
1656 .flags = IORESOURCE_MEM, 1656 .flags = IORESOURCE_MEM,
1657 }, 1657 },
1658 [1] = { 1658 [1] = {
1659 .start = AT91SAM9G45_ID_US1, 1659 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US1,
1660 .end = AT91SAM9G45_ID_US1, 1660 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US1,
1661 .flags = IORESOURCE_IRQ, 1661 .flags = IORESOURCE_IRQ,
1662 }, 1662 },
1663}; 1663};
@@ -1699,8 +1699,8 @@ static struct resource uart2_resources[] = {
1699 .flags = IORESOURCE_MEM, 1699 .flags = IORESOURCE_MEM,
1700 }, 1700 },
1701 [1] = { 1701 [1] = {
1702 .start = AT91SAM9G45_ID_US2, 1702 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US2,
1703 .end = AT91SAM9G45_ID_US2, 1703 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US2,
1704 .flags = IORESOURCE_IRQ, 1704 .flags = IORESOURCE_IRQ,
1705 }, 1705 },
1706}; 1706};
@@ -1742,8 +1742,8 @@ static struct resource uart3_resources[] = {
1742 .flags = IORESOURCE_MEM, 1742 .flags = IORESOURCE_MEM,
1743 }, 1743 },
1744 [1] = { 1744 [1] = {
1745 .start = AT91SAM9G45_ID_US3, 1745 .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US3,
1746 .end = AT91SAM9G45_ID_US3, 1746 .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US3,
1747 .flags = IORESOURCE_IRQ, 1747 .flags = IORESOURCE_IRQ,
1748 }, 1748 },
1749}; 1749};
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index e420085a57ef..72ce50a50de5 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -19,6 +19,7 @@
19#include <mach/cpu.h> 19#include <mach/cpu.h>
20#include <mach/at91_dbgu.h> 20#include <mach/at91_dbgu.h>
21#include <mach/at91sam9rl.h> 21#include <mach/at91sam9rl.h>
22#include <mach/at91_aic.h>
22#include <mach/at91_pmc.h> 23#include <mach/at91_pmc.h>
23#include <mach/at91_rstc.h> 24#include <mach/at91_rstc.h>
24 25
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index 9c0b1481a9a7..f09fff932172 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -41,8 +41,8 @@ static struct resource hdmac_resources[] = {
41 .flags = IORESOURCE_MEM, 41 .flags = IORESOURCE_MEM,
42 }, 42 },
43 [2] = { 43 [2] = {
44 .start = AT91SAM9RL_ID_DMA, 44 .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_DMA,
45 .end = AT91SAM9RL_ID_DMA, 45 .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_DMA,
46 .flags = IORESOURCE_IRQ, 46 .flags = IORESOURCE_IRQ,
47 }, 47 },
48}; 48};
@@ -84,8 +84,8 @@ static struct resource usba_udc_resources[] = {
84 .flags = IORESOURCE_MEM, 84 .flags = IORESOURCE_MEM,
85 }, 85 },
86 [2] = { 86 [2] = {
87 .start = AT91SAM9RL_ID_UDPHS, 87 .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_UDPHS,
88 .end = AT91SAM9RL_ID_UDPHS, 88 .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_UDPHS,
89 .flags = IORESOURCE_IRQ, 89 .flags = IORESOURCE_IRQ,
90 }, 90 },
91}; 91};
@@ -172,8 +172,8 @@ static struct resource mmc_resources[] = {
172 .flags = IORESOURCE_MEM, 172 .flags = IORESOURCE_MEM,
173 }, 173 },
174 [1] = { 174 [1] = {
175 .start = AT91SAM9RL_ID_MCI, 175 .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_MCI,
176 .end = AT91SAM9RL_ID_MCI, 176 .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_MCI,
177 .flags = IORESOURCE_IRQ, 177 .flags = IORESOURCE_IRQ,
178 }, 178 },
179}; 179};
@@ -339,8 +339,8 @@ static struct resource twi_resources[] = {
339 .flags = IORESOURCE_MEM, 339 .flags = IORESOURCE_MEM,
340 }, 340 },
341 [1] = { 341 [1] = {
342 .start = AT91SAM9RL_ID_TWI0, 342 .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TWI0,
343 .end = AT91SAM9RL_ID_TWI0, 343 .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TWI0,
344 .flags = IORESOURCE_IRQ, 344 .flags = IORESOURCE_IRQ,
345 }, 345 },
346}; 346};
@@ -383,8 +383,8 @@ static struct resource spi_resources[] = {
383 .flags = IORESOURCE_MEM, 383 .flags = IORESOURCE_MEM,
384 }, 384 },
385 [1] = { 385 [1] = {
386 .start = AT91SAM9RL_ID_SPI, 386 .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_SPI,
387 .end = AT91SAM9RL_ID_SPI, 387 .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_SPI,
388 .flags = IORESOURCE_IRQ, 388 .flags = IORESOURCE_IRQ,
389 }, 389 },
390}; 390};
@@ -452,8 +452,8 @@ static struct resource ac97_resources[] = {
452 .flags = IORESOURCE_MEM, 452 .flags = IORESOURCE_MEM,
453 }, 453 },
454 [1] = { 454 [1] = {
455 .start = AT91SAM9RL_ID_AC97C, 455 .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_AC97C,
456 .end = AT91SAM9RL_ID_AC97C, 456 .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_AC97C,
457 .flags = IORESOURCE_IRQ, 457 .flags = IORESOURCE_IRQ,
458 }, 458 },
459}; 459};
@@ -507,8 +507,8 @@ static struct resource lcdc_resources[] = {
507 .flags = IORESOURCE_MEM, 507 .flags = IORESOURCE_MEM,
508 }, 508 },
509 [1] = { 509 [1] = {
510 .start = AT91SAM9RL_ID_LCDC, 510 .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_LCDC,
511 .end = AT91SAM9RL_ID_LCDC, 511 .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_LCDC,
512 .flags = IORESOURCE_IRQ, 512 .flags = IORESOURCE_IRQ,
513 }, 513 },
514}; 514};
@@ -574,18 +574,18 @@ static struct resource tcb_resources[] = {
574 .flags = IORESOURCE_MEM, 574 .flags = IORESOURCE_MEM,
575 }, 575 },
576 [1] = { 576 [1] = {
577 .start = AT91SAM9RL_ID_TC0, 577 .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC0,
578 .end = AT91SAM9RL_ID_TC0, 578 .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC0,
579 .flags = IORESOURCE_IRQ, 579 .flags = IORESOURCE_IRQ,
580 }, 580 },
581 [2] = { 581 [2] = {
582 .start = AT91SAM9RL_ID_TC1, 582 .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC1,
583 .end = AT91SAM9RL_ID_TC1, 583 .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC1,
584 .flags = IORESOURCE_IRQ, 584 .flags = IORESOURCE_IRQ,
585 }, 585 },
586 [3] = { 586 [3] = {
587 .start = AT91SAM9RL_ID_TC2, 587 .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC2,
588 .end = AT91SAM9RL_ID_TC2, 588 .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC2,
589 .flags = IORESOURCE_IRQ, 589 .flags = IORESOURCE_IRQ,
590 }, 590 },
591}; 591};
@@ -621,8 +621,8 @@ static struct resource tsadcc_resources[] = {
621 .flags = IORESOURCE_MEM, 621 .flags = IORESOURCE_MEM,
622 }, 622 },
623 [1] = { 623 [1] = {
624 .start = AT91SAM9RL_ID_TSC, 624 .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TSC,
625 .end = AT91SAM9RL_ID_TSC, 625 .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TSC,
626 .flags = IORESOURCE_IRQ, 626 .flags = IORESOURCE_IRQ,
627 } 627 }
628}; 628};
@@ -768,8 +768,8 @@ static struct resource pwm_resources[] = {
768 .flags = IORESOURCE_MEM, 768 .flags = IORESOURCE_MEM,
769 }, 769 },
770 [1] = { 770 [1] = {
771 .start = AT91SAM9RL_ID_PWMC, 771 .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_PWMC,
772 .end = AT91SAM9RL_ID_PWMC, 772 .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_PWMC,
773 .flags = IORESOURCE_IRQ, 773 .flags = IORESOURCE_IRQ,
774 }, 774 },
775}; 775};
@@ -821,8 +821,8 @@ static struct resource ssc0_resources[] = {
821 .flags = IORESOURCE_MEM, 821 .flags = IORESOURCE_MEM,
822 }, 822 },
823 [1] = { 823 [1] = {
824 .start = AT91SAM9RL_ID_SSC0, 824 .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC0,
825 .end = AT91SAM9RL_ID_SSC0, 825 .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC0,
826 .flags = IORESOURCE_IRQ, 826 .flags = IORESOURCE_IRQ,
827 }, 827 },
828}; 828};
@@ -863,8 +863,8 @@ static struct resource ssc1_resources[] = {
863 .flags = IORESOURCE_MEM, 863 .flags = IORESOURCE_MEM,
864 }, 864 },
865 [1] = { 865 [1] = {
866 .start = AT91SAM9RL_ID_SSC1, 866 .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC1,
867 .end = AT91SAM9RL_ID_SSC1, 867 .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC1,
868 .flags = IORESOURCE_IRQ, 868 .flags = IORESOURCE_IRQ,
869 }, 869 },
870}; 870};
@@ -943,8 +943,8 @@ static struct resource dbgu_resources[] = {
943 .flags = IORESOURCE_MEM, 943 .flags = IORESOURCE_MEM,
944 }, 944 },
945 [1] = { 945 [1] = {
946 .start = AT91_ID_SYS, 946 .start = NR_IRQS_LEGACY + AT91_ID_SYS,
947 .end = AT91_ID_SYS, 947 .end = NR_IRQS_LEGACY + AT91_ID_SYS,
948 .flags = IORESOURCE_IRQ, 948 .flags = IORESOURCE_IRQ,
949 }, 949 },
950}; 950};
@@ -981,8 +981,8 @@ static struct resource uart0_resources[] = {
981 .flags = IORESOURCE_MEM, 981 .flags = IORESOURCE_MEM,
982 }, 982 },
983 [1] = { 983 [1] = {
984 .start = AT91SAM9RL_ID_US0, 984 .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_US0,
985 .end = AT91SAM9RL_ID_US0, 985 .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_US0,
986 .flags = IORESOURCE_IRQ, 986 .flags = IORESOURCE_IRQ,
987 }, 987 },
988}; 988};
@@ -1032,8 +1032,8 @@ static struct resource uart1_resources[] = {
1032 .flags = IORESOURCE_MEM, 1032 .flags = IORESOURCE_MEM,
1033 }, 1033 },
1034 [1] = { 1034 [1] = {
1035 .start = AT91SAM9RL_ID_US1, 1035 .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_US1,
1036 .end = AT91SAM9RL_ID_US1, 1036 .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_US1,
1037 .flags = IORESOURCE_IRQ, 1037 .flags = IORESOURCE_IRQ,
1038 }, 1038 },
1039}; 1039};
@@ -1075,8 +1075,8 @@ static struct resource uart2_resources[] = {
1075 .flags = IORESOURCE_MEM, 1075 .flags = IORESOURCE_MEM,
1076 }, 1076 },
1077 [1] = { 1077 [1] = {
1078 .start = AT91SAM9RL_ID_US2, 1078 .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_US2,
1079 .end = AT91SAM9RL_ID_US2, 1079 .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_US2,
1080 .flags = IORESOURCE_IRQ, 1080 .flags = IORESOURCE_IRQ,
1081 }, 1081 },
1082}; 1082};
@@ -1118,8 +1118,8 @@ static struct resource uart3_resources[] = {
1118 .flags = IORESOURCE_MEM, 1118 .flags = IORESOURCE_MEM,
1119 }, 1119 },
1120 [1] = { 1120 [1] = {
1121 .start = AT91SAM9RL_ID_US3, 1121 .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_US3,
1122 .end = AT91SAM9RL_ID_US3, 1122 .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_US3,
1123 .flags = IORESOURCE_IRQ, 1123 .flags = IORESOURCE_IRQ,
1124 }, 1124 },
1125}; 1125};
diff --git a/arch/arm/mach-at91/at91x40.c b/arch/arm/mach-at91/at91x40.c
index d62fe090d814..4c0f5fd4d850 100644
--- a/arch/arm/mach-at91/at91x40.c
+++ b/arch/arm/mach-at91/at91x40.c
@@ -17,6 +17,7 @@
17#include <asm/system_misc.h> 17#include <asm/system_misc.h>
18#include <asm/mach/arch.h> 18#include <asm/mach/arch.h>
19#include <mach/at91x40.h> 19#include <mach/at91x40.h>
20#include <mach/at91_aic.h>
20#include <mach/at91_st.h> 21#include <mach/at91_st.h>
21#include <mach/timex.h> 22#include <mach/timex.h>
22#include "generic.h" 23#include "generic.h"
diff --git a/arch/arm/mach-at91/include/mach/at91_aic.h b/arch/arm/mach-at91/include/mach/at91_aic.h
index 78673784bc64..fd42a85b7eb1 100644
--- a/arch/arm/mach-at91/include/mach/at91_aic.h
+++ b/arch/arm/mach-at91/include/mach/at91_aic.h
@@ -28,6 +28,9 @@ extern void __iomem *at91_aic_base;
28.extern at91_aic_base 28.extern at91_aic_base
29#endif 29#endif
30 30
31/* Number of irq lines managed by AIC */
32#define NR_AIC_IRQS 32
33
31#define AT91_AIC_IRQ_MIN_PRIORITY 0 34#define AT91_AIC_IRQ_MIN_PRIORITY 0
32#define AT91_AIC_IRQ_MAX_PRIORITY 7 35#define AT91_AIC_IRQ_MAX_PRIORITY 7
33 36
diff --git a/arch/arm/mach-at91/include/mach/irqs.h b/arch/arm/mach-at91/include/mach/irqs.h
index 2d510ee6ac03..cab60d550771 100644
--- a/arch/arm/mach-at91/include/mach/irqs.h
+++ b/arch/arm/mach-at91/include/mach/irqs.h
@@ -22,18 +22,6 @@
22#define __ASM_ARCH_IRQS_H 22#define __ASM_ARCH_IRQS_H
23 23
24#include <linux/io.h> 24#include <linux/io.h>
25#include <mach/at91_aic.h>
26
27#define NR_AIC_IRQS 32
28
29
30/*
31 * IRQ interrupt symbols are the AT91xxx_ID_* symbols
32 * for IRQs handled directly through the AIC, or else the AT91_PIN_*
33 * symbols in gpio.h for ones handled indirectly as GPIOs.
34 * We make provision for 5 banks of GPIO.
35 */
36#define NR_IRQS (NR_AIC_IRQS + (5 * 32))
37 25
38/* FIQ is AIC source 0. */ 26/* FIQ is AIC source 0. */
39#define FIQ_START AT91_ID_FIQ 27#define FIQ_START AT91_ID_FIQ
diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c
index 390d4df21ef6..75ca2f44c78e 100644
--- a/arch/arm/mach-at91/irq.c
+++ b/arch/arm/mach-at91/irq.c
@@ -41,6 +41,8 @@
41#include <asm/mach/irq.h> 41#include <asm/mach/irq.h>
42#include <asm/mach/map.h> 42#include <asm/mach/map.h>
43 43
44#include <mach/at91_aic.h>
45
44void __iomem *at91_aic_base; 46void __iomem *at91_aic_base;
45static struct irq_domain *at91_aic_domain; 47static struct irq_domain *at91_aic_domain;
46static struct device_node *at91_aic_np; 48static struct device_node *at91_aic_np;
@@ -302,11 +304,11 @@ void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS])
302 */ 304 */
303 for (i = 0; i < NR_AIC_IRQS; i++) { 305 for (i = 0; i < NR_AIC_IRQS; i++) {
304 /* Put hardware irq number in Source Vector Register: */ 306 /* Put hardware irq number in Source Vector Register: */
305 at91_aic_write(AT91_AIC_SVR(i), i); 307 at91_aic_write(AT91_AIC_SVR(i), NR_IRQS_LEGACY + i);
306 /* Active Low interrupt, with the specified priority */ 308 /* Active Low interrupt, with the specified priority */
307 at91_aic_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]); 309 at91_aic_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]);
308 310
309 irq_set_chip_and_handler(i, &at91_aic_chip, handle_fasteoi_irq); 311 irq_set_chip_and_handler(NR_IRQS_LEGACY + i, &at91_aic_chip, handle_fasteoi_irq);
310 set_irq_flags(i, IRQF_VALID | IRQF_PROBE); 312 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
311 } 313 }
312 314
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 1bfaad628731..2c2d86505a54 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -25,6 +25,7 @@
25#include <asm/mach/time.h> 25#include <asm/mach/time.h>
26#include <asm/mach/irq.h> 26#include <asm/mach/irq.h>
27 27
28#include <mach/at91_aic.h>
28#include <mach/at91_pmc.h> 29#include <mach/at91_pmc.h>
29#include <mach/cpu.h> 30#include <mach/cpu.h>
30 31
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-13 22:14:30 -0500