diff options
author | Vasanthakumar Thiagarajan <vasanth@atheros.com> | 2009-05-08 20:54:51 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2009-05-11 15:24:05 -0400 |
commit | 8fbff4b838c53945d6baeafe609c627000f85cd6 (patch) | |
tree | 933100908a181acf99aea104b13db17073303113 | |
parent | 19eddca67628e5fb722e4ebbbba8c307a884d0e8 (diff) |
ath9k: Cleanup ineffective return values
This patch makes the return type of some of the functions
void as those functions always return true
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r-- | drivers/net/wireless/ath/ath9k/eeprom.c | 51 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/eeprom.h | 2 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/hw.c | 57 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/hw.h | 2 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/phy.c | 7 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/phy.h | 2 |
6 files changed, 36 insertions, 85 deletions
diff --git a/drivers/net/wireless/ath/ath9k/eeprom.c b/drivers/net/wireless/ath/ath9k/eeprom.c index 44fee5ae8925..a2fda702b620 100644 --- a/drivers/net/wireless/ath/ath9k/eeprom.c +++ b/drivers/net/wireless/ath/ath9k/eeprom.c | |||
@@ -694,7 +694,7 @@ static void ath9k_hw_get_4k_gain_boundaries_pdadcs(struct ath_hw *ah, | |||
694 | #undef TMP_VAL_VPD_TABLE | 694 | #undef TMP_VAL_VPD_TABLE |
695 | } | 695 | } |
696 | 696 | ||
697 | static bool ath9k_hw_set_4k_power_cal_table(struct ath_hw *ah, | 697 | static void ath9k_hw_set_4k_power_cal_table(struct ath_hw *ah, |
698 | struct ath9k_channel *chan, | 698 | struct ath9k_channel *chan, |
699 | int16_t *pTxPowerIndexOffset) | 699 | int16_t *pTxPowerIndexOffset) |
700 | { | 700 | { |
@@ -805,11 +805,9 @@ static bool ath9k_hw_set_4k_power_cal_table(struct ath_hw *ah, | |||
805 | } | 805 | } |
806 | 806 | ||
807 | *pTxPowerIndexOffset = 0; | 807 | *pTxPowerIndexOffset = 0; |
808 | |||
809 | return true; | ||
810 | } | 808 | } |
811 | 809 | ||
812 | static bool ath9k_hw_set_4k_power_per_rate_table(struct ath_hw *ah, | 810 | static void ath9k_hw_set_4k_power_per_rate_table(struct ath_hw *ah, |
813 | struct ath9k_channel *chan, | 811 | struct ath9k_channel *chan, |
814 | int16_t *ratesArray, | 812 | int16_t *ratesArray, |
815 | u16 cfgCtl, | 813 | u16 cfgCtl, |
@@ -1041,10 +1039,9 @@ static bool ath9k_hw_set_4k_power_per_rate_table(struct ath_hw *ah, | |||
1041 | ratesArray[rateExtOfdm] = targetPowerOfdmExt.tPow2x[0]; | 1039 | ratesArray[rateExtOfdm] = targetPowerOfdmExt.tPow2x[0]; |
1042 | ratesArray[rateExtCck] = targetPowerCckExt.tPow2x[0]; | 1040 | ratesArray[rateExtCck] = targetPowerCckExt.tPow2x[0]; |
1043 | } | 1041 | } |
1044 | return true; | ||
1045 | } | 1042 | } |
1046 | 1043 | ||
1047 | static int ath9k_hw_4k_set_txpower(struct ath_hw *ah, | 1044 | static void ath9k_hw_4k_set_txpower(struct ath_hw *ah, |
1048 | struct ath9k_channel *chan, | 1045 | struct ath9k_channel *chan, |
1049 | u16 cfgCtl, | 1046 | u16 cfgCtl, |
1050 | u8 twiceAntennaReduction, | 1047 | u8 twiceAntennaReduction, |
@@ -1065,22 +1062,13 @@ static int ath9k_hw_4k_set_txpower(struct ath_hw *ah, | |||
1065 | ht40PowerIncForPdadc = pModal->ht40PowerIncForPdadc; | 1062 | ht40PowerIncForPdadc = pModal->ht40PowerIncForPdadc; |
1066 | } | 1063 | } |
1067 | 1064 | ||
1068 | if (!ath9k_hw_set_4k_power_per_rate_table(ah, chan, | 1065 | ath9k_hw_set_4k_power_per_rate_table(ah, chan, |
1069 | &ratesArray[0], cfgCtl, | 1066 | &ratesArray[0], cfgCtl, |
1070 | twiceAntennaReduction, | 1067 | twiceAntennaReduction, |
1071 | twiceMaxRegulatoryPower, | 1068 | twiceMaxRegulatoryPower, |
1072 | powerLimit)) { | 1069 | powerLimit); |
1073 | DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, | ||
1074 | "ath9k_hw_set_txpower: unable to set " | ||
1075 | "tx power per rate table\n"); | ||
1076 | return -EIO; | ||
1077 | } | ||
1078 | 1070 | ||
1079 | if (!ath9k_hw_set_4k_power_cal_table(ah, chan, &txPowerIndexOffset)) { | 1071 | ath9k_hw_set_4k_power_cal_table(ah, chan, &txPowerIndexOffset); |
1080 | DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, | ||
1081 | "ath9k_hw_set_txpower: unable to set power table\n"); | ||
1082 | return -EIO; | ||
1083 | } | ||
1084 | 1072 | ||
1085 | for (i = 0; i < ARRAY_SIZE(ratesArray); i++) { | 1073 | for (i = 0; i < ARRAY_SIZE(ratesArray); i++) { |
1086 | ratesArray[i] = (int16_t)(txPowerIndexOffset + ratesArray[i]); | 1074 | ratesArray[i] = (int16_t)(txPowerIndexOffset + ratesArray[i]); |
@@ -1168,7 +1156,6 @@ static int ath9k_hw_4k_set_txpower(struct ath_hw *ah, | |||
1168 | else | 1156 | else |
1169 | ah->regulatory.max_power_level = ratesArray[i]; | 1157 | ah->regulatory.max_power_level = ratesArray[i]; |
1170 | 1158 | ||
1171 | return 0; | ||
1172 | } | 1159 | } |
1173 | 1160 | ||
1174 | static void ath9k_hw_4k_set_addac(struct ath_hw *ah, | 1161 | static void ath9k_hw_4k_set_addac(struct ath_hw *ah, |
@@ -2103,7 +2090,7 @@ static void ath9k_hw_get_def_gain_boundaries_pdadcs(struct ath_hw *ah, | |||
2103 | return; | 2090 | return; |
2104 | } | 2091 | } |
2105 | 2092 | ||
2106 | static bool ath9k_hw_set_def_power_cal_table(struct ath_hw *ah, | 2093 | static void ath9k_hw_set_def_power_cal_table(struct ath_hw *ah, |
2107 | struct ath9k_channel *chan, | 2094 | struct ath9k_channel *chan, |
2108 | int16_t *pTxPowerIndexOffset) | 2095 | int16_t *pTxPowerIndexOffset) |
2109 | { | 2096 | { |
@@ -2255,13 +2242,11 @@ static bool ath9k_hw_set_def_power_cal_table(struct ath_hw *ah, | |||
2255 | } | 2242 | } |
2256 | 2243 | ||
2257 | *pTxPowerIndexOffset = 0; | 2244 | *pTxPowerIndexOffset = 0; |
2258 | |||
2259 | return true; | ||
2260 | #undef SM_PD_GAIN | 2245 | #undef SM_PD_GAIN |
2261 | #undef SM_PDGAIN_B | 2246 | #undef SM_PDGAIN_B |
2262 | } | 2247 | } |
2263 | 2248 | ||
2264 | static bool ath9k_hw_set_def_power_per_rate_table(struct ath_hw *ah, | 2249 | static void ath9k_hw_set_def_power_per_rate_table(struct ath_hw *ah, |
2265 | struct ath9k_channel *chan, | 2250 | struct ath9k_channel *chan, |
2266 | int16_t *ratesArray, | 2251 | int16_t *ratesArray, |
2267 | u16 cfgCtl, | 2252 | u16 cfgCtl, |
@@ -2549,10 +2534,9 @@ static bool ath9k_hw_set_def_power_per_rate_table(struct ath_hw *ah, | |||
2549 | targetPowerCckExt.tPow2x[0]; | 2534 | targetPowerCckExt.tPow2x[0]; |
2550 | } | 2535 | } |
2551 | } | 2536 | } |
2552 | return true; | ||
2553 | } | 2537 | } |
2554 | 2538 | ||
2555 | static int ath9k_hw_def_set_txpower(struct ath_hw *ah, | 2539 | static void ath9k_hw_def_set_txpower(struct ath_hw *ah, |
2556 | struct ath9k_channel *chan, | 2540 | struct ath9k_channel *chan, |
2557 | u16 cfgCtl, | 2541 | u16 cfgCtl, |
2558 | u8 twiceAntennaReduction, | 2542 | u8 twiceAntennaReduction, |
@@ -2575,22 +2559,13 @@ static int ath9k_hw_def_set_txpower(struct ath_hw *ah, | |||
2575 | ht40PowerIncForPdadc = pModal->ht40PowerIncForPdadc; | 2559 | ht40PowerIncForPdadc = pModal->ht40PowerIncForPdadc; |
2576 | } | 2560 | } |
2577 | 2561 | ||
2578 | if (!ath9k_hw_set_def_power_per_rate_table(ah, chan, | 2562 | ath9k_hw_set_def_power_per_rate_table(ah, chan, |
2579 | &ratesArray[0], cfgCtl, | 2563 | &ratesArray[0], cfgCtl, |
2580 | twiceAntennaReduction, | 2564 | twiceAntennaReduction, |
2581 | twiceMaxRegulatoryPower, | 2565 | twiceMaxRegulatoryPower, |
2582 | powerLimit)) { | 2566 | powerLimit); |
2583 | DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, | ||
2584 | "ath9k_hw_set_txpower: unable to set " | ||
2585 | "tx power per rate table\n"); | ||
2586 | return -EIO; | ||
2587 | } | ||
2588 | 2567 | ||
2589 | if (!ath9k_hw_set_def_power_cal_table(ah, chan, &txPowerIndexOffset)) { | 2568 | ath9k_hw_set_def_power_cal_table(ah, chan, &txPowerIndexOffset); |
2590 | DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, | ||
2591 | "ath9k_hw_set_txpower: unable to set power table\n"); | ||
2592 | return -EIO; | ||
2593 | } | ||
2594 | 2569 | ||
2595 | for (i = 0; i < ARRAY_SIZE(ratesArray); i++) { | 2570 | for (i = 0; i < ARRAY_SIZE(ratesArray); i++) { |
2596 | ratesArray[i] = (int16_t)(txPowerIndexOffset + ratesArray[i]); | 2571 | ratesArray[i] = (int16_t)(txPowerIndexOffset + ratesArray[i]); |
@@ -2717,8 +2692,6 @@ static int ath9k_hw_def_set_txpower(struct ath_hw *ah, | |||
2717 | "Invalid chainmask configuration\n"); | 2692 | "Invalid chainmask configuration\n"); |
2718 | break; | 2693 | break; |
2719 | } | 2694 | } |
2720 | |||
2721 | return 0; | ||
2722 | } | 2695 | } |
2723 | 2696 | ||
2724 | static u8 ath9k_hw_def_get_num_ant_config(struct ath_hw *ah, | 2697 | static u8 ath9k_hw_def_get_num_ant_config(struct ath_hw *ah, |
diff --git a/drivers/net/wireless/ath/ath9k/eeprom.h b/drivers/net/wireless/ath/ath9k/eeprom.h index 7c59dc47f912..67b8bd12941a 100644 --- a/drivers/net/wireless/ath/ath9k/eeprom.h +++ b/drivers/net/wireless/ath/ath9k/eeprom.h | |||
@@ -494,7 +494,7 @@ struct eeprom_ops { | |||
494 | struct ath9k_channel *chan); | 494 | struct ath9k_channel *chan); |
495 | void (*set_board_values)(struct ath_hw *hw, struct ath9k_channel *chan); | 495 | void (*set_board_values)(struct ath_hw *hw, struct ath9k_channel *chan); |
496 | void (*set_addac)(struct ath_hw *hw, struct ath9k_channel *chan); | 496 | void (*set_addac)(struct ath_hw *hw, struct ath9k_channel *chan); |
497 | int (*set_txpower)(struct ath_hw *hw, struct ath9k_channel *chan, | 497 | void (*set_txpower)(struct ath_hw *hw, struct ath9k_channel *chan, |
498 | u16 cfgCtl, u8 twiceAntennaReduction, | 498 | u16 cfgCtl, u8 twiceAntennaReduction, |
499 | u8 twiceMaxRegulatoryPower, u8 powerLimit); | 499 | u8 twiceMaxRegulatoryPower, u8 powerLimit); |
500 | u16 (*get_spur_channel)(struct ath_hw *ah, u16 i, bool is2GHz); | 500 | u16 (*get_spur_channel)(struct ath_hw *ah, u16 i, bool is2GHz); |
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c index 9e1db85e5651..4acfab514916 100644 --- a/drivers/net/wireless/ath/ath9k/hw.c +++ b/drivers/net/wireless/ath/ath9k/hw.c | |||
@@ -1274,7 +1274,6 @@ static int ath9k_hw_process_ini(struct ath_hw *ah, | |||
1274 | int i, regWrites = 0; | 1274 | int i, regWrites = 0; |
1275 | struct ieee80211_channel *channel = chan->chan; | 1275 | struct ieee80211_channel *channel = chan->chan; |
1276 | u32 modesIndex, freqIndex; | 1276 | u32 modesIndex, freqIndex; |
1277 | int status; | ||
1278 | 1277 | ||
1279 | switch (chan->chanmode) { | 1278 | switch (chan->chanmode) { |
1280 | case CHANNEL_A: | 1279 | case CHANNEL_A: |
@@ -1376,17 +1375,12 @@ static int ath9k_hw_process_ini(struct ath_hw *ah, | |||
1376 | if (OLC_FOR_AR9280_20_LATER) | 1375 | if (OLC_FOR_AR9280_20_LATER) |
1377 | ath9k_olc_init(ah); | 1376 | ath9k_olc_init(ah); |
1378 | 1377 | ||
1379 | status = ah->eep_ops->set_txpower(ah, chan, | 1378 | ah->eep_ops->set_txpower(ah, chan, |
1380 | ath9k_regd_get_ctl(&ah->regulatory, chan), | 1379 | ath9k_regd_get_ctl(&ah->regulatory, chan), |
1381 | channel->max_antenna_gain * 2, | 1380 | channel->max_antenna_gain * 2, |
1382 | channel->max_power * 2, | 1381 | channel->max_power * 2, |
1383 | min((u32) MAX_RATE_POWER, | 1382 | min((u32) MAX_RATE_POWER, |
1384 | (u32) ah->regulatory.power_limit)); | 1383 | (u32) ah->regulatory.power_limit)); |
1385 | if (status != 0) { | ||
1386 | DPRINTF(ah->ah_sc, ATH_DBG_FATAL, | ||
1387 | "Error initializing transmit power\n"); | ||
1388 | return -EIO; | ||
1389 | } | ||
1390 | 1384 | ||
1391 | if (!ath9k_hw_set_rf_regs(ah, chan, freqIndex)) { | 1385 | if (!ath9k_hw_set_rf_regs(ah, chan, freqIndex)) { |
1392 | DPRINTF(ah->ah_sc, ATH_DBG_FATAL, | 1386 | DPRINTF(ah->ah_sc, ATH_DBG_FATAL, |
@@ -1701,11 +1695,7 @@ static bool ath9k_hw_channel_change(struct ath_hw *ah, | |||
1701 | ath9k_hw_set_regs(ah, chan, macmode); | 1695 | ath9k_hw_set_regs(ah, chan, macmode); |
1702 | 1696 | ||
1703 | if (AR_SREV_9280_10_OR_LATER(ah)) { | 1697 | if (AR_SREV_9280_10_OR_LATER(ah)) { |
1704 | if (!(ath9k_hw_ar9280_set_channel(ah, chan))) { | 1698 | ath9k_hw_ar9280_set_channel(ah, chan); |
1705 | DPRINTF(ah->ah_sc, ATH_DBG_FATAL, | ||
1706 | "Failed to set channel\n"); | ||
1707 | return false; | ||
1708 | } | ||
1709 | } else { | 1699 | } else { |
1710 | if (!(ath9k_hw_set_channel(ah, chan))) { | 1700 | if (!(ath9k_hw_set_channel(ah, chan))) { |
1711 | DPRINTF(ah->ah_sc, ATH_DBG_FATAL, | 1701 | DPRINTF(ah->ah_sc, ATH_DBG_FATAL, |
@@ -1714,16 +1704,12 @@ static bool ath9k_hw_channel_change(struct ath_hw *ah, | |||
1714 | } | 1704 | } |
1715 | } | 1705 | } |
1716 | 1706 | ||
1717 | if (ah->eep_ops->set_txpower(ah, chan, | 1707 | ah->eep_ops->set_txpower(ah, chan, |
1718 | ath9k_regd_get_ctl(&ah->regulatory, chan), | 1708 | ath9k_regd_get_ctl(&ah->regulatory, chan), |
1719 | channel->max_antenna_gain * 2, | 1709 | channel->max_antenna_gain * 2, |
1720 | channel->max_power * 2, | 1710 | channel->max_power * 2, |
1721 | min((u32) MAX_RATE_POWER, | 1711 | min((u32) MAX_RATE_POWER, |
1722 | (u32) ah->regulatory.power_limit)) != 0) { | 1712 | (u32) ah->regulatory.power_limit)); |
1723 | DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, | ||
1724 | "Error initializing transmit power\n"); | ||
1725 | return false; | ||
1726 | } | ||
1727 | 1713 | ||
1728 | synthDelay = REG_READ(ah, AR_PHY_RX_DELAY) & AR_PHY_RX_DELAY_DELAY; | 1714 | synthDelay = REG_READ(ah, AR_PHY_RX_DELAY) & AR_PHY_RX_DELAY_DELAY; |
1729 | if (IS_CHAN_B(chan)) | 1715 | if (IS_CHAN_B(chan)) |
@@ -2311,13 +2297,11 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, | |||
2311 | 2297 | ||
2312 | REG_WRITE(ah, AR_RSSI_THR, INIT_RSSI_THR); | 2298 | REG_WRITE(ah, AR_RSSI_THR, INIT_RSSI_THR); |
2313 | 2299 | ||
2314 | if (AR_SREV_9280_10_OR_LATER(ah)) { | 2300 | if (AR_SREV_9280_10_OR_LATER(ah)) |
2315 | if (!(ath9k_hw_ar9280_set_channel(ah, chan))) | 2301 | ath9k_hw_ar9280_set_channel(ah, chan); |
2316 | return -EIO; | 2302 | else |
2317 | } else { | ||
2318 | if (!(ath9k_hw_set_channel(ah, chan))) | 2303 | if (!(ath9k_hw_set_channel(ah, chan))) |
2319 | return -EIO; | 2304 | return -EIO; |
2320 | } | ||
2321 | 2305 | ||
2322 | for (i = 0; i < AR_NUM_DCU; i++) | 2306 | for (i = 0; i < AR_NUM_DCU; i++) |
2323 | REG_WRITE(ah, AR_DQCUMASK(i), 1 << i); | 2307 | REG_WRITE(ah, AR_DQCUMASK(i), 1 << i); |
@@ -3748,22 +3732,19 @@ bool ath9k_hw_disable(struct ath_hw *ah) | |||
3748 | return ath9k_hw_set_reset_reg(ah, ATH9K_RESET_COLD); | 3732 | return ath9k_hw_set_reset_reg(ah, ATH9K_RESET_COLD); |
3749 | } | 3733 | } |
3750 | 3734 | ||
3751 | bool ath9k_hw_set_txpowerlimit(struct ath_hw *ah, u32 limit) | 3735 | void ath9k_hw_set_txpowerlimit(struct ath_hw *ah, u32 limit) |
3752 | { | 3736 | { |
3753 | struct ath9k_channel *chan = ah->curchan; | 3737 | struct ath9k_channel *chan = ah->curchan; |
3754 | struct ieee80211_channel *channel = chan->chan; | 3738 | struct ieee80211_channel *channel = chan->chan; |
3755 | 3739 | ||
3756 | ah->regulatory.power_limit = min(limit, (u32) MAX_RATE_POWER); | 3740 | ah->regulatory.power_limit = min(limit, (u32) MAX_RATE_POWER); |
3757 | 3741 | ||
3758 | if (ah->eep_ops->set_txpower(ah, chan, | 3742 | ah->eep_ops->set_txpower(ah, chan, |
3759 | ath9k_regd_get_ctl(&ah->regulatory, chan), | 3743 | ath9k_regd_get_ctl(&ah->regulatory, chan), |
3760 | channel->max_antenna_gain * 2, | 3744 | channel->max_antenna_gain * 2, |
3761 | channel->max_power * 2, | 3745 | channel->max_power * 2, |
3762 | min((u32) MAX_RATE_POWER, | 3746 | min((u32) MAX_RATE_POWER, |
3763 | (u32) ah->regulatory.power_limit)) != 0) | 3747 | (u32) ah->regulatory.power_limit)); |
3764 | return false; | ||
3765 | |||
3766 | return true; | ||
3767 | } | 3748 | } |
3768 | 3749 | ||
3769 | void ath9k_hw_setmac(struct ath_hw *ah, const u8 *mac) | 3750 | void ath9k_hw_setmac(struct ath_hw *ah, const u8 *mac) |
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h index ddb24c47ebcf..dd8508ef6e05 100644 --- a/drivers/net/wireless/ath/ath9k/hw.h +++ b/drivers/net/wireless/ath/ath9k/hw.h | |||
@@ -590,7 +590,7 @@ u32 ath9k_hw_getrxfilter(struct ath_hw *ah); | |||
590 | void ath9k_hw_setrxfilter(struct ath_hw *ah, u32 bits); | 590 | void ath9k_hw_setrxfilter(struct ath_hw *ah, u32 bits); |
591 | bool ath9k_hw_phy_disable(struct ath_hw *ah); | 591 | bool ath9k_hw_phy_disable(struct ath_hw *ah); |
592 | bool ath9k_hw_disable(struct ath_hw *ah); | 592 | bool ath9k_hw_disable(struct ath_hw *ah); |
593 | bool ath9k_hw_set_txpowerlimit(struct ath_hw *ah, u32 limit); | 593 | void ath9k_hw_set_txpowerlimit(struct ath_hw *ah, u32 limit); |
594 | void ath9k_hw_setmac(struct ath_hw *ah, const u8 *mac); | 594 | void ath9k_hw_setmac(struct ath_hw *ah, const u8 *mac); |
595 | void ath9k_hw_setopmode(struct ath_hw *ah); | 595 | void ath9k_hw_setopmode(struct ath_hw *ah); |
596 | void ath9k_hw_setmcastfilter(struct ath_hw *ah, u32 filter0, u32 filter1); | 596 | void ath9k_hw_setmcastfilter(struct ath_hw *ah, u32 filter0, u32 filter1); |
diff --git a/drivers/net/wireless/ath/ath9k/phy.c b/drivers/net/wireless/ath/ath9k/phy.c index 5ec9ce91d979..aaa941561c36 100644 --- a/drivers/net/wireless/ath/ath9k/phy.c +++ b/drivers/net/wireless/ath/ath9k/phy.c | |||
@@ -96,9 +96,8 @@ ath9k_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan) | |||
96 | return true; | 96 | return true; |
97 | } | 97 | } |
98 | 98 | ||
99 | bool | 99 | void ath9k_hw_ar9280_set_channel(struct ath_hw *ah, |
100 | ath9k_hw_ar9280_set_channel(struct ath_hw *ah, | 100 | struct ath9k_channel *chan) |
101 | struct ath9k_channel *chan) | ||
102 | { | 101 | { |
103 | u16 bMode, fracMode, aModeRefSel = 0; | 102 | u16 bMode, fracMode, aModeRefSel = 0; |
104 | u32 freq, ndiv, channelSel = 0, channelFrac = 0, reg32 = 0; | 103 | u32 freq, ndiv, channelSel = 0, channelFrac = 0, reg32 = 0; |
@@ -169,8 +168,6 @@ ath9k_hw_ar9280_set_channel(struct ath_hw *ah, | |||
169 | 168 | ||
170 | ah->curchan = chan; | 169 | ah->curchan = chan; |
171 | ah->curchan_rad_index = -1; | 170 | ah->curchan_rad_index = -1; |
172 | |||
173 | return true; | ||
174 | } | 171 | } |
175 | 172 | ||
176 | static void | 173 | static void |
diff --git a/drivers/net/wireless/ath/ath9k/phy.h b/drivers/net/wireless/ath/ath9k/phy.h index 296d0e985f25..c70f530642f6 100644 --- a/drivers/net/wireless/ath/ath9k/phy.h +++ b/drivers/net/wireless/ath/ath9k/phy.h | |||
@@ -17,7 +17,7 @@ | |||
17 | #ifndef PHY_H | 17 | #ifndef PHY_H |
18 | #define PHY_H | 18 | #define PHY_H |
19 | 19 | ||
20 | bool ath9k_hw_ar9280_set_channel(struct ath_hw *ah, | 20 | void ath9k_hw_ar9280_set_channel(struct ath_hw *ah, |
21 | struct ath9k_channel | 21 | struct ath9k_channel |
22 | *chan); | 22 | *chan); |
23 | bool ath9k_hw_set_channel(struct ath_hw *ah, | 23 | bool ath9k_hw_set_channel(struct ath_hw *ah, |