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authorGregory CLEMENT <gregory.clement@free-electrons.com>2013-04-12 10:29:08 -0400
committerJason Cooper <jason@lakedaemon.net>2013-04-15 11:00:21 -0400
commit82a682676ce34e59369f60168a8729348aaae4d0 (patch)
tree4981ab52ed82202ccf6b2bce1e2d80dabaf2cc95
parentb18ea4dc7746f1270bbe3a0817f9a034eec031a8 (diff)
ARM: dts: mvebu: Convert all the mvebu files to use the range property
This conversion will allow to keep 32 bits addresses for the internal registers whereas the memory of the system will be 64 bits. Later it will also ease the move of the mvebu-mbus driver to the device tree support. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat
-rw-r--r--arch/arm/boot/dts/armada-370-db.dts16
-rw-r--r--arch/arm/boot/dts/armada-370-mirabox.dts16
-rw-r--r--arch/arm/boot/dts/armada-370-rd.dts14
-rw-r--r--arch/arm/boot/dts/armada-370-xp.dtsi99
-rw-r--r--arch/arm/boot/dts/armada-370.dtsi65
-rw-r--r--arch/arm/boot/dts/armada-xp-db.dts28
-rw-r--r--arch/arm/boot/dts/armada-xp-gp.dts22
-rw-r--r--arch/arm/boot/dts/armada-xp-mv78230.dtsi30
-rw-r--r--arch/arm/boot/dts/armada-xp-mv78260.dtsi44
-rw-r--r--arch/arm/boot/dts/armada-xp-mv78460.dtsi58
-rw-r--r--arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts24
-rw-r--r--arch/arm/boot/dts/armada-xp.dtsi71
12 files changed, 245 insertions, 242 deletions
diff --git a/arch/arm/boot/dts/armada-370-db.dts b/arch/arm/boot/dts/armada-370-db.dts
index 6403acdbb75f..e766f8bfc86f 100644
--- a/arch/arm/boot/dts/armada-370-db.dts
+++ b/arch/arm/boot/dts/armada-370-db.dts
@@ -30,11 +30,11 @@
30 }; 30 };
31 31
32 soc { 32 soc {
33 serial@d0012000 { 33 serial@12000 {
34 clock-frequency = <200000000>; 34 clock-frequency = <200000000>;
35 status = "okay"; 35 status = "okay";
36 }; 36 };
37 sata@d00a0000 { 37 sata@a0000 {
38 nr-ports = <2>; 38 nr-ports = <2>;
39 status = "okay"; 39 status = "okay";
40 }; 40 };
@@ -49,18 +49,18 @@
49 }; 49 };
50 }; 50 };
51 51
52 ethernet@d0070000 { 52 ethernet@70000 {
53 status = "okay"; 53 status = "okay";
54 phy = <&phy0>; 54 phy = <&phy0>;
55 phy-mode = "rgmii-id"; 55 phy-mode = "rgmii-id";
56 }; 56 };
57 ethernet@d0074000 { 57 ethernet@74000 {
58 status = "okay"; 58 status = "okay";
59 phy = <&phy1>; 59 phy = <&phy1>;
60 phy-mode = "rgmii-id"; 60 phy-mode = "rgmii-id";
61 }; 61 };
62 62
63 mvsdio@d00d4000 { 63 mvsdio@d4000 {
64 pinctrl-0 = <&sdio_pins1>; 64 pinctrl-0 = <&sdio_pins1>;
65 pinctrl-names = "default"; 65 pinctrl-names = "default";
66 /* 66 /*
@@ -75,15 +75,15 @@
75 /* No CD or WP GPIOs */ 75 /* No CD or WP GPIOs */
76 }; 76 };
77 77
78 usb@d0050000 { 78 usb@50000 {
79 status = "okay"; 79 status = "okay";
80 }; 80 };
81 81
82 usb@d0051000 { 82 usb@51000 {
83 status = "okay"; 83 status = "okay";
84 }; 84 };
85 85
86 spi0: spi@d0010600 { 86 spi0: spi@10600 {
87 status = "okay"; 87 status = "okay";
88 88
89 spi-flash@0 { 89 spi-flash@0 {
diff --git a/arch/arm/boot/dts/armada-370-mirabox.dts b/arch/arm/boot/dts/armada-370-mirabox.dts
index 58ee79372206..6530ae3ed661 100644
--- a/arch/arm/boot/dts/armada-370-mirabox.dts
+++ b/arch/arm/boot/dts/armada-370-mirabox.dts
@@ -25,11 +25,11 @@
25 }; 25 };
26 26
27 soc { 27 soc {
28 serial@d0012000 { 28 serial@12000 {
29 clock-frequency = <200000000>; 29 clock-frequency = <200000000>;
30 status = "okay"; 30 status = "okay";
31 }; 31 };
32 timer@d0020300 { 32 timer@20300 {
33 clock-frequency = <600000000>; 33 clock-frequency = <600000000>;
34 status = "okay"; 34 status = "okay";
35 }; 35 };
@@ -79,18 +79,18 @@
79 reg = <1>; 79 reg = <1>;
80 }; 80 };
81 }; 81 };
82 ethernet@d0070000 { 82 ethernet@70000 {
83 status = "okay"; 83 status = "okay";
84 phy = <&phy0>; 84 phy = <&phy0>;
85 phy-mode = "rgmii-id"; 85 phy-mode = "rgmii-id";
86 }; 86 };
87 ethernet@d0074000 { 87 ethernet@74000 {
88 status = "okay"; 88 status = "okay";
89 phy = <&phy1>; 89 phy = <&phy1>;
90 phy-mode = "rgmii-id"; 90 phy-mode = "rgmii-id";
91 }; 91 };
92 92
93 mvsdio@d00d4000 { 93 mvsdio@d4000 {
94 pinctrl-0 = <&sdio_pins3>; 94 pinctrl-0 = <&sdio_pins3>;
95 pinctrl-names = "default"; 95 pinctrl-names = "default";
96 status = "okay"; 96 status = "okay";
@@ -100,15 +100,15 @@
100 */ 100 */
101 }; 101 };
102 102
103 usb@d0050000 { 103 usb@50000 {
104 status = "okay"; 104 status = "okay";
105 }; 105 };
106 106
107 usb@d0051000 { 107 usb@51000 {
108 status = "okay"; 108 status = "okay";
109 }; 109 };
110 110
111 i2c@d0011000 { 111 i2c@11000 {
112 status = "okay"; 112 status = "okay";
113 clock-frequency = <100000>; 113 clock-frequency = <100000>;
114 pca9505: pca9505@25 { 114 pca9505: pca9505@25 {
diff --git a/arch/arm/boot/dts/armada-370-rd.dts b/arch/arm/boot/dts/armada-370-rd.dts
index 516dec31b469..83d5c0419750 100644
--- a/arch/arm/boot/dts/armada-370-rd.dts
+++ b/arch/arm/boot/dts/armada-370-rd.dts
@@ -28,11 +28,11 @@
28 }; 28 };
29 29
30 soc { 30 soc {
31 serial@d0012000 { 31 serial@12000 {
32 clock-frequency = <200000000>; 32 clock-frequency = <200000000>;
33 status = "okay"; 33 status = "okay";
34 }; 34 };
35 sata@d00a0000 { 35 sata@a0000 {
36 nr-ports = <2>; 36 nr-ports = <2>;
37 status = "okay"; 37 status = "okay";
38 }; 38 };
@@ -47,29 +47,29 @@
47 }; 47 };
48 }; 48 };
49 49
50 ethernet@d0070000 { 50 ethernet@70000 {
51 status = "okay"; 51 status = "okay";
52 phy = <&phy0>; 52 phy = <&phy0>;
53 phy-mode = "sgmii"; 53 phy-mode = "sgmii";
54 }; 54 };
55 ethernet@d0074000 { 55 ethernet@74000 {
56 status = "okay"; 56 status = "okay";
57 phy = <&phy1>; 57 phy = <&phy1>;
58 phy-mode = "rgmii-id"; 58 phy-mode = "rgmii-id";
59 }; 59 };
60 60
61 mvsdio@d00d4000 { 61 mvsdio@d4000 {
62 pinctrl-0 = <&sdio_pins1>; 62 pinctrl-0 = <&sdio_pins1>;
63 pinctrl-names = "default"; 63 pinctrl-names = "default";
64 status = "okay"; 64 status = "okay";
65 /* No CD or WP GPIOs */ 65 /* No CD or WP GPIOs */
66 }; 66 };
67 67
68 usb@d0050000 { 68 usb@50000 {
69 status = "okay"; 69 status = "okay";
70 }; 70 };
71 71
72 usb@d0051000 { 72 usb@51000 {
73 status = "okay"; 73 status = "okay";
74 }; 74 };
75 }; 75 };
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi
index 972448c4880c..da40ce5711b3 100644
--- a/arch/arm/boot/dts/armada-370-xp.dtsi
+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
@@ -28,54 +28,55 @@
28 }; 28 };
29 }; 29 };
30 30
31
31 soc { 32 soc {
32 #address-cells = <1>; 33 #address-cells = <1>;
33 #size-cells = <1>; 34 #size-cells = <1>;
34 compatible = "simple-bus"; 35 compatible = "simple-bus";
35 interrupt-parent = <&mpic>; 36 interrupt-parent = <&mpic>;
36 ranges; 37 ranges = <0 0xd0000000 0x100000>;
37 38
38 mpic: interrupt-controller@d0020000 { 39 mpic: interrupt-controller@20000 {
39 compatible = "marvell,mpic"; 40 compatible = "marvell,mpic";
40 #interrupt-cells = <1>; 41 #interrupt-cells = <1>;
41 #size-cells = <1>; 42 #size-cells = <1>;
42 interrupt-controller; 43 interrupt-controller;
43 }; 44 };
44 45
45 coherency-fabric@d0020200 { 46 coherency-fabric@20200 {
46 compatible = "marvell,coherency-fabric"; 47 compatible = "marvell,coherency-fabric";
47 reg = <0xd0020200 0xb0>, 48 reg = <0x20200 0xb0>,
48 <0xd0021810 0x1c>; 49 <0x21810 0x1c>;
49 }; 50 };
50 51
51 serial@d0012000 { 52 serial@12000 {
52 compatible = "snps,dw-apb-uart"; 53 compatible = "snps,dw-apb-uart";
53 reg = <0xd0012000 0x100>; 54 reg = <0x12000 0x100>;
54 reg-shift = <2>; 55 reg-shift = <2>;
55 interrupts = <41>; 56 interrupts = <41>;
56 reg-io-width = <1>; 57 reg-io-width = <1>;
57 status = "disabled"; 58 status = "disabled";
58 }; 59 };
59 serial@d0012100 { 60 serial@12100 {
60 compatible = "snps,dw-apb-uart"; 61 compatible = "snps,dw-apb-uart";
61 reg = <0xd0012100 0x100>; 62 reg = <0x12100 0x100>;
62 reg-shift = <2>; 63 reg-shift = <2>;
63 interrupts = <42>; 64 interrupts = <42>;
64 reg-io-width = <1>; 65 reg-io-width = <1>;
65 status = "disabled"; 66 status = "disabled";
66 }; 67 };
67 68
68 timer@d0020300 { 69 timer@20300 {
69 compatible = "marvell,armada-370-xp-timer"; 70 compatible = "marvell,armada-370-xp-timer";
70 reg = <0xd0020300 0x30>, 71 reg = <0x20300 0x30>,
71 <0xd0021040 0x30>; 72 <0x21040 0x30>;
72 interrupts = <37>, <38>, <39>, <40>, <5>, <6>; 73 interrupts = <37>, <38>, <39>, <40>, <5>, <6>;
73 clocks = <&coreclk 2>; 74 clocks = <&coreclk 2>;
74 }; 75 };
75 76
76 sata@d00a0000 { 77 sata@a0000 {
77 compatible = "marvell,orion-sata"; 78 compatible = "marvell,orion-sata";
78 reg = <0xd00a0000 0x2400>; 79 reg = <0xa0000 0x2400>;
79 interrupts = <55>; 80 interrupts = <55>;
80 clocks = <&gateclk 15>, <&gateclk 30>; 81 clocks = <&gateclk 15>, <&gateclk 30>;
81 clock-names = "0", "1"; 82 clock-names = "0", "1";
@@ -86,28 +87,28 @@
86 #address-cells = <1>; 87 #address-cells = <1>;
87 #size-cells = <0>; 88 #size-cells = <0>;
88 compatible = "marvell,orion-mdio"; 89 compatible = "marvell,orion-mdio";
89 reg = <0xd0072004 0x4>; 90 reg = <0x72004 0x4>;
90 }; 91 };
91 92
92 ethernet@d0070000 { 93 ethernet@70000 {
93 compatible = "marvell,armada-370-neta"; 94 compatible = "marvell,armada-370-neta";
94 reg = <0xd0070000 0x2500>; 95 reg = <0x70000 0x2500>;
95 interrupts = <8>; 96 interrupts = <8>;
96 clocks = <&gateclk 4>; 97 clocks = <&gateclk 4>;
97 status = "disabled"; 98 status = "disabled";
98 }; 99 };
99 100
100 ethernet@d0074000 { 101 ethernet@74000 {
101 compatible = "marvell,armada-370-neta"; 102 compatible = "marvell,armada-370-neta";
102 reg = <0xd0074000 0x2500>; 103 reg = <0x74000 0x2500>;
103 interrupts = <10>; 104 interrupts = <10>;
104 clocks = <&gateclk 3>; 105 clocks = <&gateclk 3>;
105 status = "disabled"; 106 status = "disabled";
106 }; 107 };
107 108
108 i2c0: i2c@d0011000 { 109 i2c0: i2c@11000 {
109 compatible = "marvell,mv64xxx-i2c"; 110 compatible = "marvell,mv64xxx-i2c";
110 reg = <0xd0011000 0x20>; 111 reg = <0x11000 0x20>;
111 #address-cells = <1>; 112 #address-cells = <1>;
112 #size-cells = <0>; 113 #size-cells = <0>;
113 interrupts = <31>; 114 interrupts = <31>;
@@ -116,9 +117,9 @@
116 status = "disabled"; 117 status = "disabled";
117 }; 118 };
118 119
119 i2c1: i2c@d0011100 { 120 i2c1: i2c@11100 {
120 compatible = "marvell,mv64xxx-i2c"; 121 compatible = "marvell,mv64xxx-i2c";
121 reg = <0xd0011100 0x20>; 122 reg = <0x11100 0x20>;
122 #address-cells = <1>; 123 #address-cells = <1>;
123 #size-cells = <0>; 124 #size-cells = <0>;
124 interrupts = <32>; 125 interrupts = <32>;
@@ -129,35 +130,35 @@
129 130
130 rtc@10300 { 131 rtc@10300 {
131 compatible = "marvell,orion-rtc"; 132 compatible = "marvell,orion-rtc";
132 reg = <0xd0010300 0x20>; 133 reg = <0x10300 0x20>;
133 interrupts = <50>; 134 interrupts = <50>;
134 }; 135 };
135 136
136 mvsdio@d00d4000 { 137 mvsdio@d4000 {
137 compatible = "marvell,orion-sdio"; 138 compatible = "marvell,orion-sdio";
138 reg = <0xd00d4000 0x200>; 139 reg = <0xd4000 0x200>;
139 interrupts = <54>; 140 interrupts = <54>;
140 clocks = <&gateclk 17>; 141 clocks = <&gateclk 17>;
141 status = "disabled"; 142 status = "disabled";
142 }; 143 };
143 144
144 usb@d0050000 { 145 usb@50000 {
145 compatible = "marvell,orion-ehci"; 146 compatible = "marvell,orion-ehci";
146 reg = <0xd0050000 0x500>; 147 reg = <0x50000 0x500>;
147 interrupts = <45>; 148 interrupts = <45>;
148 status = "disabled"; 149 status = "disabled";
149 }; 150 };
150 151
151 usb@d0051000 { 152 usb@51000 {
152 compatible = "marvell,orion-ehci"; 153 compatible = "marvell,orion-ehci";
153 reg = <0xd0051000 0x500>; 154 reg = <0x51000 0x500>;
154 interrupts = <46>; 155 interrupts = <46>;
155 status = "disabled"; 156 status = "disabled";
156 }; 157 };
157 158
158 spi0: spi@d0010600 { 159 spi0: spi@10600 {
159 compatible = "marvell,orion-spi"; 160 compatible = "marvell,orion-spi";
160 reg = <0xd0010600 0x28>; 161 reg = <0x10600 0x28>;
161 #address-cells = <1>; 162 #address-cells = <1>;
162 #size-cells = <0>; 163 #size-cells = <0>;
163 cell-index = <0>; 164 cell-index = <0>;
@@ -166,9 +167,9 @@
166 status = "disabled"; 167 status = "disabled";
167 }; 168 };
168 169
169 spi1: spi@d0010680 { 170 spi1: spi@10680 {
170 compatible = "marvell,orion-spi"; 171 compatible = "marvell,orion-spi";
171 reg = <0xd0010680 0x28>; 172 reg = <0x10680 0x28>;
172 #address-cells = <1>; 173 #address-cells = <1>;
173 #size-cells = <0>; 174 #size-cells = <0>;
174 cell-index = <1>; 175 cell-index = <1>;
@@ -177,45 +178,45 @@
177 status = "disabled"; 178 status = "disabled";
178 }; 179 };
179 180
180 devbus-bootcs@d0010400 { 181 devbus-bootcs@10400 {
181 compatible = "marvell,mvebu-devbus"; 182 compatible = "marvell,mvebu-devbus";
182 reg = <0xd0010400 0x8>; 183 reg = <0x10400 0x8>;
183 #address-cells = <1>; 184 #address-cells = <1>;
184 #size-cells = <1>; 185 #size-cells = <1>;
185 clocks = <&coreclk 0>; 186 clocks = <&coreclk 0>;
186 status = "disabled"; 187 status = "disabled";
187 }; 188 };
188 189
189 devbus-cs0@d0010408 { 190 devbus-cs0@10408 {
190 compatible = "marvell,mvebu-devbus"; 191 compatible = "marvell,mvebu-devbus";
191 reg = <0xd0010408 0x8>; 192 reg = <0x10408 0x8>;
192 #address-cells = <1>; 193 #address-cells = <1>;
193 #size-cells = <1>; 194 #size-cells = <1>;
194 clocks = <&coreclk 0>; 195 clocks = <&coreclk 0>;
195 status = "disabled"; 196 status = "disabled";
196 }; 197 };
197 198
198 devbus-cs1@d0010410 { 199 devbus-cs1@10410 {
199 compatible = "marvell,mvebu-devbus"; 200 compatible = "marvell,mvebu-devbus";
200 reg = <0xd0010410 0x8>; 201 reg = <0x10410 0x8>;
201 #address-cells = <1>; 202 #address-cells = <1>;
202 #size-cells = <1>; 203 #size-cells = <1>;
203 clocks = <&coreclk 0>; 204 clocks = <&coreclk 0>;
204 status = "disabled"; 205 status = "disabled";
205 }; 206 };
206 207
207 devbus-cs2@d0010418 { 208 devbus-cs2@10418 {
208 compatible = "marvell,mvebu-devbus"; 209 compatible = "marvell,mvebu-devbus";
209 reg = <0xd0010418 0x8>; 210 reg = <0x10418 0x8>;
210 #address-cells = <1>; 211 #address-cells = <1>;
211 #size-cells = <1>; 212 #size-cells = <1>;
212 clocks = <&coreclk 0>; 213 clocks = <&coreclk 0>;
213 status = "disabled"; 214 status = "disabled";
214 }; 215 };
215 216
216 devbus-cs3@d0010420 { 217 devbus-cs3@10420 {
217 compatible = "marvell,mvebu-devbus"; 218 compatible = "marvell,mvebu-devbus";
218 reg = <0xd0010420 0x8>; 219 reg = <0x10420 0x8>;
219 #address-cells = <1>; 220 #address-cells = <1>;
220 #size-cells = <1>; 221 #size-cells = <1>;
221 clocks = <&coreclk 0>; 222 clocks = <&coreclk 0>;
diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
index 209caeb748fa..5c4fa655fc34 100644
--- a/arch/arm/boot/dts/armada-370.dtsi
+++ b/arch/arm/boot/dts/armada-370.dtsi
@@ -28,14 +28,15 @@
28 }; 28 };
29 29
30 soc { 30 soc {
31 mpic: interrupt-controller@d0020000 { 31
32 reg = <0xd0020a00 0x1d0>, 32 mpic: interrupt-controller@20000 {
33 <0xd0021870 0x58>; 33 reg = <0x20a00 0x1d0>,
34 <0x21870 0x58>;
34 }; 35 };
35 36
36 system-controller@d0018200 { 37 system-controller@18200 {
37 compatible = "marvell,armada-370-xp-system-controller"; 38 compatible = "marvell,armada-370-xp-system-controller";
38 reg = <0xd0018200 0x100>; 39 reg = <0x18200 0x100>;
39 }; 40 };
40 41
41 L2: l2-cache { 42 L2: l2-cache {
@@ -47,7 +48,7 @@
47 48
48 pinctrl { 49 pinctrl {
49 compatible = "marvell,mv88f6710-pinctrl"; 50 compatible = "marvell,mv88f6710-pinctrl";
50 reg = <0xd0018000 0x38>; 51 reg = <0x18000 0x38>;
51 52
52 sdio_pins1: sdio-pins1 { 53 sdio_pins1: sdio-pins1 {
53 marvell,pins = "mpp9", "mpp11", "mpp12", 54 marvell,pins = "mpp9", "mpp11", "mpp12",
@@ -68,9 +69,9 @@
68 }; 69 };
69 }; 70 };
70 71
71 gpio0: gpio@d0018100 { 72 gpio0: gpio@18100 {
72 compatible = "marvell,orion-gpio"; 73 compatible = "marvell,orion-gpio";
73 reg = <0xd0018100 0x40>; 74 reg = <0x18100 0x40>;
74 ngpios = <32>; 75 ngpios = <32>;
75 gpio-controller; 76 gpio-controller;
76 #gpio-cells = <2>; 77 #gpio-cells = <2>;
@@ -79,9 +80,9 @@
79 interrupts = <82>, <83>, <84>, <85>; 80 interrupts = <82>, <83>, <84>, <85>;
80 }; 81 };
81 82
82 gpio1: gpio@d0018140 { 83 gpio1: gpio@18140 {
83 compatible = "marvell,orion-gpio"; 84 compatible = "marvell,orion-gpio";
84 reg = <0xd0018140 0x40>; 85 reg = <0x18140 0x40>;
85 ngpios = <32>; 86 ngpios = <32>;
86 gpio-controller; 87 gpio-controller;
87 #gpio-cells = <2>; 88 #gpio-cells = <2>;
@@ -90,9 +91,9 @@
90 interrupts = <87>, <88>, <89>, <90>; 91 interrupts = <87>, <88>, <89>, <90>;
91 }; 92 };
92 93
93 gpio2: gpio@d0018180 { 94 gpio2: gpio@18180 {
94 compatible = "marvell,orion-gpio"; 95 compatible = "marvell,orion-gpio";
95 reg = <0xd0018180 0x40>; 96 reg = <0x18180 0x40>;
96 ngpios = <2>; 97 ngpios = <2>;
97 gpio-controller; 98 gpio-controller;
98 #gpio-cells = <2>; 99 #gpio-cells = <2>;
@@ -101,23 +102,23 @@
101 interrupts = <91>; 102 interrupts = <91>;
102 }; 103 };
103 104
104 coreclk: mvebu-sar@d0018230 { 105 coreclk: mvebu-sar@18230 {
105 compatible = "marvell,armada-370-core-clock"; 106 compatible = "marvell,armada-370-core-clock";
106 reg = <0xd0018230 0x08>; 107 reg = <0x18230 0x08>;
107 #clock-cells = <1>; 108 #clock-cells = <1>;
108 }; 109 };
109 110
110 gateclk: clock-gating-control@d0018220 { 111 gateclk: clock-gating-control@18220 {
111 compatible = "marvell,armada-370-gating-clock"; 112 compatible = "marvell,armada-370-gating-clock";
112 reg = <0xd0018220 0x4>; 113 reg = <0x18220 0x4>;
113 clocks = <&coreclk 0>; 114 clocks = <&coreclk 0>;
114 #clock-cells = <1>; 115 #clock-cells = <1>;
115 }; 116 };
116 117
117 xor@d0060800 { 118 xor@60800 {
118 compatible = "marvell,orion-xor"; 119 compatible = "marvell,orion-xor";
119 reg = <0xd0060800 0x100 120 reg = <0x60800 0x100
120 0xd0060A00 0x100>; 121 0x60A00 0x100>;
121 status = "okay"; 122 status = "okay";
122 123
123 xor00 { 124 xor00 {
@@ -133,10 +134,10 @@
133 }; 134 };
134 }; 135 };
135 136
136 xor@d0060900 { 137 xor@60900 {
137 compatible = "marvell,orion-xor"; 138 compatible = "marvell,orion-xor";
138 reg = <0xd0060900 0x100 139 reg = <0x60900 0x100
139 0xd0060b00 0x100>; 140 0x60b00 0x100>;
140 status = "okay"; 141 status = "okay";
141 142
142 xor10 { 143 xor10 {
@@ -152,18 +153,18 @@
152 }; 153 };
153 }; 154 };
154 155
155 usb@d0050000 { 156 usb@50000 {
156 clocks = <&coreclk 0>; 157 clocks = <&coreclk 0>;
157 }; 158 };
158 159
159 usb@d0051000 { 160 usb@51000 {
160 clocks = <&coreclk 0>; 161 clocks = <&coreclk 0>;
161 }; 162 };
162 163
163 thermal@d0018300 { 164 thermal@18300 {
164 compatible = "marvell,armada370-thermal"; 165 compatible = "marvell,armada370-thermal";
165 reg = <0xd0018300 0x4 166 reg = <0x18300 0x4
166 0xd0018304 0x4>; 167 0x18304 0x4>;
167 status = "okay"; 168 status = "okay";
168 }; 169 };
169 170
@@ -177,18 +178,18 @@
177 178
178 bus-range = <0x00 0xff>; 179 bus-range = <0x00 0xff>;
179 180
180 reg = <0xd0040000 0x2000>, <0xd0080000 0x2000>; 181 reg = <0x40000 0x2000>, <0x80000 0x2000>;
181 182
182 reg-names = "pcie0.0", "pcie1.0"; 183 reg-names = "pcie0.0", "pcie1.0";
183 184
184 ranges = <0x82000000 0 0xd0040000 0xd0040000 0 0x00002000 /* Port 0.0 registers */ 185 ranges = <0x82000000 0 0x40000 0x40000 0 0x00002000 /* Port 0.0 registers */
185 0x82000000 0 0xd0080000 0xd0080000 0 0x00002000 /* Port 1.0 registers */ 186 0x82000000 0 0x80000 0x80000 0 0x00002000 /* Port 1.0 registers */
186 0x82000000 0 0xe0000000 0xe0000000 0 0x08000000 /* non-prefetchable memory */ 187 0x82000000 0 0xe0000000 0xe0000000 0 0x08000000 /* non-prefetchable memory */
187 0x81000000 0 0 0xe8000000 0 0x00100000>; /* downstream I/O */ 188 0x81000000 0 0 0xe8000000 0 0x00100000>; /* downstream I/O */
188 189
189 pcie@1,0 { 190 pcie@1,0 {
190 device_type = "pci"; 191 device_type = "pci";
191 assigned-addresses = <0x82000800 0 0xd0040000 0 0x2000>; 192 assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
192 reg = <0x0800 0 0 0 0>; 193 reg = <0x0800 0 0 0 0>;
193 #address-cells = <3>; 194 #address-cells = <3>;
194 #size-cells = <2>; 195 #size-cells = <2>;
@@ -204,7 +205,7 @@
204 205
205 pcie@2,0 { 206 pcie@2,0 {
206 device_type = "pci"; 207 device_type = "pci";
207 assigned-addresses = <0x82002800 0 0xd0080000 0 0x2000>; 208 assigned-addresses = <0x82002800 0 0x80000 0 0x2000>;
208 reg = <0x1000 0 0 0 0>; 209 reg = <0x1000 0 0 0 0>;
209 #address-cells = <3>; 210 #address-cells = <3>;
210 #size-cells = <2>; 211 #size-cells = <2>;
diff --git a/arch/arm/boot/dts/armada-xp-db.dts b/arch/arm/boot/dts/armada-xp-db.dts
index 54cc5bb705fb..e37863f826b9 100644
--- a/arch/arm/boot/dts/armada-xp-db.dts
+++ b/arch/arm/boot/dts/armada-xp-db.dts
@@ -30,24 +30,24 @@
30 }; 30 };
31 31
32 soc { 32 soc {
33 serial@d0012000 { 33 serial@12000 {
34 clock-frequency = <250000000>; 34 clock-frequency = <250000000>;
35 status = "okay"; 35 status = "okay";
36 }; 36 };
37 serial@d0012100 { 37 serial@12100 {
38 clock-frequency = <250000000>; 38 clock-frequency = <250000000>;
39 status = "okay"; 39 status = "okay";
40 }; 40 };
41 serial@d0012200 { 41 serial@12200 {
42 clock-frequency = <250000000>; 42 clock-frequency = <250000000>;
43 status = "okay"; 43 status = "okay";
44 }; 44 };
45 serial@d0012300 { 45 serial@12300 {
46 clock-frequency = <250000000>; 46 clock-frequency = <250000000>;
47 status = "okay"; 47 status = "okay";
48 }; 48 };
49 49
50 sata@d00a0000 { 50 sata@a0000 {
51 nr-ports = <2>; 51 nr-ports = <2>;
52 status = "okay"; 52 status = "okay";
53 }; 53 };
@@ -70,47 +70,47 @@
70 }; 70 };
71 }; 71 };
72 72
73 ethernet@d0070000 { 73 ethernet@70000 {
74 status = "okay"; 74 status = "okay";
75 phy = <&phy0>; 75 phy = <&phy0>;
76 phy-mode = "rgmii-id"; 76 phy-mode = "rgmii-id";
77 }; 77 };
78 ethernet@d0074000 { 78 ethernet@74000 {
79 status = "okay"; 79 status = "okay";
80 phy = <&phy1>; 80 phy = <&phy1>;
81 phy-mode = "rgmii-id"; 81 phy-mode = "rgmii-id";
82 }; 82 };
83 ethernet@d0030000 { 83 ethernet@30000 {
84 status = "okay"; 84 status = "okay";
85 phy = <&phy2>; 85 phy = <&phy2>;
86 phy-mode = "sgmii"; 86 phy-mode = "sgmii";
87 }; 87 };
88 ethernet@d0034000 { 88 ethernet@34000 {
89 status = "okay"; 89 status = "okay";
90 phy = <&phy3>; 90 phy = <&phy3>;
91 phy-mode = "sgmii"; 91 phy-mode = "sgmii";
92 }; 92 };
93 93
94 mvsdio@d00d4000 { 94 mvsdio@d4000 {
95 pinctrl-0 = <&sdio_pins>; 95 pinctrl-0 = <&sdio_pins>;
96 pinctrl-names = "default"; 96 pinctrl-names = "default";
97 status = "okay"; 97 status = "okay";
98 /* No CD or WP GPIOs */ 98 /* No CD or WP GPIOs */
99 }; 99 };
100 100
101 usb@d0050000 { 101 usb@50000 {
102 status = "okay"; 102 status = "okay";
103 }; 103 };
104 104
105 usb@d0051000 { 105 usb@51000 {
106 status = "okay"; 106 status = "okay";
107 }; 107 };
108 108
109 usb@d0052000 { 109 usb@52000 {
110 status = "okay"; 110 status = "okay";
111 }; 111 };
112 112
113 spi0: spi@d0010600 { 113 spi0: spi@10600 {
114 status = "okay"; 114 status = "okay";
115 115
116 spi-flash@0 { 116 spi-flash@0 {
diff --git a/arch/arm/boot/dts/armada-xp-gp.dts b/arch/arm/boot/dts/armada-xp-gp.dts
index 04f28a712b98..55bcbff39469 100644
--- a/arch/arm/boot/dts/armada-xp-gp.dts
+++ b/arch/arm/boot/dts/armada-xp-gp.dts
@@ -37,24 +37,24 @@
37 }; 37 };
38 38
39 soc { 39 soc {
40 serial@d0012000 { 40 serial@12000 {
41 clock-frequency = <250000000>; 41 clock-frequency = <250000000>;
42 status = "okay"; 42 status = "okay";
43 }; 43 };
44 serial@d0012100 { 44 serial@12100 {
45 clock-frequency = <250000000>; 45 clock-frequency = <250000000>;
46 status = "okay"; 46 status = "okay";
47 }; 47 };
48 serial@d0012200 { 48 serial@12200 {
49 clock-frequency = <250000000>; 49 clock-frequency = <250000000>;
50 status = "okay"; 50 status = "okay";
51 }; 51 };
52 serial@d0012300 { 52 serial@12300 {
53 clock-frequency = <250000000>; 53 clock-frequency = <250000000>;
54 status = "okay"; 54 status = "okay";
55 }; 55 };
56 56
57 sata@d00a0000 { 57 sata@a0000 {
58 nr-ports = <2>; 58 nr-ports = <2>;
59 status = "okay"; 59 status = "okay";
60 }; 60 };
@@ -77,28 +77,28 @@
77 }; 77 };
78 }; 78 };
79 79
80 ethernet@d0070000 { 80 ethernet@70000 {
81 status = "okay"; 81 status = "okay";
82 phy = <&phy0>; 82 phy = <&phy0>;
83 phy-mode = "rgmii-id"; 83 phy-mode = "rgmii-id";
84 }; 84 };
85 ethernet@d0074000 { 85 ethernet@74000 {
86 status = "okay"; 86 status = "okay";
87 phy = <&phy1>; 87 phy = <&phy1>;
88 phy-mode = "rgmii-id"; 88 phy-mode = "rgmii-id";
89 }; 89 };
90 ethernet@d0030000 { 90 ethernet@30000 {
91 status = "okay"; 91 status = "okay";
92 phy = <&phy2>; 92 phy = <&phy2>;
93 phy-mode = "rgmii-id"; 93 phy-mode = "rgmii-id";
94 }; 94 };
95 ethernet@d0034000 { 95 ethernet@34000 {
96 status = "okay"; 96 status = "okay";
97 phy = <&phy3>; 97 phy = <&phy3>;
98 phy-mode = "rgmii-id"; 98 phy-mode = "rgmii-id";
99 }; 99 };
100 100
101 spi0: spi@d0010600 { 101 spi0: spi@10600 {
102 status = "okay"; 102 status = "okay";
103 103
104 spi-flash@0 { 104 spi-flash@0 {
@@ -110,7 +110,7 @@
110 }; 110 };
111 }; 111 };
112 112
113 devbus-bootcs@d0010400 { 113 devbus-bootcs@10400 {
114 status = "okay"; 114 status = "okay";
115 ranges = <0 0xf0000000 0x1000000>; /* @addr 0xf000000, size 0x1000000 */ 115 ranges = <0 0xf0000000 0x1000000>; /* @addr 0xf000000, size 0x1000000 */
116 116
diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
index e072a53dc9b0..12905abf4ca3 100644
--- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
@@ -46,7 +46,7 @@
46 soc { 46 soc {
47 pinctrl { 47 pinctrl {
48 compatible = "marvell,mv78230-pinctrl"; 48 compatible = "marvell,mv78230-pinctrl";
49 reg = <0xd0018000 0x38>; 49 reg = <0x18000 0x38>;
50 50
51 sdio_pins: sdio-pins { 51 sdio_pins: sdio-pins {
52 marvell,pins = "mpp30", "mpp31", "mpp32", 52 marvell,pins = "mpp30", "mpp31", "mpp32",
@@ -55,9 +55,9 @@
55 }; 55 };
56 }; 56 };
57 57
58 gpio0: gpio@d0018100 { 58 gpio0: gpio@18100 {
59 compatible = "marvell,orion-gpio"; 59 compatible = "marvell,orion-gpio";
60 reg = <0xd0018100 0x40>; 60 reg = <0x18100 0x40>;
61 ngpios = <32>; 61 ngpios = <32>;
62 gpio-controller; 62 gpio-controller;
63 #gpio-cells = <2>; 63 #gpio-cells = <2>;
@@ -66,9 +66,9 @@
66 interrupts = <82>, <83>, <84>, <85>; 66 interrupts = <82>, <83>, <84>, <85>;
67 }; 67 };
68 68
69 gpio1: gpio@d0018140 { 69 gpio1: gpio@18140 {
70 compatible = "marvell,orion-gpio"; 70 compatible = "marvell,orion-gpio";
71 reg = <0xd0018140 0x40>; 71 reg = <0x18140 0x40>;
72 ngpios = <17>; 72 ngpios = <17>;
73 gpio-controller; 73 gpio-controller;
74 #gpio-cells = <2>; 74 #gpio-cells = <2>;
@@ -92,17 +92,17 @@
92 92
93 bus-range = <0x00 0xff>; 93 bus-range = <0x00 0xff>;
94 94
95 ranges = <0x82000000 0 0xd0040000 0xd0040000 0 0x00002000 /* Port 0.0 registers */ 95 ranges = <0x82000000 0 0x40000 0x40000 0 0x00002000 /* Port 0.0 registers */
96 0x82000000 0 0xd0042000 0xd0042000 0 0x00002000 /* Port 2.0 registers */ 96 0x82000000 0 0x42000 0x42000 0 0x00002000 /* Port 2.0 registers */
97 0x82000000 0 0xd0044000 0xd0044000 0 0x00002000 /* Port 0.1 registers */ 97 0x82000000 0 0x44000 0x44000 0 0x00002000 /* Port 0.1 registers */
98 0x82000000 0 0xd0048000 0xd0048000 0 0x00002000 /* Port 0.2 registers */ 98 0x82000000 0 0x48000 0x48000 0 0x00002000 /* Port 0.2 registers */
99 0x82000000 0 0xd004c000 0xd004c000 0 0x00002000 /* Port 0.3 registers */ 99 0x82000000 0 0x4c000 0x4c000 0 0x00002000 /* Port 0.3 registers */
100 0x82000000 0 0xe0000000 0xe0000000 0 0x08000000 /* non-prefetchable memory */ 100 0x82000000 0 0xe0000000 0xe0000000 0 0x08000000 /* non-prefetchable memory */
101 0x81000000 0 0 0xe8000000 0 0x00100000>; /* downstream I/O */ 101 0x81000000 0 0 0xe8000000 0 0x00100000>; /* downstream I/O */
102 102
103 pcie@1,0 { 103 pcie@1,0 {
104 device_type = "pci"; 104 device_type = "pci";
105 assigned-addresses = <0x82000800 0 0xd0040000 0 0x2000>; 105 assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
106 reg = <0x0800 0 0 0 0>; 106 reg = <0x0800 0 0 0 0>;
107 #address-cells = <3>; 107 #address-cells = <3>;
108 #size-cells = <2>; 108 #size-cells = <2>;
@@ -118,7 +118,7 @@
118 118
119 pcie@2,0 { 119 pcie@2,0 {
120 device_type = "pci"; 120 device_type = "pci";
121 assigned-addresses = <0x82000800 0 0xd0044000 0 0x2000>; 121 assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
122 reg = <0x1000 0 0 0 0>; 122 reg = <0x1000 0 0 0 0>;
123 #address-cells = <3>; 123 #address-cells = <3>;
124 #size-cells = <2>; 124 #size-cells = <2>;
@@ -134,7 +134,7 @@
134 134
135 pcie@3,0 { 135 pcie@3,0 {
136 device_type = "pci"; 136 device_type = "pci";
137 assigned-addresses = <0x82000800 0 0xd0048000 0 0x2000>; 137 assigned-addresses = <0x82000800 0 0x48000 0 0x2000>;
138 reg = <0x1800 0 0 0 0>; 138 reg = <0x1800 0 0 0 0>;
139 #address-cells = <3>; 139 #address-cells = <3>;
140 #size-cells = <2>; 140 #size-cells = <2>;
@@ -150,7 +150,7 @@
150 150
151 pcie@4,0 { 151 pcie@4,0 {
152 device_type = "pci"; 152 device_type = "pci";
153 assigned-addresses = <0x82000800 0 0xd004c000 0 0x2000>; 153 assigned-addresses = <0x82000800 0 0x4c000 0 0x2000>;
154 reg = <0x2000 0 0 0 0>; 154 reg = <0x2000 0 0 0 0>;
155 #address-cells = <3>; 155 #address-cells = <3>;
156 #size-cells = <2>; 156 #size-cells = <2>;
@@ -166,7 +166,7 @@
166 166
167 pcie@9,0 { 167 pcie@9,0 {
168 device_type = "pci"; 168 device_type = "pci";
169 assigned-addresses = <0x82000800 0 0xd0042000 0 0x2000>; 169 assigned-addresses = <0x82000800 0 0x42000 0 0x2000>;
170 reg = <0x4800 0 0 0 0>; 170 reg = <0x4800 0 0 0 0>;
171 #address-cells = <3>; 171 #address-cells = <3>;
172 #size-cells = <2>; 172 #size-cells = <2>;
diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
index 6dae1bc59baf..1faacd13d514 100644
--- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
@@ -47,7 +47,7 @@
47 soc { 47 soc {
48 pinctrl { 48 pinctrl {
49 compatible = "marvell,mv78260-pinctrl"; 49 compatible = "marvell,mv78260-pinctrl";
50 reg = <0xd0018000 0x38>; 50 reg = <0x18000 0x38>;
51 51
52 sdio_pins: sdio-pins { 52 sdio_pins: sdio-pins {
53 marvell,pins = "mpp30", "mpp31", "mpp32", 53 marvell,pins = "mpp30", "mpp31", "mpp32",
@@ -56,9 +56,9 @@
56 }; 56 };
57 }; 57 };
58 58
59 gpio0: gpio@d0018100 { 59 gpio0: gpio@18100 {
60 compatible = "marvell,orion-gpio"; 60 compatible = "marvell,orion-gpio";
61 reg = <0xd0018100 0x40>; 61 reg = <0x18100 0x40>;
62 ngpios = <32>; 62 ngpios = <32>;
63 gpio-controller; 63 gpio-controller;
64 #gpio-cells = <2>; 64 #gpio-cells = <2>;
@@ -67,9 +67,9 @@
67 interrupts = <82>, <83>, <84>, <85>; 67 interrupts = <82>, <83>, <84>, <85>;
68 }; 68 };
69 69
70 gpio1: gpio@d0018140 { 70 gpio1: gpio@18140 {
71 compatible = "marvell,orion-gpio"; 71 compatible = "marvell,orion-gpio";
72 reg = <0xd0018140 0x40>; 72 reg = <0x18140 0x40>;
73 ngpios = <32>; 73 ngpios = <32>;
74 gpio-controller; 74 gpio-controller;
75 #gpio-cells = <2>; 75 #gpio-cells = <2>;
@@ -78,9 +78,9 @@
78 interrupts = <87>, <88>, <89>, <90>; 78 interrupts = <87>, <88>, <89>, <90>;
79 }; 79 };
80 80
81 gpio2: gpio@d0018180 { 81 gpio2: gpio@18180 {
82 compatible = "marvell,orion-gpio"; 82 compatible = "marvell,orion-gpio";
83 reg = <0xd0018180 0x40>; 83 reg = <0x18180 0x40>;
84 ngpios = <3>; 84 ngpios = <3>;
85 gpio-controller; 85 gpio-controller;
86 #gpio-cells = <2>; 86 #gpio-cells = <2>;
@@ -89,9 +89,9 @@
89 interrupts = <91>; 89 interrupts = <91>;
90 }; 90 };
91 91
92 ethernet@d0034000 { 92 ethernet@34000 {
93 compatible = "marvell,armada-370-neta"; 93 compatible = "marvell,armada-370-neta";
94 reg = <0xd0034000 0x2500>; 94 reg = <0x34000 0x2500>;
95 interrupts = <14>; 95 interrupts = <14>;
96 clocks = <&gateclk 1>; 96 clocks = <&gateclk 1>;
97 status = "disabled"; 97 status = "disabled";
@@ -112,19 +112,19 @@
112 112
113 bus-range = <0x00 0xff>; 113 bus-range = <0x00 0xff>;
114 114
115 ranges = <0x82000000 0 0xd0040000 0xd0040000 0 0x00002000 /* Port 0.0 registers */ 115 ranges = <0x82000000 0 0x40000 0x40000 0 0x00002000 /* Port 0.0 registers */
116 0x82000000 0 0xd0042000 0xd0042000 0 0x00002000 /* Port 2.0 registers */ 116 0x82000000 0 0x42000 0x42000 0 0x00002000 /* Port 2.0 registers */
117 0x82000000 0 0xd0044000 0xd0044000 0 0x00002000 /* Port 0.1 registers */ 117 0x82000000 0 0x44000 0x44000 0 0x00002000 /* Port 0.1 registers */
118 0x82000000 0 0xd0048000 0xd0048000 0 0x00002000 /* Port 0.2 registers */ 118 0x82000000 0 0x48000 0x48000 0 0x00002000 /* Port 0.2 registers */
119 0x82000000 0 0xd004c000 0xd004c000 0 0x00002000 /* Port 0.3 registers */ 119 0x82000000 0 0x4c000 0x4c000 0 0x00002000 /* Port 0.3 registers */
120 0x82000000 0 0xd0080000 0xd0080000 0 0x00002000 /* Port 1.0 registers */ 120 0x82000000 0 0x80000 0x80000 0 0x00002000 /* Port 1.0 registers */
121 0x82000000 0 0xd0082000 0xd0082000 0 0x00002000 /* Port 3.0 registers */ 121 0x82000000 0 0x82000 0x82000 0 0x00002000 /* Port 3.0 registers */
122 0x82000000 0 0xe0000000 0xe0000000 0 0x08000000 /* non-prefetchable memory */ 122 0x82000000 0 0xe0000000 0xe0000000 0 0x08000000 /* non-prefetchable memory */
123 0x81000000 0 0 0xe8000000 0 0x00100000>; /* downstream I/O */ 123 0x81000000 0 0 0xe8000000 0 0x00100000>; /* downstream I/O */
124 124
125 pcie@1,0 { 125 pcie@1,0 {
126 device_type = "pci"; 126 device_type = "pci";
127 assigned-addresses = <0x82000800 0 0xd0040000 0 0x2000>; 127 assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
128 reg = <0x0800 0 0 0 0>; 128 reg = <0x0800 0 0 0 0>;
129 #address-cells = <3>; 129 #address-cells = <3>;
130 #size-cells = <2>; 130 #size-cells = <2>;
@@ -140,7 +140,7 @@
140 140
141 pcie@2,0 { 141 pcie@2,0 {
142 device_type = "pci"; 142 device_type = "pci";
143 assigned-addresses = <0x82000800 0 0xd0044000 0 0x2000>; 143 assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
144 reg = <0x1000 0 0 0 0>; 144 reg = <0x1000 0 0 0 0>;
145 #address-cells = <3>; 145 #address-cells = <3>;
146 #size-cells = <2>; 146 #size-cells = <2>;
@@ -156,7 +156,7 @@
156 156
157 pcie@3,0 { 157 pcie@3,0 {
158 device_type = "pci"; 158 device_type = "pci";
159 assigned-addresses = <0x82000800 0 0xd0048000 0 0x2000>; 159 assigned-addresses = <0x82000800 0 0x48000 0 0x2000>;
160 reg = <0x1800 0 0 0 0>; 160 reg = <0x1800 0 0 0 0>;
161 #address-cells = <3>; 161 #address-cells = <3>;
162 #size-cells = <2>; 162 #size-cells = <2>;
@@ -172,7 +172,7 @@
172 172
173 pcie@4,0 { 173 pcie@4,0 {
174 device_type = "pci"; 174 device_type = "pci";
175 assigned-addresses = <0x82000800 0 0xd004c000 0 0x2000>; 175 assigned-addresses = <0x82000800 0 0x4c000 0 0x2000>;
176 reg = <0x2000 0 0 0 0>; 176 reg = <0x2000 0 0 0 0>;
177 #address-cells = <3>; 177 #address-cells = <3>;
178 #size-cells = <2>; 178 #size-cells = <2>;
@@ -188,7 +188,7 @@
188 188
189 pcie@9,0 { 189 pcie@9,0 {
190 device_type = "pci"; 190 device_type = "pci";
191 assigned-addresses = <0x82000800 0 0xd0042000 0 0x2000>; 191 assigned-addresses = <0x82000800 0 0x42000 0 0x2000>;
192 reg = <0x4800 0 0 0 0>; 192 reg = <0x4800 0 0 0 0>;
193 #address-cells = <3>; 193 #address-cells = <3>;
194 #size-cells = <2>; 194 #size-cells = <2>;
@@ -204,7 +204,7 @@
204 204
205 pcie@10,0 { 205 pcie@10,0 {
206 device_type = "pci"; 206 device_type = "pci";
207 assigned-addresses = <0x82000800 0 0xd0082000 0 0x2000>; 207 assigned-addresses = <0x82000800 0 0x82000 0 0x2000>;
208 reg = <0x5000 0 0 0 0>; 208 reg = <0x5000 0 0 0 0>;
209 #address-cells = <3>; 209 #address-cells = <3>;
210 #size-cells = <2>; 210 #size-cells = <2>;
diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
index b9da5b8ae288..ce4f80a82854 100644
--- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
@@ -62,7 +62,7 @@
62 soc { 62 soc {
63 pinctrl { 63 pinctrl {
64 compatible = "marvell,mv78460-pinctrl"; 64 compatible = "marvell,mv78460-pinctrl";
65 reg = <0xd0018000 0x38>; 65 reg = <0x18000 0x38>;
66 66
67 sdio_pins: sdio-pins { 67 sdio_pins: sdio-pins {
68 marvell,pins = "mpp30", "mpp31", "mpp32", 68 marvell,pins = "mpp30", "mpp31", "mpp32",
@@ -71,9 +71,9 @@
71 }; 71 };
72 }; 72 };
73 73
74 gpio0: gpio@d0018100 { 74 gpio0: gpio@18100 {
75 compatible = "marvell,orion-gpio"; 75 compatible = "marvell,orion-gpio";
76 reg = <0xd0018100 0x40>; 76 reg = <0x18100 0x40>;
77 ngpios = <32>; 77 ngpios = <32>;
78 gpio-controller; 78 gpio-controller;
79 #gpio-cells = <2>; 79 #gpio-cells = <2>;
@@ -82,9 +82,9 @@
82 interrupts = <82>, <83>, <84>, <85>; 82 interrupts = <82>, <83>, <84>, <85>;
83 }; 83 };
84 84
85 gpio1: gpio@d0018140 { 85 gpio1: gpio@18140 {
86 compatible = "marvell,orion-gpio"; 86 compatible = "marvell,orion-gpio";
87 reg = <0xd0018140 0x40>; 87 reg = <0x18140 0x40>;
88 ngpios = <32>; 88 ngpios = <32>;
89 gpio-controller; 89 gpio-controller;
90 #gpio-cells = <2>; 90 #gpio-cells = <2>;
@@ -93,9 +93,9 @@
93 interrupts = <87>, <88>, <89>, <90>; 93 interrupts = <87>, <88>, <89>, <90>;
94 }; 94 };
95 95
96 gpio2: gpio@d0018180 { 96 gpio2: gpio@18180 {
97 compatible = "marvell,orion-gpio"; 97 compatible = "marvell,orion-gpio";
98 reg = <0xd0018180 0x40>; 98 reg = <0x18180 0x40>;
99 ngpios = <3>; 99 ngpios = <3>;
100 gpio-controller; 100 gpio-controller;
101 #gpio-cells = <2>; 101 #gpio-cells = <2>;
@@ -104,9 +104,9 @@
104 interrupts = <91>; 104 interrupts = <91>;
105 }; 105 };
106 106
107 ethernet@d0034000 { 107 ethernet@34000 {
108 compatible = "marvell,armada-370-neta"; 108 compatible = "marvell,armada-370-neta";
109 reg = <0xd0034000 0x2500>; 109 reg = <0x34000 0x2500>;
110 interrupts = <14>; 110 interrupts = <14>;
111 clocks = <&gateclk 1>; 111 clocks = <&gateclk 1>;
112 status = "disabled"; 112 status = "disabled";
@@ -127,22 +127,22 @@
127 127
128 bus-range = <0x00 0xff>; 128 bus-range = <0x00 0xff>;
129 129
130 ranges = <0x82000000 0 0xd0040000 0xd0040000 0 0x00002000 /* Port 0.0 registers */ 130 ranges = <0x82000000 0 0x40000 0x40000 0 0x00002000 /* Port 0.0 registers */
131 0x82000000 0 0xd0042000 0xd0042000 0 0x00002000 /* Port 2.0 registers */ 131 0x82000000 0 0x42000 0x42000 0 0x00002000 /* Port 2.0 registers */
132 0x82000000 0 0xd0044000 0xd0044000 0 0x00002000 /* Port 0.1 registers */ 132 0x82000000 0 0x44000 0x44000 0 0x00002000 /* Port 0.1 registers */
133 0x82000000 0 0xd0048000 0xd0048000 0 0x00002000 /* Port 0.2 registers */ 133 0x82000000 0 0x48000 0x48000 0 0x00002000 /* Port 0.2 registers */
134 0x82000000 0 0xd004c000 0xd004c000 0 0x00002000 /* Port 0.3 registers */ 134 0x82000000 0 0x4c000 0x4c000 0 0x00002000 /* Port 0.3 registers */
135 0x82000000 0 0xd0080000 0xd0080000 0 0x00002000 /* Port 1.0 registers */ 135 0x82000000 0 0x80000 0x80000 0 0x00002000 /* Port 1.0 registers */
136 0x82000000 0 0xd0082000 0xd0082000 0 0x00002000 /* Port 3.0 registers */ 136 0x82000000 0 0x82000 0x82000 0 0x00002000 /* Port 3.0 registers */
137 0x82000000 0 0xd0084000 0xd0084000 0 0x00002000 /* Port 1.1 registers */ 137 0x82000000 0 0x84000 0x84000 0 0x00002000 /* Port 1.1 registers */
138 0x82000000 0 0xd0088000 0xd0088000 0 0x00002000 /* Port 1.2 registers */ 138 0x82000000 0 0x88000 0x88000 0 0x00002000 /* Port 1.2 registers */
139 0x82000000 0 0xd008c000 0xd008c000 0 0x00002000 /* Port 1.3 registers */ 139 0x82000000 0 0x8c000 0x8c000 0 0x00002000 /* Port 1.3 registers */
140 0x82000000 0 0xe0000000 0xe0000000 0 0x08000000 /* non-prefetchable memory */ 140 0x82000000 0 0xe0000000 0xe0000000 0 0x08000000 /* non-prefetchable memory */
141 0x81000000 0 0 0xe8000000 0 0x00100000>; /* downstream I/O */ 141 0x81000000 0 0 0xe8000000 0 0x00100000>; /* downstream I/O */
142 142
143 pcie@1,0 { 143 pcie@1,0 {
144 device_type = "pci"; 144 device_type = "pci";
145 assigned-addresses = <0x82000800 0 0xd0040000 0 0x2000>; 145 assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
146 reg = <0x0800 0 0 0 0>; 146 reg = <0x0800 0 0 0 0>;
147 #address-cells = <3>; 147 #address-cells = <3>;
148 #size-cells = <2>; 148 #size-cells = <2>;
@@ -158,7 +158,7 @@
158 158
159 pcie@2,0 { 159 pcie@2,0 {
160 device_type = "pci"; 160 device_type = "pci";
161 assigned-addresses = <0x82001000 0 0xd0044000 0 0x2000>; 161 assigned-addresses = <0x82001000 0 0x44000 0 0x2000>;
162 reg = <0x1000 0 0 0 0>; 162 reg = <0x1000 0 0 0 0>;
163 #address-cells = <3>; 163 #address-cells = <3>;
164 #size-cells = <2>; 164 #size-cells = <2>;
@@ -174,7 +174,7 @@
174 174
175 pcie@3,0 { 175 pcie@3,0 {
176 device_type = "pci"; 176 device_type = "pci";
177 assigned-addresses = <0x82001800 0 0xd0048000 0 0x2000>; 177 assigned-addresses = <0x82001800 0 0x48000 0 0x2000>;
178 reg = <0x1800 0 0 0 0>; 178 reg = <0x1800 0 0 0 0>;
179 #address-cells = <3>; 179 #address-cells = <3>;
180 #size-cells = <2>; 180 #size-cells = <2>;
@@ -190,7 +190,7 @@
190 190
191 pcie@4,0 { 191 pcie@4,0 {
192 device_type = "pci"; 192 device_type = "pci";
193 assigned-addresses = <0x82002000 0 0xd004c000 0 0x2000>; 193 assigned-addresses = <0x82002000 0 0x4c000 0 0x2000>;
194 reg = <0x2000 0 0 0 0>; 194 reg = <0x2000 0 0 0 0>;
195 #address-cells = <3>; 195 #address-cells = <3>;
196 #size-cells = <2>; 196 #size-cells = <2>;
@@ -206,7 +206,7 @@
206 206
207 pcie@5,0 { 207 pcie@5,0 {
208 device_type = "pci"; 208 device_type = "pci";
209 assigned-addresses = <0x82002800 0 0xd0080000 0 0x2000>; 209 assigned-addresses = <0x82002800 0 0x80000 0 0x2000>;
210 reg = <0x2800 0 0 0 0>; 210 reg = <0x2800 0 0 0 0>;
211 #address-cells = <3>; 211 #address-cells = <3>;
212 #size-cells = <2>; 212 #size-cells = <2>;
@@ -222,7 +222,7 @@
222 222
223 pcie@6,0 { 223 pcie@6,0 {
224 device_type = "pci"; 224 device_type = "pci";
225 assigned-addresses = <0x82003000 0 0xd0084000 0 0x2000>; 225 assigned-addresses = <0x82003000 0 0x84000 0 0x2000>;
226 reg = <0x3000 0 0 0 0>; 226 reg = <0x3000 0 0 0 0>;
227 #address-cells = <3>; 227 #address-cells = <3>;
228 #size-cells = <2>; 228 #size-cells = <2>;
@@ -238,7 +238,7 @@
238 238
239 pcie@7,0 { 239 pcie@7,0 {
240 device_type = "pci"; 240 device_type = "pci";
241 assigned-addresses = <0x82003800 0 0xd0088000 0 0x2000>; 241 assigned-addresses = <0x82003800 0 0x88000 0 0x2000>;
242 reg = <0x3800 0 0 0 0>; 242 reg = <0x3800 0 0 0 0>;
243 #address-cells = <3>; 243 #address-cells = <3>;
244 #size-cells = <2>; 244 #size-cells = <2>;
@@ -254,7 +254,7 @@
254 254
255 pcie@8,0 { 255 pcie@8,0 {
256 device_type = "pci"; 256 device_type = "pci";
257 assigned-addresses = <0x82004000 0 0xd008c000 0 0x2000>; 257 assigned-addresses = <0x82004000 0 0x8c000 0 0x2000>;
258 reg = <0x4000 0 0 0 0>; 258 reg = <0x4000 0 0 0 0>;
259 #address-cells = <3>; 259 #address-cells = <3>;
260 #size-cells = <2>; 260 #size-cells = <2>;
@@ -269,7 +269,7 @@
269 }; 269 };
270 pcie@9,0 { 270 pcie@9,0 {
271 device_type = "pci"; 271 device_type = "pci";
272 assigned-addresses = <0x82004800 0 0xd0042000 0 0x2000>; 272 assigned-addresses = <0x82004800 0 0x42000 0 0x2000>;
273 reg = <0x4800 0 0 0 0>; 273 reg = <0x4800 0 0 0 0>;
274 #address-cells = <3>; 274 #address-cells = <3>;
275 #size-cells = <2>; 275 #size-cells = <2>;
@@ -285,7 +285,7 @@
285 285
286 pcie@10,0 { 286 pcie@10,0 {
287 device_type = "pci"; 287 device_type = "pci";
288 assigned-addresses = <0x82005000 0 0xd0082000 0 0x2000>; 288 assigned-addresses = <0x82005000 0 0x82000 0 0x2000>;
289 reg = <0x5000 0 0 0 0>; 289 reg = <0x5000 0 0 0 0>;
290 #address-cells = <3>; 290 #address-cells = <3>;
291 #size-cells = <2>; 291 #size-cells = <2>;
diff --git a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
index 9d04f04d4e39..e9bc8bf90263 100644
--- a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
+++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
@@ -27,11 +27,11 @@
27 }; 27 };
28 28
29 soc { 29 soc {
30 serial@d0012000 { 30 serial@12000 {
31 clock-frequency = <250000000>; 31 clock-frequency = <250000000>;
32 status = "okay"; 32 status = "okay";
33 }; 33 };
34 serial@d0012100 { 34 serial@12100 {
35 clock-frequency = <250000000>; 35 clock-frequency = <250000000>;
36 status = "okay"; 36 status = "okay";
37 }; 37 };
@@ -96,31 +96,31 @@
96 }; 96 };
97 }; 97 };
98 98
99 ethernet@d0070000 { 99 ethernet@70000 {
100 status = "okay"; 100 status = "okay";
101 phy = <&phy0>; 101 phy = <&phy0>;
102 phy-mode = "sgmii"; 102 phy-mode = "sgmii";
103 }; 103 };
104 ethernet@d0074000 { 104 ethernet@74000 {
105 status = "okay"; 105 status = "okay";
106 phy = <&phy1>; 106 phy = <&phy1>;
107 phy-mode = "sgmii"; 107 phy-mode = "sgmii";
108 }; 108 };
109 ethernet@d0030000 { 109 ethernet@30000 {
110 status = "okay"; 110 status = "okay";
111 phy = <&phy2>; 111 phy = <&phy2>;
112 phy-mode = "sgmii"; 112 phy-mode = "sgmii";
113 }; 113 };
114 ethernet@d0034000 { 114 ethernet@34000 {
115 status = "okay"; 115 status = "okay";
116 phy = <&phy3>; 116 phy = <&phy3>;
117 phy-mode = "sgmii"; 117 phy-mode = "sgmii";
118 }; 118 };
119 i2c@d0011000 { 119 i2c@11000 {
120 status = "okay"; 120 status = "okay";
121 clock-frequency = <400000>; 121 clock-frequency = <400000>;
122 }; 122 };
123 i2c@d0011100 { 123 i2c@11100 {
124 status = "okay"; 124 status = "okay";
125 clock-frequency = <400000>; 125 clock-frequency = <400000>;
126 126
@@ -129,18 +129,18 @@
129 reg = <0x30>; 129 reg = <0x30>;
130 }; 130 };
131 }; 131 };
132 sata@d00a0000 { 132 sata@a0000 {
133 nr-ports = <2>; 133 nr-ports = <2>;
134 status = "okay"; 134 status = "okay";
135 }; 135 };
136 usb@d0050000 { 136 usb@50000 {
137 status = "okay"; 137 status = "okay";
138 }; 138 };
139 usb@d0051000 { 139 usb@51000 {
140 status = "okay"; 140 status = "okay";
141 }; 141 };
142 142
143 devbus-bootcs@d0010400 { 143 devbus-bootcs@10400 {
144 status = "okay"; 144 status = "okay";
145 ranges = <0 0xf0000000 0x8000000>; /* @addr 0xf000000, size 0x8000000 */ 145 ranges = <0 0xf0000000 0x8000000>; /* @addr 0xf000000, size 0x8000000 */
146 146
diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi
index ef3d41362241..465b9fa116ea 100644
--- a/arch/arm/boot/dts/armada-xp.dtsi
+++ b/arch/arm/boot/dts/armada-xp.dtsi
@@ -22,83 +22,84 @@
22 model = "Marvell Armada XP family SoC"; 22 model = "Marvell Armada XP family SoC";
23 compatible = "marvell,armadaxp", "marvell,armada-370-xp"; 23 compatible = "marvell,armadaxp", "marvell,armada-370-xp";
24 24
25
25 soc { 26 soc {
26 L2: l2-cache { 27 L2: l2-cache {
27 compatible = "marvell,aurora-system-cache"; 28 compatible = "marvell,aurora-system-cache";
28 reg = <0xd0008000 0x1000>; 29 reg = <0x08000 0x1000>;
29 cache-id-part = <0x100>; 30 cache-id-part = <0x100>;
30 wt-override; 31 wt-override;
31 }; 32 };
32 33
33 mpic: interrupt-controller@d0020000 { 34 mpic: interrupt-controller@20000 {
34 reg = <0xd0020a00 0x2d0>, 35 reg = <0x20a00 0x2d0>,
35 <0xd0021070 0x58>; 36 <0x21070 0x58>;
36 }; 37 };
37 38
38 armada-370-xp-pmsu@d0022000 { 39 armada-370-xp-pmsu@22000 {
39 compatible = "marvell,armada-370-xp-pmsu"; 40 compatible = "marvell,armada-370-xp-pmsu";
40 reg = <0xd0022100 0x430>, 41 reg = <0x22100 0x430>,
41 <0xd0020800 0x20>; 42 <0x20800 0x20>;
42 }; 43 };
43 44
44 serial@d0012200 { 45 serial@12200 {
45 compatible = "snps,dw-apb-uart"; 46 compatible = "snps,dw-apb-uart";
46 reg = <0xd0012200 0x100>; 47 reg = <0x12200 0x100>;
47 reg-shift = <2>; 48 reg-shift = <2>;
48 interrupts = <43>; 49 interrupts = <43>;
49 reg-io-width = <1>; 50 reg-io-width = <1>;
50 status = "disabled"; 51 status = "disabled";
51 }; 52 };
52 serial@d0012300 { 53 serial@12300 {
53 compatible = "snps,dw-apb-uart"; 54 compatible = "snps,dw-apb-uart";
54 reg = <0xd0012300 0x100>; 55 reg = <0x12300 0x100>;
55 reg-shift = <2>; 56 reg-shift = <2>;
56 interrupts = <44>; 57 interrupts = <44>;
57 reg-io-width = <1>; 58 reg-io-width = <1>;
58 status = "disabled"; 59 status = "disabled";
59 }; 60 };
60 61
61 timer@d0020300 { 62 timer@20300 {
62 marvell,timer-25Mhz; 63 marvell,timer-25Mhz;
63 }; 64 };
64 65
65 coreclk: mvebu-sar@d0018230 { 66 coreclk: mvebu-sar@18230 {
66 compatible = "marvell,armada-xp-core-clock"; 67 compatible = "marvell,armada-xp-core-clock";
67 reg = <0xd0018230 0x08>; 68 reg = <0x18230 0x08>;
68 #clock-cells = <1>; 69 #clock-cells = <1>;
69 }; 70 };
70 71
71 cpuclk: clock-complex@d0018700 { 72 cpuclk: clock-complex@18700 {
72 #clock-cells = <1>; 73 #clock-cells = <1>;
73 compatible = "marvell,armada-xp-cpu-clock"; 74 compatible = "marvell,armada-xp-cpu-clock";
74 reg = <0xd0018700 0xA0>; 75 reg = <0x18700 0xA0>;
75 clocks = <&coreclk 1>; 76 clocks = <&coreclk 1>;
76 }; 77 };
77 78
78 gateclk: clock-gating-control@d0018220 { 79 gateclk: clock-gating-control@18220 {
79 compatible = "marvell,armada-xp-gating-clock"; 80 compatible = "marvell,armada-xp-gating-clock";
80 reg = <0xd0018220 0x4>; 81 reg = <0x18220 0x4>;
81 clocks = <&coreclk 0>; 82 clocks = <&coreclk 0>;
82 #clock-cells = <1>; 83 #clock-cells = <1>;
83 }; 84 };
84 85
85 system-controller@d0018200 { 86 system-controller@18200 {
86 compatible = "marvell,armada-370-xp-system-controller"; 87 compatible = "marvell,armada-370-xp-system-controller";
87 reg = <0xd0018200 0x500>; 88 reg = <0x18200 0x500>;
88 }; 89 };
89 90
90 ethernet@d0030000 { 91 ethernet@30000 {
91 compatible = "marvell,armada-370-neta"; 92 compatible = "marvell,armada-370-neta";
92 reg = <0xd0030000 0x2500>; 93 reg = <0x30000 0x2500>;
93 interrupts = <12>; 94 interrupts = <12>;
94 clocks = <&gateclk 2>; 95 clocks = <&gateclk 2>;
95 status = "disabled"; 96 status = "disabled";
96 }; 97 };
97 98
98 xor@d0060900 { 99 xor@60900 {
99 compatible = "marvell,orion-xor"; 100 compatible = "marvell,orion-xor";
100 reg = <0xd0060900 0x100 101 reg = <0x60900 0x100
101 0xd0060b00 0x100>; 102 0x60b00 0x100>;
102 clocks = <&gateclk 22>; 103 clocks = <&gateclk 22>;
103 status = "okay"; 104 status = "okay";
104 105
@@ -115,10 +116,10 @@
115 }; 116 };
116 }; 117 };
117 118
118 xor@d00f0900 { 119 xor@f0900 {
119 compatible = "marvell,orion-xor"; 120 compatible = "marvell,orion-xor";
120 reg = <0xd00F0900 0x100 121 reg = <0xF0900 0x100
121 0xd00F0B00 0x100>; 122 0xF0B00 0x100>;
122 clocks = <&gateclk 28>; 123 clocks = <&gateclk 28>;
123 status = "okay"; 124 status = "okay";
124 125
@@ -135,26 +136,26 @@
135 }; 136 };
136 }; 137 };
137 138
138 usb@d0050000 { 139 usb@50000 {
139 clocks = <&gateclk 18>; 140 clocks = <&gateclk 18>;
140 }; 141 };
141 142
142 usb@d0051000 { 143 usb@51000 {
143 clocks = <&gateclk 19>; 144 clocks = <&gateclk 19>;
144 }; 145 };
145 146
146 usb@d0052000 { 147 usb@52000 {
147 compatible = "marvell,orion-ehci"; 148 compatible = "marvell,orion-ehci";
148 reg = <0xd0052000 0x500>; 149 reg = <0x52000 0x500>;
149 interrupts = <47>; 150 interrupts = <47>;
150 clocks = <&gateclk 20>; 151 clocks = <&gateclk 20>;
151 status = "disabled"; 152 status = "disabled";
152 }; 153 };
153 154
154 thermal@d00182b0 { 155 thermal@182b0 {
155 compatible = "marvell,armadaxp-thermal"; 156 compatible = "marvell,armadaxp-thermal";
156 reg = <0xd00182b0 0x4 157 reg = <0x182b0 0x4
157 0xd00184d0 0x4>; 158 0x184d0 0x4>;
158 status = "okay"; 159 status = "okay";
159 }; 160 };
160 }; 161 };
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-26 15:49:40 -0500