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authorLinus Walleij <linus.walleij@linaro.org>2014-02-03 16:56:27 -0500
committerLinus Walleij <linus.walleij@linaro.org>2014-02-04 14:50:43 -0500
commit81d78492e812225508e5aaec83cd6b001bf837d6 (patch)
tree7458fe5a38a5d0f24e3735a06cc6bae9ebb0f49e
parent1f04159e9e23901ff09514cfc9d7962a38b25c06 (diff)
ARM: ux500: move AB8500 EXTCPENA from board file to DT
This moves the configuration of the AB8500 EXTCPENA pin from the board file to the device tree. Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r--arch/arm/boot/dts/ste-href-ab8500.dtsi17
-rw-r--r--arch/arm/mach-ux500/board-mop500-pins.c7
2 files changed, 15 insertions, 9 deletions
diff --git a/arch/arm/boot/dts/ste-href-ab8500.dtsi b/arch/arm/boot/dts/ste-href-ab8500.dtsi
index 6222b8e951c2..beb59f99eff8 100644
--- a/arch/arm/boot/dts/ste-href-ab8500.dtsi
+++ b/arch/arm/boot/dts/ste-href-ab8500.dtsi
@@ -36,7 +36,8 @@
36 <&pwm_default_mode>, 36 <&pwm_default_mode>,
37 <&adi1_default_mode>, 37 <&adi1_default_mode>,
38 <&usbuicc_default_mode>, 38 <&usbuicc_default_mode>,
39 <&dmic_default_mode>; 39 <&dmic_default_mode>,
40 <&extcpena_default_mode>;
40 41
41 /* 42 /*
42 * Pins 2, 4, 10, 11, 12, 13, 16, 24, 25, 36, 37, 38, 39 and 42 43 * Pins 2, 4, 10, 11, 12, 13, 16, 24, 25, 36, 37, 38, 39 and 42
@@ -340,7 +341,19 @@
340 }; 341 };
341 }; 342 };
342 }; 343 };
343 344 extcpena {
345 extcpena_default_mode: extcpena_default {
346 default_mux {
347 ste,function = "extcpena";
348 ste,pins = "extcpena_d_1";
349 };
350 default_cfg {
351 ste,pins = "GPIO34_R17";
352 input-enable;
353 bias-pull-down;
354 };
355 };
356 };
344 }; 357 };
345 }; 358 };
346 }; 359 };
diff --git a/arch/arm/mach-ux500/board-mop500-pins.c b/arch/arm/mach-ux500/board-mop500-pins.c
index 851f530e6e16..bbd5bc56f7f0 100644
--- a/arch/arm/mach-ux500/board-mop500-pins.c
+++ b/arch/arm/mach-ux500/board-mop500-pins.c
@@ -57,13 +57,6 @@ static struct pinctrl_map __initdata ab8500_pinmap[] = {
57 AB8500_PIN_STATE("GPIO3_U9", in_pd, "regulator.36", PINCTRL_STATE_SLEEP), 57 AB8500_PIN_STATE("GPIO3_U9", in_pd, "regulator.36", PINCTRL_STATE_SLEEP),
58 58
59 /* 59 /*
60 * pins 34 is muxed in EXTCPENA
61 * configured INPUT PULL DOWN
62 */
63 AB8500_MUX_HOG("extcpena_d_1", "extcpena"),
64 AB8500_PIN_HOG("GPIO34_R17", in_pd),
65
66 /*
67 * pins 40 and 41 are muxed in MODCSLSDA 60 * pins 40 and 41 are muxed in MODCSLSDA
68 * configured INPUT PULL DOWN 61 * configured INPUT PULL DOWN
69 */ 62 */