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authorRussell King <rmk+kernel@arm.linux.org.uk>2011-01-21 09:03:28 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-02-19 06:09:05 -0500
commit7b4e9ced69a120e7e7446e3303d2307aa29d891c (patch)
treea39b9782e2aa4e9f7f386dade06111fe0c6c3f34
parent9c49e4ab84dd46769e7fd9773946e10c95bab680 (diff)
ARM: clcd: add method for describing display capabilities
The ARM CLCD PL110 controller in TFT mode provides two output formats based on whether the controller is in 24bpp mode or not - either 5551 or 888. PL111 augments this with a 444 and 565 modes. Some implementations provide an external MUX on the PL110 output to reassign the bits to achieve 565 mode. Provide a system of capability flags to allow the CLCD driver to work out what is supported by each panel and board, and therefore which display formats are permitted. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--drivers/video/amba-clcd.c95
-rw-r--r--include/linux/amba/clcd.h82
2 files changed, 149 insertions, 28 deletions
diff --git a/drivers/video/amba-clcd.c b/drivers/video/amba-clcd.c
index aedbb345f8a9..8bd370697533 100644
--- a/drivers/video/amba-clcd.c
+++ b/drivers/video/amba-clcd.c
@@ -120,8 +120,23 @@ static void clcdfb_enable(struct clcd_fb *fb, u32 cntl)
120static int 120static int
121clcdfb_set_bitfields(struct clcd_fb *fb, struct fb_var_screeninfo *var) 121clcdfb_set_bitfields(struct clcd_fb *fb, struct fb_var_screeninfo *var)
122{ 122{
123 u32 caps;
123 int ret = 0; 124 int ret = 0;
124 125
126 if (fb->panel->caps && fb->board->caps)
127 caps = fb->panel->caps & fb->board->caps;
128 else {
129 /* Old way of specifying what can be used */
130 caps = fb->panel->cntl & CNTL_BGR ?
131 CLCD_CAP_BGR : CLCD_CAP_RGB;
132 /* But mask out 444 modes as they weren't supported */
133 caps &= ~CLCD_CAP_444;
134 }
135
136 /* Only TFT panels can do RGB888/BGR888 */
137 if (!(fb->panel->cntl & CNTL_LCDTFT))
138 caps &= ~CLCD_CAP_888;
139
125 memset(&var->transp, 0, sizeof(var->transp)); 140 memset(&var->transp, 0, sizeof(var->transp));
126 141
127 var->red.msb_right = 0; 142 var->red.msb_right = 0;
@@ -133,6 +148,13 @@ clcdfb_set_bitfields(struct clcd_fb *fb, struct fb_var_screeninfo *var)
133 case 2: 148 case 2:
134 case 4: 149 case 4:
135 case 8: 150 case 8:
151 /* If we can't do 5551, reject */
152 caps &= CLCD_CAP_5551;
153 if (!caps) {
154 ret = -EINVAL;
155 break;
156 }
157
136 var->red.length = var->bits_per_pixel; 158 var->red.length = var->bits_per_pixel;
137 var->red.offset = 0; 159 var->red.offset = 0;
138 var->green.length = var->bits_per_pixel; 160 var->green.length = var->bits_per_pixel;
@@ -140,23 +162,61 @@ clcdfb_set_bitfields(struct clcd_fb *fb, struct fb_var_screeninfo *var)
140 var->blue.length = var->bits_per_pixel; 162 var->blue.length = var->bits_per_pixel;
141 var->blue.offset = 0; 163 var->blue.offset = 0;
142 break; 164 break;
165
143 case 16: 166 case 16:
144 var->red.length = 5; 167 /* If we can't do 444, 5551 or 565, reject */
145 var->blue.length = 5; 168 if (!(caps & (CLCD_CAP_444 | CLCD_CAP_5551 | CLCD_CAP_565))) {
169 ret = -EINVAL;
170 break;
171 }
172
146 /* 173 /*
147 * Green length can be 5 or 6 depending whether 174 * Green length can be 4, 5 or 6 depending whether
148 * we're operating in RGB555 or RGB565 mode. 175 * we're operating in 444, 5551 or 565 mode.
149 */ 176 */
150 if (var->green.length != 5 && var->green.length != 6) 177 if (var->green.length == 4 && caps & CLCD_CAP_444)
151 var->green.length = 6; 178 caps &= CLCD_CAP_444;
179 if (var->green.length == 5 && caps & CLCD_CAP_5551)
180 caps &= CLCD_CAP_5551;
181 else if (var->green.length == 6 && caps & CLCD_CAP_565)
182 caps &= CLCD_CAP_565;
183 else {
184 /*
185 * PL110 officially only supports RGB555,
186 * but may be wired up to allow RGB565.
187 */
188 if (caps & CLCD_CAP_565) {
189 var->green.length = 6;
190 caps &= CLCD_CAP_565;
191 } else if (caps & CLCD_CAP_5551) {
192 var->green.length = 5;
193 caps &= CLCD_CAP_5551;
194 } else {
195 var->green.length = 4;
196 caps &= CLCD_CAP_444;
197 }
198 }
199
200 if (var->green.length >= 5) {
201 var->red.length = 5;
202 var->blue.length = 5;
203 } else {
204 var->red.length = 4;
205 var->blue.length = 4;
206 }
152 break; 207 break;
153 case 32: 208 case 32:
154 if (fb->panel->cntl & CNTL_LCDTFT) { 209 /* If we can't do 888, reject */
155 var->red.length = 8; 210 caps &= CLCD_CAP_888;
156 var->green.length = 8; 211 if (!caps) {
157 var->blue.length = 8; 212 ret = -EINVAL;
158 break; 213 break;
159 } 214 }
215
216 var->red.length = 8;
217 var->green.length = 8;
218 var->blue.length = 8;
219 break;
160 default: 220 default:
161 ret = -EINVAL; 221 ret = -EINVAL;
162 break; 222 break;
@@ -168,7 +228,20 @@ clcdfb_set_bitfields(struct clcd_fb *fb, struct fb_var_screeninfo *var)
168 * the bitfield length defined above. 228 * the bitfield length defined above.
169 */ 229 */
170 if (ret == 0 && var->bits_per_pixel >= 16) { 230 if (ret == 0 && var->bits_per_pixel >= 16) {
171 if (fb->panel->cntl & CNTL_BGR) { 231 bool bgr, rgb;
232
233 bgr = caps & CLCD_CAP_BGR && var->blue.offset == 0;
234 rgb = caps & CLCD_CAP_RGB && var->red.offset == 0;
235
236 if (!bgr && !rgb)
237 /*
238 * The requested format was not possible, try just
239 * our capabilities. One of BGR or RGB must be
240 * supported.
241 */
242 bgr = caps & CLCD_CAP_BGR;
243
244 if (bgr) {
172 var->blue.offset = 0; 245 var->blue.offset = 0;
173 var->green.offset = var->blue.offset + var->blue.length; 246 var->green.offset = var->blue.offset + var->blue.length;
174 var->red.offset = var->green.offset + var->green.length; 247 var->red.offset = var->green.offset + var->green.length;
diff --git a/include/linux/amba/clcd.h b/include/linux/amba/clcd.h
index 2e511219a161..24d26efd1432 100644
--- a/include/linux/amba/clcd.h
+++ b/include/linux/amba/clcd.h
@@ -53,6 +53,7 @@
53#define CNTL_LCDBPP8 (3 << 1) 53#define CNTL_LCDBPP8 (3 << 1)
54#define CNTL_LCDBPP16 (4 << 1) 54#define CNTL_LCDBPP16 (4 << 1)
55#define CNTL_LCDBPP16_565 (6 << 1) 55#define CNTL_LCDBPP16_565 (6 << 1)
56#define CNTL_LCDBPP16_444 (7 << 1)
56#define CNTL_LCDBPP24 (5 << 1) 57#define CNTL_LCDBPP24 (5 << 1)
57#define CNTL_LCDBW (1 << 4) 58#define CNTL_LCDBW (1 << 4)
58#define CNTL_LCDTFT (1 << 5) 59#define CNTL_LCDTFT (1 << 5)
@@ -66,6 +67,32 @@
66#define CNTL_LDMAFIFOTIME (1 << 15) 67#define CNTL_LDMAFIFOTIME (1 << 15)
67#define CNTL_WATERMARK (1 << 16) 68#define CNTL_WATERMARK (1 << 16)
68 69
70enum {
71 /* individual formats */
72 CLCD_CAP_RGB444 = (1 << 0),
73 CLCD_CAP_RGB5551 = (1 << 1),
74 CLCD_CAP_RGB565 = (1 << 2),
75 CLCD_CAP_RGB888 = (1 << 3),
76 CLCD_CAP_BGR444 = (1 << 4),
77 CLCD_CAP_BGR5551 = (1 << 5),
78 CLCD_CAP_BGR565 = (1 << 6),
79 CLCD_CAP_BGR888 = (1 << 7),
80
81 /* connection layouts */
82 CLCD_CAP_444 = CLCD_CAP_RGB444 | CLCD_CAP_BGR444,
83 CLCD_CAP_5551 = CLCD_CAP_RGB5551 | CLCD_CAP_BGR5551,
84 CLCD_CAP_565 = CLCD_CAP_RGB565 | CLCD_CAP_BGR565,
85 CLCD_CAP_888 = CLCD_CAP_RGB888 | CLCD_CAP_BGR888,
86
87 /* red/blue ordering */
88 CLCD_CAP_RGB = CLCD_CAP_RGB444 | CLCD_CAP_RGB5551 |
89 CLCD_CAP_RGB565 | CLCD_CAP_RGB888,
90 CLCD_CAP_BGR = CLCD_CAP_BGR444 | CLCD_CAP_BGR5551 |
91 CLCD_CAP_BGR565 | CLCD_CAP_BGR888,
92
93 CLCD_CAP_ALL = CLCD_CAP_BGR | CLCD_CAP_RGB,
94};
95
69struct clcd_panel { 96struct clcd_panel {
70 struct fb_videomode mode; 97 struct fb_videomode mode;
71 signed short width; /* width in mm */ 98 signed short width; /* width in mm */
@@ -73,6 +100,7 @@ struct clcd_panel {
73 u32 tim2; 100 u32 tim2;
74 u32 tim3; 101 u32 tim3;
75 u32 cntl; 102 u32 cntl;
103 u32 caps;
76 unsigned int bpp:8, 104 unsigned int bpp:8,
77 fixedtimings:1, 105 fixedtimings:1,
78 grayscale:1; 106 grayscale:1;
@@ -97,6 +125,11 @@ struct clcd_board {
97 const char *name; 125 const char *name;
98 126
99 /* 127 /*
128 * Optional. Hardware capability flags.
129 */
130 u32 caps;
131
132 /*
100 * Optional. Check whether the var structure is acceptable 133 * Optional. Check whether the var structure is acceptable
101 * for this display. 134 * for this display.
102 */ 135 */
@@ -155,34 +188,35 @@ struct clcd_fb {
155 188
156static inline void clcdfb_decode(struct clcd_fb *fb, struct clcd_regs *regs) 189static inline void clcdfb_decode(struct clcd_fb *fb, struct clcd_regs *regs)
157{ 190{
191 struct fb_var_screeninfo *var = &fb->fb.var;
158 u32 val, cpl; 192 u32 val, cpl;
159 193
160 /* 194 /*
161 * Program the CLCD controller registers and start the CLCD 195 * Program the CLCD controller registers and start the CLCD
162 */ 196 */
163 val = ((fb->fb.var.xres / 16) - 1) << 2; 197 val = ((var->xres / 16) - 1) << 2;
164 val |= (fb->fb.var.hsync_len - 1) << 8; 198 val |= (var->hsync_len - 1) << 8;
165 val |= (fb->fb.var.right_margin - 1) << 16; 199 val |= (var->right_margin - 1) << 16;
166 val |= (fb->fb.var.left_margin - 1) << 24; 200 val |= (var->left_margin - 1) << 24;
167 regs->tim0 = val; 201 regs->tim0 = val;
168 202
169 val = fb->fb.var.yres; 203 val = var->yres;
170 if (fb->panel->cntl & CNTL_LCDDUAL) 204 if (fb->panel->cntl & CNTL_LCDDUAL)
171 val /= 2; 205 val /= 2;
172 val -= 1; 206 val -= 1;
173 val |= (fb->fb.var.vsync_len - 1) << 10; 207 val |= (var->vsync_len - 1) << 10;
174 val |= fb->fb.var.lower_margin << 16; 208 val |= var->lower_margin << 16;
175 val |= fb->fb.var.upper_margin << 24; 209 val |= var->upper_margin << 24;
176 regs->tim1 = val; 210 regs->tim1 = val;
177 211
178 val = fb->panel->tim2; 212 val = fb->panel->tim2;
179 val |= fb->fb.var.sync & FB_SYNC_HOR_HIGH_ACT ? 0 : TIM2_IHS; 213 val |= var->sync & FB_SYNC_HOR_HIGH_ACT ? 0 : TIM2_IHS;
180 val |= fb->fb.var.sync & FB_SYNC_VERT_HIGH_ACT ? 0 : TIM2_IVS; 214 val |= var->sync & FB_SYNC_VERT_HIGH_ACT ? 0 : TIM2_IVS;
181 215
182 cpl = fb->fb.var.xres_virtual; 216 cpl = var->xres_virtual;
183 if (fb->panel->cntl & CNTL_LCDTFT) /* TFT */ 217 if (fb->panel->cntl & CNTL_LCDTFT) /* TFT */
184 /* / 1 */; 218 /* / 1 */;
185 else if (!fb->fb.var.grayscale) /* STN color */ 219 else if (!var->grayscale) /* STN color */
186 cpl = cpl * 8 / 3; 220 cpl = cpl * 8 / 3;
187 else if (fb->panel->cntl & CNTL_LCDMONO8) /* STN monochrome, 8bit */ 221 else if (fb->panel->cntl & CNTL_LCDMONO8) /* STN monochrome, 8bit */
188 cpl /= 8; 222 cpl /= 8;
@@ -194,10 +228,22 @@ static inline void clcdfb_decode(struct clcd_fb *fb, struct clcd_regs *regs)
194 regs->tim3 = fb->panel->tim3; 228 regs->tim3 = fb->panel->tim3;
195 229
196 val = fb->panel->cntl; 230 val = fb->panel->cntl;
197 if (fb->fb.var.grayscale) 231 if (var->grayscale)
198 val |= CNTL_LCDBW; 232 val |= CNTL_LCDBW;
199 233
200 switch (fb->fb.var.bits_per_pixel) { 234 if (fb->panel->caps && fb->board->caps &&
235 var->bits_per_pixel >= 16) {
236 /*
237 * if board and panel supply capabilities, we can support
238 * changing BGR/RGB depending on supplied parameters
239 */
240 if (var->red.offset == 0)
241 val &= ~CNTL_BGR;
242 else
243 val |= CNTL_BGR;
244 }
245
246 switch (var->bits_per_pixel) {
201 case 1: 247 case 1:
202 val |= CNTL_LCDBPP1; 248 val |= CNTL_LCDBPP1;
203 break; 249 break;
@@ -217,10 +263,12 @@ static inline void clcdfb_decode(struct clcd_fb *fb, struct clcd_regs *regs)
217 * custom external wiring. 263 * custom external wiring.
218 */ 264 */
219 if (amba_part(fb->dev) == 0x110 || 265 if (amba_part(fb->dev) == 0x110 ||
220 fb->fb.var.green.length == 5) 266 var->green.length == 5)
221 val |= CNTL_LCDBPP16; 267 val |= CNTL_LCDBPP16;
222 else 268 else if (var->green.length == 6)
223 val |= CNTL_LCDBPP16_565; 269 val |= CNTL_LCDBPP16_565;
270 else
271 val |= CNTL_LCDBPP16_444;
224 break; 272 break;
225 case 32: 273 case 32:
226 val |= CNTL_LCDBPP24; 274 val |= CNTL_LCDBPP24;
@@ -228,7 +276,7 @@ static inline void clcdfb_decode(struct clcd_fb *fb, struct clcd_regs *regs)
228 } 276 }
229 277
230 regs->cntl = val; 278 regs->cntl = val;
231 regs->pixclock = fb->fb.var.pixclock; 279 regs->pixclock = var->pixclock;
232} 280}
233 281
234static inline int clcdfb_check(struct clcd_fb *fb, struct fb_var_screeninfo *var) 282static inline int clcdfb_check(struct clcd_fb *fb, struct fb_var_screeninfo *var)