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authorOlof Johansson <olof@lixom.net>2013-10-02 23:55:05 -0400
committerOlof Johansson <olof@lixom.net>2013-10-02 23:55:05 -0400
commit6a98b2ffc7cf8a84a18d8666185c29b7e0e631e9 (patch)
tree1f5ad4728f7c2af9c452eeca3d116ab24cdee481
parent4f76d37cdb6523ad42ba666f0e5560e26b4c3749 (diff)
parent8553bcad3eca6cdd19c4771c378bd2cf6e25c6b2 (diff)
Merge tag 'fixes-3.12-2' of git://git.infradead.org/linux-mvebu into fixes
From Jason Cooper: mvebu fixes for v3.12 (round 2) - mvebu - fix ReadyNAS 102 power button (needs to be active high) - fix ReadyNAS 102 automated rebooting (prevent hang) by add gpio-poweroff node - fix booting ReadyNAS 102 by adding MBus ranges and PCIe DT nodes - mvebu-mbus: prevent PCIe driver from continuing with corrupted resource * tag 'fixes-3.12-2' of git://git.infradead.org/linux-mvebu: bus: mvebu-mbus: Fix optional pcie-mem/io-aperture properties ARM: mvebu: add missing DT Mbus ranges and relocate PCIe DT nodes for RN102 ARM: mvebu: Add DT entry for ReadyNAS 102 to use gpio-poweroff driver ARM: mvebu: fix ReadyNAS 102 Power button GPIO to make it active high Signed-off-by: Olof Johansson <olof@lixom.net>
-rw-r--r--arch/arm/boot/dts/armada-370-netgear-rn102.dts49
-rw-r--r--drivers/bus/mvebu-mbus.c6
2 files changed, 36 insertions, 19 deletions
diff --git a/arch/arm/boot/dts/armada-370-netgear-rn102.dts b/arch/arm/boot/dts/armada-370-netgear-rn102.dts
index 05e4485a8225..8ac2ac1f69cc 100644
--- a/arch/arm/boot/dts/armada-370-netgear-rn102.dts
+++ b/arch/arm/boot/dts/armada-370-netgear-rn102.dts
@@ -27,6 +27,25 @@
27 }; 27 };
28 28
29 soc { 29 soc {
30 ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
31 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
32
33 pcie-controller {
34 status = "okay";
35
36 /* Connected to Marvell SATA controller */
37 pcie@1,0 {
38 /* Port 0, Lane 0 */
39 status = "okay";
40 };
41
42 /* Connected to FL1009 USB 3.0 controller */
43 pcie@2,0 {
44 /* Port 1, Lane 0 */
45 status = "okay";
46 };
47 };
48
30 internal-regs { 49 internal-regs {
31 serial@12000 { 50 serial@12000 {
32 clock-frequency = <200000000>; 51 clock-frequency = <200000000>;
@@ -57,6 +76,11 @@
57 marvell,pins = "mpp56"; 76 marvell,pins = "mpp56";
58 marvell,function = "gpio"; 77 marvell,function = "gpio";
59 }; 78 };
79
80 poweroff: poweroff {
81 marvell,pins = "mpp8";
82 marvell,function = "gpio";
83 };
60 }; 84 };
61 85
62 mdio { 86 mdio {
@@ -89,22 +113,6 @@
89 pwm_polarity = <0>; 113 pwm_polarity = <0>;
90 }; 114 };
91 }; 115 };
92
93 pcie-controller {
94 status = "okay";
95
96 /* Connected to Marvell SATA controller */
97 pcie@1,0 {
98 /* Port 0, Lane 0 */
99 status = "okay";
100 };
101
102 /* Connected to FL1009 USB 3.0 controller */
103 pcie@2,0 {
104 /* Port 1, Lane 0 */
105 status = "okay";
106 };
107 };
108 }; 116 };
109 }; 117 };
110 118
@@ -160,7 +168,7 @@
160 button@1 { 168 button@1 {
161 label = "Power Button"; 169 label = "Power Button";
162 linux,code = <116>; /* KEY_POWER */ 170 linux,code = <116>; /* KEY_POWER */
163 gpios = <&gpio1 30 1>; 171 gpios = <&gpio1 30 0>;
164 }; 172 };
165 173
166 button@2 { 174 button@2 {
@@ -176,4 +184,11 @@
176 }; 184 };
177 }; 185 };
178 186
187 gpio_poweroff {
188 compatible = "gpio-poweroff";
189 pinctrl-0 = <&poweroff>;
190 pinctrl-names = "default";
191 gpios = <&gpio0 8 1>;
192 };
193
179}; 194};
diff --git a/drivers/bus/mvebu-mbus.c b/drivers/bus/mvebu-mbus.c
index 553185318963..2394e9753ef5 100644
--- a/drivers/bus/mvebu-mbus.c
+++ b/drivers/bus/mvebu-mbus.c
@@ -865,11 +865,13 @@ static void __init mvebu_mbus_get_pcie_resources(struct device_node *np,
865 int ret; 865 int ret;
866 866
867 /* 867 /*
868 * These are optional, so we clear them and they'll 868 * These are optional, so we make sure that resource_size(x) will
869 * be zero if they are missing from the DT. 869 * return 0.
870 */ 870 */
871 memset(mem, 0, sizeof(struct resource)); 871 memset(mem, 0, sizeof(struct resource));
872 mem->end = -1;
872 memset(io, 0, sizeof(struct resource)); 873 memset(io, 0, sizeof(struct resource));
874 io->end = -1;
873 875
874 ret = of_property_read_u32_array(np, "pcie-mem-aperture", reg, ARRAY_SIZE(reg)); 876 ret = of_property_read_u32_array(np, "pcie-mem-aperture", reg, ARRAY_SIZE(reg));
875 if (!ret) { 877 if (!ret) {