diff options
author | Marek Vašut <marek.vasut@gmail.com> | 2006-12-06 20:13:56 -0500 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2007-03-02 04:47:09 -0500 |
commit | 65d873caab8a222954462e4a5a4754796d569820 (patch) | |
tree | 0e3f939099915290252f98169c832c68f80ce0df | |
parent | 681e9940da89633bd25a6d155118fa5340260bc5 (diff) |
ARM: OMAP: OMAP310 Serial
This makes serial usable also on omap310, not only 1510.
(changing 1510->15xx)
Signed-off-by: Marek Vašut <marek.vasut@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r-- | arch/arm/mach-omap1/serial.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c index 4cc98a578e4b..10a4fe88b2fd 100644 --- a/arch/arm/mach-omap1/serial.c +++ b/arch/arm/mach-omap1/serial.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * linux/arch/arm/mach-omap1/serial.c | 2 | * linux/arch/arm/mach-omap1/serial.c |
3 | * | 3 | * |
4 | * OMAP1 CPU identification code | 4 | * OMAP1 serial support. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License version 2 as | 7 | * it under the terms of the GNU General Public License version 2 as |
@@ -59,7 +59,7 @@ static void __init omap_serial_reset(struct plat_serial8250_port *p) | |||
59 | omap_serial_outp(p, UART_OMAP_SCR, 0x08); /* TX watermark */ | 59 | omap_serial_outp(p, UART_OMAP_SCR, 0x08); /* TX watermark */ |
60 | omap_serial_outp(p, UART_OMAP_MDR1, 0x00); /* enable UART */ | 60 | omap_serial_outp(p, UART_OMAP_MDR1, 0x00); /* enable UART */ |
61 | 61 | ||
62 | if (!cpu_is_omap1510()) { | 62 | if (!cpu_is_omap15xx()) { |
63 | omap_serial_outp(p, UART_OMAP_SYSC, 0x01); | 63 | omap_serial_outp(p, UART_OMAP_SYSC, 0x01); |
64 | while (!(omap_serial_in(p, UART_OMAP_SYSC) & 0x01)); | 64 | while (!(omap_serial_in(p, UART_OMAP_SYSC) & 0x01)); |
65 | } | 65 | } |
@@ -121,7 +121,7 @@ void __init omap_serial_init(void) | |||
121 | serial_platform_data[1].irq = INT_730_UART_MODEM_IRDA_2; | 121 | serial_platform_data[1].irq = INT_730_UART_MODEM_IRDA_2; |
122 | } | 122 | } |
123 | 123 | ||
124 | if (cpu_is_omap1510()) { | 124 | if (cpu_is_omap15xx()) { |
125 | serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16; | 125 | serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16; |
126 | serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16; | 126 | serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16; |
127 | serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16; | 127 | serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16; |
@@ -147,10 +147,10 @@ void __init omap_serial_init(void) | |||
147 | printk("Could not get uart1_ck\n"); | 147 | printk("Could not get uart1_ck\n"); |
148 | else { | 148 | else { |
149 | clk_enable(uart1_ck); | 149 | clk_enable(uart1_ck); |
150 | if (cpu_is_omap1510()) | 150 | if (cpu_is_omap15xx()) |
151 | clk_set_rate(uart1_ck, 12000000); | 151 | clk_set_rate(uart1_ck, 12000000); |
152 | } | 152 | } |
153 | if (cpu_is_omap1510()) { | 153 | if (cpu_is_omap15xx()) { |
154 | omap_cfg_reg(UART1_TX); | 154 | omap_cfg_reg(UART1_TX); |
155 | omap_cfg_reg(UART1_RTS); | 155 | omap_cfg_reg(UART1_RTS); |
156 | if (machine_is_omap_innovator()) { | 156 | if (machine_is_omap_innovator()) { |
@@ -167,12 +167,12 @@ void __init omap_serial_init(void) | |||
167 | printk("Could not get uart2_ck\n"); | 167 | printk("Could not get uart2_ck\n"); |
168 | else { | 168 | else { |
169 | clk_enable(uart2_ck); | 169 | clk_enable(uart2_ck); |
170 | if (cpu_is_omap1510()) | 170 | if (cpu_is_omap15xx()) |
171 | clk_set_rate(uart2_ck, 12000000); | 171 | clk_set_rate(uart2_ck, 12000000); |
172 | else | 172 | else |
173 | clk_set_rate(uart2_ck, 48000000); | 173 | clk_set_rate(uart2_ck, 48000000); |
174 | } | 174 | } |
175 | if (cpu_is_omap1510()) { | 175 | if (cpu_is_omap15xx()) { |
176 | omap_cfg_reg(UART2_TX); | 176 | omap_cfg_reg(UART2_TX); |
177 | omap_cfg_reg(UART2_RTS); | 177 | omap_cfg_reg(UART2_RTS); |
178 | if (machine_is_omap_innovator()) { | 178 | if (machine_is_omap_innovator()) { |
@@ -189,10 +189,10 @@ void __init omap_serial_init(void) | |||
189 | printk("Could not get uart3_ck\n"); | 189 | printk("Could not get uart3_ck\n"); |
190 | else { | 190 | else { |
191 | clk_enable(uart3_ck); | 191 | clk_enable(uart3_ck); |
192 | if (cpu_is_omap1510()) | 192 | if (cpu_is_omap15xx()) |
193 | clk_set_rate(uart3_ck, 12000000); | 193 | clk_set_rate(uart3_ck, 12000000); |
194 | } | 194 | } |
195 | if (cpu_is_omap1510()) { | 195 | if (cpu_is_omap15xx()) { |
196 | omap_cfg_reg(UART3_TX); | 196 | omap_cfg_reg(UART3_TX); |
197 | omap_cfg_reg(UART3_RX); | 197 | omap_cfg_reg(UART3_RX); |
198 | } | 198 | } |