diff options
author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-08-08 11:42:52 -0400 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-08-08 16:54:06 -0400 |
commit | 65bccb5c708bd9f00d24f041f4f7c45130359448 (patch) | |
tree | e300366449060608476d98f65772a2cb4f91b168 | |
parent | 2fedbff948cf5bc1e9977b7bc885aae45bd32f74 (diff) |
drm/i915: fixup desired rps frequency computation
In commit
commit 20b46e59dd102665ce7168baa215e5b1ee66b69b
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Thu Jul 26 11:16:14 2012 +0200
drm/i915: Only set the down rps limit when at the loweset frequency
The computation for the new desired frequency was extracted, but since
the desired frequency was passed-by value, the adjustments didn't
propgate back. Fix this.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index d0ce894ba6e6..5050bb8026c0 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c | |||
@@ -2272,13 +2272,13 @@ static void ironlake_disable_drps(struct drm_device *dev) | |||
2272 | * ourselves, instead of doing a rmw cycle (which might result in us clearing | 2272 | * ourselves, instead of doing a rmw cycle (which might result in us clearing |
2273 | * all limits and the gpu stuck at whatever frequency it is at atm). | 2273 | * all limits and the gpu stuck at whatever frequency it is at atm). |
2274 | */ | 2274 | */ |
2275 | static u32 gen6_rps_limits(struct drm_i915_private *dev_priv, u8 val) | 2275 | static u32 gen6_rps_limits(struct drm_i915_private *dev_priv, u8 *val) |
2276 | { | 2276 | { |
2277 | u32 limits; | 2277 | u32 limits; |
2278 | 2278 | ||
2279 | limits = 0; | 2279 | limits = 0; |
2280 | if (val >= dev_priv->max_delay) | 2280 | if (*val >= dev_priv->max_delay) |
2281 | val = dev_priv->max_delay; | 2281 | *val = dev_priv->max_delay; |
2282 | limits |= dev_priv->max_delay << 24; | 2282 | limits |= dev_priv->max_delay << 24; |
2283 | 2283 | ||
2284 | /* Only set the down limit when we've reached the lowest level to avoid | 2284 | /* Only set the down limit when we've reached the lowest level to avoid |
@@ -2287,8 +2287,8 @@ static u32 gen6_rps_limits(struct drm_i915_private *dev_priv, u8 val) | |||
2287 | * the hw runs at the minimal clock before selecting the desired | 2287 | * the hw runs at the minimal clock before selecting the desired |
2288 | * frequency, if the down threshold expires in that window we will not | 2288 | * frequency, if the down threshold expires in that window we will not |
2289 | * receive a down interrupt. */ | 2289 | * receive a down interrupt. */ |
2290 | if (val <= dev_priv->min_delay) { | 2290 | if (*val <= dev_priv->min_delay) { |
2291 | val = dev_priv->min_delay; | 2291 | *val = dev_priv->min_delay; |
2292 | limits |= dev_priv->min_delay << 16; | 2292 | limits |= dev_priv->min_delay << 16; |
2293 | } | 2293 | } |
2294 | 2294 | ||
@@ -2298,7 +2298,7 @@ static u32 gen6_rps_limits(struct drm_i915_private *dev_priv, u8 val) | |||
2298 | void gen6_set_rps(struct drm_device *dev, u8 val) | 2298 | void gen6_set_rps(struct drm_device *dev, u8 val) |
2299 | { | 2299 | { |
2300 | struct drm_i915_private *dev_priv = dev->dev_private; | 2300 | struct drm_i915_private *dev_priv = dev->dev_private; |
2301 | u32 limits = gen6_rps_limits(dev_priv, val); | 2301 | u32 limits = gen6_rps_limits(dev_priv, &val); |
2302 | 2302 | ||
2303 | if (val == dev_priv->cur_delay) | 2303 | if (val == dev_priv->cur_delay) |
2304 | return; | 2304 | return; |