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authorMarek Szyprowski <m.szyprowski@samsung.com>2012-03-28 01:55:56 -0400
committerMarek Szyprowski <m.szyprowski@samsung.com>2012-03-28 10:36:44 -0400
commit64d70fe5d3640e1a89790ed21120921278f8cb86 (patch)
treecc4983a830d8cfe0975ba4c606b84944f925eb70
parent8a4134322bd429d24f71147eb59a47a981e8f63a (diff)
common: DMA-mapping: add NON-CONSISTENT attribute
DMA_ATTR_NON_CONSISTENT lets the platform to choose to return either consistent or non-consistent memory as it sees fit. By using this API, you are guaranteeing to the platform that you have all the correct and necessary sync points for this memory in the driver. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
-rw-r--r--Documentation/DMA-attributes.txt8
-rw-r--r--include/linux/dma-attrs.h1
2 files changed, 9 insertions, 0 deletions
diff --git a/Documentation/DMA-attributes.txt b/Documentation/DMA-attributes.txt
index 811a5d458dae..5c72eed89563 100644
--- a/Documentation/DMA-attributes.txt
+++ b/Documentation/DMA-attributes.txt
@@ -41,3 +41,11 @@ buffered to improve performance.
41Since it is optional for platforms to implement DMA_ATTR_WRITE_COMBINE, 41Since it is optional for platforms to implement DMA_ATTR_WRITE_COMBINE,
42those that do not will simply ignore the attribute and exhibit default 42those that do not will simply ignore the attribute and exhibit default
43behavior. 43behavior.
44
45DMA_ATTR_NON_CONSISTENT
46-----------------------
47
48DMA_ATTR_NON_CONSISTENT lets the platform to choose to return either
49consistent or non-consistent memory as it sees fit. By using this API,
50you are guaranteeing to the platform that you have all the correct and
51necessary sync points for this memory in the driver.
diff --git a/include/linux/dma-attrs.h b/include/linux/dma-attrs.h
index ada61e1abf29..547ab568d3ae 100644
--- a/include/linux/dma-attrs.h
+++ b/include/linux/dma-attrs.h
@@ -14,6 +14,7 @@ enum dma_attr {
14 DMA_ATTR_WRITE_BARRIER, 14 DMA_ATTR_WRITE_BARRIER,
15 DMA_ATTR_WEAK_ORDERING, 15 DMA_ATTR_WEAK_ORDERING,
16 DMA_ATTR_WRITE_COMBINE, 16 DMA_ATTR_WRITE_COMBINE,
17 DMA_ATTR_NON_CONSISTENT,
17 DMA_ATTR_MAX, 18 DMA_ATTR_MAX,
18}; 19};
19 20