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authorFelipe Balbi <balbi@ti.com>2012-09-06 08:45:21 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2012-09-06 12:17:00 -0400
commit494574304711a333386e7dd5fd3ebbc3b7024994 (patch)
tree266c86da9f23c1a3ffe79ac6e7c40edee90bac0f
parentd8ee4ea68ff9c0f13646070aeada668a4eae9189 (diff)
serial: omap: drop DMA support
The current support is known to be broken and a later patch will come re-adding it using dma engine API. Tested-by: Shubhrajyoti D <shubhrajyoti@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--drivers/tty/serial/omap-serial.c330
1 files changed, 12 insertions, 318 deletions
diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c
index 5af5d228f7d6..dd3971fe899f 100644
--- a/drivers/tty/serial/omap-serial.c
+++ b/drivers/tty/serial/omap-serial.c
@@ -33,7 +33,6 @@
33#include <linux/tty.h> 33#include <linux/tty.h>
34#include <linux/tty_flip.h> 34#include <linux/tty_flip.h>
35#include <linux/io.h> 35#include <linux/io.h>
36#include <linux/dma-mapping.h>
37#include <linux/clk.h> 36#include <linux/clk.h>
38#include <linux/serial_core.h> 37#include <linux/serial_core.h>
39#include <linux/irq.h> 38#include <linux/irq.h>
@@ -41,7 +40,6 @@
41#include <linux/of.h> 40#include <linux/of.h>
42#include <linux/gpio.h> 41#include <linux/gpio.h>
43 42
44#include <plat/dma.h>
45#include <plat/dmtimer.h> 43#include <plat/dmtimer.h>
46#include <plat/omap-serial.h> 44#include <plat/omap-serial.h>
47 45
@@ -75,9 +73,6 @@
75static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS]; 73static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS];
76 74
77/* Forward declaration of functions */ 75/* Forward declaration of functions */
78static void uart_tx_dma_callback(int lch, u16 ch_status, void *data);
79static void serial_omap_rxdma_poll(unsigned long uart_no);
80static int serial_omap_start_rxdma(struct uart_omap_port *up);
81static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1); 76static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1);
82 77
83static struct workqueue_struct *serial_omap_uart_wq; 78static struct workqueue_struct *serial_omap_uart_wq;
@@ -161,19 +156,6 @@ serial_omap_get_divisor(struct uart_port *port, unsigned int baud)
161 return port->uartclk/(baud * divisor); 156 return port->uartclk/(baud * divisor);
162} 157}
163 158
164static void serial_omap_stop_rxdma(struct uart_omap_port *up)
165{
166 if (up->uart_dma.rx_dma_used) {
167 del_timer(&up->uart_dma.rx_timer);
168 omap_stop_dma(up->uart_dma.rx_dma_channel);
169 omap_free_dma(up->uart_dma.rx_dma_channel);
170 up->uart_dma.rx_dma_channel = OMAP_UART_DMA_CH_FREE;
171 up->uart_dma.rx_dma_used = false;
172 pm_runtime_mark_last_busy(up->dev);
173 pm_runtime_put_autosuspend(up->dev);
174 }
175}
176
177static void serial_omap_enable_ms(struct uart_port *port) 159static void serial_omap_enable_ms(struct uart_port *port)
178{ 160{
179 struct uart_omap_port *up = to_uart_omap_port(port); 161 struct uart_omap_port *up = to_uart_omap_port(port);
@@ -189,22 +171,6 @@ static void serial_omap_enable_ms(struct uart_port *port)
189static void serial_omap_stop_tx(struct uart_port *port) 171static void serial_omap_stop_tx(struct uart_port *port)
190{ 172{
191 struct uart_omap_port *up = to_uart_omap_port(port); 173 struct uart_omap_port *up = to_uart_omap_port(port);
192 struct omap_uart_port_info *pdata = up->dev->platform_data;
193
194 if (up->use_dma &&
195 up->uart_dma.tx_dma_channel != OMAP_UART_DMA_CH_FREE) {
196 /*
197 * Check if dma is still active. If yes do nothing,
198 * return. Else stop dma
199 */
200 if (omap_get_dma_active_status(up->uart_dma.tx_dma_channel))
201 return;
202 omap_stop_dma(up->uart_dma.tx_dma_channel);
203 omap_free_dma(up->uart_dma.tx_dma_channel);
204 up->uart_dma.tx_dma_channel = OMAP_UART_DMA_CH_FREE;
205 pm_runtime_mark_last_busy(up->dev);
206 pm_runtime_put_autosuspend(up->dev);
207 }
208 174
209 pm_runtime_get_sync(up->dev); 175 pm_runtime_get_sync(up->dev);
210 if (up->ier & UART_IER_THRI) { 176 if (up->ier & UART_IER_THRI) {
@@ -212,8 +178,7 @@ static void serial_omap_stop_tx(struct uart_port *port)
212 serial_out(up, UART_IER, up->ier); 178 serial_out(up, UART_IER, up->ier);
213 } 179 }
214 180
215 if (!up->use_dma && pdata) 181 serial_omap_set_forceidle(up);
216 serial_omap_set_forceidle(up);
217 182
218 pm_runtime_mark_last_busy(up->dev); 183 pm_runtime_mark_last_busy(up->dev);
219 pm_runtime_put_autosuspend(up->dev); 184 pm_runtime_put_autosuspend(up->dev);
@@ -224,8 +189,6 @@ static void serial_omap_stop_rx(struct uart_port *port)
224 struct uart_omap_port *up = to_uart_omap_port(port); 189 struct uart_omap_port *up = to_uart_omap_port(port);
225 190
226 pm_runtime_get_sync(up->dev); 191 pm_runtime_get_sync(up->dev);
227 if (up->use_dma)
228 serial_omap_stop_rxdma(up);
229 up->ier &= ~UART_IER_RLSI; 192 up->ier &= ~UART_IER_RLSI;
230 up->port.read_status_mask &= ~UART_LSR_DR; 193 up->port.read_status_mask &= ~UART_LSR_DR;
231 serial_out(up, UART_IER, up->ier); 194 serial_out(up, UART_IER, up->ier);
@@ -343,67 +306,12 @@ static inline void serial_omap_enable_ier_thri(struct uart_omap_port *up)
343static void serial_omap_start_tx(struct uart_port *port) 306static void serial_omap_start_tx(struct uart_port *port)
344{ 307{
345 struct uart_omap_port *up = to_uart_omap_port(port); 308 struct uart_omap_port *up = to_uart_omap_port(port);
346 struct circ_buf *xmit;
347 unsigned int start;
348 int ret = 0;
349
350 if (!up->use_dma) {
351 pm_runtime_get_sync(up->dev);
352 serial_omap_enable_ier_thri(up);
353 serial_omap_set_noidle(up);
354 pm_runtime_mark_last_busy(up->dev);
355 pm_runtime_put_autosuspend(up->dev);
356 return;
357 }
358
359 if (up->uart_dma.tx_dma_used)
360 return;
361
362 xmit = &up->port.state->xmit;
363
364 if (up->uart_dma.tx_dma_channel == OMAP_UART_DMA_CH_FREE) {
365 pm_runtime_get_sync(up->dev);
366 ret = omap_request_dma(up->uart_dma.uart_dma_tx,
367 "UART Tx DMA",
368 (void *)uart_tx_dma_callback, up,
369 &(up->uart_dma.tx_dma_channel));
370 309
371 if (ret < 0) { 310 pm_runtime_get_sync(up->dev);
372 serial_omap_enable_ier_thri(up); 311 serial_omap_enable_ier_thri(up);
373 return; 312 serial_omap_set_noidle(up);
374 } 313 pm_runtime_mark_last_busy(up->dev);
375 } 314 pm_runtime_put_autosuspend(up->dev);
376 spin_lock(&(up->uart_dma.tx_lock));
377 up->uart_dma.tx_dma_used = true;
378 spin_unlock(&(up->uart_dma.tx_lock));
379
380 start = up->uart_dma.tx_buf_dma_phys +
381 (xmit->tail & (UART_XMIT_SIZE - 1));
382
383 up->uart_dma.tx_buf_size = uart_circ_chars_pending(xmit);
384 /*
385 * It is a circular buffer. See if the buffer has wounded back.
386 * If yes it will have to be transferred in two separate dma
387 * transfers
388 */
389 if (start + up->uart_dma.tx_buf_size >=
390 up->uart_dma.tx_buf_dma_phys + UART_XMIT_SIZE)
391 up->uart_dma.tx_buf_size =
392 (up->uart_dma.tx_buf_dma_phys +
393 UART_XMIT_SIZE) - start;
394
395 omap_set_dma_dest_params(up->uart_dma.tx_dma_channel, 0,
396 OMAP_DMA_AMODE_CONSTANT,
397 up->uart_dma.uart_base, 0, 0);
398 omap_set_dma_src_params(up->uart_dma.tx_dma_channel, 0,
399 OMAP_DMA_AMODE_POST_INC, start, 0, 0);
400 omap_set_dma_transfer_params(up->uart_dma.tx_dma_channel,
401 OMAP_DMA_DATA_TYPE_S8,
402 up->uart_dma.tx_buf_size, 1,
403 OMAP_DMA_SYNC_ELEMENT,
404 up->uart_dma.uart_dma_tx, 0);
405 /* FIXME: Cache maintenance needed here? */
406 omap_start_dma(up->uart_dma.tx_dma_channel);
407} 315}
408 316
409static unsigned int check_modem_status(struct uart_omap_port *up) 317static unsigned int check_modem_status(struct uart_omap_port *up)
@@ -456,16 +364,8 @@ static inline irqreturn_t serial_omap_irq(int irq, void *dev_id)
456 spin_lock_irqsave(&up->port.lock, flags); 364 spin_lock_irqsave(&up->port.lock, flags);
457 lsr = serial_in(up, UART_LSR); 365 lsr = serial_in(up, UART_LSR);
458 if (iir & UART_IIR_RLSI) { 366 if (iir & UART_IIR_RLSI) {
459 if (!up->use_dma) { 367 if (lsr & UART_LSR_DR)
460 if (lsr & UART_LSR_DR) 368 receive_chars(up, &lsr);
461 receive_chars(up, &lsr);
462 } else {
463 up->ier &= ~(UART_IER_RDI | UART_IER_RLSI);
464 serial_out(up, UART_IER, up->ier);
465 if ((serial_omap_start_rxdma(up) != 0) &&
466 (lsr & UART_LSR_DR))
467 receive_chars(up, &lsr);
468 }
469 } 369 }
470 370
471 check_modem_status(up); 371 check_modem_status(up);
@@ -616,20 +516,6 @@ static int serial_omap_startup(struct uart_port *port)
616 spin_unlock_irqrestore(&up->port.lock, flags); 516 spin_unlock_irqrestore(&up->port.lock, flags);
617 517
618 up->msr_saved_flags = 0; 518 up->msr_saved_flags = 0;
619 if (up->use_dma) {
620 free_page((unsigned long)up->port.state->xmit.buf);
621 up->port.state->xmit.buf = dma_alloc_coherent(NULL,
622 UART_XMIT_SIZE,
623 (dma_addr_t *)&(up->uart_dma.tx_buf_dma_phys),
624 0);
625 init_timer(&(up->uart_dma.rx_timer));
626 up->uart_dma.rx_timer.function = serial_omap_rxdma_poll;
627 up->uart_dma.rx_timer.data = up->port.line;
628 /* Currently the buffer size is 4KB. Can increase it */
629 up->uart_dma.rx_buf = dma_alloc_coherent(NULL,
630 up->uart_dma.rx_buf_size,
631 (dma_addr_t *)&(up->uart_dma.rx_buf_dma_phys), 0);
632 }
633 /* 519 /*
634 * Finally, enable interrupts. Note: Modem status interrupts 520 * Finally, enable interrupts. Note: Modem status interrupts
635 * are set via set_termios(), which will be occurring imminently 521 * are set via set_termios(), which will be occurring imminently
@@ -677,17 +563,6 @@ static void serial_omap_shutdown(struct uart_port *port)
677 */ 563 */
678 if (serial_in(up, UART_LSR) & UART_LSR_DR) 564 if (serial_in(up, UART_LSR) & UART_LSR_DR)
679 (void) serial_in(up, UART_RX); 565 (void) serial_in(up, UART_RX);
680 if (up->use_dma) {
681 dma_free_coherent(up->port.dev,
682 UART_XMIT_SIZE, up->port.state->xmit.buf,
683 up->uart_dma.tx_buf_dma_phys);
684 up->port.state->xmit.buf = NULL;
685 serial_omap_stop_rx(port);
686 dma_free_coherent(up->port.dev,
687 up->uart_dma.rx_buf_size, up->uart_dma.rx_buf,
688 up->uart_dma.rx_buf_dma_phys);
689 up->uart_dma.rx_buf = NULL;
690 }
691 566
692 pm_runtime_put(up->dev); 567 pm_runtime_put(up->dev);
693 free_irq(up->port.irq, up); 568 free_irq(up->port.irq, up);
@@ -814,8 +689,6 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
814 689
815 up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 | 690 up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 |
816 UART_FCR_ENABLE_FIFO; 691 UART_FCR_ENABLE_FIFO;
817 if (up->use_dma)
818 up->fcr |= UART_FCR_DMA_SELECT;
819 692
820 /* 693 /*
821 * Ok, we're now changing the port state. Do it with 694 * Ok, we're now changing the port state. Do it with
@@ -891,14 +764,9 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
891 764
892 up->scr |= OMAP_UART_SCR_RX_TRIG_GRANU1_MASK; 765 up->scr |= OMAP_UART_SCR_RX_TRIG_GRANU1_MASK;
893 766
894 if (up->use_dma) { 767 /* Set receive FIFO threshold to 1 byte */
895 serial_out(up, UART_TI752_TLR, 0); 768 up->fcr &= ~OMAP_UART_FCR_RX_FIFO_TRIG_MASK;
896 up->scr |= UART_FCR_TRIGGER_4; 769 up->fcr |= (0x1 << OMAP_UART_FCR_RX_FIFO_TRIG_SHIFT);
897 } else {
898 /* Set receive FIFO threshold to 1 byte */
899 up->fcr &= ~OMAP_UART_FCR_RX_FIFO_TRIG_MASK;
900 up->fcr |= (0x1 << OMAP_UART_FCR_RX_FIFO_TRIG_SHIFT);
901 }
902 770
903 serial_out(up, UART_FCR, up->fcr); 771 serial_out(up, UART_FCR, up->fcr);
904 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 772 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
@@ -1267,149 +1135,6 @@ static int serial_omap_resume(struct device *dev)
1267} 1135}
1268#endif 1136#endif
1269 1137
1270static void serial_omap_rxdma_poll(unsigned long uart_no)
1271{
1272 struct uart_omap_port *up = ui[uart_no];
1273 unsigned int curr_dma_pos, curr_transmitted_size;
1274 int ret = 0;
1275
1276 curr_dma_pos = omap_get_dma_dst_pos(up->uart_dma.rx_dma_channel);
1277 if ((curr_dma_pos == up->uart_dma.prev_rx_dma_pos) ||
1278 (curr_dma_pos == 0)) {
1279 if (jiffies_to_msecs(jiffies - up->port_activity) <
1280 up->uart_dma.rx_timeout) {
1281 mod_timer(&up->uart_dma.rx_timer, jiffies +
1282 usecs_to_jiffies(up->uart_dma.rx_poll_rate));
1283 } else {
1284 serial_omap_stop_rxdma(up);
1285 up->ier |= (UART_IER_RDI | UART_IER_RLSI);
1286 serial_out(up, UART_IER, up->ier);
1287 }
1288 return;
1289 }
1290
1291 curr_transmitted_size = curr_dma_pos -
1292 up->uart_dma.prev_rx_dma_pos;
1293 up->port.icount.rx += curr_transmitted_size;
1294 tty_insert_flip_string(up->port.state->port.tty,
1295 up->uart_dma.rx_buf +
1296 (up->uart_dma.prev_rx_dma_pos -
1297 up->uart_dma.rx_buf_dma_phys),
1298 curr_transmitted_size);
1299 tty_flip_buffer_push(up->port.state->port.tty);
1300 up->uart_dma.prev_rx_dma_pos = curr_dma_pos;
1301 if (up->uart_dma.rx_buf_size +
1302 up->uart_dma.rx_buf_dma_phys == curr_dma_pos) {
1303 ret = serial_omap_start_rxdma(up);
1304 if (ret < 0) {
1305 serial_omap_stop_rxdma(up);
1306 up->ier |= (UART_IER_RDI | UART_IER_RLSI);
1307 serial_out(up, UART_IER, up->ier);
1308 }
1309 } else {
1310 mod_timer(&up->uart_dma.rx_timer, jiffies +
1311 usecs_to_jiffies(up->uart_dma.rx_poll_rate));
1312 }
1313 up->port_activity = jiffies;
1314}
1315
1316static void uart_rx_dma_callback(int lch, u16 ch_status, void *data)
1317{
1318 return;
1319}
1320
1321static int serial_omap_start_rxdma(struct uart_omap_port *up)
1322{
1323 int ret = 0;
1324
1325 if (up->uart_dma.rx_dma_channel == -1) {
1326 pm_runtime_get_sync(up->dev);
1327 ret = omap_request_dma(up->uart_dma.uart_dma_rx,
1328 "UART Rx DMA",
1329 (void *)uart_rx_dma_callback, up,
1330 &(up->uart_dma.rx_dma_channel));
1331 if (ret < 0)
1332 return ret;
1333
1334 omap_set_dma_src_params(up->uart_dma.rx_dma_channel, 0,
1335 OMAP_DMA_AMODE_CONSTANT,
1336 up->uart_dma.uart_base, 0, 0);
1337 omap_set_dma_dest_params(up->uart_dma.rx_dma_channel, 0,
1338 OMAP_DMA_AMODE_POST_INC,
1339 up->uart_dma.rx_buf_dma_phys, 0, 0);
1340 omap_set_dma_transfer_params(up->uart_dma.rx_dma_channel,
1341 OMAP_DMA_DATA_TYPE_S8,
1342 up->uart_dma.rx_buf_size, 1,
1343 OMAP_DMA_SYNC_ELEMENT,
1344 up->uart_dma.uart_dma_rx, 0);
1345 }
1346 up->uart_dma.prev_rx_dma_pos = up->uart_dma.rx_buf_dma_phys;
1347 /* FIXME: Cache maintenance needed here? */
1348 omap_start_dma(up->uart_dma.rx_dma_channel);
1349 mod_timer(&up->uart_dma.rx_timer, jiffies +
1350 usecs_to_jiffies(up->uart_dma.rx_poll_rate));
1351 up->uart_dma.rx_dma_used = true;
1352 return ret;
1353}
1354
1355static void serial_omap_continue_tx(struct uart_omap_port *up)
1356{
1357 struct circ_buf *xmit = &up->port.state->xmit;
1358 unsigned int start = up->uart_dma.tx_buf_dma_phys
1359 + (xmit->tail & (UART_XMIT_SIZE - 1));
1360
1361 if (uart_circ_empty(xmit))
1362 return;
1363
1364 up->uart_dma.tx_buf_size = uart_circ_chars_pending(xmit);
1365 /*
1366 * It is a circular buffer. See if the buffer has wounded back.
1367 * If yes it will have to be transferred in two separate dma
1368 * transfers
1369 */
1370 if (start + up->uart_dma.tx_buf_size >=
1371 up->uart_dma.tx_buf_dma_phys + UART_XMIT_SIZE)
1372 up->uart_dma.tx_buf_size =
1373 (up->uart_dma.tx_buf_dma_phys + UART_XMIT_SIZE) - start;
1374 omap_set_dma_dest_params(up->uart_dma.tx_dma_channel, 0,
1375 OMAP_DMA_AMODE_CONSTANT,
1376 up->uart_dma.uart_base, 0, 0);
1377 omap_set_dma_src_params(up->uart_dma.tx_dma_channel, 0,
1378 OMAP_DMA_AMODE_POST_INC, start, 0, 0);
1379 omap_set_dma_transfer_params(up->uart_dma.tx_dma_channel,
1380 OMAP_DMA_DATA_TYPE_S8,
1381 up->uart_dma.tx_buf_size, 1,
1382 OMAP_DMA_SYNC_ELEMENT,
1383 up->uart_dma.uart_dma_tx, 0);
1384 /* FIXME: Cache maintenance needed here? */
1385 omap_start_dma(up->uart_dma.tx_dma_channel);
1386}
1387
1388static void uart_tx_dma_callback(int lch, u16 ch_status, void *data)
1389{
1390 struct uart_omap_port *up = data;
1391 struct circ_buf *xmit = &up->port.state->xmit;
1392
1393 xmit->tail = (xmit->tail + up->uart_dma.tx_buf_size) & \
1394 (UART_XMIT_SIZE - 1);
1395 up->port.icount.tx += up->uart_dma.tx_buf_size;
1396
1397 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1398 uart_write_wakeup(&up->port);
1399
1400 if (uart_circ_empty(xmit)) {
1401 spin_lock(&(up->uart_dma.tx_lock));
1402 serial_omap_stop_tx(&up->port);
1403 up->uart_dma.tx_dma_used = false;
1404 spin_unlock(&(up->uart_dma.tx_lock));
1405 } else {
1406 omap_stop_dma(up->uart_dma.tx_dma_channel);
1407 serial_omap_continue_tx(up);
1408 }
1409 up->port_activity = jiffies;
1410 return;
1411}
1412
1413static void omap_serial_fill_features_erratas(struct uart_omap_port *up) 1138static void omap_serial_fill_features_erratas(struct uart_omap_port *up)
1414{ 1139{
1415 u32 mvr, scheme; 1140 u32 mvr, scheme;
@@ -1479,7 +1204,7 @@ static struct omap_uart_port_info *of_get_uart_port_info(struct device *dev)
1479static int serial_omap_probe(struct platform_device *pdev) 1204static int serial_omap_probe(struct platform_device *pdev)
1480{ 1205{
1481 struct uart_omap_port *up; 1206 struct uart_omap_port *up;
1482 struct resource *mem, *irq, *dma_tx, *dma_rx; 1207 struct resource *mem, *irq;
1483 struct omap_uart_port_info *omap_up_info = pdev->dev.platform_data; 1208 struct omap_uart_port_info *omap_up_info = pdev->dev.platform_data;
1484 int ret; 1209 int ret;
1485 1210
@@ -1504,14 +1229,6 @@ static int serial_omap_probe(struct platform_device *pdev)
1504 return -EBUSY; 1229 return -EBUSY;
1505 } 1230 }
1506 1231
1507 dma_rx = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx");
1508 if (!dma_rx)
1509 return -ENXIO;
1510
1511 dma_tx = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx");
1512 if (!dma_tx)
1513 return -ENXIO;
1514
1515 if (gpio_is_valid(omap_up_info->DTR_gpio) && 1232 if (gpio_is_valid(omap_up_info->DTR_gpio) &&
1516 omap_up_info->DTR_present) { 1233 omap_up_info->DTR_present) {
1517 ret = gpio_request(omap_up_info->DTR_gpio, "omap-serial"); 1234 ret = gpio_request(omap_up_info->DTR_gpio, "omap-serial");
@@ -1574,20 +1291,6 @@ static int serial_omap_probe(struct platform_device *pdev)
1574 dev_warn(&pdev->dev, "No clock speed specified: using default:" 1291 dev_warn(&pdev->dev, "No clock speed specified: using default:"
1575 "%d\n", DEFAULT_CLK_SPEED); 1292 "%d\n", DEFAULT_CLK_SPEED);
1576 } 1293 }
1577 up->uart_dma.uart_base = mem->start;
1578
1579 if (omap_up_info->dma_enabled) {
1580 up->uart_dma.uart_dma_tx = dma_tx->start;
1581 up->uart_dma.uart_dma_rx = dma_rx->start;
1582 up->use_dma = 1;
1583 up->uart_dma.rx_buf_size = omap_up_info->dma_rx_buf_size;
1584 up->uart_dma.rx_timeout = omap_up_info->dma_rx_timeout;
1585 up->uart_dma.rx_poll_rate = omap_up_info->dma_rx_poll_rate;
1586 spin_lock_init(&(up->uart_dma.tx_lock));
1587 spin_lock_init(&(up->uart_dma.rx_lock));
1588 up->uart_dma.tx_dma_channel = OMAP_UART_DMA_CH_FREE;
1589 up->uart_dma.rx_dma_channel = OMAP_UART_DMA_CH_FREE;
1590 }
1591 1294
1592 up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; 1295 up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE;
1593 up->calc_latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; 1296 up->calc_latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE;
@@ -1730,10 +1433,6 @@ static int serial_omap_runtime_suspend(struct device *dev)
1730 } 1433 }
1731 } 1434 }
1732 1435
1733 /* Errata i291 */
1734 if (up->use_dma && (up->errata & UART_ERRATA_i291_DMA_FORCEIDLE))
1735 serial_omap_set_forceidle(up);
1736
1737 up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; 1436 up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE;
1738 schedule_work(&up->qos_work); 1437 schedule_work(&up->qos_work);
1739 1438
@@ -1751,11 +1450,6 @@ static int serial_omap_runtime_resume(struct device *dev)
1751 if (up->context_loss_cnt != loss_cnt) 1450 if (up->context_loss_cnt != loss_cnt)
1752 serial_omap_restore_context(up); 1451 serial_omap_restore_context(up);
1753 1452
1754 /* Errata i291 */
1755 if ((up->errata & UART_ERRATA_i291_DMA_FORCEIDLE) &&
1756 up->use_dma)
1757 serial_omap_set_noidle(up);
1758
1759 up->latency = up->calc_latency; 1453 up->latency = up->calc_latency;
1760 schedule_work(&up->qos_work); 1454 schedule_work(&up->qos_work);
1761 } 1455 }