powerpc: Drop support for pre-POWER4 cpus

We inadvertently broke power3 support back in 3.4 with commit f5339277eb8d "powerpc: Remove FW_FEATURE ISERIES from arch code". No one noticed until at least 3.9. By then we'd also broken it with the optimised memcpy, copy_to/from_user and clear_user routines. We don't want to add any more complexity to those just to support ancient cpus, so it seems like it's a good time to drop support for power3 and earlier. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
author: Michael Ellerman <mpe@ellerman.id.au> 2014-07-09 22:29:18 -0400
committer: Benjamin Herrenschmidt <benh@kernel.crashing.org> 2014-07-28 00:09:23 -0400
commit: 468a33028edd62549ad3c4dcbc23dd0311c67832 (patch)
tree: f6686bc46059eee8a9974bd84ce813fcb760ad7a
parent: 2061f7beaac8e67e69e6479c9ebf42f89f152aaf (diff)
2 files changed, 6 insertions, 102 deletions
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
index 0fdd7eece6d9..4b132cf48a4f 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -400,11 +400,6 @@ extern const char *powerpc_base_platform;
 #define CPU_FTRS_GENERIC_32     (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN)
 /* 64-bit CPUs */
-#define CPU_FTRS_POWER3 (CPU_FTR_USE_TB | \
-            CPU_FTR_IABR | CPU_FTR_PPC_LE)
-#define CPU_FTRS_RS64   (CPU_FTR_USE_TB | \
-            CPU_FTR_IABR | \
-            CPU_FTR_MMCRA | CPU_FTR_CTRL)
 #define CPU_FTRS_POWER4 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
            CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
            CPU_FTR_MMCRA | CPU_FTR_CP_USE_DCBTZ | \
@@ -467,10 +462,9 @@ extern const char *powerpc_base_platform;
 #define CPU_FTRS_POSSIBLE       (CPU_FTRS_E6500 | CPU_FTRS_E5500 | CPU_FTRS_A2)
 #else
 #define CPU_FTRS_POSSIBLE       \
-            (CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 |        \
+            (CPU_FTRS_POWER4 | CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | \
-            CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_POWER6 |       \
+             CPU_FTRS_POWER6 | CPU_FTRS_POWER7 | CPU_FTRS_POWER8E | \
-            CPU_FTRS_POWER7 | CPU_FTRS_POWER8E | CPU_FTRS_POWER8 |      \
+             CPU_FTRS_POWER8 | CPU_FTRS_CELL | CPU_FTRS_PA6T | CPU_FTR_VSX)
-            CPU_FTRS_CELL | CPU_FTRS_PA6T | CPU_FTR_VSX)
 #endif
 #else
 enum {
@@ -518,9 +512,9 @@ enum {
 #define CPU_FTRS_ALWAYS         (CPU_FTRS_E6500 & CPU_FTRS_E5500 & CPU_FTRS_A2)
 #else
 #define CPU_FTRS_ALWAYS         \
-            (CPU_FTRS_POWER3 & CPU_FTRS_RS64 & CPU_FTRS_POWER4 &        \
+            (CPU_FTRS_POWER4 & CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & \
-            CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & CPU_FTRS_POWER6 &       \
+             CPU_FTRS_POWER6 & CPU_FTRS_POWER7 & CPU_FTRS_CELL & \
-            CPU_FTRS_POWER7 & CPU_FTRS_CELL & CPU_FTRS_PA6T & CPU_FTRS_POSSIBLE)
+             CPU_FTRS_PA6T & CPU_FTRS_POSSIBLE)
 #endif
 #else
 enum {
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 0c157642c2a1..4fb0bb2ac885 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -123,96 +123,6 @@ extern void __restore_cpu_e6500(void);
 static struct cpu_spec __initdata cpu_specs[] = {
 #ifdef CONFIG_PPC_BOOK3S_64
-        {       /* Power3 */
-                .pvr_mask               = 0xffff0000,
-                .pvr_value              = 0x00400000,
-                .cpu_name               = "POWER3 (630)",
-                .cpu_features           = CPU_FTRS_POWER3,
-                .cpu_user_features      = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
-                .mmu_features           = MMU_FTR_HPTE_TABLE,
-                .icache_bsize           = 128,
-                .dcache_bsize           = 128,
-                .num_pmcs               = 8,
-                .pmc_type               = PPC_PMC_IBM,
-                .oprofile_cpu_type      = "ppc64/power3",
-                .oprofile_type          = PPC_OPROFILE_RS64,
-                .platform               = "power3",
-        },
-        {       /* Power3+ */
-                .pvr_mask               = 0xffff0000,
-                .pvr_value              = 0x00410000,
-                .cpu_name               = "POWER3 (630+)",
-                .cpu_features           = CPU_FTRS_POWER3,
-                .cpu_user_features      = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
-                .mmu_features           = MMU_FTR_HPTE_TABLE,
-                .icache_bsize           = 128,
-                .dcache_bsize           = 128,
-                .num_pmcs               = 8,
-                .pmc_type               = PPC_PMC_IBM,
-                .oprofile_cpu_type      = "ppc64/power3",
-                .oprofile_type          = PPC_OPROFILE_RS64,
-                .platform               = "power3",
-        },
-        {       /* Northstar */
-                .pvr_mask               = 0xffff0000,
-                .pvr_value              = 0x00330000,
-                .cpu_name               = "RS64-II (northstar)",
-                .cpu_features           = CPU_FTRS_RS64,
-                .cpu_user_features      = COMMON_USER_PPC64,
-                .mmu_features           = MMU_FTR_HPTE_TABLE,
-                .icache_bsize           = 128,
-                .dcache_bsize           = 128,
-                .num_pmcs               = 8,
-                .pmc_type               = PPC_PMC_IBM,
-                .oprofile_cpu_type      = "ppc64/rs64",
-                .oprofile_type          = PPC_OPROFILE_RS64,
-                .platform               = "rs64",
-        },
-        {       /* Pulsar */
-                .pvr_mask               = 0xffff0000,
-                .pvr_value              = 0x00340000,
-                .cpu_name               = "RS64-III (pulsar)",
-                .cpu_features           = CPU_FTRS_RS64,
-                .cpu_user_features      = COMMON_USER_PPC64,
-                .mmu_features           = MMU_FTR_HPTE_TABLE,
-                .icache_bsize           = 128,
-                .dcache_bsize           = 128,
-                .num_pmcs               = 8,
-                .pmc_type               = PPC_PMC_IBM,
-                .oprofile_cpu_type      = "ppc64/rs64",
-                .oprofile_type          = PPC_OPROFILE_RS64,
-                .platform               = "rs64",
-        },
-        {       /* I-star */
-                .pvr_mask               = 0xffff0000,
-                .pvr_value              = 0x00360000,
-                .cpu_name               = "RS64-III (icestar)",
-                .cpu_features           = CPU_FTRS_RS64,
-                .cpu_user_features      = COMMON_USER_PPC64,
-                .mmu_features           = MMU_FTR_HPTE_TABLE,
-                .icache_bsize           = 128,
-                .dcache_bsize           = 128,
-                .num_pmcs               = 8,
-                .pmc_type               = PPC_PMC_IBM,
-                .oprofile_cpu_type      = "ppc64/rs64",
-                .oprofile_type          = PPC_OPROFILE_RS64,
-                .platform               = "rs64",
-        },
-        {       /* S-star */
-                .pvr_mask               = 0xffff0000,
-                .pvr_value              = 0x00370000,
-                .cpu_name               = "RS64-IV (sstar)",
-                .cpu_features           = CPU_FTRS_RS64,
-                .cpu_user_features      = COMMON_USER_PPC64,
-                .mmu_features           = MMU_FTR_HPTE_TABLE,
-                .icache_bsize           = 128,
-                .dcache_bsize           = 128,
-                .num_pmcs               = 8,
-                .pmc_type               = PPC_PMC_IBM,
-                .oprofile_cpu_type      = "ppc64/rs64",
-                .oprofile_type          = PPC_OPROFILE_RS64,
-                .platform               = "rs64",
-        },
        {       /* Power4 */
                .pvr_mask               = 0xffff0000,
                .pvr_value              = 0x00350000,
author	Michael Ellerman <mpe@ellerman.id.au>	2014-07-09 22:29:18 -0400
committer	Benjamin Herrenschmidt <benh@kernel.crashing.org>	2014-07-28 00:09:23 -0400
commit	468a33028edd62549ad3c4dcbc23dd0311c67832 (patch)
tree	f6686bc46059eee8a9974bd84ce813fcb760ad7a
parent	2061f7beaac8e67e69e6479c9ebf42f89f152aaf (diff)

diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h index 0fdd7eece6d9..4b132cf48a4f 100644 --- a/arch/powerpc/include/asm/cputable.h +++ b/arch/powerpc/include/asm/cputable.h
@@ -400,11 +400,6 @@ extern const char *powerpc_base_platform;
400	#define CPU_FTRS_GENERIC_32 (CPU_FTR_COMMON \| CPU_FTR_NODSISRALIGN)	400	#define CPU_FTRS_GENERIC_32 (CPU_FTR_COMMON \| CPU_FTR_NODSISRALIGN)
401		401
402	/* 64-bit CPUs */	402	/* 64-bit CPUs */
403	#define CPU_FTRS_POWER3 (CPU_FTR_USE_TB \| \
404	CPU_FTR_IABR \| CPU_FTR_PPC_LE)
405	#define CPU_FTRS_RS64 (CPU_FTR_USE_TB \| \
406	CPU_FTR_IABR \| \
407	CPU_FTR_MMCRA \| CPU_FTR_CTRL)
408	#define CPU_FTRS_POWER4 (CPU_FTR_USE_TB \| CPU_FTR_LWSYNC \| \	403	#define CPU_FTRS_POWER4 (CPU_FTR_USE_TB \| CPU_FTR_LWSYNC \| \
409	CPU_FTR_PPCAS_ARCH_V2 \| CPU_FTR_CTRL \| \	404	CPU_FTR_PPCAS_ARCH_V2 \| CPU_FTR_CTRL \| \
410	CPU_FTR_MMCRA \| CPU_FTR_CP_USE_DCBTZ \| \	405	CPU_FTR_MMCRA \| CPU_FTR_CP_USE_DCBTZ \| \
@@ -467,10 +462,9 @@ extern const char *powerpc_base_platform;
467	#define CPU_FTRS_POSSIBLE (CPU_FTRS_E6500 \| CPU_FTRS_E5500 \| CPU_FTRS_A2)	462	#define CPU_FTRS_POSSIBLE (CPU_FTRS_E6500 \| CPU_FTRS_E5500 \| CPU_FTRS_A2)
468	#else	463	#else
469	#define CPU_FTRS_POSSIBLE \	464	#define CPU_FTRS_POSSIBLE \
470	(CPU_FTRS_POWER3 \| CPU_FTRS_RS64 \| CPU_FTRS_POWER4 \| \	465	(CPU_FTRS_POWER4 \| CPU_FTRS_PPC970 \| CPU_FTRS_POWER5 \| \
471	CPU_FTRS_PPC970 \| CPU_FTRS_POWER5 \| CPU_FTRS_POWER6 \| \	466	CPU_FTRS_POWER6 \| CPU_FTRS_POWER7 \| CPU_FTRS_POWER8E \| \
472	CPU_FTRS_POWER7 \| CPU_FTRS_POWER8E \| CPU_FTRS_POWER8 \| \	467	CPU_FTRS_POWER8 \| CPU_FTRS_CELL \| CPU_FTRS_PA6T \| CPU_FTR_VSX)
473	CPU_FTRS_CELL \| CPU_FTRS_PA6T \| CPU_FTR_VSX)
474	#endif	468	#endif
475	#else	469	#else
476	enum {	470	enum {
@@ -518,9 +512,9 @@ enum {
518	#define CPU_FTRS_ALWAYS (CPU_FTRS_E6500 & CPU_FTRS_E5500 & CPU_FTRS_A2)	512	#define CPU_FTRS_ALWAYS (CPU_FTRS_E6500 & CPU_FTRS_E5500 & CPU_FTRS_A2)
519	#else	513	#else
520	#define CPU_FTRS_ALWAYS \	514	#define CPU_FTRS_ALWAYS \
521	(CPU_FTRS_POWER3 & CPU_FTRS_RS64 & CPU_FTRS_POWER4 & \	515	(CPU_FTRS_POWER4 & CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & \
522	CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & CPU_FTRS_POWER6 & \	516	CPU_FTRS_POWER6 & CPU_FTRS_POWER7 & CPU_FTRS_CELL & \
523	CPU_FTRS_POWER7 & CPU_FTRS_CELL & CPU_FTRS_PA6T & CPU_FTRS_POSSIBLE)	517	CPU_FTRS_PA6T & CPU_FTRS_POSSIBLE)
524	#endif	518	#endif
525	#else	519	#else
526	enum {	520	enum {


diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c index 0c157642c2a1..4fb0bb2ac885 100644 --- a/arch/powerpc/kernel/cputable.c +++ b/arch/powerpc/kernel/cputable.c
@@ -123,96 +123,6 @@ extern void __restore_cpu_e6500(void);
123		123
124	static struct cpu_spec __initdata cpu_specs[] = {	124	static struct cpu_spec __initdata cpu_specs[] = {
125	#ifdef CONFIG_PPC_BOOK3S_64	125	#ifdef CONFIG_PPC_BOOK3S_64
126	{ /* Power3 */
127	.pvr_mask = 0xffff0000,
128	.pvr_value = 0x00400000,
129	.cpu_name = "POWER3 (630)",
130	.cpu_features = CPU_FTRS_POWER3,
131	.cpu_user_features = COMMON_USER_PPC64\|PPC_FEATURE_PPC_LE,
132	.mmu_features = MMU_FTR_HPTE_TABLE,
133	.icache_bsize = 128,
134	.dcache_bsize = 128,
135	.num_pmcs = 8,
136	.pmc_type = PPC_PMC_IBM,
137	.oprofile_cpu_type = "ppc64/power3",
138	.oprofile_type = PPC_OPROFILE_RS64,
139	.platform = "power3",
140	},
141	{ /* Power3+ */
142	.pvr_mask = 0xffff0000,
143	.pvr_value = 0x00410000,
144	.cpu_name = "POWER3 (630+)",
145	.cpu_features = CPU_FTRS_POWER3,
146	.cpu_user_features = COMMON_USER_PPC64\|PPC_FEATURE_PPC_LE,
147	.mmu_features = MMU_FTR_HPTE_TABLE,
148	.icache_bsize = 128,
149	.dcache_bsize = 128,
150	.num_pmcs = 8,
151	.pmc_type = PPC_PMC_IBM,
152	.oprofile_cpu_type = "ppc64/power3",
153	.oprofile_type = PPC_OPROFILE_RS64,
154	.platform = "power3",
155	},
156	{ /* Northstar */
157	.pvr_mask = 0xffff0000,
158	.pvr_value = 0x00330000,
159	.cpu_name = "RS64-II (northstar)",
160	.cpu_features = CPU_FTRS_RS64,
161	.cpu_user_features = COMMON_USER_PPC64,
162	.mmu_features = MMU_FTR_HPTE_TABLE,
163	.icache_bsize = 128,
164	.dcache_bsize = 128,
165	.num_pmcs = 8,
166	.pmc_type = PPC_PMC_IBM,
167	.oprofile_cpu_type = "ppc64/rs64",
168	.oprofile_type = PPC_OPROFILE_RS64,
169	.platform = "rs64",
170	},
171	{ /* Pulsar */
172	.pvr_mask = 0xffff0000,
173	.pvr_value = 0x00340000,
174	.cpu_name = "RS64-III (pulsar)",
175	.cpu_features = CPU_FTRS_RS64,
176	.cpu_user_features = COMMON_USER_PPC64,
177	.mmu_features = MMU_FTR_HPTE_TABLE,
178	.icache_bsize = 128,
179	.dcache_bsize = 128,
180	.num_pmcs = 8,
181	.pmc_type = PPC_PMC_IBM,
182	.oprofile_cpu_type = "ppc64/rs64",
183	.oprofile_type = PPC_OPROFILE_RS64,
184	.platform = "rs64",
185	},
186	{ /* I-star */
187	.pvr_mask = 0xffff0000,
188	.pvr_value = 0x00360000,
189	.cpu_name = "RS64-III (icestar)",
190	.cpu_features = CPU_FTRS_RS64,
191	.cpu_user_features = COMMON_USER_PPC64,
192	.mmu_features = MMU_FTR_HPTE_TABLE,
193	.icache_bsize = 128,
194	.dcache_bsize = 128,
195	.num_pmcs = 8,
196	.pmc_type = PPC_PMC_IBM,
197	.oprofile_cpu_type = "ppc64/rs64",
198	.oprofile_type = PPC_OPROFILE_RS64,
199	.platform = "rs64",
200	},
201	{ /* S-star */
202	.pvr_mask = 0xffff0000,
203	.pvr_value = 0x00370000,
204	.cpu_name = "RS64-IV (sstar)",
205	.cpu_features = CPU_FTRS_RS64,
206	.cpu_user_features = COMMON_USER_PPC64,
207	.mmu_features = MMU_FTR_HPTE_TABLE,
208	.icache_bsize = 128,
209	.dcache_bsize = 128,
210	.num_pmcs = 8,
211	.pmc_type = PPC_PMC_IBM,
212	.oprofile_cpu_type = "ppc64/rs64",
213	.oprofile_type = PPC_OPROFILE_RS64,
214	.platform = "rs64",
215	},
216	{ /* Power4 */	126	{ /* Power4 */
217	.pvr_mask = 0xffff0000,	127	.pvr_mask = 0xffff0000,
218	.pvr_value = 0x00350000,	128	.pvr_value = 0x00350000,