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authorLinus Torvalds <torvalds@g5.osdl.org>2005-11-29 16:04:07 -0500
committerLinus Torvalds <torvalds@g5.osdl.org>2005-11-29 16:04:07 -0500
commit4168f7a31801bba6acc18662978d24ec850bbbd0 (patch)
tree7949f782d118bb72024de37d2cc7bb06cc74e045
parent238f9b063dcc9f23493a0d3fecca29fe332d4905 (diff)
parent2b9175c174b83b8d97db9398efe948fa9092938f (diff)
Merge master.kernel.org:/pub/scm/linux/kernel/git/tglx/mtd-2.6
-rw-r--r--drivers/mtd/chips/cfi_cmdset_0001.c10
-rw-r--r--drivers/mtd/chips/cfi_probe.c8
-rw-r--r--drivers/mtd/chips/sharp.c123
-rw-r--r--drivers/mtd/devices/block2mtd.c6
-rw-r--r--drivers/mtd/devices/ms02-nv.c6
-rw-r--r--drivers/mtd/ftl.c6
-rw-r--r--drivers/mtd/maps/Kconfig6
-rw-r--r--drivers/mtd/maps/Makefile1
-rw-r--r--drivers/mtd/maps/ixp4xx.c78
-rw-r--r--drivers/mtd/maps/nettel.c4
-rw-r--r--drivers/mtd/maps/pci.c4
-rw-r--r--drivers/mtd/maps/physmap.c3
-rw-r--r--drivers/mtd/maps/sc520cdp.c4
-rw-r--r--drivers/mtd/nand/nandsim.c2
-rw-r--r--drivers/mtd/rfd_ftl.c6
-rw-r--r--fs/jffs2/fs.c2
-rw-r--r--fs/jffs2/super.c2
-rw-r--r--include/linux/mtd/cfi.h18
18 files changed, 180 insertions, 109 deletions
diff --git a/drivers/mtd/chips/cfi_cmdset_0001.c b/drivers/mtd/chips/cfi_cmdset_0001.c
index 143f01a4c170..69c04945591f 100644
--- a/drivers/mtd/chips/cfi_cmdset_0001.c
+++ b/drivers/mtd/chips/cfi_cmdset_0001.c
@@ -4,7 +4,7 @@
4 * 4 *
5 * (C) 2000 Red Hat. GPL'd 5 * (C) 2000 Red Hat. GPL'd
6 * 6 *
7 * $Id: cfi_cmdset_0001.c,v 1.185 2005/11/07 11:14:22 gleixner Exp $ 7 * $Id: cfi_cmdset_0001.c,v 1.186 2005/11/23 22:07:52 nico Exp $
8 * 8 *
9 * 9 *
10 * 10/10/2000 Nicolas Pitre <nico@cam.org> 10 * 10/10/2000 Nicolas Pitre <nico@cam.org>
@@ -644,9 +644,8 @@ static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr
644 * 644 *
645 * - contension arbitration is handled in the owner's context. 645 * - contension arbitration is handled in the owner's context.
646 * 646 *
647 * The 'shared' struct can be read when its lock is taken. 647 * The 'shared' struct can be read and/or written only when
648 * However any writes to it can only be made when the current 648 * its lock is taken.
649 * owner's lock is also held.
650 */ 649 */
651 struct flchip_shared *shared = chip->priv; 650 struct flchip_shared *shared = chip->priv;
652 struct flchip *contender; 651 struct flchip *contender;
@@ -675,14 +674,13 @@ static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr
675 } 674 }
676 timeo = jiffies + HZ; 675 timeo = jiffies + HZ;
677 spin_lock(&shared->lock); 676 spin_lock(&shared->lock);
677 spin_unlock(contender->mutex);
678 } 678 }
679 679
680 /* We now own it */ 680 /* We now own it */
681 shared->writing = chip; 681 shared->writing = chip;
682 if (mode == FL_ERASING) 682 if (mode == FL_ERASING)
683 shared->erasing = chip; 683 shared->erasing = chip;
684 if (contender && contender != chip)
685 spin_unlock(contender->mutex);
686 spin_unlock(&shared->lock); 684 spin_unlock(&shared->lock);
687 } 685 }
688 686
diff --git a/drivers/mtd/chips/cfi_probe.c b/drivers/mtd/chips/cfi_probe.c
index 90eb30e06b7c..e636aa86bc24 100644
--- a/drivers/mtd/chips/cfi_probe.c
+++ b/drivers/mtd/chips/cfi_probe.c
@@ -1,7 +1,7 @@
1/* 1/*
2 Common Flash Interface probe code. 2 Common Flash Interface probe code.
3 (C) 2000 Red Hat. GPL'd. 3 (C) 2000 Red Hat. GPL'd.
4 $Id: cfi_probe.c,v 1.84 2005/11/07 11:14:23 gleixner Exp $ 4 $Id: cfi_probe.c,v 1.86 2005/11/29 14:48:31 gleixner Exp $
5*/ 5*/
6 6
7#include <linux/config.h> 7#include <linux/config.h>
@@ -230,8 +230,8 @@ static int __xipram cfi_chip_setup(struct map_info *map,
230 cfi_send_gen_cmd(0xaa, 0x555, base, map, cfi, cfi->device_type, NULL); 230 cfi_send_gen_cmd(0xaa, 0x555, base, map, cfi, cfi->device_type, NULL);
231 cfi_send_gen_cmd(0x55, 0x2aa, base, map, cfi, cfi->device_type, NULL); 231 cfi_send_gen_cmd(0x55, 0x2aa, base, map, cfi, cfi->device_type, NULL);
232 cfi_send_gen_cmd(0x90, 0x555, base, map, cfi, cfi->device_type, NULL); 232 cfi_send_gen_cmd(0x90, 0x555, base, map, cfi, cfi->device_type, NULL);
233 cfi->mfr = cfi_read_query(map, base); 233 cfi->mfr = cfi_read_query16(map, base);
234 cfi->id = cfi_read_query(map, base + ofs_factor); 234 cfi->id = cfi_read_query16(map, base + ofs_factor);
235 235
236 /* Put it back into Read Mode */ 236 /* Put it back into Read Mode */
237 cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL); 237 cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL);
@@ -426,7 +426,7 @@ static struct mtd_chip_driver cfi_chipdrv = {
426 .module = THIS_MODULE 426 .module = THIS_MODULE
427}; 427};
428 428
429int __init cfi_probe_init(void) 429static int __init cfi_probe_init(void)
430{ 430{
431 register_mtd_chip_driver(&cfi_chipdrv); 431 register_mtd_chip_driver(&cfi_chipdrv);
432 return 0; 432 return 0;
diff --git a/drivers/mtd/chips/sharp.c b/drivers/mtd/chips/sharp.c
index 2d26bdef82d5..36f61a6a766e 100644
--- a/drivers/mtd/chips/sharp.c
+++ b/drivers/mtd/chips/sharp.c
@@ -4,7 +4,7 @@
4 * Copyright 2000,2001 David A. Schleef <ds@schleef.org> 4 * Copyright 2000,2001 David A. Schleef <ds@schleef.org>
5 * 2000,2001 Lineo, Inc. 5 * 2000,2001 Lineo, Inc.
6 * 6 *
7 * $Id: sharp.c,v 1.16 2005/11/07 11:14:23 gleixner Exp $ 7 * $Id: sharp.c,v 1.17 2005/11/29 14:28:28 gleixner Exp $
8 * 8 *
9 * Devices supported: 9 * Devices supported:
10 * LH28F016SCT Symmetrical block flash memory, 2Mx8 10 * LH28F016SCT Symmetrical block flash memory, 2Mx8
@@ -160,22 +160,28 @@ struct mtd_info *sharp_probe(struct map_info *map)
160 return mtd; 160 return mtd;
161} 161}
162 162
163static inline void sharp_send_cmd(struct map_info *map, unsigned long cmd, unsigned long adr)
164{
165 map_word map_cmd;
166 map_cmd.x[0] = cmd;
167 map_write(map, map_cmd, adr);
168}
169
163static int sharp_probe_map(struct map_info *map,struct mtd_info *mtd) 170static int sharp_probe_map(struct map_info *map,struct mtd_info *mtd)
164{ 171{
165 unsigned long tmp; 172 map_word tmp, read0, read4;
166 unsigned long base = 0; 173 unsigned long base = 0;
167 u32 read0, read4;
168 int width = 4; 174 int width = 4;
169 175
170 tmp = map_read32(map, base+0); 176 tmp = map_read(map, base+0);
171 177
172 map_write32(map, CMD_READ_ID, base+0); 178 sharp_send_cmd(map, CMD_READ_ID, base+0);
173 179
174 read0=map_read32(map, base+0); 180 read0 = map_read(map, base+0);
175 read4=map_read32(map, base+4); 181 read4 = map_read(map, base+4);
176 if(read0 == 0x89898989){ 182 if(read0.x[0] == 0x89898989){
177 printk("Looks like sharp flash\n"); 183 printk("Looks like sharp flash\n");
178 switch(read4){ 184 switch(read4.x[0]){
179 case 0xaaaaaaaa: 185 case 0xaaaaaaaa:
180 case 0xa0a0a0a0: 186 case 0xa0a0a0a0:
181 /* aa - LH28F016SCT-L95 2Mx8, 32 64k blocks*/ 187 /* aa - LH28F016SCT-L95 2Mx8, 32 64k blocks*/
@@ -197,16 +203,16 @@ static int sharp_probe_map(struct map_info *map,struct mtd_info *mtd)
197 return width; 203 return width;
198#endif 204#endif
199 default: 205 default:
200 printk("Sort-of looks like sharp flash, 0x%08x 0x%08x\n", 206 printk("Sort-of looks like sharp flash, 0x%08lx 0x%08lx\n",
201 read0,read4); 207 read0.x[0], read4.x[0]);
202 } 208 }
203 }else if((map_read32(map, base+0) == CMD_READ_ID)){ 209 }else if((map_read(map, base+0).x[0] == CMD_READ_ID)){
204 /* RAM, probably */ 210 /* RAM, probably */
205 printk("Looks like RAM\n"); 211 printk("Looks like RAM\n");
206 map_write32(map, tmp, base+0); 212 map_write(map, tmp, base+0);
207 }else{ 213 }else{
208 printk("Doesn't look like sharp flash, 0x%08x 0x%08x\n", 214 printk("Doesn't look like sharp flash, 0x%08lx 0x%08lx\n",
209 read0,read4); 215 read0.x[0], read4.x[0]);
210 } 216 }
211 217
212 return 0; 218 return 0;
@@ -215,7 +221,8 @@ static int sharp_probe_map(struct map_info *map,struct mtd_info *mtd)
215/* This function returns with the chip->mutex lock held. */ 221/* This function returns with the chip->mutex lock held. */
216static int sharp_wait(struct map_info *map, struct flchip *chip) 222static int sharp_wait(struct map_info *map, struct flchip *chip)
217{ 223{
218 int status, i; 224 int i;
225 map_word status;
219 unsigned long timeo = jiffies + HZ; 226 unsigned long timeo = jiffies + HZ;
220 DECLARE_WAITQUEUE(wait, current); 227 DECLARE_WAITQUEUE(wait, current);
221 int adr = 0; 228 int adr = 0;
@@ -225,12 +232,12 @@ retry:
225 232
226 switch(chip->state){ 233 switch(chip->state){
227 case FL_READY: 234 case FL_READY:
228 map_write32(map,CMD_READ_STATUS,adr); 235 sharp_send_cmd(map, CMD_READ_STATUS, adr);
229 chip->state = FL_STATUS; 236 chip->state = FL_STATUS;
230 case FL_STATUS: 237 case FL_STATUS:
231 for(i=0;i<100;i++){ 238 for(i=0;i<100;i++){
232 status = map_read32(map,adr); 239 status = map_read(map, adr);
233 if((status & SR_READY)==SR_READY) 240 if((status.x[0] & SR_READY)==SR_READY)
234 break; 241 break;
235 udelay(1); 242 udelay(1);
236 } 243 }
@@ -254,7 +261,7 @@ retry:
254 goto retry; 261 goto retry;
255 } 262 }
256 263
257 map_write32(map,CMD_RESET, adr); 264 sharp_send_cmd(map, CMD_RESET, adr);
258 265
259 chip->state = FL_READY; 266 chip->state = FL_READY;
260 267
@@ -351,37 +358,39 @@ static int sharp_write_oneword(struct map_info *map, struct flchip *chip,
351 int timeo; 358 int timeo;
352 int try; 359 int try;
353 int i; 360 int i;
354 int status = 0; 361 map_word data, status;
355 362
363 status.x[0] = 0;
356 ret = sharp_wait(map,chip); 364 ret = sharp_wait(map,chip);
357 365
358 for(try=0;try<10;try++){ 366 for(try=0;try<10;try++){
359 map_write32(map,CMD_BYTE_WRITE,adr); 367 sharp_send_cmd(map, CMD_BYTE_WRITE, adr);
360 /* cpu_to_le32 -> hack to fix the writel be->le conversion */ 368 /* cpu_to_le32 -> hack to fix the writel be->le conversion */
361 map_write32(map,cpu_to_le32(datum),adr); 369 data.x[0] = cpu_to_le32(datum);
370 map_write(map, data, adr);
362 371
363 chip->state = FL_WRITING; 372 chip->state = FL_WRITING;
364 373
365 timeo = jiffies + (HZ/2); 374 timeo = jiffies + (HZ/2);
366 375
367 map_write32(map,CMD_READ_STATUS,adr); 376 sharp_send_cmd(map, CMD_READ_STATUS, adr);
368 for(i=0;i<100;i++){ 377 for(i=0;i<100;i++){
369 status = map_read32(map,adr); 378 status = map_read(map, adr);
370 if((status & SR_READY)==SR_READY) 379 if((status.x[0] & SR_READY) == SR_READY)
371 break; 380 break;
372 } 381 }
373 if(i==100){ 382 if(i==100){
374 printk("sharp: timed out writing\n"); 383 printk("sharp: timed out writing\n");
375 } 384 }
376 385
377 if(!(status&SR_ERRORS)) 386 if(!(status.x[0] & SR_ERRORS))
378 break; 387 break;
379 388
380 printk("sharp: error writing byte at addr=%08lx status=%08x\n",adr,status); 389 printk("sharp: error writing byte at addr=%08lx status=%08lx\n", adr, status.x[0]);
381 390
382 map_write32(map,CMD_CLEAR_STATUS,adr); 391 sharp_send_cmd(map, CMD_CLEAR_STATUS, adr);
383 } 392 }
384 map_write32(map,CMD_RESET,adr); 393 sharp_send_cmd(map, CMD_RESET, adr);
385 chip->state = FL_READY; 394 chip->state = FL_READY;
386 395
387 wake_up(&chip->wq); 396 wake_up(&chip->wq);
@@ -434,18 +443,18 @@ static int sharp_do_wait_for_ready(struct map_info *map, struct flchip *chip,
434{ 443{
435 int ret; 444 int ret;
436 unsigned long timeo; 445 unsigned long timeo;
437 int status; 446 map_word status;
438 DECLARE_WAITQUEUE(wait, current); 447 DECLARE_WAITQUEUE(wait, current);
439 448
440 map_write32(map,CMD_READ_STATUS,adr); 449 sharp_send_cmd(map, CMD_READ_STATUS, adr);
441 status = map_read32(map,adr); 450 status = map_read(map, adr);
442 451
443 timeo = jiffies + HZ; 452 timeo = jiffies + HZ;
444 453
445 while(time_before(jiffies, timeo)){ 454 while(time_before(jiffies, timeo)){
446 map_write32(map,CMD_READ_STATUS,adr); 455 sharp_send_cmd(map, CMD_READ_STATUS, adr);
447 status = map_read32(map,adr); 456 status = map_read(map, adr);
448 if((status & SR_READY)==SR_READY){ 457 if((status.x[0] & SR_READY)==SR_READY){
449 ret = 0; 458 ret = 0;
450 goto out; 459 goto out;
451 } 460 }
@@ -476,7 +485,7 @@ static int sharp_erase_oneblock(struct map_info *map, struct flchip *chip,
476{ 485{
477 int ret; 486 int ret;
478 //int timeo; 487 //int timeo;
479 int status; 488 map_word status;
480 //int i; 489 //int i;
481 490
482//printk("sharp_erase_oneblock()\n"); 491//printk("sharp_erase_oneblock()\n");
@@ -486,26 +495,26 @@ static int sharp_erase_oneblock(struct map_info *map, struct flchip *chip,
486 sharp_unlock_oneblock(map,chip,adr); 495 sharp_unlock_oneblock(map,chip,adr);
487#endif 496#endif
488 497
489 map_write32(map,CMD_BLOCK_ERASE_1,adr); 498 sharp_send_cmd(map, CMD_BLOCK_ERASE_1, adr);
490 map_write32(map,CMD_BLOCK_ERASE_2,adr); 499 sharp_send_cmd(map, CMD_BLOCK_ERASE_2, adr);
491 500
492 chip->state = FL_ERASING; 501 chip->state = FL_ERASING;
493 502
494 ret = sharp_do_wait_for_ready(map,chip,adr); 503 ret = sharp_do_wait_for_ready(map,chip,adr);
495 if(ret<0)return ret; 504 if(ret<0)return ret;
496 505
497 map_write32(map,CMD_READ_STATUS,adr); 506 sharp_send_cmd(map, CMD_READ_STATUS, adr);
498 status = map_read32(map,adr); 507 status = map_read(map, adr);
499 508
500 if(!(status&SR_ERRORS)){ 509 if(!(status.x[0] & SR_ERRORS)){
501 map_write32(map,CMD_RESET,adr); 510 sharp_send_cmd(map, CMD_RESET, adr);
502 chip->state = FL_READY; 511 chip->state = FL_READY;
503 //spin_unlock_bh(chip->mutex); 512 //spin_unlock_bh(chip->mutex);
504 return 0; 513 return 0;
505 } 514 }
506 515
507 printk("sharp: error erasing block at addr=%08lx status=%08x\n",adr,status); 516 printk("sharp: error erasing block at addr=%08lx status=%08lx\n", adr, status.x[0]);
508 map_write32(map,CMD_CLEAR_STATUS,adr); 517 sharp_send_cmd(map, CMD_CLEAR_STATUS, adr);
509 518
510 //spin_unlock_bh(chip->mutex); 519 //spin_unlock_bh(chip->mutex);
511 520
@@ -517,20 +526,20 @@ static void sharp_unlock_oneblock(struct map_info *map, struct flchip *chip,
517 unsigned long adr) 526 unsigned long adr)
518{ 527{
519 int i; 528 int i;
520 int status; 529 map_word status;
521 530
522 map_write32(map,CMD_CLEAR_BLOCK_LOCKS_1,adr); 531 sharp_send_cmd(map, CMD_CLEAR_BLOCK_LOCKS_1, adr);
523 map_write32(map,CMD_CLEAR_BLOCK_LOCKS_2,adr); 532 sharp_send_cmd(map, CMD_CLEAR_BLOCK_LOCKS_2, adr);
524 533
525 udelay(100); 534 udelay(100);
526 535
527 status = map_read32(map,adr); 536 status = map_read(map, adr);
528 printk("status=%08x\n",status); 537 printk("status=%08lx\n", status.x[0]);
529 538
530 for(i=0;i<1000;i++){ 539 for(i=0;i<1000;i++){
531 //map_write32(map,CMD_READ_STATUS,adr); 540 //sharp_send_cmd(map, CMD_READ_STATUS, adr);
532 status = map_read32(map,adr); 541 status = map_read(map, adr);
533 if((status & SR_READY)==SR_READY) 542 if((status.x[0] & SR_READY) == SR_READY)
534 break; 543 break;
535 udelay(100); 544 udelay(100);
536 } 545 }
@@ -538,14 +547,14 @@ static void sharp_unlock_oneblock(struct map_info *map, struct flchip *chip,
538 printk("sharp: timed out unlocking block\n"); 547 printk("sharp: timed out unlocking block\n");
539 } 548 }
540 549
541 if(!(status&SR_ERRORS)){ 550 if(!(status.x[0] & SR_ERRORS)){
542 map_write32(map,CMD_RESET,adr); 551 sharp_send_cmd(map, CMD_RESET, adr);
543 chip->state = FL_READY; 552 chip->state = FL_READY;
544 return; 553 return;
545 } 554 }
546 555
547 printk("sharp: error unlocking block at addr=%08lx status=%08x\n",adr,status); 556 printk("sharp: error unlocking block at addr=%08lx status=%08lx\n", adr, status.x[0]);
548 map_write32(map,CMD_CLEAR_STATUS,adr); 557 sharp_send_cmd(map, CMD_CLEAR_STATUS, adr);
549} 558}
550#endif 559#endif
551 560
diff --git a/drivers/mtd/devices/block2mtd.c b/drivers/mtd/devices/block2mtd.c
index 0aaa0ced9aba..7ff403b2a0a0 100644
--- a/drivers/mtd/devices/block2mtd.c
+++ b/drivers/mtd/devices/block2mtd.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * $Id: block2mtd.c,v 1.29 2005/11/07 11:14:24 gleixner Exp $ 2 * $Id: block2mtd.c,v 1.30 2005/11/29 14:48:32 gleixner Exp $
3 * 3 *
4 * block2mtd.c - create an mtd from a block device 4 * block2mtd.c - create an mtd from a block device
5 * 5 *
@@ -19,7 +19,7 @@
19#include <linux/mtd/mtd.h> 19#include <linux/mtd/mtd.h>
20#include <linux/buffer_head.h> 20#include <linux/buffer_head.h>
21 21
22#define VERSION "$Revision: 1.29 $" 22#define VERSION "$Revision: 1.30 $"
23 23
24 24
25#define ERROR(fmt, args...) printk(KERN_ERR "block2mtd: " fmt "\n" , ## args) 25#define ERROR(fmt, args...) printk(KERN_ERR "block2mtd: " fmt "\n" , ## args)
@@ -40,7 +40,7 @@ static LIST_HEAD(blkmtd_device_list);
40 40
41 41
42#define PAGE_READAHEAD 64 42#define PAGE_READAHEAD 64
43void cache_readahead(struct address_space *mapping, int index) 43static void cache_readahead(struct address_space *mapping, int index)
44{ 44{
45 filler_t *filler = (filler_t*)mapping->a_ops->readpage; 45 filler_t *filler = (filler_t*)mapping->a_ops->readpage;
46 int i, pagei; 46 int i, pagei;
diff --git a/drivers/mtd/devices/ms02-nv.c b/drivers/mtd/devices/ms02-nv.c
index f5026cee087f..0ff2e4378244 100644
--- a/drivers/mtd/devices/ms02-nv.c
+++ b/drivers/mtd/devices/ms02-nv.c
@@ -6,7 +6,7 @@
6 * as published by the Free Software Foundation; either version 6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version. 7 * 2 of the License, or (at your option) any later version.
8 * 8 *
9 * $Id: ms02-nv.c,v 1.10 2005/06/20 12:24:41 macro Exp $ 9 * $Id: ms02-nv.c,v 1.11 2005/11/14 13:41:47 macro Exp $
10 */ 10 */
11 11
12#include <linux/init.h> 12#include <linux/init.h>
@@ -293,13 +293,13 @@ static int __init ms02nv_init(void)
293 293
294 switch (mips_machtype) { 294 switch (mips_machtype) {
295 case MACH_DS5000_200: 295 case MACH_DS5000_200:
296 csr = (volatile u32 *)KN02_CSR_BASE; 296 csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR);
297 if (*csr & KN02_CSR_BNK32M) 297 if (*csr & KN02_CSR_BNK32M)
298 stride = 2; 298 stride = 2;
299 break; 299 break;
300 case MACH_DS5000_2X0: 300 case MACH_DS5000_2X0:
301 case MACH_DS5900: 301 case MACH_DS5900:
302 csr = (volatile u32 *)KN03_MCR_BASE; 302 csr = (volatile u32 *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_MCR);
303 if (*csr & KN03_MCR_BNK32M) 303 if (*csr & KN03_MCR_BNK32M)
304 stride = 2; 304 stride = 2;
305 break; 305 break;
diff --git a/drivers/mtd/ftl.c b/drivers/mtd/ftl.c
index de7e231d6d18..8a878b34eca0 100644
--- a/drivers/mtd/ftl.c
+++ b/drivers/mtd/ftl.c
@@ -1,5 +1,5 @@
1/* This version ported to the Linux-MTD system by dwmw2@infradead.org 1/* This version ported to the Linux-MTD system by dwmw2@infradead.org
2 * $Id: ftl.c,v 1.58 2005/11/07 11:14:19 gleixner Exp $ 2 * $Id: ftl.c,v 1.59 2005/11/29 14:48:31 gleixner Exp $
3 * 3 *
4 * Fixes: Arnaldo Carvalho de Melo <acme@conectiva.com.br> 4 * Fixes: Arnaldo Carvalho de Melo <acme@conectiva.com.br>
5 * - fixes some leaks on failure in build_maps and ftl_notify_add, cleanups 5 * - fixes some leaks on failure in build_maps and ftl_notify_add, cleanups
@@ -1084,9 +1084,9 @@ struct mtd_blktrans_ops ftl_tr = {
1084 .owner = THIS_MODULE, 1084 .owner = THIS_MODULE,
1085}; 1085};
1086 1086
1087int init_ftl(void) 1087static int init_ftl(void)
1088{ 1088{
1089 DEBUG(0, "$Id: ftl.c,v 1.58 2005/11/07 11:14:19 gleixner Exp $\n"); 1089 DEBUG(0, "$Id: ftl.c,v 1.59 2005/11/29 14:48:31 gleixner Exp $\n");
1090 1090
1091 return register_mtd_blktrans(&ftl_tr); 1091 return register_mtd_blktrans(&ftl_tr);
1092} 1092}
diff --git a/drivers/mtd/maps/Kconfig b/drivers/mtd/maps/Kconfig
index 846a533323a8..452ccd5037c3 100644
--- a/drivers/mtd/maps/Kconfig
+++ b/drivers/mtd/maps/Kconfig
@@ -538,12 +538,6 @@ config MTD_MPC1211
538 This enables access to the flash chips on the Interface MPC-1211(CTP/PCI/MPC-SH02). 538 This enables access to the flash chips on the Interface MPC-1211(CTP/PCI/MPC-SH02).
539 If you have such a board, say 'Y'. 539 If you have such a board, say 'Y'.
540 540
541config MTD_PQ2FADS
542 tristate "JEDEC flash SIMM mapped on PQ2FADS and 8272ADS boards"
543 depends on (ADS8272 || PQ2FADS) && MTD_PARTITIONS && MTD_JEDECPROBE && MTD_PHYSMAP && MTD_CFI_GEOMETRY && MTD_CFI_INTELEXT
544 help
545 This enables access to flash SIMM on PQ2FADS-like boards
546
547config MTD_OMAP_NOR 541config MTD_OMAP_NOR
548 tristate "TI OMAP board mappings" 542 tristate "TI OMAP board mappings"
549 depends on MTD_CFI && ARCH_OMAP 543 depends on MTD_CFI && ARCH_OMAP
diff --git a/drivers/mtd/maps/Makefile b/drivers/mtd/maps/Makefile
index 7d9e940a1dcd..2f7e254912f0 100644
--- a/drivers/mtd/maps/Makefile
+++ b/drivers/mtd/maps/Makefile
@@ -70,6 +70,5 @@ obj-$(CONFIG_MTD_DMV182) += dmv182.o
70obj-$(CONFIG_MTD_SHARP_SL) += sharpsl-flash.o 70obj-$(CONFIG_MTD_SHARP_SL) += sharpsl-flash.o
71obj-$(CONFIG_MTD_PLATRAM) += plat-ram.o 71obj-$(CONFIG_MTD_PLATRAM) += plat-ram.o
72obj-$(CONFIG_MTD_OMAP_NOR) += omap_nor.o 72obj-$(CONFIG_MTD_OMAP_NOR) += omap_nor.o
73obj-$(CONFIG_MTD_PQ2FADS) += pq2fads.o
74obj-$(CONFIG_MTD_MTX1) += mtx-1_flash.o 73obj-$(CONFIG_MTD_MTX1) += mtx-1_flash.o
75obj-$(CONFIG_MTD_TQM834x) += tqm834x.o 74obj-$(CONFIG_MTD_TQM834x) += tqm834x.o
diff --git a/drivers/mtd/maps/ixp4xx.c b/drivers/mtd/maps/ixp4xx.c
index a59f8027903c..986c58628390 100644
--- a/drivers/mtd/maps/ixp4xx.c
+++ b/drivers/mtd/maps/ixp4xx.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * $Id: ixp4xx.c,v 1.12 2005/11/07 11:14:27 gleixner Exp $ 2 * $Id: ixp4xx.c,v 1.13 2005/11/16 16:23:21 dvrabel Exp $
3 * 3 *
4 * drivers/mtd/maps/ixp4xx.c 4 * drivers/mtd/maps/ixp4xx.c
5 * 5 *
@@ -34,10 +34,55 @@
34 34
35#include <linux/reboot.h> 35#include <linux/reboot.h>
36 36
37/*
38 * Read/write a 16 bit word from flash address 'addr'.
39 *
40 * When the cpu is in little-endian mode it swizzles the address lines
41 * ('address coherency') so we need to undo the swizzling to ensure commands
42 * and the like end up on the correct flash address.
43 *
44 * To further complicate matters, due to the way the expansion bus controller
45 * handles 32 bit reads, the byte stream ABCD is stored on the flash as:
46 * D15 D0
47 * +---+---+
48 * | A | B | 0
49 * +---+---+
50 * | C | D | 2
51 * +---+---+
52 * This means that on LE systems each 16 bit word must be swapped. Note that
53 * this requires CONFIG_MTD_CFI_BE_BYTE_SWAP to be enabled to 'unswap' the CFI
54 * data and other flash commands which are always in D7-D0.
55 */
37#ifndef __ARMEB__ 56#ifndef __ARMEB__
57#ifndef CONFIG_MTD_CFI_BE_BYTE_SWAP
58# error CONFIG_MTD_CFI_BE_BYTE_SWAP required
59#endif
60
61static inline u16 flash_read16(void __iomem *addr)
62{
63 return be16_to_cpu(__raw_readw((void __iomem *)((unsigned long)addr ^ 0x2)));
64}
65
66static inline void flash_write16(u16 d, void __iomem *addr)
67{
68 __raw_writew(cpu_to_be16(d), (void __iomem *)((unsigned long)addr ^ 0x2));
69}
70
38#define BYTE0(h) ((h) & 0xFF) 71#define BYTE0(h) ((h) & 0xFF)
39#define BYTE1(h) (((h) >> 8) & 0xFF) 72#define BYTE1(h) (((h) >> 8) & 0xFF)
73
40#else 74#else
75
76static inline u16 flash_read16(const void __iomem *addr)
77{
78 return __raw_readw(addr);
79}
80
81static inline void flash_write16(u16 d, void __iomem *addr)
82{
83 __raw_writew(d, addr);
84}
85
41#define BYTE0(h) (((h) >> 8) & 0xFF) 86#define BYTE0(h) (((h) >> 8) & 0xFF)
42#define BYTE1(h) ((h) & 0xFF) 87#define BYTE1(h) ((h) & 0xFF)
43#endif 88#endif
@@ -45,7 +90,7 @@
45static map_word ixp4xx_read16(struct map_info *map, unsigned long ofs) 90static map_word ixp4xx_read16(struct map_info *map, unsigned long ofs)
46{ 91{
47 map_word val; 92 map_word val;
48 val.x[0] = le16_to_cpu(readw(map->virt + ofs)); 93 val.x[0] = flash_read16(map->virt + ofs);
49 return val; 94 return val;
50} 95}
51 96
@@ -57,19 +102,28 @@ static map_word ixp4xx_read16(struct map_info *map, unsigned long ofs)
57static void ixp4xx_copy_from(struct map_info *map, void *to, 102static void ixp4xx_copy_from(struct map_info *map, void *to,
58 unsigned long from, ssize_t len) 103 unsigned long from, ssize_t len)
59{ 104{
60 int i;
61 u8 *dest = (u8 *) to; 105 u8 *dest = (u8 *) to;
62 void __iomem *src = map->virt + from; 106 void __iomem *src = map->virt + from;
63 u16 data;
64 107
65 for (i = 0; i < (len / 2); i++) { 108 if (len <= 0)
66 data = le16_to_cpu(readw(src + 2*i)); 109 return;
67 dest[i * 2] = BYTE0(data); 110
68 dest[i * 2 + 1] = BYTE1(data); 111 if (from & 1) {
112 *dest++ = BYTE1(flash_read16(src));
113 src++;
114 --len;
69 } 115 }
70 116
71 if (len & 1) 117 while (len >= 2) {
72 dest[len - 1] = BYTE0(le16_to_cpu(readw(src + 2*i))); 118 u16 data = flash_read16(src);
119 *dest++ = BYTE0(data);
120 *dest++ = BYTE1(data);
121 src += 2;
122 len -= 2;
123 }
124
125 if (len > 0)
126 *dest++ = BYTE0(flash_read16(src));
73} 127}
74 128
75/* 129/*
@@ -79,7 +133,7 @@ static void ixp4xx_copy_from(struct map_info *map, void *to,
79static void ixp4xx_probe_write16(struct map_info *map, map_word d, unsigned long adr) 133static void ixp4xx_probe_write16(struct map_info *map, map_word d, unsigned long adr)
80{ 134{
81 if (!(adr & 1)) 135 if (!(adr & 1))
82 writew(cpu_to_le16(d.x[0]), map->virt + adr); 136 flash_write16(d.x[0], map->virt + adr);
83} 137}
84 138
85/* 139/*
@@ -87,7 +141,7 @@ static void ixp4xx_probe_write16(struct map_info *map, map_word d, unsigned long
87 */ 141 */
88static void ixp4xx_write16(struct map_info *map, map_word d, unsigned long adr) 142static void ixp4xx_write16(struct map_info *map, map_word d, unsigned long adr)
89{ 143{
90 writew(cpu_to_le16(d.x[0]), map->virt + adr); 144 flash_write16(d.x[0], map->virt + adr);
91} 145}
92 146
93struct ixp4xx_flash_info { 147struct ixp4xx_flash_info {
diff --git a/drivers/mtd/maps/nettel.c b/drivers/mtd/maps/nettel.c
index f00ee7e54dba..632eb2aa968f 100644
--- a/drivers/mtd/maps/nettel.c
+++ b/drivers/mtd/maps/nettel.c
@@ -6,7 +6,7 @@
6 * (C) Copyright 2000-2001, Greg Ungerer (gerg@snapgear.com) 6 * (C) Copyright 2000-2001, Greg Ungerer (gerg@snapgear.com)
7 * (C) Copyright 2001-2002, SnapGear (www.snapgear.com) 7 * (C) Copyright 2001-2002, SnapGear (www.snapgear.com)
8 * 8 *
9 * $Id: nettel.c,v 1.11 2005/11/07 11:14:27 gleixner Exp $ 9 * $Id: nettel.c,v 1.12 2005/11/29 14:30:00 gleixner Exp $
10 */ 10 */
11 11
12/****************************************************************************/ 12/****************************************************************************/
@@ -479,7 +479,7 @@ void __exit nettel_cleanup(void)
479 } 479 }
480 if (nettel_intel_map.virt) { 480 if (nettel_intel_map.virt) {
481 iounmap(nettel_intel_map.virt); 481 iounmap(nettel_intel_map.virt);
482 nettel_intel_map.virt = 0; 482 nettel_intel_map.virt = NULL;
483 } 483 }
484#endif 484#endif
485} 485}
diff --git a/drivers/mtd/maps/pci.c b/drivers/mtd/maps/pci.c
index 8b3570b09095..21822c2edbe4 100644
--- a/drivers/mtd/maps/pci.c
+++ b/drivers/mtd/maps/pci.c
@@ -7,7 +7,7 @@
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 * 9 *
10 * $Id: pci.c,v 1.13 2005/11/07 11:14:27 gleixner Exp $ 10 * $Id: pci.c,v 1.14 2005/11/17 08:20:27 dwmw2 Exp $
11 * 11 *
12 * Generic PCI memory map driver. We support the following boards: 12 * Generic PCI memory map driver. We support the following boards:
13 * - Intel IQ80310 ATU. 13 * - Intel IQ80310 ATU.
@@ -102,7 +102,7 @@ static void mtd_pci_copyto(struct map_info *_map, unsigned long to, const void *
102 memcpy_toio(map->base + map->translate(map, to), from, len); 102 memcpy_toio(map->base + map->translate(map, to), from, len);
103} 103}
104 104
105static struct map_info mtd_pci_map = { 105static const struct map_info mtd_pci_map = {
106 .phys = NO_XIP, 106 .phys = NO_XIP,
107 .copy_from = mtd_pci_copyfrom, 107 .copy_from = mtd_pci_copyfrom,
108 .copy_to = mtd_pci_copyto, 108 .copy_to = mtd_pci_copyto,
diff --git a/drivers/mtd/maps/physmap.c b/drivers/mtd/maps/physmap.c
index 9ee760f97bc6..f49ebc3c4606 100644
--- a/drivers/mtd/maps/physmap.c
+++ b/drivers/mtd/maps/physmap.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * $Id: physmap.c,v 1.38 2005/11/07 11:14:28 gleixner Exp $ 2 * $Id: physmap.c,v 1.39 2005/11/29 14:49:36 gleixner Exp $
3 * 3 *
4 * Normal mappings of chips in physical memory 4 * Normal mappings of chips in physical memory
5 * 5 *
@@ -19,6 +19,7 @@
19#include <linux/mtd/map.h> 19#include <linux/mtd/map.h>
20#include <linux/config.h> 20#include <linux/config.h>
21#include <linux/mtd/partitions.h> 21#include <linux/mtd/partitions.h>
22#include <linux/mtd/physmap.h>
22 23
23static struct mtd_info *mymtd; 24static struct mtd_info *mymtd;
24 25
diff --git a/drivers/mtd/maps/sc520cdp.c b/drivers/mtd/maps/sc520cdp.c
index 6fb9f3c57aab..ed92afadd8a9 100644
--- a/drivers/mtd/maps/sc520cdp.c
+++ b/drivers/mtd/maps/sc520cdp.c
@@ -16,7 +16,7 @@
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA 17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
18 * 18 *
19 * $Id: sc520cdp.c,v 1.22 2005/11/07 11:14:28 gleixner Exp $ 19 * $Id: sc520cdp.c,v 1.23 2005/11/17 08:20:27 dwmw2 Exp $
20 * 20 *
21 * 21 *
22 * The SC520CDP is an evaluation board for the Elan SC520 processor available 22 * The SC520CDP is an evaluation board for the Elan SC520 processor available
@@ -164,7 +164,7 @@ struct sc520_par_table
164 unsigned long default_address; 164 unsigned long default_address;
165}; 165};
166 166
167static struct sc520_par_table par_table[NUM_FLASH_BANKS] = 167static const struct sc520_par_table par_table[NUM_FLASH_BANKS] =
168{ 168{
169 { /* Flash Bank #0: selected by ROMCS0 */ 169 { /* Flash Bank #0: selected by ROMCS0 */
170 SC520_PAR_ROMCS0, 170 SC520_PAR_ROMCS0,
diff --git a/drivers/mtd/nand/nandsim.c b/drivers/mtd/nand/nandsim.c
index de4500395300..a0af92cc7efd 100644
--- a/drivers/mtd/nand/nandsim.c
+++ b/drivers/mtd/nand/nandsim.c
@@ -1486,7 +1486,7 @@ ns_nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
1486/* 1486/*
1487 * Module initialization function 1487 * Module initialization function
1488 */ 1488 */
1489int __init ns_init_module(void) 1489static int __init ns_init_module(void)
1490{ 1490{
1491 struct nand_chip *chip; 1491 struct nand_chip *chip;
1492 struct nandsim *nand; 1492 struct nandsim *nand;
diff --git a/drivers/mtd/rfd_ftl.c b/drivers/mtd/rfd_ftl.c
index 0ab8d29caeea..20ce212638fc 100644
--- a/drivers/mtd/rfd_ftl.c
+++ b/drivers/mtd/rfd_ftl.c
@@ -30,11 +30,9 @@ MODULE_PARM_DESC(block_size, "Block size to use by RFD, defaults to erase unit s
30 30
31#define PREFIX "rfd_ftl: " 31#define PREFIX "rfd_ftl: "
32 32
33/* Major device # for FTL device */ 33/* This major has been assigned by device@lanana.org */
34
35/* A request for this major has been sent to device@lanana.org */
36#ifndef RFD_FTL_MAJOR 34#ifndef RFD_FTL_MAJOR
37#define RFD_FTL_MAJOR 95 35#define RFD_FTL_MAJOR 256
38#endif 36#endif
39 37
40/* Maximum number of partitions in an FTL region */ 38/* Maximum number of partitions in an FTL region */
diff --git a/fs/jffs2/fs.c b/fs/jffs2/fs.c
index 543420665c5b..d0fcc5f3497e 100644
--- a/fs/jffs2/fs.c
+++ b/fs/jffs2/fs.c
@@ -234,6 +234,7 @@ void jffs2_read_inode (struct inode *inode)
234 c = JFFS2_SB_INFO(inode->i_sb); 234 c = JFFS2_SB_INFO(inode->i_sb);
235 235
236 jffs2_init_inode_info(f); 236 jffs2_init_inode_info(f);
237 down(&f->sem);
237 238
238 ret = jffs2_do_read_inode(c, f, inode->i_ino, &latest_node); 239 ret = jffs2_do_read_inode(c, f, inode->i_ino, &latest_node);
239 240
@@ -400,6 +401,7 @@ struct inode *jffs2_new_inode (struct inode *dir_i, int mode, struct jffs2_raw_i
400 401
401 f = JFFS2_INODE_INFO(inode); 402 f = JFFS2_INODE_INFO(inode);
402 jffs2_init_inode_info(f); 403 jffs2_init_inode_info(f);
404 down(&f->sem);
403 405
404 memset(ri, 0, sizeof(*ri)); 406 memset(ri, 0, sizeof(*ri));
405 /* Set OS-specific defaults for new inodes */ 407 /* Set OS-specific defaults for new inodes */
diff --git a/fs/jffs2/super.c b/fs/jffs2/super.c
index 9e0b5458d9c0..93883817cbd0 100644
--- a/fs/jffs2/super.c
+++ b/fs/jffs2/super.c
@@ -51,7 +51,7 @@ static void jffs2_i_init_once(void * foo, kmem_cache_t * cachep, unsigned long f
51 51
52 if ((flags & (SLAB_CTOR_VERIFY|SLAB_CTOR_CONSTRUCTOR)) == 52 if ((flags & (SLAB_CTOR_VERIFY|SLAB_CTOR_CONSTRUCTOR)) ==
53 SLAB_CTOR_CONSTRUCTOR) { 53 SLAB_CTOR_CONSTRUCTOR) {
54 init_MUTEX_LOCKED(&ei->sem); 54 init_MUTEX(&ei->sem);
55 inode_init_once(&ei->vfs_inode); 55 inode_init_once(&ei->vfs_inode);
56 } 56 }
57} 57}
diff --git a/include/linux/mtd/cfi.h b/include/linux/mtd/cfi.h
index 3c9ea4b7adda..23a568910341 100644
--- a/include/linux/mtd/cfi.h
+++ b/include/linux/mtd/cfi.h
@@ -1,7 +1,7 @@
1 1
2/* Common Flash Interface structures 2/* Common Flash Interface structures
3 * See http://support.intel.com/design/flash/technote/index.htm 3 * See http://support.intel.com/design/flash/technote/index.htm
4 * $Id: cfi.h,v 1.56 2005/11/07 11:14:54 gleixner Exp $ 4 * $Id: cfi.h,v 1.57 2005/11/15 23:28:17 tpoynor Exp $
5 */ 5 */
6 6
7#ifndef __MTD_CFI_H__ 7#ifndef __MTD_CFI_H__
@@ -426,6 +426,22 @@ static inline uint8_t cfi_read_query(struct map_info *map, uint32_t addr)
426 } 426 }
427} 427}
428 428
429static inline uint16_t cfi_read_query16(struct map_info *map, uint32_t addr)
430{
431 map_word val = map_read(map, addr);
432
433 if (map_bankwidth_is_1(map)) {
434 return val.x[0] & 0xff;
435 } else if (map_bankwidth_is_2(map)) {
436 return cfi16_to_cpu(val.x[0]);
437 } else {
438 /* No point in a 64-bit byteswap since that would just be
439 swapping the responses from different chips, and we are
440 only interested in one chip (a representative sample) */
441 return cfi32_to_cpu(val.x[0]);
442 }
443}
444
429static inline void cfi_udelay(int us) 445static inline void cfi_udelay(int us)
430{ 446{
431 if (us >= 1000) { 447 if (us >= 1000) {