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authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>2014-08-25 14:09:35 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2014-08-25 14:09:35 -0400
commit39bdc95871b57828b3bbefc0280a1a80a6b63d9e (patch)
treefb4cc664f4e07d1e49f60e743cc80096bc973182
parented7f92da59f24dd966555efef978fe14085b3318 (diff)
parentff9e7621586ff8b86a18cfbb7c437c277ebc1970 (diff)
Merge tag 'iio-for-3.18a' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into work-next
Jonathan writes: 1st round of new IIO drivers, functionality and cleanups for the 3.18 cycle. Maintainer Updates * Add 3 designated reviewers for IIO. Lars, Peter and Hartmut have been actively reviewing a lot of patches for a while now so this reflects the status quo. These three are probably the only reason I keep my head above the water! New drivers and device support * max5821 DAC * Rockchip SARADC * TI ADC128S052 ADC * BMC150 Accelerometer * exynos ADC driver gains support for s3c24xx and s3c64xx parts. * kxcjk-1013 gainst range control and runtime PM support to drive down it's power usage. Driver removals * Drop ad5930, ad99850, ad9852, ad9910 and ad9951 drivers on the simple basis that they drivers just provided a register write function with no compliant user space ABI whatsoever. Much better to drop them and start again for these in the fullness of time. Core Enhancements * Join together neighbouring elements in the demux units that feeds the binary interfaces. This cuts down on the number of individual copies needed when splitting out individual channels from the incoming channel scans. * Other demux related cleanups such as using roundup instead of a local implementation. Cleanups * Drop an unnecessary double setting of the owner field in xilinx adc. * Some more patches to use managed (devm) interfaces to cut down on complexity of removal code. * adis16060 coding style fixlets. * Fix some incorrect error returns in the Xilinx ADC driver. * Coding style fixlets for various accelerometer drivers. * Some sparse warning fixes to do with endianness and sign of variables. * Fix an incorrect and entirely pointless use of sizeof on a dynamic pointer in hid-sensor-magn-3d by dropping the relevant code.
Diffstat
-rw-r--r--Documentation/ABI/testing/sysfs-bus-iio-accel-bmc1507
-rw-r--r--Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt18
-rw-r--r--Documentation/devicetree/bindings/iio/dac/max5821.txt14
-rw-r--r--MAINTAINERS14
-rw-r--r--drivers/hid/hid-sensor-hub.c33
-rw-r--r--drivers/iio/accel/Kconfig13
-rw-r--r--drivers/iio/accel/Makefile1
-rw-r--r--drivers/iio/accel/bmc150-accel.c1307
-rw-r--r--drivers/iio/accel/kxcjk-1013.c294
-rw-r--r--drivers/iio/adc/Kconfig22
-rw-r--r--drivers/iio/adc/Makefile2
-rw-r--r--drivers/iio/adc/exynos_adc.c137
-rw-r--r--drivers/iio/adc/rockchip_saradc.c317
-rw-r--r--drivers/iio/adc/ti-adc128s052.c179
-rw-r--r--drivers/iio/adc/xilinx-xadc-core.c9
-rw-r--r--drivers/iio/dac/Kconfig8
-rw-r--r--drivers/iio/dac/Makefile1
-rw-r--r--drivers/iio/dac/max5821.c405
-rw-r--r--drivers/iio/industrialio-buffer.c63
-rw-r--r--drivers/iio/magnetometer/hid-sensor-magn-3d.c7
-rw-r--r--drivers/staging/iio/accel/adis16201_core.c5
-rw-r--r--drivers/staging/iio/accel/adis16203_core.c2
-rw-r--r--drivers/staging/iio/accel/adis16204_core.c1
-rw-r--r--drivers/staging/iio/accel/adis16209_core.c1
-rw-r--r--drivers/staging/iio/accel/adis16240_core.c1
-rw-r--r--drivers/staging/iio/accel/lis3l02dq_core.c4
-rw-r--r--drivers/staging/iio/accel/lis3l02dq_ring.c1
-rw-r--r--drivers/staging/iio/accel/sca3000_core.c4
-rw-r--r--drivers/staging/iio/frequency/Kconfig35
-rw-r--r--drivers/staging/iio/frequency/Makefile5
-rw-r--r--drivers/staging/iio/frequency/ad5930.c140
-rw-r--r--drivers/staging/iio/frequency/ad9850.c120
-rw-r--r--drivers/staging/iio/frequency/ad9852.c253
-rw-r--r--drivers/staging/iio/frequency/ad9910.c371
-rw-r--r--drivers/staging/iio/frequency/ad9951.c209
-rw-r--r--drivers/staging/iio/gyro/adis16060_core.c1
-rw-r--r--drivers/staging/iio/impedance-analyzer/ad5933.c10
-rw-r--r--drivers/staging/iio/light/isl29018.c2
-rw-r--r--drivers/staging/iio/magnetometer/hmc5843_core.c6
-rw-r--r--drivers/staging/iio/resolver/ad2s1210.c4
40 files changed, 2756 insertions, 1270 deletions
diff --git a/Documentation/ABI/testing/sysfs-bus-iio-accel-bmc150 b/Documentation/ABI/testing/sysfs-bus-iio-accel-bmc150
new file mode 100644
index 000000000000..99847a913af7
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-bus-iio-accel-bmc150
@@ -0,0 +1,7 @@
1What: /sys/bus/iio/devices/triggerX/name = "bmc150_accel-any-motion-devX"
2KernelVersion: 3.17
3Contact: linux-iio@vger.kernel.org
4Description:
5 The BMC150 accelerometer kernel module provides an additional trigger,
6 which sets driver in a mode, where data is pushed to the buffer
7 only when there is any motion.
diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
index adc61b095bd1..709efaa30841 100644
--- a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
+++ b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
@@ -11,13 +11,25 @@ New driver handles the following
11 11
12Required properties: 12Required properties:
13- compatible: Must be "samsung,exynos-adc-v1" 13- compatible: Must be "samsung,exynos-adc-v1"
14 for exynos4412/5250 controllers. 14 for exynos4412/5250 and s5pv210 controllers.
15 Must be "samsung,exynos-adc-v2" for 15 Must be "samsung,exynos-adc-v2" for
16 future controllers. 16 future controllers.
17 Must be "samsung,exynos3250-adc" for 17 Must be "samsung,exynos3250-adc" for
18 controllers compatible with ADC of Exynos3250. 18 controllers compatible with ADC of Exynos3250.
19- reg: Contains ADC register address range (base address and 19 Must be "samsung,s3c2410-adc" for
20 length) and the address of the phy enable register. 20 the ADC in s3c2410 and compatibles
21 Must be "samsung,s3c2416-adc" for
22 the ADC in s3c2416 and compatibles
23 Must be "samsung,s3c2440-adc" for
24 the ADC in s3c2440 and compatibles
25 Must be "samsung,s3c2443-adc" for
26 the ADC in s3c2443 and compatibles
27 Must be "samsung,s3c6410-adc" for
28 the ADC in s3c6410 and compatibles
29- reg: List of ADC register address range
30 - The base address and range of ADC register
31 - The base address and range of ADC_PHY register (every
32 SoC except for s3c24xx/s3c64xx ADC)
21- interrupts: Contains the interrupt information for the timer. The 33- interrupts: Contains the interrupt information for the timer. The
22 format is being dependent on which interrupt controller 34 format is being dependent on which interrupt controller
23 the Samsung device uses. 35 the Samsung device uses.
diff --git a/Documentation/devicetree/bindings/iio/dac/max5821.txt b/Documentation/devicetree/bindings/iio/dac/max5821.txt
new file mode 100644
index 000000000000..54276ce8c971
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/dac/max5821.txt
@@ -0,0 +1,14 @@
1Maxim max5821 DAC device driver
2
3Required properties:
4 - compatible: Must be "maxim,max5821"
5 - reg: Should contain the DAC I2C address
6 - vref-supply: Phandle to the vref power supply
7
8Example:
9
10 max5821@38 {
11 compatible = "maxim,max5821";
12 reg = <0x38>;
13 vref-supply = <&reg_max5821>;
14 };
diff --git a/MAINTAINERS b/MAINTAINERS
index aefa94841ff3..1c047098d887 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -685,6 +685,17 @@ L: alsa-devel@alsa-project.org (moderated for non-subscribers)
685W: http://blackfin.uclinux.org/ 685W: http://blackfin.uclinux.org/
686S: Supported 686S: Supported
687F: sound/soc/blackfin/* 687F: sound/soc/blackfin/*
688
689ANALOG DEVICES INC IIO DRIVERS
690M: Lars-Peter Clausen <lars@metafoo.de>
691M: Michael Hennerich <Michael.Hennerich@analog.com>
692W: http://wiki.analog.com/
693W: http://ez.analog.com/community/linux-device-drivers
694S: Supported
695F: drivers/iio/*/ad*
696X: drivers/iio/*/adjd*
697F: drivers/staging/iio/*/ad*
698F: staging/iio/trigger/iio-trig-bfin-timer.c
688 699
689AOA (Apple Onboard Audio) ALSA DRIVER 700AOA (Apple Onboard Audio) ALSA DRIVER
690M: Johannes Berg <johannes@sipsolutions.net> 701M: Johannes Berg <johannes@sipsolutions.net>
@@ -4580,6 +4591,9 @@ F: drivers/media/rc/iguanair.c
4580 4591
4581IIO SUBSYSTEM AND DRIVERS 4592IIO SUBSYSTEM AND DRIVERS
4582M: Jonathan Cameron <jic23@kernel.org> 4593M: Jonathan Cameron <jic23@kernel.org>
4594R: Hartmut Knaack <knaack.h@gmx.de>
4595R: Lars-Peter Clausen <lars@metafoo.de>
4596R: Peter Meerwald <pmeerw@pmeerw.net>
4583L: linux-iio@vger.kernel.org 4597L: linux-iio@vger.kernel.org
4584S: Maintained 4598S: Maintained
4585F: drivers/iio/ 4599F: drivers/iio/
diff --git a/drivers/hid/hid-sensor-hub.c b/drivers/hid/hid-sensor-hub.c
index e244e449cbba..2ac25760a9a9 100644
--- a/drivers/hid/hid-sensor-hub.c
+++ b/drivers/hid/hid-sensor-hub.c
@@ -604,9 +604,9 @@ static int sensor_hub_probe(struct hid_device *hdev,
604 ret = -EINVAL; 604 ret = -EINVAL;
605 goto err_stop_hw; 605 goto err_stop_hw;
606 } 606 }
607 sd->hid_sensor_hub_client_devs = kzalloc(dev_cnt * 607 sd->hid_sensor_hub_client_devs = devm_kzalloc(&hdev->dev, dev_cnt *
608 sizeof(struct mfd_cell), 608 sizeof(struct mfd_cell),
609 GFP_KERNEL); 609 GFP_KERNEL);
610 if (sd->hid_sensor_hub_client_devs == NULL) { 610 if (sd->hid_sensor_hub_client_devs == NULL) {
611 hid_err(hdev, "Failed to allocate memory for mfd cells\n"); 611 hid_err(hdev, "Failed to allocate memory for mfd cells\n");
612 ret = -ENOMEM; 612 ret = -ENOMEM;
@@ -618,11 +618,12 @@ static int sensor_hub_probe(struct hid_device *hdev,
618 618
619 if (collection->type == HID_COLLECTION_PHYSICAL) { 619 if (collection->type == HID_COLLECTION_PHYSICAL) {
620 620
621 hsdev = kzalloc(sizeof(*hsdev), GFP_KERNEL); 621 hsdev = devm_kzalloc(&hdev->dev, sizeof(*hsdev),
622 GFP_KERNEL);
622 if (!hsdev) { 623 if (!hsdev) {
623 hid_err(hdev, "cannot allocate hid_sensor_hub_device\n"); 624 hid_err(hdev, "cannot allocate hid_sensor_hub_device\n");
624 ret = -ENOMEM; 625 ret = -ENOMEM;
625 goto err_no_mem; 626 goto err_stop_hw;
626 } 627 }
627 hsdev->hdev = hdev; 628 hsdev->hdev = hdev;
628 hsdev->vendor_id = hdev->vendor; 629 hsdev->vendor_id = hdev->vendor;
@@ -631,13 +632,13 @@ static int sensor_hub_probe(struct hid_device *hdev,
631 if (last_hsdev) 632 if (last_hsdev)
632 last_hsdev->end_collection_index = i; 633 last_hsdev->end_collection_index = i;
633 last_hsdev = hsdev; 634 last_hsdev = hsdev;
634 name = kasprintf(GFP_KERNEL, "HID-SENSOR-%x", 635 name = devm_kasprintf(&hdev->dev, GFP_KERNEL,
635 collection->usage); 636 "HID-SENSOR-%x",
637 collection->usage);
636 if (name == NULL) { 638 if (name == NULL) {
637 hid_err(hdev, "Failed MFD device name\n"); 639 hid_err(hdev, "Failed MFD device name\n");
638 ret = -ENOMEM; 640 ret = -ENOMEM;
639 kfree(hsdev); 641 goto err_stop_hw;
640 goto err_no_mem;
641 } 642 }
642 sd->hid_sensor_hub_client_devs[ 643 sd->hid_sensor_hub_client_devs[
643 sd->hid_sensor_client_cnt].id = 644 sd->hid_sensor_client_cnt].id =
@@ -661,16 +662,10 @@ static int sensor_hub_probe(struct hid_device *hdev,
661 ret = mfd_add_devices(&hdev->dev, 0, sd->hid_sensor_hub_client_devs, 662 ret = mfd_add_devices(&hdev->dev, 0, sd->hid_sensor_hub_client_devs,
662 sd->hid_sensor_client_cnt, NULL, 0, NULL); 663 sd->hid_sensor_client_cnt, NULL, 0, NULL);
663 if (ret < 0) 664 if (ret < 0)
664 goto err_no_mem; 665 goto err_stop_hw;
665 666
666 return ret; 667 return ret;
667 668
668err_no_mem:
669 for (i = 0; i < sd->hid_sensor_client_cnt; ++i) {
670 kfree(sd->hid_sensor_hub_client_devs[i].name);
671 kfree(sd->hid_sensor_hub_client_devs[i].platform_data);
672 }
673 kfree(sd->hid_sensor_hub_client_devs);
674err_stop_hw: 669err_stop_hw:
675 hid_hw_stop(hdev); 670 hid_hw_stop(hdev);
676 671
@@ -681,7 +676,6 @@ static void sensor_hub_remove(struct hid_device *hdev)
681{ 676{
682 struct sensor_hub_data *data = hid_get_drvdata(hdev); 677 struct sensor_hub_data *data = hid_get_drvdata(hdev);
683 unsigned long flags; 678 unsigned long flags;
684 int i;
685 679
686 hid_dbg(hdev, " hardware removed\n"); 680 hid_dbg(hdev, " hardware removed\n");
687 hid_hw_close(hdev); 681 hid_hw_close(hdev);
@@ -691,11 +685,6 @@ static void sensor_hub_remove(struct hid_device *hdev)
691 complete(&data->pending.ready); 685 complete(&data->pending.ready);
692 spin_unlock_irqrestore(&data->lock, flags); 686 spin_unlock_irqrestore(&data->lock, flags);
693 mfd_remove_devices(&hdev->dev); 687 mfd_remove_devices(&hdev->dev);
694 for (i = 0; i < data->hid_sensor_client_cnt; ++i) {
695 kfree(data->hid_sensor_hub_client_devs[i].name);
696 kfree(data->hid_sensor_hub_client_devs[i].platform_data);
697 }
698 kfree(data->hid_sensor_hub_client_devs);
699 hid_set_drvdata(hdev, NULL); 688 hid_set_drvdata(hdev, NULL);
700 mutex_destroy(&data->mutex); 689 mutex_destroy(&data->mutex);
701} 690}
diff --git a/drivers/iio/accel/Kconfig b/drivers/iio/accel/Kconfig
index 12addf272a61..5704d6bc2267 100644
--- a/drivers/iio/accel/Kconfig
+++ b/drivers/iio/accel/Kconfig
@@ -17,6 +17,19 @@ config BMA180
17 To compile this driver as a module, choose M here: the 17 To compile this driver as a module, choose M here: the
18 module will be called bma180. 18 module will be called bma180.
19 19
20config BMC150_ACCEL
21 tristate "Bosch BMC150 Accelerometer Driver"
22 depends on I2C
23 select IIO_BUFFER
24 select IIO_TRIGGERED_BUFFER
25 help
26 Say yes here to build support for the Bosch BMC150 accelerometer.
27 Currently this only supports the device via an i2c interface.
28
29 This is a combo module with both accelerometer and magnetometer.
30 This driver is only implementing accelerometer part, which has
31 its own address and register map.
32
20config HID_SENSOR_ACCEL_3D 33config HID_SENSOR_ACCEL_3D
21 depends on HID_SENSOR_HUB 34 depends on HID_SENSOR_HUB
22 select IIO_BUFFER 35 select IIO_BUFFER
diff --git a/drivers/iio/accel/Makefile b/drivers/iio/accel/Makefile
index 6578ca1a8e09..a593996c6539 100644
--- a/drivers/iio/accel/Makefile
+++ b/drivers/iio/accel/Makefile
@@ -4,6 +4,7 @@
4 4
5# When adding new entries keep the list in alphabetical order 5# When adding new entries keep the list in alphabetical order
6obj-$(CONFIG_BMA180) += bma180.o 6obj-$(CONFIG_BMA180) += bma180.o
7obj-$(CONFIG_BMC150_ACCEL) += bmc150-accel.o
7obj-$(CONFIG_HID_SENSOR_ACCEL_3D) += hid-sensor-accel-3d.o 8obj-$(CONFIG_HID_SENSOR_ACCEL_3D) += hid-sensor-accel-3d.o
8obj-$(CONFIG_KXCJK1013) += kxcjk-1013.o 9obj-$(CONFIG_KXCJK1013) += kxcjk-1013.o
9obj-$(CONFIG_KXSD9) += kxsd9.o 10obj-$(CONFIG_KXSD9) += kxsd9.o
diff --git a/drivers/iio/accel/bmc150-accel.c b/drivers/iio/accel/bmc150-accel.c
new file mode 100644
index 000000000000..23ae33496214
--- /dev/null
+++ b/drivers/iio/accel/bmc150-accel.c
@@ -0,0 +1,1307 @@
1/*
2 * BMC150 3-axis accelerometer driver
3 * Copyright (c) 2014, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 */
14
15#include <linux/module.h>
16#include <linux/i2c.h>
17#include <linux/interrupt.h>
18#include <linux/delay.h>
19#include <linux/slab.h>
20#include <linux/acpi.h>
21#include <linux/gpio/consumer.h>
22#include <linux/pm.h>
23#include <linux/pm_runtime.h>
24#include <linux/iio/iio.h>
25#include <linux/iio/sysfs.h>
26#include <linux/iio/buffer.h>
27#include <linux/iio/events.h>
28#include <linux/iio/trigger.h>
29#include <linux/iio/trigger_consumer.h>
30#include <linux/iio/triggered_buffer.h>
31
32#define BMC150_ACCEL_DRV_NAME "bmc150_accel"
33#define BMC150_ACCEL_IRQ_NAME "bmc150_accel_event"
34#define BMC150_ACCEL_GPIO_NAME "bmc150_accel_int"
35
36#define BMC150_ACCEL_REG_CHIP_ID 0x00
37#define BMC150_ACCEL_CHIP_ID_VAL 0xFA
38
39#define BMC150_ACCEL_REG_INT_STATUS_2 0x0B
40#define BMC150_ACCEL_ANY_MOTION_MASK 0x07
41#define BMC150_ACCEL_ANY_MOTION_BIT_SIGN BIT(3)
42
43#define BMC150_ACCEL_REG_PMU_LPW 0x11
44#define BMC150_ACCEL_PMU_MODE_MASK 0xE0
45#define BMC150_ACCEL_PMU_MODE_SHIFT 5
46#define BMC150_ACCEL_PMU_BIT_SLEEP_DUR_MASK 0x17
47#define BMC150_ACCEL_PMU_BIT_SLEEP_DUR_SHIFT 1
48
49#define BMC150_ACCEL_REG_PMU_RANGE 0x0F
50
51#define BMC150_ACCEL_DEF_RANGE_2G 0x03
52#define BMC150_ACCEL_DEF_RANGE_4G 0x05
53#define BMC150_ACCEL_DEF_RANGE_8G 0x08
54#define BMC150_ACCEL_DEF_RANGE_16G 0x0C
55
56/* Default BW: 125Hz */
57#define BMC150_ACCEL_REG_PMU_BW 0x10
58#define BMC150_ACCEL_DEF_BW 125
59
60#define BMC150_ACCEL_REG_INT_MAP_0 0x19
61#define BMC150_ACCEL_INT_MAP_0_BIT_SLOPE BIT(2)
62
63#define BMC150_ACCEL_REG_INT_MAP_1 0x1A
64#define BMC150_ACCEL_INT_MAP_1_BIT_DATA BIT(0)
65
66#define BMC150_ACCEL_REG_INT_RST_LATCH 0x21
67#define BMC150_ACCEL_INT_MODE_LATCH_RESET 0x80
68#define BMC150_ACCEL_INT_MODE_LATCH_INT 0x0F
69#define BMC150_ACCEL_INT_MODE_NON_LATCH_INT 0x00
70
71#define BMC150_ACCEL_REG_INT_EN_0 0x16
72#define BMC150_ACCEL_INT_EN_BIT_SLP_X BIT(0)
73#define BMC150_ACCEL_INT_EN_BIT_SLP_Y BIT(1)
74#define BMC150_ACCEL_INT_EN_BIT_SLP_Z BIT(2)
75
76#define BMC150_ACCEL_REG_INT_EN_1 0x17
77#define BMC150_ACCEL_INT_EN_BIT_DATA_EN BIT(4)
78
79#define BMC150_ACCEL_REG_INT_OUT_CTRL 0x20
80#define BMC150_ACCEL_INT_OUT_CTRL_INT1_LVL BIT(0)
81
82#define BMC150_ACCEL_REG_INT_5 0x27
83#define BMC150_ACCEL_SLOPE_DUR_MASK 0x03
84
85#define BMC150_ACCEL_REG_INT_6 0x28
86#define BMC150_ACCEL_SLOPE_THRES_MASK 0xFF
87
88/* Slope duration in terms of number of samples */
89#define BMC150_ACCEL_DEF_SLOPE_DURATION 2
90/* in terms of multiples of g's/LSB, based on range */
91#define BMC150_ACCEL_DEF_SLOPE_THRESHOLD 5
92
93#define BMC150_ACCEL_REG_XOUT_L 0x02
94
95#define BMC150_ACCEL_MAX_STARTUP_TIME_MS 100
96
97/* Sleep Duration values */
98#define BMC150_ACCEL_SLEEP_500_MICRO 0x05
99#define BMC150_ACCEL_SLEEP_1_MS 0x06
100#define BMC150_ACCEL_SLEEP_2_MS 0x07
101#define BMC150_ACCEL_SLEEP_4_MS 0x08
102#define BMC150_ACCEL_SLEEP_6_MS 0x09
103#define BMC150_ACCEL_SLEEP_10_MS 0x0A
104#define BMC150_ACCEL_SLEEP_25_MS 0x0B
105#define BMC150_ACCEL_SLEEP_50_MS 0x0C
106#define BMC150_ACCEL_SLEEP_100_MS 0x0D
107#define BMC150_ACCEL_SLEEP_500_MS 0x0E
108#define BMC150_ACCEL_SLEEP_1_SEC 0x0F
109
110#define BMC150_ACCEL_REG_TEMP 0x08
111#define BMC150_ACCEL_TEMP_CENTER_VAL 24
112
113#define BMC150_ACCEL_AXIS_TO_REG(axis) (BMC150_ACCEL_REG_XOUT_L + (axis * 2))
114#define BMC150_AUTO_SUSPEND_DELAY_MS 2000
115
116enum bmc150_accel_axis {
117 AXIS_X,
118 AXIS_Y,
119 AXIS_Z,
120};
121
122enum bmc150_power_modes {
123 BMC150_ACCEL_SLEEP_MODE_NORMAL,
124 BMC150_ACCEL_SLEEP_MODE_DEEP_SUSPEND,
125 BMC150_ACCEL_SLEEP_MODE_LPM,
126 BMC150_ACCEL_SLEEP_MODE_SUSPEND = 0x04,
127};
128
129struct bmc150_accel_data {
130 struct i2c_client *client;
131 struct iio_trigger *dready_trig;
132 struct iio_trigger *motion_trig;
133 struct mutex mutex;
134 s16 buffer[8];
135 u8 bw_bits;
136 u32 slope_dur;
137 u32 slope_thres;
138 u32 range;
139 int ev_enable_state;
140 bool dready_trigger_on;
141 bool motion_trigger_on;
142 int64_t timestamp;
143};
144
145static const struct {
146 int val;
147 int val2;
148 u8 bw_bits;
149} bmc150_accel_samp_freq_table[] = { {7, 810000, 0x08},
150 {15, 630000, 0x09},
151 {31, 250000, 0x0A},
152 {62, 500000, 0x0B},
153 {125, 0, 0x0C},
154 {250, 0, 0x0D},
155 {500, 0, 0x0E},
156 {1000, 0, 0x0F} };
157
158static const struct {
159 int bw_bits;
160 int msec;
161} bmc150_accel_sample_upd_time[] = { {0x08, 64},
162 {0x09, 32},
163 {0x0A, 16},
164 {0x0B, 8},
165 {0x0C, 4},
166 {0x0D, 2},
167 {0x0E, 1},
168 {0x0F, 1} };
169
170static const struct {
171 int scale;
172 int range;
173} bmc150_accel_scale_table[] = { {9610, BMC150_ACCEL_DEF_RANGE_2G},
174 {19122, BMC150_ACCEL_DEF_RANGE_4G},
175 {38344, BMC150_ACCEL_DEF_RANGE_8G},
176 {77057, BMC150_ACCEL_DEF_RANGE_16G} };
177
178static const struct {
179 int sleep_dur;
180 int reg_value;
181} bmc150_accel_sleep_value_table[] = { {0, 0},
182 {500, BMC150_ACCEL_SLEEP_500_MICRO},
183 {1000, BMC150_ACCEL_SLEEP_1_MS},
184 {2000, BMC150_ACCEL_SLEEP_2_MS},
185 {4000, BMC150_ACCEL_SLEEP_4_MS},
186 {6000, BMC150_ACCEL_SLEEP_6_MS},
187 {10000, BMC150_ACCEL_SLEEP_10_MS},
188 {25000, BMC150_ACCEL_SLEEP_25_MS},
189 {50000, BMC150_ACCEL_SLEEP_50_MS},
190 {100000, BMC150_ACCEL_SLEEP_100_MS},
191 {500000, BMC150_ACCEL_SLEEP_500_MS},
192 {1000000, BMC150_ACCEL_SLEEP_1_SEC} };
193
194
195static int bmc150_accel_set_mode(struct bmc150_accel_data *data,
196 enum bmc150_power_modes mode,
197 int dur_us)
198{
199 int i;
200 int ret;
201 u8 lpw_bits;
202 int dur_val = -1;
203
204 if (dur_us > 0) {
205 for (i = 0; i < ARRAY_SIZE(bmc150_accel_sleep_value_table);
206 ++i) {
207 if (bmc150_accel_sleep_value_table[i].sleep_dur ==
208 dur_us)
209 dur_val =
210 bmc150_accel_sleep_value_table[i].reg_value;
211 }
212 } else
213 dur_val = 0;
214
215 if (dur_val < 0)
216 return -EINVAL;
217
218 lpw_bits = mode << BMC150_ACCEL_PMU_MODE_SHIFT;
219 lpw_bits |= (dur_val << BMC150_ACCEL_PMU_BIT_SLEEP_DUR_SHIFT);
220
221 dev_dbg(&data->client->dev, "Set Mode bits %x\n", lpw_bits);
222
223 ret = i2c_smbus_write_byte_data(data->client,
224 BMC150_ACCEL_REG_PMU_LPW, lpw_bits);
225 if (ret < 0) {
226 dev_err(&data->client->dev, "Error writing reg_pmu_lpw\n");
227 return ret;
228 }
229
230 return 0;
231}
232
233static int bmc150_accel_set_bw(struct bmc150_accel_data *data, int val,
234 int val2)
235{
236 int i;
237 int ret;
238
239 for (i = 0; i < ARRAY_SIZE(bmc150_accel_samp_freq_table); ++i) {
240 if (bmc150_accel_samp_freq_table[i].val == val &&
241 bmc150_accel_samp_freq_table[i].val2 == val2) {
242 ret = i2c_smbus_write_byte_data(
243 data->client,
244 BMC150_ACCEL_REG_PMU_BW,
245 bmc150_accel_samp_freq_table[i].bw_bits);
246 if (ret < 0)
247 return ret;
248
249 data->bw_bits =
250 bmc150_accel_samp_freq_table[i].bw_bits;
251 return 0;
252 }
253 }
254
255 return -EINVAL;
256}
257
258static int bmc150_accel_chip_init(struct bmc150_accel_data *data)
259{
260 int ret;
261
262 ret = i2c_smbus_read_byte_data(data->client, BMC150_ACCEL_REG_CHIP_ID);
263 if (ret < 0) {
264 dev_err(&data->client->dev,
265 "Error: Reading chip id\n");
266 return ret;
267 }
268
269 dev_dbg(&data->client->dev, "Chip Id %x\n", ret);
270 if (ret != BMC150_ACCEL_CHIP_ID_VAL) {
271 dev_err(&data->client->dev, "Invalid chip %x\n", ret);
272 return -ENODEV;
273 }
274
275 ret = bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_NORMAL, 0);
276 if (ret < 0)
277 return ret;
278
279 /* Set Bandwidth */
280 ret = bmc150_accel_set_bw(data, BMC150_ACCEL_DEF_BW, 0);
281 if (ret < 0)
282 return ret;
283
284 /* Set Default Range */
285 ret = i2c_smbus_write_byte_data(data->client,
286 BMC150_ACCEL_REG_PMU_RANGE,
287 BMC150_ACCEL_DEF_RANGE_4G);
288 if (ret < 0) {
289 dev_err(&data->client->dev,
290 "Error writing reg_pmu_range\n");
291 return ret;
292 }
293
294 data->range = BMC150_ACCEL_DEF_RANGE_4G;
295
296 /* Set default slope duration */
297 ret = i2c_smbus_read_byte_data(data->client, BMC150_ACCEL_REG_INT_5);
298 if (ret < 0) {
299 dev_err(&data->client->dev, "Error reading reg_int_5\n");
300 return ret;
301 }
302 data->slope_dur |= BMC150_ACCEL_DEF_SLOPE_DURATION;
303 ret = i2c_smbus_write_byte_data(data->client,
304 BMC150_ACCEL_REG_INT_5,
305 data->slope_dur);
306 if (ret < 0) {
307 dev_err(&data->client->dev, "Error writing reg_int_5\n");
308 return ret;
309 }
310 dev_dbg(&data->client->dev, "slope_dur %x\n", data->slope_dur);
311
312 /* Set default slope thresholds */
313 ret = i2c_smbus_write_byte_data(data->client,
314 BMC150_ACCEL_REG_INT_6,
315 BMC150_ACCEL_DEF_SLOPE_THRESHOLD);
316 if (ret < 0) {
317 dev_err(&data->client->dev, "Error writing reg_int_6\n");
318 return ret;
319 }
320 data->slope_thres = BMC150_ACCEL_DEF_SLOPE_THRESHOLD;
321 dev_dbg(&data->client->dev, "slope_thres %x\n", data->slope_thres);
322
323 /* Set default as latched interrupts */
324 ret = i2c_smbus_write_byte_data(data->client,
325 BMC150_ACCEL_REG_INT_RST_LATCH,
326 BMC150_ACCEL_INT_MODE_LATCH_INT |
327 BMC150_ACCEL_INT_MODE_LATCH_RESET);
328 if (ret < 0) {
329 dev_err(&data->client->dev,
330 "Error writing reg_int_rst_latch\n");
331 return ret;
332 }
333
334 return 0;
335}
336
337static int bmc150_accel_setup_any_motion_interrupt(
338 struct bmc150_accel_data *data,
339 bool status)
340{
341 int ret;
342
343 /* Enable/Disable INT1 mapping */
344 ret = i2c_smbus_read_byte_data(data->client,
345 BMC150_ACCEL_REG_INT_MAP_0);
346 if (ret < 0) {
347 dev_err(&data->client->dev, "Error reading reg_int_map_0\n");
348 return ret;
349 }
350 if (status)
351 ret |= BMC150_ACCEL_INT_MAP_0_BIT_SLOPE;
352 else
353 ret &= ~BMC150_ACCEL_INT_MAP_0_BIT_SLOPE;
354
355 ret = i2c_smbus_write_byte_data(data->client,
356 BMC150_ACCEL_REG_INT_MAP_0,
357 ret);
358 if (ret < 0) {
359 dev_err(&data->client->dev, "Error writing reg_int_map_0\n");
360 return ret;
361 }
362
363 if (status) {
364 /* Set slope duration (no of samples) */
365 ret = i2c_smbus_write_byte_data(data->client,
366 BMC150_ACCEL_REG_INT_5,
367 data->slope_dur);
368 if (ret < 0) {
369 dev_err(&data->client->dev, "Error write reg_int_5\n");
370 return ret;
371 }
372
373 /* Set slope thresholds */
374 ret = i2c_smbus_write_byte_data(data->client,
375 BMC150_ACCEL_REG_INT_6,
376 data->slope_thres);
377 if (ret < 0) {
378 dev_err(&data->client->dev, "Error write reg_int_6\n");
379 return ret;
380 }
381
382 /*
383 * New data interrupt is always non-latched,
384 * which will have higher priority, so no need
385 * to set latched mode, we will be flooded anyway with INTR
386 */
387 if (!data->dready_trigger_on) {
388 ret = i2c_smbus_write_byte_data(data->client,
389 BMC150_ACCEL_REG_INT_RST_LATCH,
390 BMC150_ACCEL_INT_MODE_LATCH_INT |
391 BMC150_ACCEL_INT_MODE_LATCH_RESET);
392 if (ret < 0) {
393 dev_err(&data->client->dev,
394 "Error writing reg_int_rst_latch\n");
395 return ret;
396 }
397 }
398
399 ret = i2c_smbus_write_byte_data(data->client,
400 BMC150_ACCEL_REG_INT_EN_0,
401 BMC150_ACCEL_INT_EN_BIT_SLP_X |
402 BMC150_ACCEL_INT_EN_BIT_SLP_Y |
403 BMC150_ACCEL_INT_EN_BIT_SLP_Z);
404 } else
405 ret = i2c_smbus_write_byte_data(data->client,
406 BMC150_ACCEL_REG_INT_EN_0,
407 0);
408
409 if (ret < 0) {
410 dev_err(&data->client->dev, "Error writing reg_int_en_0\n");
411 return ret;
412 }
413
414 return 0;
415}
416
417static int bmc150_accel_setup_new_data_interrupt(struct bmc150_accel_data *data,
418 bool status)
419{
420 int ret;
421
422 /* Enable/Disable INT1 mapping */
423 ret = i2c_smbus_read_byte_data(data->client,
424 BMC150_ACCEL_REG_INT_MAP_1);
425 if (ret < 0) {
426 dev_err(&data->client->dev, "Error reading reg_int_map_1\n");
427 return ret;
428 }
429 if (status)
430 ret |= BMC150_ACCEL_INT_MAP_1_BIT_DATA;
431 else
432 ret &= ~BMC150_ACCEL_INT_MAP_1_BIT_DATA;
433
434 ret = i2c_smbus_write_byte_data(data->client,
435 BMC150_ACCEL_REG_INT_MAP_1,
436 ret);
437 if (ret < 0) {
438 dev_err(&data->client->dev, "Error writing reg_int_map_1\n");
439 return ret;
440 }
441
442 if (status) {
443 /*
444 * Set non latched mode interrupt and clear any latched
445 * interrupt
446 */
447 ret = i2c_smbus_write_byte_data(data->client,
448 BMC150_ACCEL_REG_INT_RST_LATCH,
449 BMC150_ACCEL_INT_MODE_NON_LATCH_INT |
450 BMC150_ACCEL_INT_MODE_LATCH_RESET);
451 if (ret < 0) {
452 dev_err(&data->client->dev,
453 "Error writing reg_int_rst_latch\n");
454 return ret;
455 }
456
457 ret = i2c_smbus_write_byte_data(data->client,
458 BMC150_ACCEL_REG_INT_EN_1,
459 BMC150_ACCEL_INT_EN_BIT_DATA_EN);
460
461 } else {
462 /* Restore default interrupt mode */
463 ret = i2c_smbus_write_byte_data(data->client,
464 BMC150_ACCEL_REG_INT_RST_LATCH,
465 BMC150_ACCEL_INT_MODE_LATCH_INT |
466 BMC150_ACCEL_INT_MODE_LATCH_RESET);
467 if (ret < 0) {
468 dev_err(&data->client->dev,
469 "Error writing reg_int_rst_latch\n");
470 return ret;
471 }
472
473 ret = i2c_smbus_write_byte_data(data->client,
474 BMC150_ACCEL_REG_INT_EN_1,
475 0);
476 }
477
478 if (ret < 0) {
479 dev_err(&data->client->dev, "Error writing reg_int_en_1\n");
480 return ret;
481 }
482
483 return 0;
484}
485
486static int bmc150_accel_get_bw(struct bmc150_accel_data *data, int *val,
487 int *val2)
488{
489 int i;
490
491 for (i = 0; i < ARRAY_SIZE(bmc150_accel_samp_freq_table); ++i) {
492 if (bmc150_accel_samp_freq_table[i].bw_bits == data->bw_bits) {
493 *val = bmc150_accel_samp_freq_table[i].val;
494 *val2 = bmc150_accel_samp_freq_table[i].val2;
495 return IIO_VAL_INT_PLUS_MICRO;
496 }
497 }
498
499 return -EINVAL;
500}
501
502static int bmc150_accel_get_startup_times(struct bmc150_accel_data *data)
503{
504 int i;
505
506 for (i = 0; i < ARRAY_SIZE(bmc150_accel_sample_upd_time); ++i) {
507 if (bmc150_accel_sample_upd_time[i].bw_bits == data->bw_bits)
508 return bmc150_accel_sample_upd_time[i].msec;
509 }
510
511 return BMC150_ACCEL_MAX_STARTUP_TIME_MS;
512}
513
514static int bmc150_accel_set_power_state(struct bmc150_accel_data *data, bool on)
515{
516 int ret;
517
518 if (on)
519 ret = pm_runtime_get_sync(&data->client->dev);
520 else {
521 pm_runtime_mark_last_busy(&data->client->dev);
522 ret = pm_runtime_put_autosuspend(&data->client->dev);
523 }
524 if (ret < 0) {
525 dev_err(&data->client->dev,
526 "Failed: bmc150_accel_set_power_state for %d\n", on);
527 return ret;
528 }
529
530 return 0;
531}
532
533static int bmc150_accel_set_scale(struct bmc150_accel_data *data, int val)
534{
535 int ret, i;
536
537 for (i = 0; i < ARRAY_SIZE(bmc150_accel_scale_table); ++i) {
538 if (bmc150_accel_scale_table[i].scale == val) {
539 ret = i2c_smbus_write_byte_data(
540 data->client,
541 BMC150_ACCEL_REG_PMU_RANGE,
542 bmc150_accel_scale_table[i].range);
543 if (ret < 0) {
544 dev_err(&data->client->dev,
545 "Error writing pmu_range\n");
546 return ret;
547 }
548
549 data->range = bmc150_accel_scale_table[i].range;
550 return 0;
551 }
552 }
553
554 return -EINVAL;
555}
556
557static int bmc150_accel_get_temp(struct bmc150_accel_data *data, int *val)
558{
559 int ret;
560
561 mutex_lock(&data->mutex);
562
563 ret = i2c_smbus_read_byte_data(data->client, BMC150_ACCEL_REG_TEMP);
564 if (ret < 0) {
565 dev_err(&data->client->dev, "Error reading reg_temp\n");
566 mutex_unlock(&data->mutex);
567 return ret;
568 }
569 *val = sign_extend32(ret, 7);
570
571 mutex_unlock(&data->mutex);
572
573 return IIO_VAL_INT;
574}
575
576static int bmc150_accel_get_axis(struct bmc150_accel_data *data, int axis,
577 int *val)
578{
579 int ret;
580
581 mutex_lock(&data->mutex);
582 ret = bmc150_accel_set_power_state(data, true);
583 if (ret < 0) {
584 mutex_unlock(&data->mutex);
585 return ret;
586 }
587
588 ret = i2c_smbus_read_word_data(data->client,
589 BMC150_ACCEL_AXIS_TO_REG(axis));
590 if (ret < 0) {
591 dev_err(&data->client->dev, "Error reading axis %d\n", axis);
592 bmc150_accel_set_power_state(data, false);
593 mutex_unlock(&data->mutex);
594 return ret;
595 }
596 *val = sign_extend32(ret >> 4, 11);
597 ret = bmc150_accel_set_power_state(data, false);
598 mutex_unlock(&data->mutex);
599 if (ret < 0)
600 return ret;
601
602 return IIO_VAL_INT;
603}
604
605static int bmc150_accel_read_raw(struct iio_dev *indio_dev,
606 struct iio_chan_spec const *chan,
607 int *val, int *val2, long mask)
608{
609 struct bmc150_accel_data *data = iio_priv(indio_dev);
610 int ret;
611
612 switch (mask) {
613 case IIO_CHAN_INFO_RAW:
614 switch (chan->type) {
615 case IIO_TEMP:
616 return bmc150_accel_get_temp(data, val);
617 case IIO_ACCEL:
618 if (iio_buffer_enabled(indio_dev))
619 return -EBUSY;
620 else
621 return bmc150_accel_get_axis(data,
622 chan->scan_index,
623 val);
624 default:
625 return -EINVAL;
626 }
627 case IIO_CHAN_INFO_OFFSET:
628 if (chan->type == IIO_TEMP) {
629 *val = BMC150_ACCEL_TEMP_CENTER_VAL;
630 return IIO_VAL_INT;
631 } else
632 return -EINVAL;
633 case IIO_CHAN_INFO_SCALE:
634 *val = 0;
635 switch (chan->type) {
636 case IIO_TEMP:
637 *val2 = 500000;
638 return IIO_VAL_INT_PLUS_MICRO;
639 case IIO_ACCEL:
640 {
641 int i;
642
643 for (i = 0; i < ARRAY_SIZE(bmc150_accel_scale_table);
644 ++i) {
645 if (bmc150_accel_scale_table[i].range ==
646 data->range) {
647 *val2 =
648 bmc150_accel_scale_table[i].scale;
649 return IIO_VAL_INT_PLUS_MICRO;
650 }
651 }
652 return -EINVAL;
653 }
654 default:
655 return -EINVAL;
656 }
657 case IIO_CHAN_INFO_SAMP_FREQ:
658 mutex_lock(&data->mutex);
659 ret = bmc150_accel_get_bw(data, val, val2);
660 mutex_unlock(&data->mutex);
661 return ret;
662 default:
663 return -EINVAL;
664 }
665}
666
667static int bmc150_accel_write_raw(struct iio_dev *indio_dev,
668 struct iio_chan_spec const *chan,
669 int val, int val2, long mask)
670{
671 struct bmc150_accel_data *data = iio_priv(indio_dev);
672 int ret;
673
674 switch (mask) {
675 case IIO_CHAN_INFO_SAMP_FREQ:
676 mutex_lock(&data->mutex);
677 ret = bmc150_accel_set_bw(data, val, val2);
678 mutex_unlock(&data->mutex);
679 break;
680 case IIO_CHAN_INFO_SCALE:
681 if (val)
682 return -EINVAL;
683
684 mutex_lock(&data->mutex);
685 ret = bmc150_accel_set_scale(data, val2);
686 mutex_unlock(&data->mutex);
687 return ret;
688 default:
689 ret = -EINVAL;
690 }
691
692 return ret;
693}
694
695static int bmc150_accel_read_event(struct iio_dev *indio_dev,
696 const struct iio_chan_spec *chan,
697 enum iio_event_type type,
698 enum iio_event_direction dir,
699 enum iio_event_info info,
700 int *val, int *val2)
701{
702 struct bmc150_accel_data *data = iio_priv(indio_dev);
703
704 *val2 = 0;
705 switch (info) {
706 case IIO_EV_INFO_VALUE:
707 *val = data->slope_thres;
708 break;
709 case IIO_EV_INFO_PERIOD:
710 *val = data->slope_dur & BMC150_ACCEL_SLOPE_DUR_MASK;
711 break;
712 default:
713 return -EINVAL;
714 }
715
716 return IIO_VAL_INT;
717}
718
719static int bmc150_accel_write_event(struct iio_dev *indio_dev,
720 const struct iio_chan_spec *chan,
721 enum iio_event_type type,
722 enum iio_event_direction dir,
723 enum iio_event_info info,
724 int val, int val2)
725{
726 struct bmc150_accel_data *data = iio_priv(indio_dev);
727
728 if (data->ev_enable_state)
729 return -EBUSY;
730
731 switch (info) {
732 case IIO_EV_INFO_VALUE:
733 data->slope_thres = val;
734 break;
735 case IIO_EV_INFO_PERIOD:
736 data->slope_dur &= ~BMC150_ACCEL_SLOPE_DUR_MASK;
737 data->slope_dur |= val & BMC150_ACCEL_SLOPE_DUR_MASK;
738 break;
739 default:
740 return -EINVAL;
741 }
742
743 return 0;
744}
745
746static int bmc150_accel_read_event_config(struct iio_dev *indio_dev,
747 const struct iio_chan_spec *chan,
748 enum iio_event_type type,
749 enum iio_event_direction dir)
750{
751
752 struct bmc150_accel_data *data = iio_priv(indio_dev);
753
754 return data->ev_enable_state;
755}
756
757static int bmc150_accel_write_event_config(struct iio_dev *indio_dev,
758 const struct iio_chan_spec *chan,
759 enum iio_event_type type,
760 enum iio_event_direction dir,
761 int state)
762{
763 struct bmc150_accel_data *data = iio_priv(indio_dev);
764 int ret;
765
766 if (state && data->ev_enable_state)
767 return 0;
768
769 mutex_lock(&data->mutex);
770
771 if (!state && data->motion_trigger_on) {
772 data->ev_enable_state = 0;
773 mutex_unlock(&data->mutex);
774 return 0;
775 }
776
777 /*
778 * We will expect the enable and disable to do operation in
779 * in reverse order. This will happen here anyway as our
780 * resume operation uses sync mode runtime pm calls, the
781 * suspend operation will be delayed by autosuspend delay
782 * So the disable operation will still happen in reverse of
783 * enable operation. When runtime pm is disabled the mode
784 * is always on so sequence doesn't matter
785 */
786
787 ret = bmc150_accel_set_power_state(data, state);
788 if (ret < 0) {
789 mutex_unlock(&data->mutex);
790 return ret;
791 }
792
793 ret = bmc150_accel_setup_any_motion_interrupt(data, state);
794 if (ret < 0) {
795 mutex_unlock(&data->mutex);
796 return ret;
797 }
798
799 data->ev_enable_state = state;
800 mutex_unlock(&data->mutex);
801
802 return 0;
803}
804
805static int bmc150_accel_validate_trigger(struct iio_dev *indio_dev,
806 struct iio_trigger *trig)
807{
808 struct bmc150_accel_data *data = iio_priv(indio_dev);
809
810 if (data->dready_trig != trig && data->motion_trig != trig)
811 return -EINVAL;
812
813 return 0;
814}
815
816static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
817 "7.810000 15.630000 31.250000 62.500000 125 250 500 1000");
818
819static struct attribute *bmc150_accel_attributes[] = {
820 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
821 NULL,
822};
823
824static const struct attribute_group bmc150_accel_attrs_group = {
825 .attrs = bmc150_accel_attributes,
826};
827
828static const struct iio_event_spec bmc150_accel_event = {
829 .type = IIO_EV_TYPE_ROC,
830 .dir = IIO_EV_DIR_RISING | IIO_EV_DIR_FALLING,
831 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
832 BIT(IIO_EV_INFO_ENABLE) |
833 BIT(IIO_EV_INFO_PERIOD)
834};
835
836#define BMC150_ACCEL_CHANNEL(_axis) { \
837 .type = IIO_ACCEL, \
838 .modified = 1, \
839 .channel2 = IIO_MOD_##_axis, \
840 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
841 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
842 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
843 .scan_index = AXIS_##_axis, \
844 .scan_type = { \
845 .sign = 's', \
846 .realbits = 12, \
847 .storagebits = 16, \
848 .shift = 4, \
849 }, \
850 .event_spec = &bmc150_accel_event, \
851 .num_event_specs = 1 \
852}
853
854static const struct iio_chan_spec bmc150_accel_channels[] = {
855 {
856 .type = IIO_TEMP,
857 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
858 BIT(IIO_CHAN_INFO_SCALE) |
859 BIT(IIO_CHAN_INFO_OFFSET),
860 .scan_index = -1,
861 },
862 BMC150_ACCEL_CHANNEL(X),
863 BMC150_ACCEL_CHANNEL(Y),
864 BMC150_ACCEL_CHANNEL(Z),
865 IIO_CHAN_SOFT_TIMESTAMP(3),
866};
867
868static const struct iio_info bmc150_accel_info = {
869 .attrs = &bmc150_accel_attrs_group,
870 .read_raw = bmc150_accel_read_raw,
871 .write_raw = bmc150_accel_write_raw,
872 .read_event_value = bmc150_accel_read_event,
873 .write_event_value = bmc150_accel_write_event,
874 .write_event_config = bmc150_accel_write_event_config,
875 .read_event_config = bmc150_accel_read_event_config,
876 .validate_trigger = bmc150_accel_validate_trigger,
877 .driver_module = THIS_MODULE,
878};
879
880static irqreturn_t bmc150_accel_trigger_handler(int irq, void *p)
881{
882 struct iio_poll_func *pf = p;
883 struct iio_dev *indio_dev = pf->indio_dev;
884 struct bmc150_accel_data *data = iio_priv(indio_dev);
885 int bit, ret, i = 0;
886
887 mutex_lock(&data->mutex);
888 for_each_set_bit(bit, indio_dev->buffer->scan_mask,
889 indio_dev->masklength) {
890 ret = i2c_smbus_read_word_data(data->client,
891 BMC150_ACCEL_AXIS_TO_REG(bit));
892 if (ret < 0) {
893 mutex_unlock(&data->mutex);
894 goto err_read;
895 }
896 data->buffer[i++] = ret;
897 }
898 mutex_unlock(&data->mutex);
899
900 iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
901 data->timestamp);
902err_read:
903 iio_trigger_notify_done(indio_dev->trig);
904
905 return IRQ_HANDLED;
906}
907
908static int bmc150_accel_trig_try_reen(struct iio_trigger *trig)
909{
910 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
911 struct bmc150_accel_data *data = iio_priv(indio_dev);
912 int ret;
913
914 /* new data interrupts don't need ack */
915 if (data->dready_trigger_on)
916 return 0;
917
918 mutex_lock(&data->mutex);
919 /* clear any latched interrupt */
920 ret = i2c_smbus_write_byte_data(data->client,
921 BMC150_ACCEL_REG_INT_RST_LATCH,
922 BMC150_ACCEL_INT_MODE_LATCH_INT |
923 BMC150_ACCEL_INT_MODE_LATCH_RESET);
924 mutex_unlock(&data->mutex);
925 if (ret < 0) {
926 dev_err(&data->client->dev,
927 "Error writing reg_int_rst_latch\n");
928 return ret;
929 }
930
931 return 0;
932}
933
934static int bmc150_accel_data_rdy_trigger_set_state(struct iio_trigger *trig,
935 bool state)
936{
937 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
938 struct bmc150_accel_data *data = iio_priv(indio_dev);
939 int ret;
940
941 mutex_lock(&data->mutex);
942
943 if (!state && data->ev_enable_state && data->motion_trigger_on) {
944 data->motion_trigger_on = false;
945 mutex_unlock(&data->mutex);
946 return 0;
947 }
948
949 /*
950 * Refer to comment in bmc150_accel_write_event_config for
951 * enable/disable operation order
952 */
953 ret = bmc150_accel_set_power_state(data, state);
954 if (ret < 0) {
955 mutex_unlock(&data->mutex);
956 return ret;
957 }
958 if (data->motion_trig == trig)
959 ret = bmc150_accel_setup_any_motion_interrupt(data, state);
960 else
961 ret = bmc150_accel_setup_new_data_interrupt(data, state);
962 if (ret < 0) {
963 mutex_unlock(&data->mutex);
964 return ret;
965 }
966 if (data->motion_trig == trig)
967 data->motion_trigger_on = state;
968 else
969 data->dready_trigger_on = state;
970
971 mutex_unlock(&data->mutex);
972
973 return ret;
974}
975
976static const struct iio_trigger_ops bmc150_accel_trigger_ops = {
977 .set_trigger_state = bmc150_accel_data_rdy_trigger_set_state,
978 .try_reenable = bmc150_accel_trig_try_reen,
979 .owner = THIS_MODULE,
980};
981
982static irqreturn_t bmc150_accel_event_handler(int irq, void *private)
983{
984 struct iio_dev *indio_dev = private;
985 struct bmc150_accel_data *data = iio_priv(indio_dev);
986 int ret;
987 int dir;
988
989 ret = i2c_smbus_read_byte_data(data->client,
990 BMC150_ACCEL_REG_INT_STATUS_2);
991 if (ret < 0) {
992 dev_err(&data->client->dev, "Error reading reg_int_status_2\n");
993 goto ack_intr_status;
994 }
995
996 if (ret & BMC150_ACCEL_ANY_MOTION_BIT_SIGN)
997 dir = IIO_EV_DIR_FALLING;
998 else
999 dir = IIO_EV_DIR_RISING;
1000
1001 if (ret & BMC150_ACCEL_ANY_MOTION_MASK)
1002 iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ACCEL,
1003 0,
1004 IIO_MOD_X_OR_Y_OR_Z,
1005 IIO_EV_TYPE_ROC,
1006 IIO_EV_DIR_EITHER),
1007 data->timestamp);
1008ack_intr_status:
1009 if (!data->dready_trigger_on)
1010 ret = i2c_smbus_write_byte_data(data->client,
1011 BMC150_ACCEL_REG_INT_RST_LATCH,
1012 BMC150_ACCEL_INT_MODE_LATCH_INT |
1013 BMC150_ACCEL_INT_MODE_LATCH_RESET);
1014
1015 return IRQ_HANDLED;
1016}
1017
1018static irqreturn_t bmc150_accel_data_rdy_trig_poll(int irq, void *private)
1019{
1020 struct iio_dev *indio_dev = private;
1021 struct bmc150_accel_data *data = iio_priv(indio_dev);
1022
1023 data->timestamp = iio_get_time_ns();
1024
1025 if (data->dready_trigger_on)
1026 iio_trigger_poll(data->dready_trig);
1027 else if (data->motion_trigger_on)
1028 iio_trigger_poll(data->motion_trig);
1029
1030 if (data->ev_enable_state)
1031 return IRQ_WAKE_THREAD;
1032 else
1033 return IRQ_HANDLED;
1034}
1035
1036static int bmc150_accel_acpi_gpio_probe(struct i2c_client *client,
1037 struct bmc150_accel_data *data)
1038{
1039 const struct acpi_device_id *id;
1040 struct device *dev;
1041 struct gpio_desc *gpio;
1042 int ret;
1043
1044 if (!client)
1045 return -EINVAL;
1046
1047 dev = &client->dev;
1048 if (!ACPI_HANDLE(dev))
1049 return -ENODEV;
1050
1051 id = acpi_match_device(dev->driver->acpi_match_table, dev);
1052 if (!id)
1053 return -ENODEV;
1054
1055 /* data ready gpio interrupt pin */
1056 gpio = devm_gpiod_get_index(dev, BMC150_ACCEL_GPIO_NAME, 0);
1057 if (IS_ERR(gpio)) {
1058 dev_err(dev, "Failed: acpi gpio get index\n");
1059 return PTR_ERR(gpio);
1060 }
1061
1062 ret = gpiod_direction_input(gpio);
1063 if (ret)
1064 return ret;
1065
1066 ret = gpiod_to_irq(gpio);
1067
1068 dev_dbg(dev, "GPIO resource, no:%d irq:%d\n", desc_to_gpio(gpio), ret);
1069
1070 return ret;
1071}
1072
1073static int bmc150_accel_probe(struct i2c_client *client,
1074 const struct i2c_device_id *id)
1075{
1076 struct bmc150_accel_data *data;
1077 struct iio_dev *indio_dev;
1078 int ret;
1079
1080 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
1081 if (!indio_dev)
1082 return -ENOMEM;
1083
1084 data = iio_priv(indio_dev);
1085 i2c_set_clientdata(client, indio_dev);
1086 data->client = client;
1087
1088 ret = bmc150_accel_chip_init(data);
1089 if (ret < 0)
1090 return ret;
1091
1092 mutex_init(&data->mutex);
1093
1094 indio_dev->dev.parent = &client->dev;
1095 indio_dev->channels = bmc150_accel_channels;
1096 indio_dev->num_channels = ARRAY_SIZE(bmc150_accel_channels);
1097 indio_dev->name = BMC150_ACCEL_DRV_NAME;
1098 indio_dev->modes = INDIO_DIRECT_MODE;
1099 indio_dev->info = &bmc150_accel_info;
1100
1101 if (client->irq < 0)
1102 client->irq = bmc150_accel_acpi_gpio_probe(client, data);
1103
1104 if (client->irq >= 0) {
1105 ret = devm_request_threaded_irq(
1106 &client->dev, client->irq,
1107 bmc150_accel_data_rdy_trig_poll,
1108 bmc150_accel_event_handler,
1109 IRQF_TRIGGER_RISING,
1110 BMC150_ACCEL_IRQ_NAME,
1111 indio_dev);
1112 if (ret)
1113 return ret;
1114
1115 data->dready_trig = devm_iio_trigger_alloc(&client->dev,
1116 "%s-dev%d",
1117 indio_dev->name,
1118 indio_dev->id);
1119 if (!data->dready_trig)
1120 return -ENOMEM;
1121
1122 data->motion_trig = devm_iio_trigger_alloc(&client->dev,
1123 "%s-any-motion-dev%d",
1124 indio_dev->name,
1125 indio_dev->id);
1126 if (!data->motion_trig)
1127 return -ENOMEM;
1128
1129 data->dready_trig->dev.parent = &client->dev;
1130 data->dready_trig->ops = &bmc150_accel_trigger_ops;
1131 iio_trigger_set_drvdata(data->dready_trig, indio_dev);
1132 ret = iio_trigger_register(data->dready_trig);
1133 if (ret)
1134 return ret;
1135
1136 data->motion_trig->dev.parent = &client->dev;
1137 data->motion_trig->ops = &bmc150_accel_trigger_ops;
1138 iio_trigger_set_drvdata(data->motion_trig, indio_dev);
1139 ret = iio_trigger_register(data->motion_trig);
1140 if (ret) {
1141 data->motion_trig = NULL;
1142 goto err_trigger_unregister;
1143 }
1144
1145 ret = iio_triggered_buffer_setup(indio_dev,
1146 &iio_pollfunc_store_time,
1147 bmc150_accel_trigger_handler,
1148 NULL);
1149 if (ret < 0) {
1150 dev_err(&client->dev,
1151 "Failed: iio triggered buffer setup\n");
1152 goto err_trigger_unregister;
1153 }
1154 }
1155
1156 ret = iio_device_register(indio_dev);
1157 if (ret < 0) {
1158 dev_err(&client->dev, "Unable to register iio device\n");
1159 goto err_buffer_cleanup;
1160 }
1161
1162 ret = pm_runtime_set_active(&client->dev);
1163 if (ret)
1164 goto err_iio_unregister;
1165
1166 pm_runtime_enable(&client->dev);
1167 pm_runtime_set_autosuspend_delay(&client->dev,
1168 BMC150_AUTO_SUSPEND_DELAY_MS);
1169 pm_runtime_use_autosuspend(&client->dev);
1170
1171 return 0;
1172
1173err_iio_unregister:
1174 iio_device_unregister(indio_dev);
1175err_buffer_cleanup:
1176 if (data->dready_trig)
1177 iio_triggered_buffer_cleanup(indio_dev);
1178err_trigger_unregister:
1179 if (data->dready_trig)
1180 iio_trigger_unregister(data->dready_trig);
1181 if (data->motion_trig)
1182 iio_trigger_unregister(data->motion_trig);
1183
1184 return ret;
1185}
1186
1187static int bmc150_accel_remove(struct i2c_client *client)
1188{
1189 struct iio_dev *indio_dev = i2c_get_clientdata(client);
1190 struct bmc150_accel_data *data = iio_priv(indio_dev);
1191
1192 pm_runtime_disable(&client->dev);
1193 pm_runtime_set_suspended(&client->dev);
1194 pm_runtime_put_noidle(&client->dev);
1195
1196 iio_device_unregister(indio_dev);
1197
1198 if (data->dready_trig) {
1199 iio_triggered_buffer_cleanup(indio_dev);
1200 iio_trigger_unregister(data->dready_trig);
1201 iio_trigger_unregister(data->motion_trig);
1202 }
1203
1204 mutex_lock(&data->mutex);
1205 bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_DEEP_SUSPEND, 0);
1206 mutex_unlock(&data->mutex);
1207
1208 return 0;
1209}
1210
1211#ifdef CONFIG_PM_SLEEP
1212static int bmc150_accel_suspend(struct device *dev)
1213{
1214 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1215 struct bmc150_accel_data *data = iio_priv(indio_dev);
1216
1217 mutex_lock(&data->mutex);
1218 bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_SUSPEND, 0);
1219 mutex_unlock(&data->mutex);
1220
1221 return 0;
1222}
1223
1224static int bmc150_accel_resume(struct device *dev)
1225{
1226 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1227 struct bmc150_accel_data *data = iio_priv(indio_dev);
1228
1229 mutex_lock(&data->mutex);
1230 if (data->dready_trigger_on || data->motion_trigger_on ||
1231 data->ev_enable_state)
1232 bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_NORMAL, 0);
1233 mutex_unlock(&data->mutex);
1234
1235 return 0;
1236}
1237#endif
1238
1239#ifdef CONFIG_PM_RUNTIME
1240static int bmc150_accel_runtime_suspend(struct device *dev)
1241{
1242 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1243 struct bmc150_accel_data *data = iio_priv(indio_dev);
1244
1245 dev_dbg(&data->client->dev, __func__);
1246
1247 return bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_SUSPEND, 0);
1248}
1249
1250static int bmc150_accel_runtime_resume(struct device *dev)
1251{
1252 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1253 struct bmc150_accel_data *data = iio_priv(indio_dev);
1254 int ret;
1255 int sleep_val;
1256
1257 dev_dbg(&data->client->dev, __func__);
1258
1259 ret = bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_NORMAL, 0);
1260 if (ret < 0)
1261 return ret;
1262
1263 sleep_val = bmc150_accel_get_startup_times(data);
1264 if (sleep_val < 20)
1265 usleep_range(sleep_val * 1000, 20000);
1266 else
1267 msleep_interruptible(sleep_val);
1268
1269 return 0;
1270}
1271#endif
1272
1273static const struct dev_pm_ops bmc150_accel_pm_ops = {
1274 SET_SYSTEM_SLEEP_PM_OPS(bmc150_accel_suspend, bmc150_accel_resume)
1275 SET_RUNTIME_PM_OPS(bmc150_accel_runtime_suspend,
1276 bmc150_accel_runtime_resume, NULL)
1277};
1278
1279static const struct acpi_device_id bmc150_accel_acpi_match[] = {
1280 {"BSBA0150", 0},
1281 {"BMC150A", 0},
1282 { },
1283};
1284MODULE_DEVICE_TABLE(acpi, bmc150_accel_acpi_match);
1285
1286static const struct i2c_device_id bmc150_accel_id[] = {
1287 {"bmc150_accel", 0},
1288 {}
1289};
1290
1291MODULE_DEVICE_TABLE(i2c, bmc150_accel_id);
1292
1293static struct i2c_driver bmc150_accel_driver = {
1294 .driver = {
1295 .name = BMC150_ACCEL_DRV_NAME,
1296 .acpi_match_table = ACPI_PTR(bmc150_accel_acpi_match),
1297 .pm = &bmc150_accel_pm_ops,
1298 },
1299 .probe = bmc150_accel_probe,
1300 .remove = bmc150_accel_remove,
1301 .id_table = bmc150_accel_id,
1302};
1303module_i2c_driver(bmc150_accel_driver);
1304
1305MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
1306MODULE_LICENSE("GPL v2");
1307MODULE_DESCRIPTION("BMC150 accelerometer driver");
diff --git a/drivers/iio/accel/kxcjk-1013.c b/drivers/iio/accel/kxcjk-1013.c
index 7941cf2d31ee..57c515bf0fd2 100644
--- a/drivers/iio/accel/kxcjk-1013.c
+++ b/drivers/iio/accel/kxcjk-1013.c
@@ -21,6 +21,8 @@
21#include <linux/string.h> 21#include <linux/string.h>
22#include <linux/acpi.h> 22#include <linux/acpi.h>
23#include <linux/gpio/consumer.h> 23#include <linux/gpio/consumer.h>
24#include <linux/pm.h>
25#include <linux/pm_runtime.h>
24#include <linux/iio/iio.h> 26#include <linux/iio/iio.h>
25#include <linux/iio/sysfs.h> 27#include <linux/iio/sysfs.h>
26#include <linux/iio/buffer.h> 28#include <linux/iio/buffer.h>
@@ -71,15 +73,18 @@
71#define KXCJK1013_DATA_MASK_12_BIT 0x0FFF 73#define KXCJK1013_DATA_MASK_12_BIT 0x0FFF
72#define KXCJK1013_MAX_STARTUP_TIME_US 100000 74#define KXCJK1013_MAX_STARTUP_TIME_US 100000
73 75
76#define KXCJK1013_SLEEP_DELAY_MS 2000
77
74struct kxcjk1013_data { 78struct kxcjk1013_data {
75 struct i2c_client *client; 79 struct i2c_client *client;
76 struct iio_trigger *trig; 80 struct iio_trigger *trig;
77 bool trig_mode; 81 bool trig_mode;
78 struct mutex mutex; 82 struct mutex mutex;
79 s16 buffer[8]; 83 s16 buffer[8];
80 int power_state;
81 u8 odr_bits; 84 u8 odr_bits;
85 u8 range;
82 bool active_high_intr; 86 bool active_high_intr;
87 bool trigger_on;
83}; 88};
84 89
85enum kxcjk1013_axis { 90enum kxcjk1013_axis {
@@ -93,6 +98,12 @@ enum kxcjk1013_mode {
93 OPERATION, 98 OPERATION,
94}; 99};
95 100
101enum kxcjk1013_range {
102 KXCJK1013_RANGE_2G,
103 KXCJK1013_RANGE_4G,
104 KXCJK1013_RANGE_8G,
105};
106
96static const struct { 107static const struct {
97 int val; 108 int val;
98 int val2; 109 int val2;
@@ -112,6 +123,14 @@ static const struct {
112 {0x02, 21000}, {0x03, 11000}, {0x04, 6400}, 123 {0x02, 21000}, {0x03, 11000}, {0x04, 6400},
113 {0x05, 3900}, {0x06, 2700}, {0x07, 2100} }; 124 {0x05, 3900}, {0x06, 2700}, {0x07, 2100} };
114 125
126static const struct {
127 u16 scale;
128 u8 gsel_0;
129 u8 gsel_1;
130} KXCJK1013_scale_table[] = { {9582, 0, 0},
131 {19163, 1, 0},
132 {38326, 0, 1} };
133
115static int kxcjk1013_set_mode(struct kxcjk1013_data *data, 134static int kxcjk1013_set_mode(struct kxcjk1013_data *data,
116 enum kxcjk1013_mode mode) 135 enum kxcjk1013_mode mode)
117{ 136{
@@ -138,6 +157,51 @@ static int kxcjk1013_set_mode(struct kxcjk1013_data *data,
138 return 0; 157 return 0;
139} 158}
140 159
160static int kxcjk1013_get_mode(struct kxcjk1013_data *data,
161 enum kxcjk1013_mode *mode)
162{
163 int ret;
164
165 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
166 if (ret < 0) {
167 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
168 return ret;
169 }
170
171 if (ret & KXCJK1013_REG_CTRL1_BIT_PC1)
172 *mode = OPERATION;
173 else
174 *mode = STANDBY;
175
176 return 0;
177}
178
179static int kxcjk1013_set_range(struct kxcjk1013_data *data, int range_index)
180{
181 int ret;
182
183 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
184 if (ret < 0) {
185 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
186 return ret;
187 }
188
189 ret |= (KXCJK1013_scale_table[range_index].gsel_0 << 3);
190 ret |= (KXCJK1013_scale_table[range_index].gsel_1 << 4);
191
192 ret = i2c_smbus_write_byte_data(data->client,
193 KXCJK1013_REG_CTRL1,
194 ret);
195 if (ret < 0) {
196 dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
197 return ret;
198 }
199
200 data->range = range_index;
201
202 return 0;
203}
204
141static int kxcjk1013_chip_init(struct kxcjk1013_data *data) 205static int kxcjk1013_chip_init(struct kxcjk1013_data *data)
142{ 206{
143 int ret; 207 int ret;
@@ -160,10 +224,6 @@ static int kxcjk1013_chip_init(struct kxcjk1013_data *data)
160 return ret; 224 return ret;
161 } 225 }
162 226
163 /* Setting range to 4G */
164 ret |= KXCJK1013_REG_CTRL1_BIT_GSEL0;
165 ret &= ~KXCJK1013_REG_CTRL1_BIT_GSEL1;
166
167 /* Set 12 bit mode */ 227 /* Set 12 bit mode */
168 ret |= KXCJK1013_REG_CTRL1_BIT_RES; 228 ret |= KXCJK1013_REG_CTRL1_BIT_RES;
169 229
@@ -174,6 +234,14 @@ static int kxcjk1013_chip_init(struct kxcjk1013_data *data)
174 return ret; 234 return ret;
175 } 235 }
176 236
237 /* Setting range to 4G */
238 ret = kxcjk1013_set_range(data, KXCJK1013_RANGE_4G);
239 if (ret < 0)
240 return ret;
241
242 data->range = KXCJK1013_RANGE_4G;
243
244
177 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_DATA_CTRL); 245 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_DATA_CTRL);
178 if (ret < 0) { 246 if (ret < 0) {
179 dev_err(&data->client->dev, "Error reading reg_data_ctrl\n"); 247 dev_err(&data->client->dev, "Error reading reg_data_ctrl\n");
@@ -201,6 +269,41 @@ static int kxcjk1013_chip_init(struct kxcjk1013_data *data)
201 return ret; 269 return ret;
202 } 270 }
203 271
272 ret = kxcjk1013_set_mode(data, OPERATION);
273 if (ret < 0)
274 return ret;
275
276 return 0;
277}
278
279static int kxcjk1013_get_startup_times(struct kxcjk1013_data *data)
280{
281 int i;
282
283 for (i = 0; i < ARRAY_SIZE(odr_start_up_times); ++i) {
284 if (odr_start_up_times[i].odr_bits == data->odr_bits)
285 return odr_start_up_times[i].usec;
286 }
287
288 return KXCJK1013_MAX_STARTUP_TIME_US;
289}
290
291static int kxcjk1013_set_power_state(struct kxcjk1013_data *data, bool on)
292{
293 int ret;
294
295 if (on)
296 ret = pm_runtime_get_sync(&data->client->dev);
297 else {
298 pm_runtime_mark_last_busy(&data->client->dev);
299 ret = pm_runtime_put_autosuspend(&data->client->dev);
300 }
301 if (ret < 0) {
302 dev_err(&data->client->dev,
303 "Failed: kxcjk1013_set_power_state for %d\n", on);
304 return ret;
305 }
306
204 return 0; 307 return 0;
205} 308}
206 309
@@ -208,6 +311,11 @@ static int kxcjk1013_chip_setup_interrupt(struct kxcjk1013_data *data,
208 bool status) 311 bool status)
209{ 312{
210 int ret; 313 int ret;
314 enum kxcjk1013_mode store_mode;
315
316 ret = kxcjk1013_get_mode(data, &store_mode);
317 if (ret < 0)
318 return ret;
211 319
212 /* This is requirement by spec to change state to STANDBY */ 320 /* This is requirement by spec to change state to STANDBY */
213 ret = kxcjk1013_set_mode(data, STANDBY); 321 ret = kxcjk1013_set_mode(data, STANDBY);
@@ -250,7 +358,13 @@ static int kxcjk1013_chip_setup_interrupt(struct kxcjk1013_data *data,
250 return ret; 358 return ret;
251 } 359 }
252 360
253 return ret; 361 if (store_mode == OPERATION) {
362 ret = kxcjk1013_set_mode(data, OPERATION);
363 if (ret < 0)
364 return ret;
365 }
366
367 return 0;
254} 368}
255 369
256static int kxcjk1013_convert_freq_to_bit(int val, int val2) 370static int kxcjk1013_convert_freq_to_bit(int val, int val2)
@@ -271,6 +385,11 @@ static int kxcjk1013_set_odr(struct kxcjk1013_data *data, int val, int val2)
271{ 385{
272 int ret; 386 int ret;
273 int odr_bits; 387 int odr_bits;
388 enum kxcjk1013_mode store_mode;
389
390 ret = kxcjk1013_get_mode(data, &store_mode);
391 if (ret < 0)
392 return ret;
274 393
275 odr_bits = kxcjk1013_convert_freq_to_bit(val, val2); 394 odr_bits = kxcjk1013_convert_freq_to_bit(val, val2);
276 if (odr_bits < 0) 395 if (odr_bits < 0)
@@ -290,9 +409,7 @@ static int kxcjk1013_set_odr(struct kxcjk1013_data *data, int val, int val2)
290 409
291 data->odr_bits = odr_bits; 410 data->odr_bits = odr_bits;
292 411
293 /* Check, if the ODR is changed after data enable */ 412 if (store_mode == OPERATION) {
294 if (data->power_state) {
295 /* Set the state back to operation */
296 ret = kxcjk1013_set_mode(data, OPERATION); 413 ret = kxcjk1013_set_mode(data, OPERATION);
297 if (ret < 0) 414 if (ret < 0)
298 return ret; 415 return ret;
@@ -331,16 +448,38 @@ static int kxcjk1013_get_acc_reg(struct kxcjk1013_data *data, int axis)
331 return ret; 448 return ret;
332} 449}
333 450
334static int kxcjk1013_get_startup_times(struct kxcjk1013_data *data) 451static int kxcjk1013_set_scale(struct kxcjk1013_data *data, int val)
335{ 452{
336 int i; 453 int ret, i;
454 enum kxcjk1013_mode store_mode;
337 455
338 for (i = 0; i < ARRAY_SIZE(odr_start_up_times); ++i) { 456
339 if (odr_start_up_times[i].odr_bits == data->odr_bits) 457 for (i = 0; i < ARRAY_SIZE(KXCJK1013_scale_table); ++i) {
340 return odr_start_up_times[i].usec; 458 if (KXCJK1013_scale_table[i].scale == val) {
459
460 ret = kxcjk1013_get_mode(data, &store_mode);
461 if (ret < 0)
462 return ret;
463
464 ret = kxcjk1013_set_mode(data, STANDBY);
465 if (ret < 0)
466 return ret;
467
468 ret = kxcjk1013_set_range(data, i);
469 if (ret < 0)
470 return ret;
471
472 if (store_mode == OPERATION) {
473 ret = kxcjk1013_set_mode(data, OPERATION);
474 if (ret)
475 return ret;
476 }
477
478 return 0;
479 }
341 } 480 }
342 481
343 return KXCJK1013_MAX_STARTUP_TIME_US; 482 return -EINVAL;
344} 483}
345 484
346static int kxcjk1013_read_raw(struct iio_dev *indio_dev, 485static int kxcjk1013_read_raw(struct iio_dev *indio_dev,
@@ -356,34 +495,30 @@ static int kxcjk1013_read_raw(struct iio_dev *indio_dev,
356 if (iio_buffer_enabled(indio_dev)) 495 if (iio_buffer_enabled(indio_dev))
357 ret = -EBUSY; 496 ret = -EBUSY;
358 else { 497 else {
359 int sleep_val; 498 ret = kxcjk1013_set_power_state(data, true);
360
361 ret = kxcjk1013_set_mode(data, OPERATION);
362 if (ret < 0) { 499 if (ret < 0) {
363 mutex_unlock(&data->mutex); 500 mutex_unlock(&data->mutex);
364 return ret; 501 return ret;
365 } 502 }
366 ++data->power_state;
367 sleep_val = kxcjk1013_get_startup_times(data);
368 if (sleep_val < 20000)
369 usleep_range(sleep_val, 20000);
370 else
371 msleep_interruptible(sleep_val/1000);
372 ret = kxcjk1013_get_acc_reg(data, chan->scan_index); 503 ret = kxcjk1013_get_acc_reg(data, chan->scan_index);
373 if (--data->power_state == 0) 504 if (ret < 0) {
374 kxcjk1013_set_mode(data, STANDBY); 505 kxcjk1013_set_power_state(data, false);
506 mutex_unlock(&data->mutex);
507 return ret;
508 }
509 *val = sign_extend32(ret >> 4, 11);
510 ret = kxcjk1013_set_power_state(data, false);
375 } 511 }
376 mutex_unlock(&data->mutex); 512 mutex_unlock(&data->mutex);
377 513
378 if (ret < 0) 514 if (ret < 0)
379 return ret; 515 return ret;
380 516
381 *val = sign_extend32(ret >> 4, 11);
382 return IIO_VAL_INT; 517 return IIO_VAL_INT;
383 518
384 case IIO_CHAN_INFO_SCALE: 519 case IIO_CHAN_INFO_SCALE:
385 *val = 0; 520 *val = 0;
386 *val2 = 19163; /* range +-4g (4/2047*9.806650) */ 521 *val2 = KXCJK1013_scale_table[data->range].scale;
387 return IIO_VAL_INT_PLUS_MICRO; 522 return IIO_VAL_INT_PLUS_MICRO;
388 523
389 case IIO_CHAN_INFO_SAMP_FREQ: 524 case IIO_CHAN_INFO_SAMP_FREQ:
@@ -410,6 +545,14 @@ static int kxcjk1013_write_raw(struct iio_dev *indio_dev,
410 ret = kxcjk1013_set_odr(data, val, val2); 545 ret = kxcjk1013_set_odr(data, val, val2);
411 mutex_unlock(&data->mutex); 546 mutex_unlock(&data->mutex);
412 break; 547 break;
548 case IIO_CHAN_INFO_SCALE:
549 if (val)
550 return -EINVAL;
551
552 mutex_lock(&data->mutex);
553 ret = kxcjk1013_set_scale(data, val2);
554 mutex_unlock(&data->mutex);
555 break;
413 default: 556 default:
414 ret = -EINVAL; 557 ret = -EINVAL;
415 } 558 }
@@ -431,8 +574,11 @@ static int kxcjk1013_validate_trigger(struct iio_dev *indio_dev,
431static IIO_CONST_ATTR_SAMP_FREQ_AVAIL( 574static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
432 "0.781000 1.563000 3.125000 6.250000 12.500000 25 50 100 200 400 800 1600"); 575 "0.781000 1.563000 3.125000 6.250000 12.500000 25 50 100 200 400 800 1600");
433 576
577static IIO_CONST_ATTR(in_accel_scale_available, "0.009582 0.019163 0.038326");
578
434static struct attribute *kxcjk1013_attributes[] = { 579static struct attribute *kxcjk1013_attributes[] = {
435 &iio_const_attr_sampling_frequency_available.dev_attr.attr, 580 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
581 &iio_const_attr_in_accel_scale_available.dev_attr.attr,
436 NULL, 582 NULL,
437}; 583};
438 584
@@ -520,20 +666,21 @@ static int kxcjk1013_data_rdy_trigger_set_state(struct iio_trigger *trig,
520{ 666{
521 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); 667 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
522 struct kxcjk1013_data *data = iio_priv(indio_dev); 668 struct kxcjk1013_data *data = iio_priv(indio_dev);
669 int ret;
670
671 if (state && data->trigger_on)
672 return 0;
523 673
524 mutex_lock(&data->mutex); 674 mutex_lock(&data->mutex);
525 if (state) { 675 ret = kxcjk1013_chip_setup_interrupt(data, state);
526 kxcjk1013_chip_setup_interrupt(data, true); 676 if (!ret) {
527 kxcjk1013_set_mode(data, OPERATION); 677 ret = kxcjk1013_set_power_state(data, state);
528 ++data->power_state; 678 if (ret < 0) {
529 } else {
530 if (--data->power_state) {
531 mutex_unlock(&data->mutex); 679 mutex_unlock(&data->mutex);
532 return 0; 680 return ret;
533 } 681 }
534 kxcjk1013_chip_setup_interrupt(data, false);
535 kxcjk1013_set_mode(data, STANDBY);
536 } 682 }
683 data->trigger_on = state;
537 mutex_unlock(&data->mutex); 684 mutex_unlock(&data->mutex);
538 685
539 return 0; 686 return 0;
@@ -661,14 +808,25 @@ static int kxcjk1013_probe(struct i2c_client *client,
661 } 808 }
662 } 809 }
663 810
664 ret = devm_iio_device_register(&client->dev, indio_dev); 811 ret = iio_device_register(indio_dev);
665 if (ret < 0) { 812 if (ret < 0) {
666 dev_err(&client->dev, "unable to register iio device\n"); 813 dev_err(&client->dev, "unable to register iio device\n");
667 goto err_buffer_cleanup; 814 goto err_buffer_cleanup;
668 } 815 }
669 816
817 ret = pm_runtime_set_active(&client->dev);
818 if (ret)
819 goto err_iio_unregister;
820
821 pm_runtime_enable(&client->dev);
822 pm_runtime_set_autosuspend_delay(&client->dev,
823 KXCJK1013_SLEEP_DELAY_MS);
824 pm_runtime_use_autosuspend(&client->dev);
825
670 return 0; 826 return 0;
671 827
828err_iio_unregister:
829 iio_device_unregister(indio_dev);
672err_buffer_cleanup: 830err_buffer_cleanup:
673 if (data->trig_mode) 831 if (data->trig_mode)
674 iio_triggered_buffer_cleanup(indio_dev); 832 iio_triggered_buffer_cleanup(indio_dev);
@@ -687,6 +845,12 @@ static int kxcjk1013_remove(struct i2c_client *client)
687 struct iio_dev *indio_dev = i2c_get_clientdata(client); 845 struct iio_dev *indio_dev = i2c_get_clientdata(client);
688 struct kxcjk1013_data *data = iio_priv(indio_dev); 846 struct kxcjk1013_data *data = iio_priv(indio_dev);
689 847
848 pm_runtime_disable(&client->dev);
849 pm_runtime_set_suspended(&client->dev);
850 pm_runtime_put_noidle(&client->dev);
851
852 iio_device_unregister(indio_dev);
853
690 if (data->trig_mode) { 854 if (data->trig_mode) {
691 iio_triggered_buffer_cleanup(indio_dev); 855 iio_triggered_buffer_cleanup(indio_dev);
692 iio_trigger_unregister(data->trig); 856 iio_trigger_unregister(data->trig);
@@ -705,35 +869,67 @@ static int kxcjk1013_suspend(struct device *dev)
705{ 869{
706 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 870 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
707 struct kxcjk1013_data *data = iio_priv(indio_dev); 871 struct kxcjk1013_data *data = iio_priv(indio_dev);
872 int ret;
708 873
709 mutex_lock(&data->mutex); 874 mutex_lock(&data->mutex);
710 kxcjk1013_set_mode(data, STANDBY); 875 ret = kxcjk1013_set_mode(data, STANDBY);
711 mutex_unlock(&data->mutex); 876 mutex_unlock(&data->mutex);
712 877
713 return 0; 878 return ret;
714} 879}
715 880
716static int kxcjk1013_resume(struct device *dev) 881static int kxcjk1013_resume(struct device *dev)
717{ 882{
718 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 883 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
719 struct kxcjk1013_data *data = iio_priv(indio_dev); 884 struct kxcjk1013_data *data = iio_priv(indio_dev);
885 int ret = 0;
720 886
721 mutex_lock(&data->mutex); 887 mutex_lock(&data->mutex);
888 /* Check, if the suspend occured while active */
889 if (data->trigger_on)
890 ret = kxcjk1013_set_mode(data, OPERATION);
891 mutex_unlock(&data->mutex);
722 892
723 if (data->power_state) 893 return ret;
724 kxcjk1013_set_mode(data, OPERATION); 894}
895#endif
725 896
726 mutex_unlock(&data->mutex); 897#ifdef CONFIG_PM_RUNTIME
898static int kxcjk1013_runtime_suspend(struct device *dev)
899{
900 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
901 struct kxcjk1013_data *data = iio_priv(indio_dev);
727 902
728 return 0; 903 return kxcjk1013_set_mode(data, STANDBY);
729} 904}
730 905
731static SIMPLE_DEV_PM_OPS(kxcjk1013_pm_ops, kxcjk1013_suspend, kxcjk1013_resume); 906static int kxcjk1013_runtime_resume(struct device *dev)
732#define KXCJK1013_PM_OPS (&kxcjk1013_pm_ops) 907{
733#else 908 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
734#define KXCJK1013_PM_OPS NULL 909 struct kxcjk1013_data *data = iio_priv(indio_dev);
910 int ret;
911 int sleep_val;
912
913 ret = kxcjk1013_set_mode(data, OPERATION);
914 if (ret < 0)
915 return ret;
916
917 sleep_val = kxcjk1013_get_startup_times(data);
918 if (sleep_val < 20000)
919 usleep_range(sleep_val, 20000);
920 else
921 msleep_interruptible(sleep_val/1000);
922
923 return 0;
924}
735#endif 925#endif
736 926
927static const struct dev_pm_ops kxcjk1013_pm_ops = {
928 SET_SYSTEM_SLEEP_PM_OPS(kxcjk1013_suspend, kxcjk1013_resume)
929 SET_RUNTIME_PM_OPS(kxcjk1013_runtime_suspend,
930 kxcjk1013_runtime_resume, NULL)
931};
932
737static const struct acpi_device_id kx_acpi_match[] = { 933static const struct acpi_device_id kx_acpi_match[] = {
738 {"KXCJ1013", 0}, 934 {"KXCJ1013", 0},
739 { }, 935 { },
@@ -751,7 +947,7 @@ static struct i2c_driver kxcjk1013_driver = {
751 .driver = { 947 .driver = {
752 .name = KXCJK1013_DRV_NAME, 948 .name = KXCJK1013_DRV_NAME,
753 .acpi_match_table = ACPI_PTR(kx_acpi_match), 949 .acpi_match_table = ACPI_PTR(kx_acpi_match),
754 .pm = KXCJK1013_PM_OPS, 950 .pm = &kxcjk1013_pm_ops,
755 }, 951 },
756 .probe = kxcjk1013_probe, 952 .probe = kxcjk1013_probe,
757 .remove = kxcjk1013_remove, 953 .remove = kxcjk1013_remove,
diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
index 11b048a59fde..88bdc8f612e2 100644
--- a/drivers/iio/adc/Kconfig
+++ b/drivers/iio/adc/Kconfig
@@ -129,7 +129,7 @@ config AT91_ADC
129 129
130config EXYNOS_ADC 130config EXYNOS_ADC
131 tristate "Exynos ADC driver support" 131 tristate "Exynos ADC driver support"
132 depends on ARCH_EXYNOS || (OF && COMPILE_TEST) 132 depends on ARCH_EXYNOS || ARCH_S3C24XX || ARCH_S3C64XX || (OF && COMPILE_TEST)
133 help 133 help
134 Core support for the ADC block found in the Samsung EXYNOS series 134 Core support for the ADC block found in the Samsung EXYNOS series
135 of SoCs for drivers such as the touchscreen and hwmon to use to share 135 of SoCs for drivers such as the touchscreen and hwmon to use to share
@@ -206,6 +206,16 @@ config NAU7802
206 To compile this driver as a module, choose M here: the 206 To compile this driver as a module, choose M here: the
207 module will be called nau7802. 207 module will be called nau7802.
208 208
209config ROCKCHIP_SARADC
210 tristate "Rockchip SARADC driver"
211 depends on ARCH_ROCKCHIP || (ARM && COMPILE_TEST)
212 help
213 Say yes here to build support for the SARADC found in SoCs from
214 Rockchip.
215
216 To compile this driver as a module, choose M here: the
217 module will be called rockchip_saradc.
218
209config TI_ADC081C 219config TI_ADC081C
210 tristate "Texas Instruments ADC081C021/027" 220 tristate "Texas Instruments ADC081C021/027"
211 depends on I2C 221 depends on I2C
@@ -216,6 +226,16 @@ config TI_ADC081C
216 This driver can also be built as a module. If so, the module will be 226 This driver can also be built as a module. If so, the module will be
217 called ti-adc081c. 227 called ti-adc081c.
218 228
229config TI_ADC128S052
230 tristate "Texas Instruments ADC128S052"
231 depends on SPI
232 help
233 If you say yes here you get support for Texas Instruments ADC128S052
234 chip.
235
236 This driver can also be built as a module. If so, the module will be
237 called ti-adc128s052.
238
219config TI_AM335X_ADC 239config TI_AM335X_ADC
220 tristate "TI's AM335X ADC driver" 240 tristate "TI's AM335X ADC driver"
221 depends on MFD_TI_AM335X_TSCADC 241 depends on MFD_TI_AM335X_TSCADC
diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
index ad81b512aa3d..cb88a6a23b8f 100644
--- a/drivers/iio/adc/Makefile
+++ b/drivers/iio/adc/Makefile
@@ -22,7 +22,9 @@ obj-$(CONFIG_MCP320X) += mcp320x.o
22obj-$(CONFIG_MCP3422) += mcp3422.o 22obj-$(CONFIG_MCP3422) += mcp3422.o
23obj-$(CONFIG_MEN_Z188_ADC) += men_z188_adc.o 23obj-$(CONFIG_MEN_Z188_ADC) += men_z188_adc.o
24obj-$(CONFIG_NAU7802) += nau7802.o 24obj-$(CONFIG_NAU7802) += nau7802.o
25obj-$(CONFIG_ROCKCHIP_SARADC) += rockchip_saradc.o
25obj-$(CONFIG_TI_ADC081C) += ti-adc081c.o 26obj-$(CONFIG_TI_ADC081C) += ti-adc081c.o
27obj-$(CONFIG_TI_ADC128S052) += ti-adc128s052.o
26obj-$(CONFIG_TI_AM335X_ADC) += ti_am335x_adc.o 28obj-$(CONFIG_TI_AM335X_ADC) += ti_am335x_adc.o
27obj-$(CONFIG_TWL4030_MADC) += twl4030-madc.o 29obj-$(CONFIG_TWL4030_MADC) += twl4030-madc.o
28obj-$(CONFIG_TWL6030_GPADC) += twl6030-gpadc.o 30obj-$(CONFIG_TWL6030_GPADC) += twl6030-gpadc.o
diff --git a/drivers/iio/adc/exynos_adc.c b/drivers/iio/adc/exynos_adc.c
index fc9dfc23ecb7..c59012d2d06f 100644
--- a/drivers/iio/adc/exynos_adc.c
+++ b/drivers/iio/adc/exynos_adc.c
@@ -40,13 +40,16 @@
40#include <linux/iio/machine.h> 40#include <linux/iio/machine.h>
41#include <linux/iio/driver.h> 41#include <linux/iio/driver.h>
42 42
43/* EXYNOS4412/5250 ADC_V1 registers definitions */ 43/* S3C/EXYNOS4412/5250 ADC_V1 registers definitions */
44#define ADC_V1_CON(x) ((x) + 0x00) 44#define ADC_V1_CON(x) ((x) + 0x00)
45#define ADC_V1_DLY(x) ((x) + 0x08) 45#define ADC_V1_DLY(x) ((x) + 0x08)
46#define ADC_V1_DATX(x) ((x) + 0x0C) 46#define ADC_V1_DATX(x) ((x) + 0x0C)
47#define ADC_V1_INTCLR(x) ((x) + 0x18) 47#define ADC_V1_INTCLR(x) ((x) + 0x18)
48#define ADC_V1_MUX(x) ((x) + 0x1c) 48#define ADC_V1_MUX(x) ((x) + 0x1c)
49 49
50/* S3C2410 ADC registers definitions */
51#define ADC_S3C2410_MUX(x) ((x) + 0x18)
52
50/* Future ADC_V2 registers definitions */ 53/* Future ADC_V2 registers definitions */
51#define ADC_V2_CON1(x) ((x) + 0x00) 54#define ADC_V2_CON1(x) ((x) + 0x00)
52#define ADC_V2_CON2(x) ((x) + 0x04) 55#define ADC_V2_CON2(x) ((x) + 0x04)
@@ -61,6 +64,11 @@
61#define ADC_V1_CON_PRSCLV(x) (((x) & 0xFF) << 6) 64#define ADC_V1_CON_PRSCLV(x) (((x) & 0xFF) << 6)
62#define ADC_V1_CON_STANDBY (1u << 2) 65#define ADC_V1_CON_STANDBY (1u << 2)
63 66
67/* Bit definitions for S3C2410 ADC */
68#define ADC_S3C2410_CON_SELMUX(x) (((x) & 7) << 3)
69#define ADC_S3C2410_DATX_MASK 0x3FF
70#define ADC_S3C2416_CON_RES_SEL (1u << 3)
71
64/* Bit definitions for ADC_V2 */ 72/* Bit definitions for ADC_V2 */
65#define ADC_V2_CON1_SOFT_RESET (1u << 2) 73#define ADC_V2_CON1_SOFT_RESET (1u << 2)
66 74
@@ -77,6 +85,7 @@
77 85
78/* Bit definitions common for ADC_V1 and ADC_V2 */ 86/* Bit definitions common for ADC_V1 and ADC_V2 */
79#define ADC_CON_EN_START (1u << 0) 87#define ADC_CON_EN_START (1u << 0)
88#define ADC_CON_EN_START_MASK (0x3 << 0)
80#define ADC_DATX_MASK 0xFFF 89#define ADC_DATX_MASK 0xFFF
81 90
82#define EXYNOS_ADC_TIMEOUT (msecs_to_jiffies(100)) 91#define EXYNOS_ADC_TIMEOUT (msecs_to_jiffies(100))
@@ -100,6 +109,8 @@ struct exynos_adc {
100struct exynos_adc_data { 109struct exynos_adc_data {
101 int num_channels; 110 int num_channels;
102 bool needs_sclk; 111 bool needs_sclk;
112 bool needs_adc_phy;
113 u32 mask;
103 114
104 void (*init_hw)(struct exynos_adc *info); 115 void (*init_hw)(struct exynos_adc *info);
105 void (*exit_hw)(struct exynos_adc *info); 116 void (*exit_hw)(struct exynos_adc *info);
@@ -171,7 +182,8 @@ static void exynos_adc_v1_init_hw(struct exynos_adc *info)
171{ 182{
172 u32 con1; 183 u32 con1;
173 184
174 writel(1, info->enable_reg); 185 if (info->data->needs_adc_phy)
186 writel(1, info->enable_reg);
175 187
176 /* set default prescaler values and Enable prescaler */ 188 /* set default prescaler values and Enable prescaler */
177 con1 = ADC_V1_CON_PRSCLV(49) | ADC_V1_CON_PRSCEN; 189 con1 = ADC_V1_CON_PRSCLV(49) | ADC_V1_CON_PRSCEN;
@@ -185,7 +197,8 @@ static void exynos_adc_v1_exit_hw(struct exynos_adc *info)
185{ 197{
186 u32 con; 198 u32 con;
187 199
188 writel(0, info->enable_reg); 200 if (info->data->needs_adc_phy)
201 writel(0, info->enable_reg);
189 202
190 con = readl(ADC_V1_CON(info->regs)); 203 con = readl(ADC_V1_CON(info->regs));
191 con |= ADC_V1_CON_STANDBY; 204 con |= ADC_V1_CON_STANDBY;
@@ -210,6 +223,8 @@ static void exynos_adc_v1_start_conv(struct exynos_adc *info,
210 223
211static const struct exynos_adc_data exynos_adc_v1_data = { 224static const struct exynos_adc_data exynos_adc_v1_data = {
212 .num_channels = MAX_ADC_V1_CHANNELS, 225 .num_channels = MAX_ADC_V1_CHANNELS,
226 .mask = ADC_DATX_MASK, /* 12 bit ADC resolution */
227 .needs_adc_phy = true,
213 228
214 .init_hw = exynos_adc_v1_init_hw, 229 .init_hw = exynos_adc_v1_init_hw,
215 .exit_hw = exynos_adc_v1_exit_hw, 230 .exit_hw = exynos_adc_v1_exit_hw,
@@ -217,11 +232,89 @@ static const struct exynos_adc_data exynos_adc_v1_data = {
217 .start_conv = exynos_adc_v1_start_conv, 232 .start_conv = exynos_adc_v1_start_conv,
218}; 233};
219 234
235static void exynos_adc_s3c2416_start_conv(struct exynos_adc *info,
236 unsigned long addr)
237{
238 u32 con1;
239
240 /* Enable 12 bit ADC resolution */
241 con1 = readl(ADC_V1_CON(info->regs));
242 con1 |= ADC_S3C2416_CON_RES_SEL;
243 writel(con1, ADC_V1_CON(info->regs));
244
245 /* Select channel for S3C2416 */
246 writel(addr, ADC_S3C2410_MUX(info->regs));
247
248 con1 = readl(ADC_V1_CON(info->regs));
249 writel(con1 | ADC_CON_EN_START, ADC_V1_CON(info->regs));
250}
251
252static struct exynos_adc_data const exynos_adc_s3c2416_data = {
253 .num_channels = MAX_ADC_V1_CHANNELS,
254 .mask = ADC_DATX_MASK, /* 12 bit ADC resolution */
255
256 .init_hw = exynos_adc_v1_init_hw,
257 .exit_hw = exynos_adc_v1_exit_hw,
258 .start_conv = exynos_adc_s3c2416_start_conv,
259};
260
261static void exynos_adc_s3c2443_start_conv(struct exynos_adc *info,
262 unsigned long addr)
263{
264 u32 con1;
265
266 /* Select channel for S3C2433 */
267 writel(addr, ADC_S3C2410_MUX(info->regs));
268
269 con1 = readl(ADC_V1_CON(info->regs));
270 writel(con1 | ADC_CON_EN_START, ADC_V1_CON(info->regs));
271}
272
273static struct exynos_adc_data const exynos_adc_s3c2443_data = {
274 .num_channels = MAX_ADC_V1_CHANNELS,
275 .mask = ADC_S3C2410_DATX_MASK, /* 10 bit ADC resolution */
276
277 .init_hw = exynos_adc_v1_init_hw,
278 .exit_hw = exynos_adc_v1_exit_hw,
279 .start_conv = exynos_adc_s3c2443_start_conv,
280};
281
282static void exynos_adc_s3c64xx_start_conv(struct exynos_adc *info,
283 unsigned long addr)
284{
285 u32 con1;
286
287 con1 = readl(ADC_V1_CON(info->regs));
288 con1 &= ~ADC_S3C2410_CON_SELMUX(0x7);
289 con1 |= ADC_S3C2410_CON_SELMUX(addr);
290 writel(con1 | ADC_CON_EN_START, ADC_V1_CON(info->regs));
291}
292
293static struct exynos_adc_data const exynos_adc_s3c24xx_data = {
294 .num_channels = MAX_ADC_V1_CHANNELS,
295 .mask = ADC_S3C2410_DATX_MASK, /* 10 bit ADC resolution */
296
297 .init_hw = exynos_adc_v1_init_hw,
298 .exit_hw = exynos_adc_v1_exit_hw,
299 .start_conv = exynos_adc_s3c64xx_start_conv,
300};
301
302static struct exynos_adc_data const exynos_adc_s3c64xx_data = {
303 .num_channels = MAX_ADC_V1_CHANNELS,
304 .mask = ADC_DATX_MASK, /* 12 bit ADC resolution */
305
306 .init_hw = exynos_adc_v1_init_hw,
307 .exit_hw = exynos_adc_v1_exit_hw,
308 .clear_irq = exynos_adc_v1_clear_irq,
309 .start_conv = exynos_adc_s3c64xx_start_conv,
310};
311
220static void exynos_adc_v2_init_hw(struct exynos_adc *info) 312static void exynos_adc_v2_init_hw(struct exynos_adc *info)
221{ 313{
222 u32 con1, con2; 314 u32 con1, con2;
223 315
224 writel(1, info->enable_reg); 316 if (info->data->needs_adc_phy)
317 writel(1, info->enable_reg);
225 318
226 con1 = ADC_V2_CON1_SOFT_RESET; 319 con1 = ADC_V2_CON1_SOFT_RESET;
227 writel(con1, ADC_V2_CON1(info->regs)); 320 writel(con1, ADC_V2_CON1(info->regs));
@@ -238,7 +331,8 @@ static void exynos_adc_v2_exit_hw(struct exynos_adc *info)
238{ 331{
239 u32 con; 332 u32 con;
240 333
241 writel(0, info->enable_reg); 334 if (info->data->needs_adc_phy)
335 writel(0, info->enable_reg);
242 336
243 con = readl(ADC_V2_CON1(info->regs)); 337 con = readl(ADC_V2_CON1(info->regs));
244 con &= ~ADC_CON_EN_START; 338 con &= ~ADC_CON_EN_START;
@@ -266,6 +360,8 @@ static void exynos_adc_v2_start_conv(struct exynos_adc *info,
266 360
267static const struct exynos_adc_data exynos_adc_v2_data = { 361static const struct exynos_adc_data exynos_adc_v2_data = {
268 .num_channels = MAX_ADC_V2_CHANNELS, 362 .num_channels = MAX_ADC_V2_CHANNELS,
363 .mask = ADC_DATX_MASK, /* 12 bit ADC resolution */
364 .needs_adc_phy = true,
269 365
270 .init_hw = exynos_adc_v2_init_hw, 366 .init_hw = exynos_adc_v2_init_hw,
271 .exit_hw = exynos_adc_v2_exit_hw, 367 .exit_hw = exynos_adc_v2_exit_hw,
@@ -275,7 +371,9 @@ static const struct exynos_adc_data exynos_adc_v2_data = {
275 371
276static const struct exynos_adc_data exynos3250_adc_data = { 372static const struct exynos_adc_data exynos3250_adc_data = {
277 .num_channels = MAX_EXYNOS3250_ADC_CHANNELS, 373 .num_channels = MAX_EXYNOS3250_ADC_CHANNELS,
374 .mask = ADC_DATX_MASK, /* 12 bit ADC resolution */
278 .needs_sclk = true, 375 .needs_sclk = true,
376 .needs_adc_phy = true,
279 377
280 .init_hw = exynos_adc_v2_init_hw, 378 .init_hw = exynos_adc_v2_init_hw,
281 .exit_hw = exynos_adc_v2_exit_hw, 379 .exit_hw = exynos_adc_v2_exit_hw,
@@ -285,6 +383,21 @@ static const struct exynos_adc_data exynos3250_adc_data = {
285 383
286static const struct of_device_id exynos_adc_match[] = { 384static const struct of_device_id exynos_adc_match[] = {
287 { 385 {
386 .compatible = "samsung,s3c2410-adc",
387 .data = &exynos_adc_s3c24xx_data,
388 }, {
389 .compatible = "samsung,s3c2416-adc",
390 .data = &exynos_adc_s3c2416_data,
391 }, {
392 .compatible = "samsung,s3c2440-adc",
393 .data = &exynos_adc_s3c24xx_data,
394 }, {
395 .compatible = "samsung,s3c2443-adc",
396 .data = &exynos_adc_s3c2443_data,
397 }, {
398 .compatible = "samsung,s3c6410-adc",
399 .data = &exynos_adc_s3c64xx_data,
400 }, {
288 .compatible = "samsung,exynos-adc-v1", 401 .compatible = "samsung,exynos-adc-v1",
289 .data = &exynos_adc_v1_data, 402 .data = &exynos_adc_v1_data,
290 }, { 403 }, {
@@ -347,9 +460,10 @@ static int exynos_read_raw(struct iio_dev *indio_dev,
347static irqreturn_t exynos_adc_isr(int irq, void *dev_id) 460static irqreturn_t exynos_adc_isr(int irq, void *dev_id)
348{ 461{
349 struct exynos_adc *info = (struct exynos_adc *)dev_id; 462 struct exynos_adc *info = (struct exynos_adc *)dev_id;
463 u32 mask = info->data->mask;
350 464
351 /* Read value */ 465 /* Read value */
352 info->value = readl(ADC_V1_DATX(info->regs)) & ADC_DATX_MASK; 466 info->value = readl(ADC_V1_DATX(info->regs)) & mask;
353 467
354 /* clear irq */ 468 /* clear irq */
355 if (info->data->clear_irq) 469 if (info->data->clear_irq)
@@ -442,10 +556,13 @@ static int exynos_adc_probe(struct platform_device *pdev)
442 if (IS_ERR(info->regs)) 556 if (IS_ERR(info->regs))
443 return PTR_ERR(info->regs); 557 return PTR_ERR(info->regs);
444 558
445 mem = platform_get_resource(pdev, IORESOURCE_MEM, 1); 559
446 info->enable_reg = devm_ioremap_resource(&pdev->dev, mem); 560 if (info->data->needs_adc_phy) {
447 if (IS_ERR(info->enable_reg)) 561 mem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
448 return PTR_ERR(info->enable_reg); 562 info->enable_reg = devm_ioremap_resource(&pdev->dev, mem);
563 if (IS_ERR(info->enable_reg))
564 return PTR_ERR(info->enable_reg);
565 }
449 566
450 irq = platform_get_irq(pdev, 0); 567 irq = platform_get_irq(pdev, 0);
451 if (irq < 0) { 568 if (irq < 0) {
diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c
new file mode 100644
index 000000000000..1fad9647cef4
--- /dev/null
+++ b/drivers/iio/adc/rockchip_saradc.c
@@ -0,0 +1,317 @@
1/*
2 * Rockchip Successive Approximation Register (SAR) A/D Converter
3 * Copyright (C) 2014 ROCKCHIP, Inc.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <linux/module.h>
17#include <linux/platform_device.h>
18#include <linux/interrupt.h>
19#include <linux/io.h>
20#include <linux/of.h>
21#include <linux/clk.h>
22#include <linux/completion.h>
23#include <linux/regulator/consumer.h>
24#include <linux/iio/iio.h>
25
26#define SARADC_DATA 0x00
27#define SARADC_DATA_MASK 0x3ff
28
29#define SARADC_STAS 0x04
30#define SARADC_STAS_BUSY BIT(0)
31
32#define SARADC_CTRL 0x08
33#define SARADC_CTRL_IRQ_STATUS BIT(6)
34#define SARADC_CTRL_IRQ_ENABLE BIT(5)
35#define SARADC_CTRL_POWER_CTRL BIT(3)
36#define SARADC_CTRL_CHN_MASK 0x7
37
38#define SARADC_DLY_PU_SOC 0x0c
39#define SARADC_DLY_PU_SOC_MASK 0x3f
40
41#define SARADC_BITS 10
42#define SARADC_TIMEOUT msecs_to_jiffies(100)
43
44struct rockchip_saradc {
45 void __iomem *regs;
46 struct clk *pclk;
47 struct clk *clk;
48 struct completion completion;
49 struct regulator *vref;
50 u16 last_val;
51};
52
53static int rockchip_saradc_read_raw(struct iio_dev *indio_dev,
54 struct iio_chan_spec const *chan,
55 int *val, int *val2, long mask)
56{
57 struct rockchip_saradc *info = iio_priv(indio_dev);
58 int ret;
59
60 switch (mask) {
61 case IIO_CHAN_INFO_RAW:
62 mutex_lock(&indio_dev->mlock);
63
64 reinit_completion(&info->completion);
65
66 /* 8 clock periods as delay between power up and start cmd */
67 writel_relaxed(8, info->regs + SARADC_DLY_PU_SOC);
68
69 /* Select the channel to be used and trigger conversion */
70 writel(SARADC_CTRL_POWER_CTRL
71 | (chan->channel & SARADC_CTRL_CHN_MASK)
72 | SARADC_CTRL_IRQ_ENABLE,
73 info->regs + SARADC_CTRL);
74
75 if (!wait_for_completion_timeout(&info->completion,
76 SARADC_TIMEOUT)) {
77 writel_relaxed(0, info->regs + SARADC_CTRL);
78 mutex_unlock(&indio_dev->mlock);
79 return -ETIMEDOUT;
80 }
81
82 *val = info->last_val;
83 mutex_unlock(&indio_dev->mlock);
84 return IIO_VAL_INT;
85 case IIO_CHAN_INFO_SCALE:
86 ret = regulator_get_voltage(info->vref);
87 if (ret < 0) {
88 dev_err(&indio_dev->dev, "failed to get voltage\n");
89 return ret;
90 }
91
92 *val = ret / 1000;
93 *val2 = SARADC_BITS;
94 return IIO_VAL_FRACTIONAL_LOG2;
95 default:
96 return -EINVAL;
97 }
98}
99
100static irqreturn_t rockchip_saradc_isr(int irq, void *dev_id)
101{
102 struct rockchip_saradc *info = (struct rockchip_saradc *)dev_id;
103
104 /* Read value */
105 info->last_val = readl_relaxed(info->regs + SARADC_DATA);
106 info->last_val &= SARADC_DATA_MASK;
107
108 /* Clear irq & power down adc */
109 writel_relaxed(0, info->regs + SARADC_CTRL);
110
111 complete(&info->completion);
112
113 return IRQ_HANDLED;
114}
115
116static const struct iio_info rockchip_saradc_iio_info = {
117 .read_raw = rockchip_saradc_read_raw,
118 .driver_module = THIS_MODULE,
119};
120
121#define ADC_CHANNEL(_index, _id) { \
122 .type = IIO_VOLTAGE, \
123 .indexed = 1, \
124 .channel = _index, \
125 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
126 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
127 .datasheet_name = _id, \
128}
129
130static const struct iio_chan_spec rockchip_saradc_iio_channels[] = {
131 ADC_CHANNEL(0, "adc0"),
132 ADC_CHANNEL(1, "adc1"),
133 ADC_CHANNEL(2, "adc2"),
134};
135
136static int rockchip_saradc_probe(struct platform_device *pdev)
137{
138 struct rockchip_saradc *info = NULL;
139 struct device_node *np = pdev->dev.of_node;
140 struct iio_dev *indio_dev = NULL;
141 struct resource *mem;
142 int ret;
143 int irq;
144 u32 rate;
145
146 if (!np)
147 return -ENODEV;
148
149 indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info));
150 if (!indio_dev) {
151 dev_err(&pdev->dev, "failed allocating iio device\n");
152 return -ENOMEM;
153 }
154 info = iio_priv(indio_dev);
155
156 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
157 info->regs = devm_ioremap_resource(&pdev->dev, mem);
158 if (IS_ERR(info->regs))
159 return PTR_ERR(info->regs);
160
161 init_completion(&info->completion);
162
163 irq = platform_get_irq(pdev, 0);
164 if (irq < 0) {
165 dev_err(&pdev->dev, "no irq resource?\n");
166 return irq;
167 }
168
169 ret = devm_request_irq(&pdev->dev, irq, rockchip_saradc_isr,
170 0, dev_name(&pdev->dev), info);
171 if (ret < 0) {
172 dev_err(&pdev->dev, "failed requesting irq %d\n", irq);
173 return ret;
174 }
175
176 info->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
177 if (IS_ERR(info->pclk)) {
178 dev_err(&pdev->dev, "failed to get pclk\n");
179 return PTR_ERR(info->pclk);
180 }
181
182 info->clk = devm_clk_get(&pdev->dev, "saradc");
183 if (IS_ERR(info->clk)) {
184 dev_err(&pdev->dev, "failed to get adc clock\n");
185 return PTR_ERR(info->clk);
186 }
187
188 info->vref = devm_regulator_get(&pdev->dev, "vref");
189 if (IS_ERR(info->vref)) {
190 dev_err(&pdev->dev, "failed to get regulator, %ld\n",
191 PTR_ERR(info->vref));
192 return PTR_ERR(info->vref);
193 }
194
195 /*
196 * Use a default of 1MHz for the converter clock.
197 * This may become user-configurable in the future.
198 */
199 ret = clk_set_rate(info->clk, 1000000);
200 if (ret < 0) {
201 dev_err(&pdev->dev, "failed to set adc clk rate, %d\n", ret);
202 return ret;
203 }
204
205 ret = regulator_enable(info->vref);
206 if (ret < 0) {
207 dev_err(&pdev->dev, "failed to enable vref regulator\n");
208 return ret;
209 }
210
211 ret = clk_prepare_enable(info->pclk);
212 if (ret < 0) {
213 dev_err(&pdev->dev, "failed to enable pclk\n");
214 goto err_reg_voltage;
215 }
216
217 ret = clk_prepare_enable(info->clk);
218 if (ret < 0) {
219 dev_err(&pdev->dev, "failed to enable converter clock\n");
220 goto err_pclk;
221 }
222
223 platform_set_drvdata(pdev, indio_dev);
224
225 indio_dev->name = dev_name(&pdev->dev);
226 indio_dev->dev.parent = &pdev->dev;
227 indio_dev->dev.of_node = pdev->dev.of_node;
228 indio_dev->info = &rockchip_saradc_iio_info;
229 indio_dev->modes = INDIO_DIRECT_MODE;
230
231 indio_dev->channels = rockchip_saradc_iio_channels;
232 indio_dev->num_channels = ARRAY_SIZE(rockchip_saradc_iio_channels);
233
234 ret = iio_device_register(indio_dev);
235 if (ret)
236 goto err_clk;
237
238 return 0;
239
240err_clk:
241 clk_disable_unprepare(info->clk);
242err_pclk:
243 clk_disable_unprepare(info->pclk);
244err_reg_voltage:
245 regulator_disable(info->vref);
246 return ret;
247}
248
249static int rockchip_saradc_remove(struct platform_device *pdev)
250{
251 struct iio_dev *indio_dev = platform_get_drvdata(pdev);
252 struct rockchip_saradc *info = iio_priv(indio_dev);
253
254 iio_device_unregister(indio_dev);
255 clk_disable_unprepare(info->clk);
256 clk_disable_unprepare(info->pclk);
257 regulator_disable(info->vref);
258
259 return 0;
260}
261
262#ifdef CONFIG_PM_SLEEP
263static int rockchip_saradc_suspend(struct device *dev)
264{
265 struct iio_dev *indio_dev = dev_get_drvdata(dev);
266 struct rockchip_saradc *info = iio_priv(indio_dev);
267
268 clk_disable_unprepare(info->clk);
269 clk_disable_unprepare(info->pclk);
270 regulator_disable(info->vref);
271
272 return 0;
273}
274
275static int rockchip_saradc_resume(struct device *dev)
276{
277 struct iio_dev *indio_dev = dev_get_drvdata(dev);
278 struct rockchip_saradc *info = iio_priv(indio_dev);
279 int ret;
280
281 ret = regulator_enable(info->vref);
282 if (ret)
283 return ret;
284
285 ret = clk_prepare_enable(info->pclk);
286 if (ret)
287 return ret;
288
289 ret = clk_prepare_enable(info->clk);
290 if (ret)
291 return ret;
292
293 return ret;
294}
295#endif
296
297static SIMPLE_DEV_PM_OPS(rockchip_saradc_pm_ops,
298 rockchip_saradc_suspend, rockchip_saradc_resume);
299
300static const struct of_device_id rockchip_saradc_match[] = {
301 { .compatible = "rockchip,saradc" },
302 {},
303};
304MODULE_DEVICE_TABLE(of, rockchip_saradc_match);
305
306static struct platform_driver rockchip_saradc_driver = {
307 .probe = rockchip_saradc_probe,
308 .remove = rockchip_saradc_remove,
309 .driver = {
310 .name = "rockchip-saradc",
311 .owner = THIS_MODULE,
312 .of_match_table = rockchip_saradc_match,
313 .pm = &rockchip_saradc_pm_ops,
314 },
315};
316
317module_platform_driver(rockchip_saradc_driver);
diff --git a/drivers/iio/adc/ti-adc128s052.c b/drivers/iio/adc/ti-adc128s052.c
new file mode 100644
index 000000000000..655cb564ec54
--- /dev/null
+++ b/drivers/iio/adc/ti-adc128s052.c
@@ -0,0 +1,179 @@
1/*
2 * Copyright (C) 2014 Angelo Compagnucci <angelo.compagnucci@gmail.com>
3 *
4 * Driver for Texas Instruments' ADC128S052 ADC chip.
5 * Datasheet can be found here:
6 * http://www.ti.com/lit/ds/symlink/adc128s052.pdf
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/err.h>
14#include <linux/spi/spi.h>
15#include <linux/module.h>
16#include <linux/iio/iio.h>
17#include <linux/regulator/consumer.h>
18
19struct adc128 {
20 struct spi_device *spi;
21
22 struct regulator *reg;
23 struct mutex lock;
24
25 u8 buffer[2] ____cacheline_aligned;
26};
27
28static int adc128_adc_conversion(struct adc128 *adc, u8 channel)
29{
30 int ret;
31
32 mutex_lock(&adc->lock);
33
34 adc->buffer[0] = channel << 3;
35 adc->buffer[1] = 0;
36
37 ret = spi_write(adc->spi, &adc->buffer, 2);
38 if (ret < 0) {
39 mutex_unlock(&adc->lock);
40 return ret;
41 }
42
43 ret = spi_read(adc->spi, &adc->buffer, 2);
44
45 mutex_unlock(&adc->lock);
46
47 if (ret < 0)
48 return ret;
49
50 return ((adc->buffer[0] << 8 | adc->buffer[1]) & 0xFFF);
51}
52
53static int adc128_read_raw(struct iio_dev *indio_dev,
54 struct iio_chan_spec const *channel, int *val,
55 int *val2, long mask)
56{
57 struct adc128 *adc = iio_priv(indio_dev);
58 int ret;
59
60 switch (mask) {
61 case IIO_CHAN_INFO_RAW:
62
63 ret = adc128_adc_conversion(adc, channel->channel);
64 if (ret < 0)
65 return ret;
66
67 *val = ret;
68 return IIO_VAL_INT;
69
70 case IIO_CHAN_INFO_SCALE:
71
72 ret = regulator_get_voltage(adc->reg);
73 if (ret < 0)
74 return ret;
75
76 *val = ret / 1000;
77 *val2 = 12;
78 return IIO_VAL_FRACTIONAL_LOG2;
79
80 default:
81 return -EINVAL;
82 }
83
84}
85
86#define ADC128_VOLTAGE_CHANNEL(num) \
87 { \
88 .type = IIO_VOLTAGE, \
89 .indexed = 1, \
90 .channel = (num), \
91 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
92 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
93 }
94
95static const struct iio_chan_spec adc128_channels[] = {
96 ADC128_VOLTAGE_CHANNEL(0),
97 ADC128_VOLTAGE_CHANNEL(1),
98 ADC128_VOLTAGE_CHANNEL(2),
99 ADC128_VOLTAGE_CHANNEL(3),
100 ADC128_VOLTAGE_CHANNEL(4),
101 ADC128_VOLTAGE_CHANNEL(5),
102 ADC128_VOLTAGE_CHANNEL(6),
103 ADC128_VOLTAGE_CHANNEL(7),
104};
105
106static const struct iio_info adc128_info = {
107 .read_raw = adc128_read_raw,
108 .driver_module = THIS_MODULE,
109};
110
111static int adc128_probe(struct spi_device *spi)
112{
113 struct iio_dev *indio_dev;
114 struct adc128 *adc;
115 int ret;
116
117 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc));
118 if (!indio_dev)
119 return -ENOMEM;
120
121 adc = iio_priv(indio_dev);
122 adc->spi = spi;
123
124 spi_set_drvdata(spi, indio_dev);
125
126 indio_dev->dev.parent = &spi->dev;
127 indio_dev->name = spi_get_device_id(spi)->name;
128 indio_dev->modes = INDIO_DIRECT_MODE;
129 indio_dev->info = &adc128_info;
130
131 indio_dev->channels = adc128_channels;
132 indio_dev->num_channels = ARRAY_SIZE(adc128_channels);
133
134 adc->reg = devm_regulator_get(&spi->dev, "vref");
135 if (IS_ERR(adc->reg))
136 return PTR_ERR(adc->reg);
137
138 ret = regulator_enable(adc->reg);
139 if (ret < 0)
140 return ret;
141
142 mutex_init(&adc->lock);
143
144 ret = iio_device_register(indio_dev);
145
146 return ret;
147}
148
149static int adc128_remove(struct spi_device *spi)
150{
151 struct iio_dev *indio_dev = spi_get_drvdata(spi);
152 struct adc128 *adc = iio_priv(indio_dev);
153
154 iio_device_unregister(indio_dev);
155 regulator_disable(adc->reg);
156
157 return 0;
158}
159
160static const struct spi_device_id adc128_id[] = {
161 { "adc128s052", 0},
162 { }
163};
164MODULE_DEVICE_TABLE(spi, adc128_id);
165
166static struct spi_driver adc128_driver = {
167 .driver = {
168 .name = "adc128s052",
169 .owner = THIS_MODULE,
170 },
171 .probe = adc128_probe,
172 .remove = adc128_remove,
173 .id_table = adc128_id,
174};
175module_spi_driver(adc128_driver);
176
177MODULE_AUTHOR("Angelo Compagnucci <angelo.compagnucci@gmail.com>");
178MODULE_DESCRIPTION("Texas Instruments ADC128S052");
179MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/adc/xilinx-xadc-core.c b/drivers/iio/adc/xilinx-xadc-core.c
index fd2745c62943..5d52a3106fac 100644
--- a/drivers/iio/adc/xilinx-xadc-core.c
+++ b/drivers/iio/adc/xilinx-xadc-core.c
@@ -1201,12 +1201,16 @@ static int xadc_probe(struct platform_device *pdev)
1201 goto err_device_free; 1201 goto err_device_free;
1202 1202
1203 xadc->convst_trigger = xadc_alloc_trigger(indio_dev, "convst"); 1203 xadc->convst_trigger = xadc_alloc_trigger(indio_dev, "convst");
1204 if (IS_ERR(xadc->convst_trigger)) 1204 if (IS_ERR(xadc->convst_trigger)) {
1205 ret = PTR_ERR(xadc->convst_trigger);
1205 goto err_triggered_buffer_cleanup; 1206 goto err_triggered_buffer_cleanup;
1207 }
1206 xadc->samplerate_trigger = xadc_alloc_trigger(indio_dev, 1208 xadc->samplerate_trigger = xadc_alloc_trigger(indio_dev,
1207 "samplerate"); 1209 "samplerate");
1208 if (IS_ERR(xadc->samplerate_trigger)) 1210 if (IS_ERR(xadc->samplerate_trigger)) {
1211 ret = PTR_ERR(xadc->samplerate_trigger);
1209 goto err_free_convst_trigger; 1212 goto err_free_convst_trigger;
1213 }
1210 } 1214 }
1211 1215
1212 xadc->clk = devm_clk_get(&pdev->dev, NULL); 1216 xadc->clk = devm_clk_get(&pdev->dev, NULL);
@@ -1322,7 +1326,6 @@ static struct platform_driver xadc_driver = {
1322 .remove = xadc_remove, 1326 .remove = xadc_remove,
1323 .driver = { 1327 .driver = {
1324 .name = "xadc", 1328 .name = "xadc",
1325 .owner = THIS_MODULE,
1326 .of_match_table = xadc_of_match_table, 1329 .of_match_table = xadc_of_match_table,
1327 }, 1330 },
1328}; 1331};
diff --git a/drivers/iio/dac/Kconfig b/drivers/iio/dac/Kconfig
index f278eff42a4c..2236ea22f98a 100644
--- a/drivers/iio/dac/Kconfig
+++ b/drivers/iio/dac/Kconfig
@@ -152,6 +152,14 @@ config MAX517
152 This driver can also be built as a module. If so, the module 152 This driver can also be built as a module. If so, the module
153 will be called max517. 153 will be called max517.
154 154
155config MAX5821
156 tristate "Maxim MAX5821 DAC driver"
157 depends on I2C
158 depends on OF
159 help
160 Say yes here to build support for Maxim MAX5821
161 10 bits DAC.
162
155config MCP4725 163config MCP4725
156 tristate "MCP4725 DAC driver" 164 tristate "MCP4725 DAC driver"
157 depends on I2C 165 depends on I2C
diff --git a/drivers/iio/dac/Makefile b/drivers/iio/dac/Makefile
index 10107640bb46..52be7e1acf16 100644
--- a/drivers/iio/dac/Makefile
+++ b/drivers/iio/dac/Makefile
@@ -17,5 +17,6 @@ obj-$(CONFIG_AD5791) += ad5791.o
17obj-$(CONFIG_AD5686) += ad5686.o 17obj-$(CONFIG_AD5686) += ad5686.o
18obj-$(CONFIG_AD7303) += ad7303.o 18obj-$(CONFIG_AD7303) += ad7303.o
19obj-$(CONFIG_MAX517) += max517.o 19obj-$(CONFIG_MAX517) += max517.o
20obj-$(CONFIG_MAX5821) += max5821.o
20obj-$(CONFIG_MCP4725) += mcp4725.o 21obj-$(CONFIG_MCP4725) += mcp4725.o
21obj-$(CONFIG_MCP4922) += mcp4922.o 22obj-$(CONFIG_MCP4922) += mcp4922.o
diff --git a/drivers/iio/dac/max5821.c b/drivers/iio/dac/max5821.c
new file mode 100644
index 000000000000..6e914495b346
--- /dev/null
+++ b/drivers/iio/dac/max5821.c
@@ -0,0 +1,405 @@
1 /*
2 * iio/dac/max5821.c
3 * Copyright (C) 2014 Philippe Reynes
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
10#include <linux/kernel.h>
11#include <linux/module.h>
12#include <linux/i2c.h>
13#include <linux/iio/iio.h>
14#include <linux/regulator/consumer.h>
15
16#define MAX5821_MAX_DAC_CHANNELS 2
17
18/* command bytes */
19#define MAX5821_LOAD_DAC_A_IN_REG_B 0x00
20#define MAX5821_LOAD_DAC_B_IN_REG_A 0x10
21#define MAX5821_EXTENDED_COMMAND_MODE 0xf0
22#define MAX5821_READ_DAC_A_COMMAND 0xf1
23#define MAX5821_READ_DAC_B_COMMAND 0xf2
24
25#define MAX5821_EXTENDED_POWER_UP 0x00
26#define MAX5821_EXTENDED_POWER_DOWN_MODE0 0x01
27#define MAX5821_EXTENDED_POWER_DOWN_MODE1 0x02
28#define MAX5821_EXTENDED_POWER_DOWN_MODE2 0x03
29#define MAX5821_EXTENDED_DAC_A 0x04
30#define MAX5821_EXTENDED_DAC_B 0x08
31
32enum max5821_device_ids {
33 ID_MAX5821,
34};
35
36struct max5821_data {
37 struct i2c_client *client;
38 struct regulator *vref_reg;
39 unsigned short vref_mv;
40 bool powerdown[MAX5821_MAX_DAC_CHANNELS];
41 u8 powerdown_mode[MAX5821_MAX_DAC_CHANNELS];
42 struct mutex lock;
43};
44
45static const char * const max5821_powerdown_modes[] = {
46 "three_state",
47 "1kohm_to_gnd",
48 "100kohm_to_gnd",
49};
50
51enum {
52 MAX5821_THREE_STATE,
53 MAX5821_1KOHM_TO_GND,
54 MAX5821_100KOHM_TO_GND
55};
56
57static int max5821_get_powerdown_mode(struct iio_dev *indio_dev,
58 const struct iio_chan_spec *chan)
59{
60 struct max5821_data *st = iio_priv(indio_dev);
61
62 return st->powerdown_mode[chan->channel];
63}
64
65static int max5821_set_powerdown_mode(struct iio_dev *indio_dev,
66 const struct iio_chan_spec *chan,
67 unsigned int mode)
68{
69 struct max5821_data *st = iio_priv(indio_dev);
70
71 st->powerdown_mode[chan->channel] = mode;
72
73 return 0;
74}
75
76static const struct iio_enum max5821_powerdown_mode_enum = {
77 .items = max5821_powerdown_modes,
78 .num_items = ARRAY_SIZE(max5821_powerdown_modes),
79 .get = max5821_get_powerdown_mode,
80 .set = max5821_set_powerdown_mode,
81};
82
83static ssize_t max5821_read_dac_powerdown(struct iio_dev *indio_dev,
84 uintptr_t private,
85 const struct iio_chan_spec *chan,
86 char *buf)
87{
88 struct max5821_data *st = iio_priv(indio_dev);
89
90 return sprintf(buf, "%d\n", st->powerdown[chan->channel]);
91}
92
93static int max5821_sync_powerdown_mode(struct max5821_data *data,
94 const struct iio_chan_spec *chan)
95{
96 u8 outbuf[2];
97
98 outbuf[0] = MAX5821_EXTENDED_COMMAND_MODE;
99
100 if (chan->channel == 0)
101 outbuf[1] = MAX5821_EXTENDED_DAC_A;
102 else
103 outbuf[1] = MAX5821_EXTENDED_DAC_B;
104
105 if (data->powerdown[chan->channel])
106 outbuf[1] |= data->powerdown_mode[chan->channel] + 1;
107 else
108 outbuf[1] |= MAX5821_EXTENDED_POWER_UP;
109
110 return i2c_master_send(data->client, outbuf, 2);
111}
112
113static ssize_t max5821_write_dac_powerdown(struct iio_dev *indio_dev,
114 uintptr_t private,
115 const struct iio_chan_spec *chan,
116 const char *buf, size_t len)
117{
118 struct max5821_data *data = iio_priv(indio_dev);
119 bool powerdown;
120 int ret;
121
122 ret = strtobool(buf, &powerdown);
123 if (ret)
124 return ret;
125
126 data->powerdown[chan->channel] = powerdown;
127
128 ret = max5821_sync_powerdown_mode(data, chan);
129 if (ret < 0)
130 return ret;
131
132 return len;
133}
134
135static const struct iio_chan_spec_ext_info max5821_ext_info[] = {
136 {
137 .name = "powerdown",
138 .read = max5821_read_dac_powerdown,
139 .write = max5821_write_dac_powerdown,
140 .shared = IIO_SEPARATE,
141 },
142 IIO_ENUM("powerdown_mode", IIO_SEPARATE, &max5821_powerdown_mode_enum),
143 IIO_ENUM_AVAILABLE("powerdown_mode", &max5821_powerdown_mode_enum),
144 { },
145};
146
147#define MAX5821_CHANNEL(chan) { \
148 .type = IIO_VOLTAGE, \
149 .indexed = 1, \
150 .output = 1, \
151 .channel = (chan), \
152 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
153 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SCALE), \
154 .ext_info = max5821_ext_info, \
155}
156
157static const struct iio_chan_spec max5821_channels[] = {
158 MAX5821_CHANNEL(0),
159 MAX5821_CHANNEL(1)
160};
161
162static const u8 max5821_read_dac_command[] = {
163 MAX5821_READ_DAC_A_COMMAND,
164 MAX5821_READ_DAC_B_COMMAND
165};
166
167static const u8 max5821_load_dac_command[] = {
168 MAX5821_LOAD_DAC_A_IN_REG_B,
169 MAX5821_LOAD_DAC_B_IN_REG_A
170};
171
172static int max5821_get_value(struct iio_dev *indio_dev,
173 int *val, int channel)
174{
175 struct max5821_data *data = iio_priv(indio_dev);
176 struct i2c_client *client = data->client;
177 u8 outbuf[1];
178 u8 inbuf[2];
179 int ret;
180
181 if ((channel != 0) && (channel != 1))
182 return -EINVAL;
183
184 outbuf[0] = max5821_read_dac_command[channel];
185
186 mutex_lock(&data->lock);
187
188 ret = i2c_master_send(client, outbuf, 1);
189 if (ret < 0) {
190 mutex_unlock(&data->lock);
191 return ret;
192 } else if (ret != 1) {
193 mutex_unlock(&data->lock);
194 return -EIO;
195 }
196
197 ret = i2c_master_recv(client, inbuf, 2);
198 if (ret < 0) {
199 mutex_unlock(&data->lock);
200 return ret;
201 } else if (ret != 2) {
202 mutex_unlock(&data->lock);
203 return -EIO;
204 }
205
206 mutex_unlock(&data->lock);
207
208 *val = ((inbuf[0] & 0x0f) << 6) | (inbuf[1] >> 2);
209
210 return IIO_VAL_INT;
211}
212
213static int max5821_set_value(struct iio_dev *indio_dev,
214 int val, int channel)
215{
216 struct max5821_data *data = iio_priv(indio_dev);
217 struct i2c_client *client = data->client;
218 u8 outbuf[2];
219 int ret;
220
221 if ((val < 0) || (val > 1023))
222 return -EINVAL;
223
224 if ((channel != 0) && (channel != 1))
225 return -EINVAL;
226
227 outbuf[0] = max5821_load_dac_command[channel];
228 outbuf[0] |= val >> 6;
229 outbuf[1] = (val & 0x3f) << 2;
230
231 ret = i2c_master_send(client, outbuf, 2);
232 if (ret < 0)
233 return ret;
234 else if (ret != 2)
235 return -EIO;
236 else
237 return 0;
238}
239
240static int max5821_read_raw(struct iio_dev *indio_dev,
241 struct iio_chan_spec const *chan,
242 int *val, int *val2, long mask)
243{
244 struct max5821_data *data = iio_priv(indio_dev);
245
246 switch (mask) {
247 case IIO_CHAN_INFO_RAW:
248 return max5821_get_value(indio_dev, val, chan->channel);
249 case IIO_CHAN_INFO_SCALE:
250 *val = data->vref_mv;
251 *val2 = 10;
252 return IIO_VAL_FRACTIONAL_LOG2;
253 default:
254 return -EINVAL;
255 }
256}
257
258static int max5821_write_raw(struct iio_dev *indio_dev,
259 struct iio_chan_spec const *chan,
260 int val, int val2, long mask)
261{
262 if (val2 != 0)
263 return -EINVAL;
264
265 switch (mask) {
266 case IIO_CHAN_INFO_RAW:
267 return max5821_set_value(indio_dev, val, chan->channel);
268 default:
269 return -EINVAL;
270 }
271}
272
273#ifdef CONFIG_PM_SLEEP
274static int max5821_suspend(struct device *dev)
275{
276 u8 outbuf[2] = { MAX5821_EXTENDED_COMMAND_MODE,
277 MAX5821_EXTENDED_DAC_A |
278 MAX5821_EXTENDED_DAC_B |
279 MAX5821_EXTENDED_POWER_DOWN_MODE2 };
280
281 return i2c_master_send(to_i2c_client(dev), outbuf, 2);
282}
283
284static int max5821_resume(struct device *dev)
285{
286 u8 outbuf[2] = { MAX5821_EXTENDED_COMMAND_MODE,
287 MAX5821_EXTENDED_DAC_A |
288 MAX5821_EXTENDED_DAC_B |
289 MAX5821_EXTENDED_POWER_UP };
290
291 return i2c_master_send(to_i2c_client(dev), outbuf, 2);
292}
293
294static SIMPLE_DEV_PM_OPS(max5821_pm_ops, max5821_suspend, max5821_resume);
295#define MAX5821_PM_OPS (&max5821_pm_ops)
296#else
297#define MAX5821_PM_OPS NULL
298#endif /* CONFIG_PM_SLEEP */
299
300static const struct iio_info max5821_info = {
301 .read_raw = max5821_read_raw,
302 .write_raw = max5821_write_raw,
303 .driver_module = THIS_MODULE,
304};
305
306static int max5821_probe(struct i2c_client *client,
307 const struct i2c_device_id *id)
308{
309 struct max5821_data *data;
310 struct iio_dev *indio_dev;
311 u32 tmp;
312 int ret;
313
314 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
315 if (!indio_dev)
316 return -ENOMEM;
317 data = iio_priv(indio_dev);
318 i2c_set_clientdata(client, indio_dev);
319 data->client = client;
320 mutex_init(&data->lock);
321
322 /* max5821 start in powerdown mode 100Kohm to ground */
323 for (tmp = 0; tmp < MAX5821_MAX_DAC_CHANNELS; tmp++) {
324 data->powerdown[tmp] = true;
325 data->powerdown_mode[tmp] = MAX5821_100KOHM_TO_GND;
326 }
327
328 data->vref_reg = devm_regulator_get(&client->dev, "vref");
329 if (IS_ERR(data->vref_reg)) {
330 ret = PTR_ERR(data->vref_reg);
331 dev_err(&client->dev,
332 "Failed to get vref regulator: %d\n", ret);
333 goto error_free_reg;
334 }
335
336 ret = regulator_enable(data->vref_reg);
337 if (ret) {
338 dev_err(&client->dev,
339 "Failed to enable vref regulator: %d\n", ret);
340 goto error_free_reg;
341 }
342
343 ret = regulator_get_voltage(data->vref_reg);
344 if (ret < 0) {
345 dev_err(&client->dev,
346 "Failed to get voltage on regulator: %d\n", ret);
347 goto error_disable_reg;
348 }
349
350 data->vref_mv = ret / 1000;
351
352 indio_dev->name = id->name;
353 indio_dev->dev.parent = &client->dev;
354 indio_dev->num_channels = ARRAY_SIZE(max5821_channels);
355 indio_dev->channels = max5821_channels;
356 indio_dev->modes = INDIO_DIRECT_MODE;
357 indio_dev->info = &max5821_info;
358
359 return iio_device_register(indio_dev);
360
361error_disable_reg:
362 regulator_disable(data->vref_reg);
363
364error_free_reg:
365
366 return ret;
367}
368
369static int max5821_remove(struct i2c_client *client)
370{
371 struct iio_dev *indio_dev = i2c_get_clientdata(client);
372 struct max5821_data *data = iio_priv(indio_dev);
373
374 iio_device_unregister(indio_dev);
375 regulator_disable(data->vref_reg);
376
377 return 0;
378}
379
380static const struct i2c_device_id max5821_id[] = {
381 { "max5821", ID_MAX5821 },
382 { }
383};
384MODULE_DEVICE_TABLE(i2c, max5821_id);
385
386static const struct of_device_id max5821_of_match[] = {
387 { .compatible = "maxim,max5821" },
388 { }
389};
390
391static struct i2c_driver max5821_driver = {
392 .driver = {
393 .name = "max5821",
394 .pm = MAX5821_PM_OPS,
395 .owner = THIS_MODULE,
396 },
397 .probe = max5821_probe,
398 .remove = max5821_remove,
399 .id_table = max5821_id,
400};
401module_i2c_driver(max5821_driver);
402
403MODULE_AUTHOR("Philippe Reynes <tremyfr@yahoo.fr>");
404MODULE_DESCRIPTION("MAX5821 DAC");
405MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/industrialio-buffer.c b/drivers/iio/industrialio-buffer.c
index 0472ee268271..f971f79103ec 100644
--- a/drivers/iio/industrialio-buffer.c
+++ b/drivers/iio/industrialio-buffer.c
@@ -942,13 +942,34 @@ int iio_push_to_buffers(struct iio_dev *indio_dev, const void *data)
942} 942}
943EXPORT_SYMBOL_GPL(iio_push_to_buffers); 943EXPORT_SYMBOL_GPL(iio_push_to_buffers);
944 944
945static int iio_buffer_add_demux(struct iio_buffer *buffer,
946 struct iio_demux_table **p, unsigned int in_loc, unsigned int out_loc,
947 unsigned int length)
948{
949
950 if (*p && (*p)->from + (*p)->length == in_loc &&
951 (*p)->to + (*p)->length == out_loc) {
952 (*p)->length += length;
953 } else {
954 *p = kmalloc(sizeof(**p), GFP_KERNEL);
955 if (*p == NULL)
956 return -ENOMEM;
957 (*p)->from = in_loc;
958 (*p)->to = out_loc;
959 (*p)->length = length;
960 list_add_tail(&(*p)->l, &buffer->demux_list);
961 }
962
963 return 0;
964}
965
945static int iio_buffer_update_demux(struct iio_dev *indio_dev, 966static int iio_buffer_update_demux(struct iio_dev *indio_dev,
946 struct iio_buffer *buffer) 967 struct iio_buffer *buffer)
947{ 968{
948 const struct iio_chan_spec *ch; 969 const struct iio_chan_spec *ch;
949 int ret, in_ind = -1, out_ind, length; 970 int ret, in_ind = -1, out_ind, length;
950 unsigned in_loc = 0, out_loc = 0; 971 unsigned in_loc = 0, out_loc = 0;
951 struct iio_demux_table *p; 972 struct iio_demux_table *p = NULL;
952 973
953 /* Clear out any old demux */ 974 /* Clear out any old demux */
954 iio_buffer_demux_free(buffer); 975 iio_buffer_demux_free(buffer);
@@ -979,14 +1000,7 @@ static int iio_buffer_update_demux(struct iio_dev *indio_dev,
979 else 1000 else
980 length = ch->scan_type.storagebits / 8; 1001 length = ch->scan_type.storagebits / 8;
981 /* Make sure we are aligned */ 1002 /* Make sure we are aligned */
982 in_loc += length; 1003 in_loc = roundup(in_loc, length) + length;
983 if (in_loc % length)
984 in_loc += length - in_loc % length;
985 }
986 p = kmalloc(sizeof(*p), GFP_KERNEL);
987 if (p == NULL) {
988 ret = -ENOMEM;
989 goto error_clear_mux_table;
990 } 1004 }
991 ch = iio_find_channel_from_si(indio_dev, in_ind); 1005 ch = iio_find_channel_from_si(indio_dev, in_ind);
992 if (ch->scan_type.repeat > 1) 1006 if (ch->scan_type.repeat > 1)
@@ -994,24 +1008,16 @@ static int iio_buffer_update_demux(struct iio_dev *indio_dev,
994 ch->scan_type.repeat; 1008 ch->scan_type.repeat;
995 else 1009 else
996 length = ch->scan_type.storagebits / 8; 1010 length = ch->scan_type.storagebits / 8;
997 if (out_loc % length) 1011 out_loc = roundup(out_loc, length);
998 out_loc += length - out_loc % length; 1012 in_loc = roundup(in_loc, length);
999 if (in_loc % length) 1013 ret = iio_buffer_add_demux(buffer, &p, in_loc, out_loc, length);
1000 in_loc += length - in_loc % length; 1014 if (ret)
1001 p->from = in_loc; 1015 goto error_clear_mux_table;
1002 p->to = out_loc;
1003 p->length = length;
1004 list_add_tail(&p->l, &buffer->demux_list);
1005 out_loc += length; 1016 out_loc += length;
1006 in_loc += length; 1017 in_loc += length;
1007 } 1018 }
1008 /* Relies on scan_timestamp being last */ 1019 /* Relies on scan_timestamp being last */
1009 if (buffer->scan_timestamp) { 1020 if (buffer->scan_timestamp) {
1010 p = kmalloc(sizeof(*p), GFP_KERNEL);
1011 if (p == NULL) {
1012 ret = -ENOMEM;
1013 goto error_clear_mux_table;
1014 }
1015 ch = iio_find_channel_from_si(indio_dev, 1021 ch = iio_find_channel_from_si(indio_dev,
1016 indio_dev->scan_index_timestamp); 1022 indio_dev->scan_index_timestamp);
1017 if (ch->scan_type.repeat > 1) 1023 if (ch->scan_type.repeat > 1)
@@ -1019,14 +1025,11 @@ static int iio_buffer_update_demux(struct iio_dev *indio_dev,
1019 ch->scan_type.repeat; 1025 ch->scan_type.repeat;
1020 else 1026 else
1021 length = ch->scan_type.storagebits / 8; 1027 length = ch->scan_type.storagebits / 8;
1022 if (out_loc % length) 1028 out_loc = roundup(out_loc, length);
1023 out_loc += length - out_loc % length; 1029 in_loc = roundup(in_loc, length);
1024 if (in_loc % length) 1030 ret = iio_buffer_add_demux(buffer, &p, in_loc, out_loc, length);
1025 in_loc += length - in_loc % length; 1031 if (ret)
1026 p->from = in_loc; 1032 goto error_clear_mux_table;
1027 p->to = out_loc;
1028 p->length = length;
1029 list_add_tail(&p->l, &buffer->demux_list);
1030 out_loc += length; 1033 out_loc += length;
1031 in_loc += length; 1034 in_loc += length;
1032 } 1035 }
diff --git a/drivers/iio/magnetometer/hid-sensor-magn-3d.c b/drivers/iio/magnetometer/hid-sensor-magn-3d.c
index 3ec777a8f64e..1e717c71c244 100644
--- a/drivers/iio/magnetometer/hid-sensor-magn-3d.c
+++ b/drivers/iio/magnetometer/hid-sensor-magn-3d.c
@@ -246,8 +246,7 @@ static const struct iio_info magn_3d_info = {
246}; 246};
247 247
248/* Function to push data to buffer */ 248/* Function to push data to buffer */
249static void hid_sensor_push_data(struct iio_dev *indio_dev, const void *data, 249static void hid_sensor_push_data(struct iio_dev *indio_dev, const void *data)
250 int len)
251{ 250{
252 dev_dbg(&indio_dev->dev, "hid_sensor_push_data\n"); 251 dev_dbg(&indio_dev->dev, "hid_sensor_push_data\n");
253 iio_push_to_buffers(indio_dev, data); 252 iio_push_to_buffers(indio_dev, data);
@@ -263,9 +262,7 @@ static int magn_3d_proc_event(struct hid_sensor_hub_device *hsdev,
263 262
264 dev_dbg(&indio_dev->dev, "magn_3d_proc_event\n"); 263 dev_dbg(&indio_dev->dev, "magn_3d_proc_event\n");
265 if (atomic_read(&magn_state->common_attributes.data_ready)) 264 if (atomic_read(&magn_state->common_attributes.data_ready))
266 hid_sensor_push_data(indio_dev, 265 hid_sensor_push_data(indio_dev, magn_state->iio_vals);
267 magn_state->iio_vals,
268 sizeof(magn_state->iio_vals));
269 266
270 return 0; 267 return 0;
271} 268}
diff --git a/drivers/staging/iio/accel/adis16201_core.c b/drivers/staging/iio/accel/adis16201_core.c
index 50ba1fa7f98a..7eae5fd0f393 100644
--- a/drivers/staging/iio/accel/adis16201_core.c
+++ b/drivers/staging/iio/accel/adis16201_core.c
@@ -111,6 +111,7 @@ static int adis16201_write_raw(struct iio_dev *indio_dev,
111 int bits; 111 int bits;
112 s16 val16; 112 s16 val16;
113 u8 addr; 113 u8 addr;
114
114 switch (mask) { 115 switch (mask) {
115 case IIO_CHAN_INFO_CALIBBIAS: 116 case IIO_CHAN_INFO_CALIBBIAS:
116 switch (chan->type) { 117 switch (chan->type) {
@@ -131,8 +132,8 @@ static int adis16201_write_raw(struct iio_dev *indio_dev,
131} 132}
132 133
133static const struct iio_chan_spec adis16201_channels[] = { 134static const struct iio_chan_spec adis16201_channels[] = {
134 ADIS_SUPPLY_CHAN(ADIS16201_SUPPLY_OUT, ADIS16201_SCAN_SUPPLY, 0, 12), 135 ADIS_SUPPLY_CHAN(ADIS16201_SUPPLY_OUT, ADIS16201_SCAN_SUPPLY, 0, 12),
135 ADIS_TEMP_CHAN(ADIS16201_TEMP_OUT, ADIS16201_SCAN_TEMP, 0, 12), 136 ADIS_TEMP_CHAN(ADIS16201_TEMP_OUT, ADIS16201_SCAN_TEMP, 0, 12),
136 ADIS_ACCEL_CHAN(X, ADIS16201_XACCL_OUT, ADIS16201_SCAN_ACC_X, 137 ADIS_ACCEL_CHAN(X, ADIS16201_XACCL_OUT, ADIS16201_SCAN_ACC_X,
137 BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14), 138 BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14),
138 ADIS_ACCEL_CHAN(Y, ADIS16201_YACCL_OUT, ADIS16201_SCAN_ACC_Y, 139 ADIS_ACCEL_CHAN(Y, ADIS16201_YACCL_OUT, ADIS16201_SCAN_ACC_Y,
diff --git a/drivers/staging/iio/accel/adis16203_core.c b/drivers/staging/iio/accel/adis16203_core.c
index f472137b0069..fbbe93f26bbe 100644
--- a/drivers/staging/iio/accel/adis16203_core.c
+++ b/drivers/staging/iio/accel/adis16203_core.c
@@ -37,6 +37,7 @@ static int adis16203_write_raw(struct iio_dev *indio_dev,
37 struct adis *st = iio_priv(indio_dev); 37 struct adis *st = iio_priv(indio_dev);
38 /* currently only one writable parameter which keeps this simple */ 38 /* currently only one writable parameter which keeps this simple */
39 u8 addr = adis16203_addresses[chan->scan_index]; 39 u8 addr = adis16203_addresses[chan->scan_index];
40
40 return adis_write_reg_16(st, addr, val & 0x3FFF); 41 return adis_write_reg_16(st, addr, val & 0x3FFF);
41} 42}
42 43
@@ -50,6 +51,7 @@ static int adis16203_read_raw(struct iio_dev *indio_dev,
50 int bits; 51 int bits;
51 u8 addr; 52 u8 addr;
52 s16 val16; 53 s16 val16;
54
53 switch (mask) { 55 switch (mask) {
54 case IIO_CHAN_INFO_RAW: 56 case IIO_CHAN_INFO_RAW:
55 return adis_single_conversion(indio_dev, chan, 57 return adis_single_conversion(indio_dev, chan,
diff --git a/drivers/staging/iio/accel/adis16204_core.c b/drivers/staging/iio/accel/adis16204_core.c
index 19eaebc77d7a..4c8acbc2e44e 100644
--- a/drivers/staging/iio/accel/adis16204_core.c
+++ b/drivers/staging/iio/accel/adis16204_core.c
@@ -119,6 +119,7 @@ static int adis16204_write_raw(struct iio_dev *indio_dev,
119 int bits; 119 int bits;
120 s16 val16; 120 s16 val16;
121 u8 addr; 121 u8 addr;
122
122 switch (mask) { 123 switch (mask) {
123 case IIO_CHAN_INFO_CALIBBIAS: 124 case IIO_CHAN_INFO_CALIBBIAS:
124 switch (chan->type) { 125 switch (chan->type) {
diff --git a/drivers/staging/iio/accel/adis16209_core.c b/drivers/staging/iio/accel/adis16209_core.c
index 374dc6edbcf5..b2c7aeda75f0 100644
--- a/drivers/staging/iio/accel/adis16209_core.c
+++ b/drivers/staging/iio/accel/adis16209_core.c
@@ -44,6 +44,7 @@ static int adis16209_write_raw(struct iio_dev *indio_dev,
44 int bits; 44 int bits;
45 s16 val16; 45 s16 val16;
46 u8 addr; 46 u8 addr;
47
47 switch (mask) { 48 switch (mask) {
48 case IIO_CHAN_INFO_CALIBBIAS: 49 case IIO_CHAN_INFO_CALIBBIAS:
49 switch (chan->type) { 50 switch (chan->type) {
diff --git a/drivers/staging/iio/accel/adis16240_core.c b/drivers/staging/iio/accel/adis16240_core.c
index 74ace2a8769d..205d6d0a2206 100644
--- a/drivers/staging/iio/accel/adis16240_core.c
+++ b/drivers/staging/iio/accel/adis16240_core.c
@@ -163,6 +163,7 @@ static int adis16240_write_raw(struct iio_dev *indio_dev,
163 int bits = 10; 163 int bits = 10;
164 s16 val16; 164 s16 val16;
165 u8 addr; 165 u8 addr;
166
166 switch (mask) { 167 switch (mask) {
167 case IIO_CHAN_INFO_CALIBBIAS: 168 case IIO_CHAN_INFO_CALIBBIAS:
168 val16 = val & ((1 << bits) - 1); 169 val16 = val & ((1 << bits) - 1);
diff --git a/drivers/staging/iio/accel/lis3l02dq_core.c b/drivers/staging/iio/accel/lis3l02dq_core.c
index 898653c09279..f5e145caffa9 100644
--- a/drivers/staging/iio/accel/lis3l02dq_core.c
+++ b/drivers/staging/iio/accel/lis3l02dq_core.c
@@ -212,6 +212,7 @@ static int lis3l02dq_write_thresh(struct iio_dev *indio_dev,
212 int val, int val2) 212 int val, int val2)
213{ 213{
214 u16 value = val; 214 u16 value = val;
215
215 return lis3l02dq_spi_write_reg_s16(indio_dev, 216 return lis3l02dq_spi_write_reg_s16(indio_dev,
216 LIS3L02DQ_REG_THS_L_ADDR, 217 LIS3L02DQ_REG_THS_L_ADDR,
217 value); 218 value);
@@ -226,6 +227,7 @@ static int lis3l02dq_write_raw(struct iio_dev *indio_dev,
226 int ret = -EINVAL, reg; 227 int ret = -EINVAL, reg;
227 u8 uval; 228 u8 uval;
228 s8 sval; 229 s8 sval;
230
229 switch (mask) { 231 switch (mask) {
230 case IIO_CHAN_INFO_CALIBBIAS: 232 case IIO_CHAN_INFO_CALIBBIAS:
231 if (val > 255 || val < -256) 233 if (val > 255 || val < -256)
@@ -302,6 +304,7 @@ static ssize_t lis3l02dq_read_frequency(struct device *dev,
302 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 304 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
303 int ret, len = 0; 305 int ret, len = 0;
304 s8 t; 306 s8 t;
307
305 ret = lis3l02dq_spi_read_reg_8(indio_dev, 308 ret = lis3l02dq_spi_read_reg_8(indio_dev,
306 LIS3L02DQ_REG_CTRL_1_ADDR, 309 LIS3L02DQ_REG_CTRL_1_ADDR,
307 (u8 *)&t); 310 (u8 *)&t);
@@ -565,6 +568,7 @@ static int lis3l02dq_read_event_config(struct iio_dev *indio_dev,
565 u8 val; 568 u8 val;
566 int ret; 569 int ret;
567 u8 mask = (1 << (chan->channel2*2 + (dir == IIO_EV_DIR_RISING))); 570 u8 mask = (1 << (chan->channel2*2 + (dir == IIO_EV_DIR_RISING)));
571
568 ret = lis3l02dq_spi_read_reg_8(indio_dev, 572 ret = lis3l02dq_spi_read_reg_8(indio_dev,
569 LIS3L02DQ_REG_WAKE_UP_CFG_ADDR, 573 LIS3L02DQ_REG_WAKE_UP_CFG_ADDR,
570 &val); 574 &val);
diff --git a/drivers/staging/iio/accel/lis3l02dq_ring.c b/drivers/staging/iio/accel/lis3l02dq_ring.c
index bf33fdead479..1d934ee3bb5f 100644
--- a/drivers/staging/iio/accel/lis3l02dq_ring.c
+++ b/drivers/staging/iio/accel/lis3l02dq_ring.c
@@ -19,6 +19,7 @@ static inline u16 combine_8_to_16(u8 lower, u8 upper)
19{ 19{
20 u16 _lower = lower; 20 u16 _lower = lower;
21 u16 _upper = upper; 21 u16 _upper = upper;
22
22 return _lower | (_upper << 8); 23 return _lower | (_upper << 8);
23} 24}
24 25
diff --git a/drivers/staging/iio/accel/sca3000_core.c b/drivers/staging/iio/accel/sca3000_core.c
index ed30e32e60de..e4e56391487a 100644
--- a/drivers/staging/iio/accel/sca3000_core.c
+++ b/drivers/staging/iio/accel/sca3000_core.c
@@ -506,7 +506,8 @@ static int sca3000_read_raw(struct iio_dev *indio_dev,
506 mutex_unlock(&st->lock); 506 mutex_unlock(&st->lock);
507 return ret; 507 return ret;
508 } 508 }
509 *val = ((st->rx[0] & 0x3F) << 3) | ((st->rx[1] & 0xE0) >> 5); 509 *val = ((st->rx[0] & 0x3F) << 3) |
510 ((st->rx[1] & 0xE0) >> 5);
510 } 511 }
511 mutex_unlock(&st->lock); 512 mutex_unlock(&st->lock);
512 return IIO_VAL_INT; 513 return IIO_VAL_INT;
@@ -713,6 +714,7 @@ static int sca3000_read_thresh(struct iio_dev *indio_dev,
713 int ret, i; 714 int ret, i;
714 struct sca3000_state *st = iio_priv(indio_dev); 715 struct sca3000_state *st = iio_priv(indio_dev);
715 int num = chan->channel2; 716 int num = chan->channel2;
717
716 mutex_lock(&st->lock); 718 mutex_lock(&st->lock);
717 ret = sca3000_read_ctrl_reg(st, sca3000_addresses[num][1]); 719 ret = sca3000_read_ctrl_reg(st, sca3000_addresses[num][1]);
718 mutex_unlock(&st->lock); 720 mutex_unlock(&st->lock);
diff --git a/drivers/staging/iio/frequency/Kconfig b/drivers/staging/iio/frequency/Kconfig
index 93b7141b2c1f..fc726d3c64a6 100644
--- a/drivers/staging/iio/frequency/Kconfig
+++ b/drivers/staging/iio/frequency/Kconfig
@@ -3,13 +3,6 @@
3# 3#
4menu "Direct Digital Synthesis" 4menu "Direct Digital Synthesis"
5 5
6config AD5930
7 tristate "Analog Devices ad5930/5932 driver"
8 depends on SPI
9 help
10 Say yes here to build support for Analog Devices DDS chip
11 ad5930/ad5932, provides direct access via sysfs.
12
13config AD9832 6config AD9832
14 tristate "Analog Devices ad9832/5 driver" 7 tristate "Analog Devices ad9832/5 driver"
15 depends on SPI 8 depends on SPI
@@ -30,32 +23,4 @@ config AD9834
30 To compile this driver as a module, choose M here: the 23 To compile this driver as a module, choose M here: the
31 module will be called ad9834. 24 module will be called ad9834.
32 25
33config AD9850
34 tristate "Analog Devices ad9850/1 driver"
35 depends on SPI
36 help
37 Say yes here to build support for Analog Devices DDS chip
38 ad9850/1, provides direct access via sysfs.
39
40config AD9852
41 tristate "Analog Devices ad9852/4 driver"
42 depends on SPI
43 help
44 Say yes here to build support for Analog Devices DDS chip
45 ad9852/4, provides direct access via sysfs.
46
47config AD9910
48 tristate "Analog Devices ad9910 driver"
49 depends on SPI
50 help
51 Say yes here to build support for Analog Devices DDS chip
52 ad9910, provides direct access via sysfs.
53
54config AD9951
55 tristate "Analog Devices ad9951 driver"
56 depends on SPI
57 help
58 Say yes here to build support for Analog Devices DDS chip
59 ad9951, provides direct access via sysfs.
60
61endmenu 26endmenu
diff --git a/drivers/staging/iio/frequency/Makefile b/drivers/staging/iio/frequency/Makefile
index 147746176b9b..e5dbcfce44f9 100644
--- a/drivers/staging/iio/frequency/Makefile
+++ b/drivers/staging/iio/frequency/Makefile
@@ -2,10 +2,5 @@
2# Makefile for Direct Digital Synthesis drivers 2# Makefile for Direct Digital Synthesis drivers
3# 3#
4 4
5obj-$(CONFIG_AD5930) += ad5930.o
6obj-$(CONFIG_AD9832) += ad9832.o 5obj-$(CONFIG_AD9832) += ad9832.o
7obj-$(CONFIG_AD9834) += ad9834.o 6obj-$(CONFIG_AD9834) += ad9834.o
8obj-$(CONFIG_AD9850) += ad9850.o
9obj-$(CONFIG_AD9852) += ad9852.o
10obj-$(CONFIG_AD9910) += ad9910.o
11obj-$(CONFIG_AD9951) += ad9951.o
diff --git a/drivers/staging/iio/frequency/ad5930.c b/drivers/staging/iio/frequency/ad5930.c
deleted file mode 100644
index a4aeee6ffdf2..000000000000
--- a/drivers/staging/iio/frequency/ad5930.c
+++ /dev/null
@@ -1,140 +0,0 @@
1/*
2 * Driver for ADI Direct Digital Synthesis ad5930
3 *
4 * Copyright (c) 2010-2010 Analog Devices Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11#include <linux/types.h>
12#include <linux/mutex.h>
13#include <linux/device.h>
14#include <linux/spi/spi.h>
15#include <linux/slab.h>
16#include <linux/sysfs.h>
17#include <linux/module.h>
18
19#include <linux/iio/iio.h>
20#include <linux/iio/sysfs.h>
21
22#define DRV_NAME "ad5930"
23
24#define value_mask (u16)0xf000
25#define addr_shift 12
26
27/* Register format: 4 bits addr + 12 bits value */
28struct ad5903_config {
29 u16 control;
30 u16 incnum;
31 u16 frqdelt[2];
32 u16 incitvl;
33 u16 buritvl;
34 u16 strtfrq[2];
35};
36
37struct ad5930_state {
38 struct mutex lock;
39 struct spi_device *sdev;
40};
41
42static ssize_t ad5930_set_parameter(struct device *dev,
43 struct device_attribute *attr,
44 const char *buf,
45 size_t len)
46{
47 struct spi_transfer xfer;
48 int ret;
49 struct ad5903_config *config = (struct ad5903_config *)buf;
50 struct iio_dev *idev = dev_to_iio_dev(dev);
51 struct ad5930_state *st = iio_priv(idev);
52
53 config->control = (config->control & ~value_mask);
54 config->incnum = (config->control & ~value_mask) | (1 << addr_shift);
55 config->frqdelt[0] = (config->control & ~value_mask) | (2 << addr_shift);
56 config->frqdelt[1] = (config->control & ~value_mask) | 3 << addr_shift;
57 config->incitvl = (config->control & ~value_mask) | 4 << addr_shift;
58 config->buritvl = (config->control & ~value_mask) | 8 << addr_shift;
59 config->strtfrq[0] = (config->control & ~value_mask) | 0xc << addr_shift;
60 config->strtfrq[1] = (config->control & ~value_mask) | 0xd << addr_shift;
61
62 xfer.len = len;
63 xfer.tx_buf = config;
64 mutex_lock(&st->lock);
65
66 ret = spi_sync_transfer(st->sdev, &xfer, 1);
67 if (ret)
68 goto error_ret;
69error_ret:
70 mutex_unlock(&st->lock);
71
72 return ret ? ret : len;
73}
74
75static IIO_DEVICE_ATTR(dds, S_IWUSR, NULL, ad5930_set_parameter, 0);
76
77static struct attribute *ad5930_attributes[] = {
78 &iio_dev_attr_dds.dev_attr.attr,
79 NULL,
80};
81
82static const struct attribute_group ad5930_attribute_group = {
83 .attrs = ad5930_attributes,
84};
85
86static const struct iio_info ad5930_info = {
87 .attrs = &ad5930_attribute_group,
88 .driver_module = THIS_MODULE,
89};
90
91static int ad5930_probe(struct spi_device *spi)
92{
93 struct ad5930_state *st;
94 struct iio_dev *idev;
95 int ret = 0;
96
97 idev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
98 if (!idev)
99 return -ENOMEM;
100 spi_set_drvdata(spi, idev);
101 st = iio_priv(idev);
102
103 mutex_init(&st->lock);
104 st->sdev = spi;
105 idev->dev.parent = &spi->dev;
106 idev->info = &ad5930_info;
107 idev->modes = INDIO_DIRECT_MODE;
108
109 ret = iio_device_register(idev);
110 if (ret)
111 return ret;
112 spi->max_speed_hz = 2000000;
113 spi->mode = SPI_MODE_3;
114 spi->bits_per_word = 16;
115 spi_setup(spi);
116
117 return 0;
118}
119
120static int ad5930_remove(struct spi_device *spi)
121{
122 iio_device_unregister(spi_get_drvdata(spi));
123
124 return 0;
125}
126
127static struct spi_driver ad5930_driver = {
128 .driver = {
129 .name = DRV_NAME,
130 .owner = THIS_MODULE,
131 },
132 .probe = ad5930_probe,
133 .remove = ad5930_remove,
134};
135module_spi_driver(ad5930_driver);
136
137MODULE_AUTHOR("Cliff Cai");
138MODULE_DESCRIPTION("Analog Devices ad5930 driver");
139MODULE_LICENSE("GPL v2");
140MODULE_ALIAS("spi:" DRV_NAME);
diff --git a/drivers/staging/iio/frequency/ad9850.c b/drivers/staging/iio/frequency/ad9850.c
deleted file mode 100644
index 8727933cafcf..000000000000
--- a/drivers/staging/iio/frequency/ad9850.c
+++ /dev/null
@@ -1,120 +0,0 @@
1/*
2 * Driver for ADI Direct Digital Synthesis ad9850
3 *
4 * Copyright (c) 2010-2010 Analog Devices Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11#include <linux/types.h>
12#include <linux/mutex.h>
13#include <linux/device.h>
14#include <linux/spi/spi.h>
15#include <linux/slab.h>
16#include <linux/sysfs.h>
17#include <linux/module.h>
18
19#include <linux/iio/iio.h>
20#include <linux/iio/sysfs.h>
21
22#define DRV_NAME "ad9850"
23
24/* Register format: 4 bits addr + 12 bits value */
25struct ad9850_config {
26 u8 control[5];
27};
28
29struct ad9850_state {
30 struct mutex lock;
31 struct spi_device *sdev;
32};
33
34static ssize_t ad9850_set_parameter(struct device *dev,
35 struct device_attribute *attr,
36 const char *buf,
37 size_t len)
38{
39 struct spi_transfer xfer;
40 int ret;
41 struct ad9850_config *config = (struct ad9850_config *)buf;
42 struct iio_dev *idev = dev_to_iio_dev(dev);
43 struct ad9850_state *st = iio_priv(idev);
44
45 xfer.len = len;
46 xfer.tx_buf = config;
47 mutex_lock(&st->lock);
48
49 ret = spi_sync_transfer(st->sdev, &xfer, 1);
50 mutex_unlock(&st->lock);
51
52 return ret ? ret : len;
53}
54
55static IIO_DEVICE_ATTR(dds, S_IWUSR, NULL, ad9850_set_parameter, 0);
56
57static struct attribute *ad9850_attributes[] = {
58 &iio_dev_attr_dds.dev_attr.attr,
59 NULL,
60};
61
62static const struct attribute_group ad9850_attribute_group = {
63 .attrs = ad9850_attributes,
64};
65
66static const struct iio_info ad9850_info = {
67 .attrs = &ad9850_attribute_group,
68 .driver_module = THIS_MODULE,
69};
70
71static int ad9850_probe(struct spi_device *spi)
72{
73 struct ad9850_state *st;
74 struct iio_dev *idev;
75 int ret = 0;
76
77 idev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
78 if (!idev)
79 return -ENOMEM;
80 spi_set_drvdata(spi, idev);
81 st = iio_priv(idev);
82 mutex_init(&st->lock);
83 st->sdev = spi;
84
85 idev->dev.parent = &spi->dev;
86 idev->info = &ad9850_info;
87 idev->modes = INDIO_DIRECT_MODE;
88
89 ret = iio_device_register(idev);
90 if (ret)
91 return ret;
92 spi->max_speed_hz = 2000000;
93 spi->mode = SPI_MODE_3;
94 spi->bits_per_word = 16;
95 spi_setup(spi);
96
97 return 0;
98}
99
100static int ad9850_remove(struct spi_device *spi)
101{
102 iio_device_unregister(spi_get_drvdata(spi));
103
104 return 0;
105}
106
107static struct spi_driver ad9850_driver = {
108 .driver = {
109 .name = DRV_NAME,
110 .owner = THIS_MODULE,
111 },
112 .probe = ad9850_probe,
113 .remove = ad9850_remove,
114};
115module_spi_driver(ad9850_driver);
116
117MODULE_AUTHOR("Cliff Cai");
118MODULE_DESCRIPTION("Analog Devices ad9850 driver");
119MODULE_LICENSE("GPL v2");
120MODULE_ALIAS("spi:" DRV_NAME);
diff --git a/drivers/staging/iio/frequency/ad9852.c b/drivers/staging/iio/frequency/ad9852.c
deleted file mode 100644
index 11e4367375d2..000000000000
--- a/drivers/staging/iio/frequency/ad9852.c
+++ /dev/null
@@ -1,253 +0,0 @@
1/*
2 * Driver for ADI Direct Digital Synthesis ad9852
3 *
4 * Copyright (c) 2010 Analog Devices Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11#include <linux/types.h>
12#include <linux/mutex.h>
13#include <linux/device.h>
14#include <linux/spi/spi.h>
15#include <linux/slab.h>
16#include <linux/sysfs.h>
17#include <linux/module.h>
18
19#include <linux/iio/iio.h>
20#include <linux/iio/sysfs.h>
21
22#define DRV_NAME "ad9852"
23
24#define addr_phaad1 0x0
25#define addr_phaad2 0x1
26#define addr_fretu1 0x2
27#define addr_fretu2 0x3
28#define addr_delfre 0x4
29#define addr_updclk 0x5
30#define addr_ramclk 0x6
31#define addr_contrl 0x7
32#define addr_optskm 0x8
33#define addr_optskr 0xa
34#define addr_dacctl 0xb
35
36#define COMPPD (1 << 4)
37#define REFMULT2 (1 << 2)
38#define BYPPLL (1 << 5)
39#define PLLRANG (1 << 6)
40#define IEUPCLK (1)
41#define OSKEN (1 << 5)
42
43#define read_bit (1 << 7)
44
45/* Register format: 1 byte addr + value */
46struct ad9852_config {
47 u8 phajst0[3];
48 u8 phajst1[3];
49 u8 fretun1[6];
50 u8 fretun2[6];
51 u8 dltafre[6];
52 u8 updtclk[5];
53 u8 ramprat[4];
54 u8 control[5];
55 u8 outpskm[3];
56 u8 outpskr[2];
57 u8 daccntl[3];
58};
59
60struct ad9852_state {
61 struct mutex lock;
62 struct spi_device *sdev;
63};
64
65static ssize_t ad9852_set_parameter(struct device *dev,
66 struct device_attribute *attr,
67 const char *buf,
68 size_t len)
69{
70 struct spi_transfer xfer;
71 int ret;
72 struct ad9852_config *config = (struct ad9852_config *)buf;
73 struct iio_dev *idev = dev_to_iio_dev(dev);
74 struct ad9852_state *st = iio_priv(idev);
75
76 xfer.len = 3;
77 xfer.tx_buf = &config->phajst0[0];
78 mutex_lock(&st->lock);
79
80 ret = spi_sync_transfer(st->sdev, &xfer, 1);
81 if (ret)
82 goto error_ret;
83
84 xfer.len = 3;
85 xfer.tx_buf = &config->phajst1[0];
86
87 ret = spi_sync_transfer(st->sdev, &xfer, 1);
88 if (ret)
89 goto error_ret;
90
91 xfer.len = 6;
92 xfer.tx_buf = &config->fretun1[0];
93
94 ret = spi_sync_transfer(st->sdev, &xfer, 1);
95 if (ret)
96 goto error_ret;
97
98 xfer.len = 6;
99 xfer.tx_buf = &config->fretun2[0];
100
101 ret = spi_sync_transfer(st->sdev, &xfer, 1);
102 if (ret)
103 goto error_ret;
104
105 xfer.len = 6;
106 xfer.tx_buf = &config->dltafre[0];
107
108 ret = spi_sync_transfer(st->sdev, &xfer, 1);
109 if (ret)
110 goto error_ret;
111
112 xfer.len = 5;
113 xfer.tx_buf = &config->updtclk[0];
114
115 ret = spi_sync_transfer(st->sdev, &xfer, 1);
116 if (ret)
117 goto error_ret;
118
119 xfer.len = 4;
120 xfer.tx_buf = &config->ramprat[0];
121
122 ret = spi_sync_transfer(st->sdev, &xfer, 1);
123 if (ret)
124 goto error_ret;
125
126 xfer.len = 5;
127 xfer.tx_buf = &config->control[0];
128
129 ret = spi_sync_transfer(st->sdev, &xfer, 1);
130 if (ret)
131 goto error_ret;
132
133 xfer.len = 3;
134 xfer.tx_buf = &config->outpskm[0];
135
136 ret = spi_sync_transfer(st->sdev, &xfer, 1);
137 if (ret)
138 goto error_ret;
139
140 xfer.len = 2;
141 xfer.tx_buf = &config->outpskr[0];
142
143 ret = spi_sync_transfer(st->sdev, &xfer, 1);
144 if (ret)
145 goto error_ret;
146
147 xfer.len = 3;
148 xfer.tx_buf = &config->daccntl[0];
149
150 ret = spi_sync_transfer(st->sdev, &xfer, 1);
151 if (ret)
152 goto error_ret;
153error_ret:
154 mutex_unlock(&st->lock);
155
156 return ret ? ret : len;
157}
158
159static IIO_DEVICE_ATTR(dds, S_IWUSR, NULL, ad9852_set_parameter, 0);
160
161static void ad9852_init(struct ad9852_state *st)
162{
163 struct spi_transfer xfer;
164 int ret;
165 u8 config[5];
166
167 config[0] = addr_contrl;
168 config[1] = COMPPD;
169 config[2] = REFMULT2 | BYPPLL | PLLRANG;
170 config[3] = IEUPCLK;
171 config[4] = OSKEN;
172
173 mutex_lock(&st->lock);
174
175 xfer.len = 5;
176 xfer.tx_buf = &config;
177
178 ret = spi_sync_transfer(st->sdev, &xfer, 1);
179 if (ret)
180 goto error_ret;
181
182error_ret:
183 mutex_unlock(&st->lock);
184
185
186
187}
188
189static struct attribute *ad9852_attributes[] = {
190 &iio_dev_attr_dds.dev_attr.attr,
191 NULL,
192};
193
194static const struct attribute_group ad9852_attribute_group = {
195 .attrs = ad9852_attributes,
196};
197
198static const struct iio_info ad9852_info = {
199 .attrs = &ad9852_attribute_group,
200 .driver_module = THIS_MODULE,
201};
202
203static int ad9852_probe(struct spi_device *spi)
204{
205 struct ad9852_state *st;
206 struct iio_dev *idev;
207 int ret = 0;
208
209 idev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
210 if (!idev)
211 return -ENOMEM;
212 st = iio_priv(idev);
213 spi_set_drvdata(spi, idev);
214 mutex_init(&st->lock);
215 st->sdev = spi;
216
217 idev->dev.parent = &spi->dev;
218 idev->info = &ad9852_info;
219 idev->modes = INDIO_DIRECT_MODE;
220
221 ret = iio_device_register(idev);
222 if (ret)
223 return ret;
224 spi->max_speed_hz = 2000000;
225 spi->mode = SPI_MODE_3;
226 spi->bits_per_word = 8;
227 spi_setup(spi);
228 ad9852_init(st);
229
230 return 0;
231}
232
233static int ad9852_remove(struct spi_device *spi)
234{
235 iio_device_unregister(spi_get_drvdata(spi));
236
237 return 0;
238}
239
240static struct spi_driver ad9852_driver = {
241 .driver = {
242 .name = DRV_NAME,
243 .owner = THIS_MODULE,
244 },
245 .probe = ad9852_probe,
246 .remove = ad9852_remove,
247};
248module_spi_driver(ad9852_driver);
249
250MODULE_AUTHOR("Cliff Cai");
251MODULE_DESCRIPTION("Analog Devices ad9852 driver");
252MODULE_LICENSE("GPL v2");
253MODULE_ALIAS("spi:" DRV_NAME);
diff --git a/drivers/staging/iio/frequency/ad9910.c b/drivers/staging/iio/frequency/ad9910.c
deleted file mode 100644
index 755e0482681a..000000000000
--- a/drivers/staging/iio/frequency/ad9910.c
+++ /dev/null
@@ -1,371 +0,0 @@
1/*
2 * Driver for ADI Direct Digital Synthesis ad9910
3 *
4 * Copyright (c) 2010 Analog Devices Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11#include <linux/types.h>
12#include <linux/mutex.h>
13#include <linux/device.h>
14#include <linux/spi/spi.h>
15#include <linux/slab.h>
16#include <linux/sysfs.h>
17#include <linux/module.h>
18
19#include <linux/iio/iio.h>
20#include <linux/iio/sysfs.h>
21
22#define DRV_NAME "ad9910"
23
24#define CFR1 0x0
25#define CFR2 0x1
26#define CFR3 0x2
27
28#define AUXDAC 0x3
29#define IOUPD 0x4
30#define FTW 0x7
31#define POW 0x8
32#define ASF 0x9
33#define MULTC 0x0A
34#define DIG_RAMPL 0x0B
35#define DIG_RAMPS 0x0C
36#define DIG_RAMPR 0x0D
37#define SIN_TONEP0 0x0E
38#define SIN_TONEP1 0x0F
39#define SIN_TONEP2 0x10
40#define SIN_TONEP3 0x11
41#define SIN_TONEP4 0x12
42#define SIN_TONEP5 0x13
43#define SIN_TONEP6 0x14
44#define SIN_TONEP7 0x15
45
46#define RAM_ENABLE (1 << 7)
47
48#define MANUAL_OSK (1 << 7)
49#define INVSIC (1 << 6)
50#define DDS_SINEOP (1)
51
52#define AUTO_OSK (1)
53#define OSKEN (1 << 1)
54#define LOAD_ARR (1 << 2)
55#define CLR_PHA (1 << 3)
56#define CLR_DIG (1 << 4)
57#define ACLR_PHA (1 << 5)
58#define ACLR_DIG (1 << 6)
59#define LOAD_LRR (1 << 7)
60
61#define LSB_FST (1)
62#define SDIO_IPT (1 << 1)
63#define EXT_PWD (1 << 3)
64#define ADAC_PWD (1 << 4)
65#define REFCLK_PWD (1 << 5)
66#define DAC_PWD (1 << 6)
67#define DIG_PWD (1 << 7)
68
69#define ENA_AMP (1)
70#define READ_FTW (1)
71#define DIGR_LOW (1 << 1)
72#define DIGR_HIGH (1 << 2)
73#define DIGR_ENA (1 << 3)
74#define SYNCCLK_ENA (1 << 6)
75#define ITER_IOUPD (1 << 7)
76
77#define TX_ENA (1 << 1)
78#define PDCLK_INV (1 << 2)
79#define PDCLK_ENB (1 << 3)
80
81#define PARA_ENA (1 << 4)
82#define SYNC_DIS (1 << 5)
83#define DATA_ASS (1 << 6)
84#define MATCH_ENA (1 << 7)
85
86#define PLL_ENA (1)
87#define PFD_RST (1 << 2)
88#define REFCLK_RST (1 << 6)
89#define REFCLK_BYP (1 << 7)
90
91/* Register format: 1 byte addr + value */
92struct ad9910_config {
93 u8 auxdac[5];
94 u8 ioupd[5];
95 u8 ftw[5];
96 u8 pow[3];
97 u8 asf[5];
98 u8 multc[5];
99 u8 dig_rampl[9];
100 u8 dig_ramps[9];
101 u8 dig_rampr[5];
102 u8 sin_tonep0[9];
103 u8 sin_tonep1[9];
104 u8 sin_tonep2[9];
105 u8 sin_tonep3[9];
106 u8 sin_tonep4[9];
107 u8 sin_tonep5[9];
108 u8 sin_tonep6[9];
109 u8 sin_tonep7[9];
110};
111
112struct ad9910_state {
113 struct mutex lock;
114 struct spi_device *sdev;
115};
116
117static ssize_t ad9910_set_parameter(struct device *dev,
118 struct device_attribute *attr,
119 const char *buf,
120 size_t len)
121{
122 struct spi_transfer xfer;
123 int ret;
124 struct ad9910_config *config = (struct ad9910_config *)buf;
125 struct iio_dev *idev = dev_to_iio_dev(dev);
126 struct ad9910_state *st = iio_priv(idev);
127
128 xfer.len = 5;
129 xfer.tx_buf = &config->auxdac[0];
130 mutex_lock(&st->lock);
131
132 ret = spi_sync_transfer(st->sdev, &xfer, 1);
133 if (ret)
134 goto error_ret;
135
136 xfer.len = 5;
137 xfer.tx_buf = &config->ioupd[0];
138
139 ret = spi_sync_transfer(st->sdev, &xfer, 1);
140 if (ret)
141 goto error_ret;
142
143 xfer.len = 5;
144 xfer.tx_buf = &config->ftw[0];
145
146 ret = spi_sync_transfer(st->sdev, &xfer, 1);
147 if (ret)
148 goto error_ret;
149
150 xfer.len = 3;
151 xfer.tx_buf = &config->pow[0];
152
153 ret = spi_sync_transfer(st->sdev, &xfer, 1);
154 if (ret)
155 goto error_ret;
156
157 xfer.len = 5;
158 xfer.tx_buf = &config->asf[0];
159
160 ret = spi_sync_transfer(st->sdev, &xfer, 1);
161 if (ret)
162 goto error_ret;
163
164 xfer.len = 5;
165 xfer.tx_buf = &config->multc[0];
166
167 ret = spi_sync_transfer(st->sdev, &xfer, 1);
168 if (ret)
169 goto error_ret;
170
171 xfer.len = 9;
172 xfer.tx_buf = &config->dig_rampl[0];
173
174 ret = spi_sync_transfer(st->sdev, &xfer, 1);
175 if (ret)
176 goto error_ret;
177
178 xfer.len = 9;
179 xfer.tx_buf = &config->dig_ramps[0];
180
181 ret = spi_sync_transfer(st->sdev, &xfer, 1);
182 if (ret)
183 goto error_ret;
184
185 xfer.len = 5;
186 xfer.tx_buf = &config->dig_rampr[0];
187
188 ret = spi_sync_transfer(st->sdev, &xfer, 1);
189 if (ret)
190 goto error_ret;
191
192 xfer.len = 9;
193 xfer.tx_buf = &config->sin_tonep0[0];
194
195 ret = spi_sync_transfer(st->sdev, &xfer, 1);
196 if (ret)
197 goto error_ret;
198
199 xfer.len = 9;
200 xfer.tx_buf = &config->sin_tonep1[0];
201
202 ret = spi_sync_transfer(st->sdev, &xfer, 1);
203 if (ret)
204 goto error_ret;
205
206 xfer.len = 9;
207 xfer.tx_buf = &config->sin_tonep2[0];
208
209 ret = spi_sync_transfer(st->sdev, &xfer, 1);
210 if (ret)
211 goto error_ret;
212 xfer.len = 9;
213 xfer.tx_buf = &config->sin_tonep3[0];
214
215 ret = spi_sync_transfer(st->sdev, &xfer, 1);
216 if (ret)
217 goto error_ret;
218
219 xfer.len = 9;
220 xfer.tx_buf = &config->sin_tonep4[0];
221
222 ret = spi_sync_transfer(st->sdev, &xfer, 1);
223 if (ret)
224 goto error_ret;
225
226 xfer.len = 9;
227 xfer.tx_buf = &config->sin_tonep5[0];
228
229 ret = spi_sync_transfer(st->sdev, &xfer, 1);
230 if (ret)
231 goto error_ret;
232
233 xfer.len = 9;
234 xfer.tx_buf = &config->sin_tonep6[0];
235
236 ret = spi_sync_transfer(st->sdev, &xfer, 1);
237 if (ret)
238 goto error_ret;
239
240 xfer.len = 9;
241 xfer.tx_buf = &config->sin_tonep7[0];
242
243 ret = spi_sync_transfer(st->sdev, &xfer, 1);
244 if (ret)
245 goto error_ret;
246error_ret:
247 mutex_unlock(&st->lock);
248
249 return ret ? ret : len;
250}
251
252static IIO_DEVICE_ATTR(dds, S_IWUSR, NULL, ad9910_set_parameter, 0);
253
254static void ad9910_init(struct ad9910_state *st)
255{
256 struct spi_transfer xfer;
257 int ret;
258 u8 cfr[5];
259
260 cfr[0] = CFR1;
261 cfr[1] = 0;
262 cfr[2] = MANUAL_OSK | INVSIC | DDS_SINEOP;
263 cfr[3] = AUTO_OSK | OSKEN | ACLR_PHA | ACLR_DIG | LOAD_LRR;
264 cfr[4] = 0;
265
266 mutex_lock(&st->lock);
267
268 xfer.len = 5;
269 xfer.tx_buf = &cfr;
270
271 ret = spi_sync_transfer(st->sdev, &xfer, 1);
272 if (ret)
273 goto error_ret;
274
275 cfr[0] = CFR2;
276 cfr[1] = ENA_AMP;
277 cfr[2] = READ_FTW | DIGR_ENA | ITER_IOUPD;
278 cfr[3] = TX_ENA | PDCLK_INV | PDCLK_ENB;
279 cfr[4] = PARA_ENA;
280
281 xfer.len = 5;
282 xfer.tx_buf = &cfr;
283
284 ret = spi_sync_transfer(st->sdev, &xfer, 1);
285 if (ret)
286 goto error_ret;
287
288 cfr[0] = CFR3;
289 cfr[1] = PLL_ENA;
290 cfr[2] = 0;
291 cfr[3] = REFCLK_RST | REFCLK_BYP;
292 cfr[4] = 0;
293
294 xfer.len = 5;
295 xfer.tx_buf = &cfr;
296
297 ret = spi_sync_transfer(st->sdev, &xfer, 1);
298 if (ret)
299 goto error_ret;
300
301error_ret:
302 mutex_unlock(&st->lock);
303
304
305
306}
307
308static struct attribute *ad9910_attributes[] = {
309 &iio_dev_attr_dds.dev_attr.attr,
310 NULL,
311};
312
313static const struct attribute_group ad9910_attribute_group = {
314 .attrs = ad9910_attributes,
315};
316
317static const struct iio_info ad9910_info = {
318 .attrs = &ad9910_attribute_group,
319 .driver_module = THIS_MODULE,
320};
321
322static int ad9910_probe(struct spi_device *spi)
323{
324 struct ad9910_state *st;
325 struct iio_dev *idev;
326 int ret = 0;
327
328 idev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
329 if (!idev)
330 return -ENOMEM;
331 spi_set_drvdata(spi, idev);
332 st = iio_priv(idev);
333 mutex_init(&st->lock);
334 st->sdev = spi;
335
336 idev->dev.parent = &spi->dev;
337 idev->info = &ad9910_info;
338 idev->modes = INDIO_DIRECT_MODE;
339
340 ret = iio_device_register(idev);
341 if (ret)
342 return ret;
343 spi->max_speed_hz = 2000000;
344 spi->mode = SPI_MODE_3;
345 spi->bits_per_word = 8;
346 spi_setup(spi);
347 ad9910_init(st);
348 return 0;
349}
350
351static int ad9910_remove(struct spi_device *spi)
352{
353 iio_device_unregister(spi_get_drvdata(spi));
354
355 return 0;
356}
357
358static struct spi_driver ad9910_driver = {
359 .driver = {
360 .name = DRV_NAME,
361 .owner = THIS_MODULE,
362 },
363 .probe = ad9910_probe,
364 .remove = ad9910_remove,
365};
366module_spi_driver(ad9910_driver);
367
368MODULE_AUTHOR("Cliff Cai");
369MODULE_DESCRIPTION("Analog Devices ad9910 driver");
370MODULE_LICENSE("GPL v2");
371MODULE_ALIAS("spi:" DRV_NAME);
diff --git a/drivers/staging/iio/frequency/ad9951.c b/drivers/staging/iio/frequency/ad9951.c
deleted file mode 100644
index 5e8990a0210b..000000000000
--- a/drivers/staging/iio/frequency/ad9951.c
+++ /dev/null
@@ -1,209 +0,0 @@
1/*
2 * Driver for ADI Direct Digital Synthesis ad9951
3 *
4 * Copyright (c) 2010 Analog Devices Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11#include <linux/types.h>
12#include <linux/mutex.h>
13#include <linux/device.h>
14#include <linux/spi/spi.h>
15#include <linux/slab.h>
16#include <linux/sysfs.h>
17#include <linux/module.h>
18
19#include <linux/iio/iio.h>
20#include <linux/iio/sysfs.h>
21
22#define DRV_NAME "ad9951"
23
24#define CFR1 0x0
25#define CFR2 0x1
26
27#define AUTO_OSK (1)
28#define OSKEN (1 << 1)
29#define LOAD_ARR (1 << 2)
30
31#define AUTO_SYNC (1 << 7)
32
33#define LSB_FST (1)
34#define SDIO_IPT (1 << 1)
35#define CLR_PHA (1 << 2)
36#define SINE_OPT (1 << 4)
37#define ACLR_PHA (1 << 5)
38
39#define VCO_RANGE (1 << 2)
40
41#define CRS_OPT (1 << 1)
42#define HMANU_SYNC (1 << 2)
43#define HSPD_SYNC (1 << 3)
44
45/* Register format: 1 byte addr + value */
46struct ad9951_config {
47 u8 asf[3];
48 u8 arr[2];
49 u8 ftw0[5];
50 u8 ftw1[3];
51};
52
53struct ad9951_state {
54 struct mutex lock;
55 struct spi_device *sdev;
56};
57
58static ssize_t ad9951_set_parameter(struct device *dev,
59 struct device_attribute *attr,
60 const char *buf,
61 size_t len)
62{
63 struct spi_transfer xfer;
64 int ret;
65 struct ad9951_config *config = (struct ad9951_config *)buf;
66 struct iio_dev *idev = dev_to_iio_dev(dev);
67 struct ad9951_state *st = iio_priv(idev);
68
69 xfer.len = 3;
70 xfer.tx_buf = &config->asf[0];
71 mutex_lock(&st->lock);
72
73 ret = spi_sync_transfer(st->sdev, &xfer, 1);
74 if (ret)
75 goto error_ret;
76
77 xfer.len = 2;
78 xfer.tx_buf = &config->arr[0];
79
80 ret = spi_sync_transfer(st->sdev, &xfer, 1);
81 if (ret)
82 goto error_ret;
83
84 xfer.len = 5;
85 xfer.tx_buf = &config->ftw0[0];
86
87 ret = spi_sync_transfer(st->sdev, &xfer, 1);
88 if (ret)
89 goto error_ret;
90
91 xfer.len = 3;
92 xfer.tx_buf = &config->ftw1[0];
93
94 ret = spi_sync_transfer(st->sdev, &xfer, 1);
95 if (ret)
96 goto error_ret;
97error_ret:
98 mutex_unlock(&st->lock);
99
100 return ret ? ret : len;
101}
102
103static IIO_DEVICE_ATTR(dds, S_IWUSR, NULL, ad9951_set_parameter, 0);
104
105static void ad9951_init(struct ad9951_state *st)
106{
107 struct spi_transfer xfer;
108 int ret;
109 u8 cfr[5];
110
111 cfr[0] = CFR1;
112 cfr[1] = 0;
113 cfr[2] = LSB_FST | CLR_PHA | SINE_OPT | ACLR_PHA;
114 cfr[3] = AUTO_OSK | OSKEN | LOAD_ARR;
115 cfr[4] = 0;
116
117 mutex_lock(&st->lock);
118
119 xfer.len = 5;
120 xfer.tx_buf = &cfr;
121
122 ret = spi_sync_transfer(st->sdev, &xfer, 1);
123 if (ret)
124 goto error_ret;
125
126 cfr[0] = CFR2;
127 cfr[1] = VCO_RANGE;
128 cfr[2] = HSPD_SYNC;
129 cfr[3] = 0;
130
131 xfer.len = 4;
132 xfer.tx_buf = &cfr;
133
134 ret = spi_sync_transfer(st->sdev, &xfer, 1);
135 if (ret)
136 goto error_ret;
137
138error_ret:
139 mutex_unlock(&st->lock);
140
141
142
143}
144
145static struct attribute *ad9951_attributes[] = {
146 &iio_dev_attr_dds.dev_attr.attr,
147 NULL,
148};
149
150static const struct attribute_group ad9951_attribute_group = {
151 .attrs = ad9951_attributes,
152};
153
154static const struct iio_info ad9951_info = {
155 .attrs = &ad9951_attribute_group,
156 .driver_module = THIS_MODULE,
157};
158
159static int ad9951_probe(struct spi_device *spi)
160{
161 struct ad9951_state *st;
162 struct iio_dev *idev;
163 int ret = 0;
164
165 idev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
166 if (!idev)
167 return -ENOMEM;
168 spi_set_drvdata(spi, idev);
169 st = iio_priv(idev);
170 mutex_init(&st->lock);
171 st->sdev = spi;
172
173 idev->dev.parent = &spi->dev;
174
175 idev->info = &ad9951_info;
176 idev->modes = INDIO_DIRECT_MODE;
177
178 ret = iio_device_register(idev);
179 if (ret)
180 return ret;
181 spi->max_speed_hz = 2000000;
182 spi->mode = SPI_MODE_3;
183 spi->bits_per_word = 8;
184 spi_setup(spi);
185 ad9951_init(st);
186 return 0;
187}
188
189static int ad9951_remove(struct spi_device *spi)
190{
191 iio_device_unregister(spi_get_drvdata(spi));
192
193 return 0;
194}
195
196static struct spi_driver ad9951_driver = {
197 .driver = {
198 .name = DRV_NAME,
199 .owner = THIS_MODULE,
200 },
201 .probe = ad9951_probe,
202 .remove = ad9951_remove,
203};
204module_spi_driver(ad9951_driver);
205
206MODULE_AUTHOR("Cliff Cai");
207MODULE_DESCRIPTION("Analog Devices ad9951 driver");
208MODULE_LICENSE("GPL v2");
209MODULE_ALIAS("spi:" DRV_NAME);
diff --git a/drivers/staging/iio/gyro/adis16060_core.c b/drivers/staging/iio/gyro/adis16060_core.c
index d5d395c2e3e4..4c5869dd8223 100644
--- a/drivers/staging/iio/gyro/adis16060_core.c
+++ b/drivers/staging/iio/gyro/adis16060_core.c
@@ -180,6 +180,7 @@ static int adis16060_w_probe(struct spi_device *spi)
180 int ret; 180 int ret;
181 struct iio_dev *indio_dev = adis16060_iio_dev; 181 struct iio_dev *indio_dev = adis16060_iio_dev;
182 struct adis16060_state *st; 182 struct adis16060_state *st;
183
183 if (!indio_dev) { 184 if (!indio_dev) {
184 ret = -ENODEV; 185 ret = -ENODEV;
185 goto error_ret; 186 goto error_ret;
diff --git a/drivers/staging/iio/impedance-analyzer/ad5933.c b/drivers/staging/iio/impedance-analyzer/ad5933.c
index 2b96665da8a2..2cef4b95ba63 100644
--- a/drivers/staging/iio/impedance-analyzer/ad5933.c
+++ b/drivers/staging/iio/impedance-analyzer/ad5933.c
@@ -220,7 +220,7 @@ static int ad5933_set_freq(struct ad5933_state *st,
220{ 220{
221 unsigned long long freqreg; 221 unsigned long long freqreg;
222 union { 222 union {
223 u32 d32; 223 __be32 d32;
224 u8 d8[4]; 224 u8 d8[4];
225 } dat; 225 } dat;
226 226
@@ -244,7 +244,7 @@ static int ad5933_set_freq(struct ad5933_state *st,
244 244
245static int ad5933_setup(struct ad5933_state *st) 245static int ad5933_setup(struct ad5933_state *st)
246{ 246{
247 unsigned short dat; 247 __be16 dat;
248 int ret; 248 int ret;
249 249
250 ret = ad5933_reset(st); 250 ret = ad5933_reset(st);
@@ -297,7 +297,7 @@ static ssize_t ad5933_show_frequency(struct device *dev,
297 int ret; 297 int ret;
298 unsigned long long freqreg; 298 unsigned long long freqreg;
299 union { 299 union {
300 u32 d32; 300 __be32 d32;
301 u8 d8[4]; 301 u8 d8[4];
302 } dat; 302 } dat;
303 303
@@ -402,7 +402,7 @@ static ssize_t ad5933_store(struct device *dev,
402 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 402 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
403 u16 val; 403 u16 val;
404 int i, ret = 0; 404 int i, ret = 0;
405 unsigned short dat; 405 __be16 dat;
406 406
407 if (this_attr->address != AD5933_IN_PGA_GAIN) { 407 if (this_attr->address != AD5933_IN_PGA_GAIN) {
408 ret = kstrtou16(buf, 10, &val); 408 ret = kstrtou16(buf, 10, &val);
@@ -521,7 +521,7 @@ static int ad5933_read_raw(struct iio_dev *indio_dev,
521 long m) 521 long m)
522{ 522{
523 struct ad5933_state *st = iio_priv(indio_dev); 523 struct ad5933_state *st = iio_priv(indio_dev);
524 unsigned short dat; 524 __be16 dat;
525 int ret = -EINVAL; 525 int ret = -EINVAL;
526 526
527 mutex_lock(&indio_dev->mlock); 527 mutex_lock(&indio_dev->mlock);
diff --git a/drivers/staging/iio/light/isl29018.c b/drivers/staging/iio/light/isl29018.c
index 3660a43b5f08..86cc8f9fef06 100644
--- a/drivers/staging/iio/light/isl29018.c
+++ b/drivers/staging/iio/light/isl29018.c
@@ -454,7 +454,7 @@ static const struct attribute_group isl29108_group = {
454static int isl29018_chip_init(struct isl29018_chip *chip) 454static int isl29018_chip_init(struct isl29018_chip *chip)
455{ 455{
456 int status; 456 int status;
457 int new_adc_bit; 457 unsigned int new_adc_bit;
458 unsigned int new_range; 458 unsigned int new_range;
459 459
460 /* Code added per Intersil Application Note 1534: 460 /* Code added per Intersil Application Note 1534:
diff --git a/drivers/staging/iio/magnetometer/hmc5843_core.c b/drivers/staging/iio/magnetometer/hmc5843_core.c
index 914ae1acd31d..fd171d8b38fb 100644
--- a/drivers/staging/iio/magnetometer/hmc5843_core.c
+++ b/drivers/staging/iio/magnetometer/hmc5843_core.c
@@ -131,7 +131,7 @@ static s32 hmc5843_set_mode(struct hmc5843_data *data, u8 operating_mode)
131static int hmc5843_wait_measurement(struct hmc5843_data *data) 131static int hmc5843_wait_measurement(struct hmc5843_data *data)
132{ 132{
133 int tries = 150; 133 int tries = 150;
134 int val; 134 unsigned int val;
135 int ret; 135 int ret;
136 136
137 while (tries-- > 0) { 137 while (tries-- > 0) {
@@ -209,7 +209,7 @@ static ssize_t hmc5843_show_measurement_configuration(struct device *dev,
209 char *buf) 209 char *buf)
210{ 210{
211 struct hmc5843_data *data = iio_priv(dev_to_iio_dev(dev)); 211 struct hmc5843_data *data = iio_priv(dev_to_iio_dev(dev));
212 int val; 212 unsigned int val;
213 int ret; 213 int ret;
214 214
215 ret = regmap_read(data->regmap, HMC5843_CONFIG_REG_A, &val); 215 ret = regmap_read(data->regmap, HMC5843_CONFIG_REG_A, &val);
@@ -344,7 +344,7 @@ static int hmc5843_read_raw(struct iio_dev *indio_dev,
344 int *val, int *val2, long mask) 344 int *val, int *val2, long mask)
345{ 345{
346 struct hmc5843_data *data = iio_priv(indio_dev); 346 struct hmc5843_data *data = iio_priv(indio_dev);
347 int rval; 347 unsigned int rval;
348 int ret; 348 int ret;
349 349
350 switch (mask) { 350 switch (mask) {
diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/resolver/ad2s1210.c
index 7fbaba41c872..1360099fdaea 100644
--- a/drivers/staging/iio/resolver/ad2s1210.c
+++ b/drivers/staging/iio/resolver/ad2s1210.c
@@ -491,7 +491,7 @@ static int ad2s1210_read_raw(struct iio_dev *indio_dev,
491 491
492 switch (chan->type) { 492 switch (chan->type) {
493 case IIO_ANGL: 493 case IIO_ANGL:
494 pos = be16_to_cpup((u16 *)st->rx); 494 pos = be16_to_cpup((__be16 *) st->rx);
495 if (st->hysteresis) 495 if (st->hysteresis)
496 pos >>= 16 - st->resolution; 496 pos >>= 16 - st->resolution;
497 *val = pos; 497 *val = pos;
@@ -499,7 +499,7 @@ static int ad2s1210_read_raw(struct iio_dev *indio_dev,
499 break; 499 break;
500 case IIO_ANGL_VEL: 500 case IIO_ANGL_VEL:
501 negative = st->rx[0] & 0x80; 501 negative = st->rx[0] & 0x80;
502 vel = be16_to_cpup((s16 *)st->rx); 502 vel = be16_to_cpup((__be16 *) st->rx);
503 vel >>= 16 - st->resolution; 503 vel >>= 16 - st->resolution;
504 if (vel & 0x8000) { 504 if (vel & 0x8000) {
505 negative = (0xffff >> st->resolution) << st->resolution; 505 negative = (0xffff >> st->resolution) << st->resolution;
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-23 12:41:41 -0500