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authorLinus Torvalds <torvalds@linux-foundation.org>2012-08-16 14:13:16 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-08-16 14:13:16 -0400
commit2b014fcc7d99d31c3693a7e50d7dcb8b4ddc9cee (patch)
treebfe1fbe922fd456796ed0bde08a4dd3497411db1
parentd3b8e0dc828f8ec9cc895bb46e8c51b2763e9d2c (diff)
parentffc493062ce9987156945aa21a677d83a179fc0a (diff)
Merge branch 'fixes' of git://git.infradead.org/users/vkoul/slave-dma
Pull two slave-dmaengine fixes from Vinod Koul: "One fixes the correct use of clock API in imx driver and the other enables clock for tegra driver, which is used for other tegra driver conversion to dmanegine in -next." * 'fixes' of git://git.infradead.org/users/vkoul/slave-dma: dma: tegra: enable/disable dma clock dma: imx-dma: Fix kernel crash due to missing clock conversion
-rw-r--r--drivers/dma/imx-dma.c36
-rw-r--r--drivers/dma/tegra20-apb-dma.c18
2 files changed, 42 insertions, 12 deletions
diff --git a/drivers/dma/imx-dma.c b/drivers/dma/imx-dma.c
index fcfeb3cd8d31..5084975d793c 100644
--- a/drivers/dma/imx-dma.c
+++ b/drivers/dma/imx-dma.c
@@ -172,7 +172,8 @@ struct imxdma_engine {
172 struct device_dma_parameters dma_parms; 172 struct device_dma_parameters dma_parms;
173 struct dma_device dma_device; 173 struct dma_device dma_device;
174 void __iomem *base; 174 void __iomem *base;
175 struct clk *dma_clk; 175 struct clk *dma_ahb;
176 struct clk *dma_ipg;
176 spinlock_t lock; 177 spinlock_t lock;
177 struct imx_dma_2d_config slots_2d[IMX_DMA_2D_SLOTS]; 178 struct imx_dma_2d_config slots_2d[IMX_DMA_2D_SLOTS];
178 struct imxdma_channel channel[IMX_DMA_CHANNELS]; 179 struct imxdma_channel channel[IMX_DMA_CHANNELS];
@@ -976,10 +977,20 @@ static int __init imxdma_probe(struct platform_device *pdev)
976 return 0; 977 return 0;
977 } 978 }
978 979
979 imxdma->dma_clk = clk_get(NULL, "dma"); 980 imxdma->dma_ipg = devm_clk_get(&pdev->dev, "ipg");
980 if (IS_ERR(imxdma->dma_clk)) 981 if (IS_ERR(imxdma->dma_ipg)) {
981 return PTR_ERR(imxdma->dma_clk); 982 ret = PTR_ERR(imxdma->dma_ipg);
982 clk_enable(imxdma->dma_clk); 983 goto err_clk;
984 }
985
986 imxdma->dma_ahb = devm_clk_get(&pdev->dev, "ahb");
987 if (IS_ERR(imxdma->dma_ahb)) {
988 ret = PTR_ERR(imxdma->dma_ahb);
989 goto err_clk;
990 }
991
992 clk_prepare_enable(imxdma->dma_ipg);
993 clk_prepare_enable(imxdma->dma_ahb);
983 994
984 /* reset DMA module */ 995 /* reset DMA module */
985 imx_dmav1_writel(imxdma, DCR_DRST, DMA_DCR); 996 imx_dmav1_writel(imxdma, DCR_DRST, DMA_DCR);
@@ -988,16 +999,14 @@ static int __init imxdma_probe(struct platform_device *pdev)
988 ret = request_irq(MX1_DMA_INT, dma_irq_handler, 0, "DMA", imxdma); 999 ret = request_irq(MX1_DMA_INT, dma_irq_handler, 0, "DMA", imxdma);
989 if (ret) { 1000 if (ret) {
990 dev_warn(imxdma->dev, "Can't register IRQ for DMA\n"); 1001 dev_warn(imxdma->dev, "Can't register IRQ for DMA\n");
991 kfree(imxdma); 1002 goto err_enable;
992 return ret;
993 } 1003 }
994 1004
995 ret = request_irq(MX1_DMA_ERR, imxdma_err_handler, 0, "DMA", imxdma); 1005 ret = request_irq(MX1_DMA_ERR, imxdma_err_handler, 0, "DMA", imxdma);
996 if (ret) { 1006 if (ret) {
997 dev_warn(imxdma->dev, "Can't register ERRIRQ for DMA\n"); 1007 dev_warn(imxdma->dev, "Can't register ERRIRQ for DMA\n");
998 free_irq(MX1_DMA_INT, NULL); 1008 free_irq(MX1_DMA_INT, NULL);
999 kfree(imxdma); 1009 goto err_enable;
1000 return ret;
1001 } 1010 }
1002 } 1011 }
1003 1012
@@ -1094,7 +1103,10 @@ err_init:
1094 free_irq(MX1_DMA_INT, NULL); 1103 free_irq(MX1_DMA_INT, NULL);
1095 free_irq(MX1_DMA_ERR, NULL); 1104 free_irq(MX1_DMA_ERR, NULL);
1096 } 1105 }
1097 1106err_enable:
1107 clk_disable_unprepare(imxdma->dma_ipg);
1108 clk_disable_unprepare(imxdma->dma_ahb);
1109err_clk:
1098 kfree(imxdma); 1110 kfree(imxdma);
1099 return ret; 1111 return ret;
1100} 1112}
@@ -1114,7 +1126,9 @@ static int __exit imxdma_remove(struct platform_device *pdev)
1114 free_irq(MX1_DMA_ERR, NULL); 1126 free_irq(MX1_DMA_ERR, NULL);
1115 } 1127 }
1116 1128
1117 kfree(imxdma); 1129 clk_disable_unprepare(imxdma->dma_ipg);
1130 clk_disable_unprepare(imxdma->dma_ahb);
1131 kfree(imxdma);
1118 1132
1119 return 0; 1133 return 0;
1120} 1134}
diff --git a/drivers/dma/tegra20-apb-dma.c b/drivers/dma/tegra20-apb-dma.c
index d52dbc6c54ab..24acd711e032 100644
--- a/drivers/dma/tegra20-apb-dma.c
+++ b/drivers/dma/tegra20-apb-dma.c
@@ -1119,15 +1119,21 @@ struct dma_async_tx_descriptor *tegra_dma_prep_dma_cyclic(
1119static int tegra_dma_alloc_chan_resources(struct dma_chan *dc) 1119static int tegra_dma_alloc_chan_resources(struct dma_chan *dc)
1120{ 1120{
1121 struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc); 1121 struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
1122 struct tegra_dma *tdma = tdc->tdma;
1123 int ret;
1122 1124
1123 dma_cookie_init(&tdc->dma_chan); 1125 dma_cookie_init(&tdc->dma_chan);
1124 tdc->config_init = false; 1126 tdc->config_init = false;
1125 return 0; 1127 ret = clk_prepare_enable(tdma->dma_clk);
1128 if (ret < 0)
1129 dev_err(tdc2dev(tdc), "clk_prepare_enable failed: %d\n", ret);
1130 return ret;
1126} 1131}
1127 1132
1128static void tegra_dma_free_chan_resources(struct dma_chan *dc) 1133static void tegra_dma_free_chan_resources(struct dma_chan *dc)
1129{ 1134{
1130 struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc); 1135 struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
1136 struct tegra_dma *tdma = tdc->tdma;
1131 1137
1132 struct tegra_dma_desc *dma_desc; 1138 struct tegra_dma_desc *dma_desc;
1133 struct tegra_dma_sg_req *sg_req; 1139 struct tegra_dma_sg_req *sg_req;
@@ -1163,6 +1169,7 @@ static void tegra_dma_free_chan_resources(struct dma_chan *dc)
1163 list_del(&sg_req->node); 1169 list_del(&sg_req->node);
1164 kfree(sg_req); 1170 kfree(sg_req);
1165 } 1171 }
1172 clk_disable_unprepare(tdma->dma_clk);
1166} 1173}
1167 1174
1168/* Tegra20 specific DMA controller information */ 1175/* Tegra20 specific DMA controller information */
@@ -1255,6 +1262,13 @@ static int __devinit tegra_dma_probe(struct platform_device *pdev)
1255 } 1262 }
1256 } 1263 }
1257 1264
1265 /* Enable clock before accessing registers */
1266 ret = clk_prepare_enable(tdma->dma_clk);
1267 if (ret < 0) {
1268 dev_err(&pdev->dev, "clk_prepare_enable failed: %d\n", ret);
1269 goto err_pm_disable;
1270 }
1271
1258 /* Reset DMA controller */ 1272 /* Reset DMA controller */
1259 tegra_periph_reset_assert(tdma->dma_clk); 1273 tegra_periph_reset_assert(tdma->dma_clk);
1260 udelay(2); 1274 udelay(2);
@@ -1265,6 +1279,8 @@ static int __devinit tegra_dma_probe(struct platform_device *pdev)
1265 tdma_write(tdma, TEGRA_APBDMA_CONTROL, 0); 1279 tdma_write(tdma, TEGRA_APBDMA_CONTROL, 0);
1266 tdma_write(tdma, TEGRA_APBDMA_IRQ_MASK_SET, 0xFFFFFFFFul); 1280 tdma_write(tdma, TEGRA_APBDMA_IRQ_MASK_SET, 0xFFFFFFFFul);
1267 1281
1282 clk_disable_unprepare(tdma->dma_clk);
1283
1268 INIT_LIST_HEAD(&tdma->dma_dev.channels); 1284 INIT_LIST_HEAD(&tdma->dma_dev.channels);
1269 for (i = 0; i < cdata->nr_channels; i++) { 1285 for (i = 0; i < cdata->nr_channels; i++) {
1270 struct tegra_dma_channel *tdc = &tdma->channels[i]; 1286 struct tegra_dma_channel *tdc = &tdma->channels[i];