Merge tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Driver specific changes

Again, a lot of platforms have changes in here: pxa, samsung, omap,
at91, imx, ...

* tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (54 commits)
  ARM: sa1100: clean up of the clock support
  ARM: pxa: add dummy clock for sa1100-rtc
  RTC: sa1100: support sa1100, pxa and mmp soc families
  RTC: sa1100: remove redundant code of setting alarm
  RTC: sa1100: Clean out ost register
  Input: zylonite-wm97xx - replace IRQ_GPIO() with gpio_to_irq()
  pcmcia: pxa: replace IRQ_GPIO() with gpio_to_irq()
  ARM: EXYNOS: Modified files for SPI consolidation work
  ARM: S5P64X0: Enable SDHCI support
  ARM: S5P64X0: Add lookup of sdhci-s3c clocks using generic names
  ARM: S5P64X0: Add HSMMC setup for host Controller
  ARM: EXYNOS: Add USB OHCI support to ORIGEN board
  USB: Add Samsung Exynos OHCI diver
  ARM: EXYNOS: Add USB OHCI support to SMDKV310 board
  ARM: EXYNOS: Add USB OHCI device
  net: macb: fix build break with !CONFIG_OF
  i2c: tegra: Support DVC controller in device tree
  i2c: tegra: Add __devinit/exit to probe/remove
  net/at91_ether: use gpio_is_valid for phy IRQ line
  ARM: at91/net: add macb ethernet controller in 9g45/9g20 DT
  ...

169 files changed, 3010 insertions, 1631 deletions

diff --git a/Documentation/devicetree/bindings/net/macb.txt b/Documentation/devicetree/bindings/net/macb.txt
new file mode 100644
index 000000000000..44afa0e5057d
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/macb.txt
@@ -0,0 +1,25 @@
+* Cadence MACB/GEM Ethernet controller
+
+Required properties:
+- compatible: Should be "cdns,[<chip>-]{macb|gem}"
+  Use "cdns,at91sam9260-macb" Atmel at91sam9260 and at91sam9263 SoCs.
+  Use "cdns,at32ap7000-macb" for other 10/100 usage or use the generic form: "cdns,macb".
+  Use "cnds,pc302-gem" for Picochip picoXcell pc302 and later devices based on
+  the Cadence GEM, or the generic form: "cdns,gem".
+- reg: Address and length of the register set for the device
+- interrupts: Should contain macb interrupt
+- phy-mode: String, operation mode of the PHY interface.
+  Supported values are: "mii", "rmii", "gmii", "rgmii".
+
+Optional properties:
+- local-mac-address: 6 bytes, mac address
+
+Examples:
+
+        macb0: ethernet@fffc4000 {
+                compatible = "cdns,at32ap7000-macb";
+                reg = <0xfffc4000 0x4000>;
+                interrupts = <21>;
+                phy-mode = "rmii";
+                local-mac-address = [3a 0e 03 04 05 06];
+        };
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 3cddfd87c727..b3d7b77d2d51 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -597,6 +597,7 @@ config ARCH_MMP
         select ARCH_REQUIRE_GPIOLIB
         select CLKDEV_LOOKUP
         select GENERIC_CLOCKEVENTS
+        select GPIO_PXA
         select HAVE_SCHED_CLOCK
         select TICK_ONESHOT
         select PLAT_PXA
@@ -682,6 +683,7 @@ config ARCH_PXA
         select CLKSRC_MMIO
         select ARCH_REQUIRE_GPIOLIB
         select GENERIC_CLOCKEVENTS
+        select GPIO_PXA
         select HAVE_SCHED_CLOCK
         select TICK_ONESHOT
         select PLAT_PXA
@@ -749,7 +751,7 @@ config ARCH_SA1100
         select ARCH_HAS_CPUFREQ
         select CPU_FREQ
         select GENERIC_CLOCKEVENTS
-        select HAVE_CLK
+        select CLKDEV_LOOKUP
         select HAVE_SCHED_CLOCK
         select TICK_ONESHOT
         select ARCH_REQUIRE_GPIOLIB
diff --git a/arch/arm/boot/dts/at91sam9g20.dtsi b/arch/arm/boot/dts/at91sam9g20.dtsi
index aeef04269cf8..07603b8c9503 100644
--- a/arch/arm/boot/dts/at91sam9g20.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20.dtsi
@@ -114,6 +114,13 @@
                                 atmel,use-dma-tx;
                                 status = "disabled";
                         };
+
+                        macb0: ethernet@fffc4000 {
+                                compatible = "cdns,at32ap7000-macb", "cdns,macb";
+                                reg = <0xfffc4000 0x100>;
+                                interrupts = <21>;
+                                status = "disabled";
+                        };
                 };
         };
 };
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index db6a45202f26..fffa005300a4 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -101,6 +101,13 @@
                                 atmel,use-dma-tx;
                                 status = "disabled";
                         };
+
+                        macb0: ethernet@fffbc000 {
+                                compatible = "cdns,at32ap7000-macb", "cdns,macb";
+                                reg = <0xfffbc000 0x100>;
+                                interrupts = <25>;
+                                status = "disabled";
+                        };
                 };
         };
 };
diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts b/arch/arm/boot/dts/at91sam9m10g45ek.dts
index 85b34f59cd82..a387e7704ce1 100644
--- a/arch/arm/boot/dts/at91sam9m10g45ek.dts
+++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts
@@ -30,6 +30,11 @@
                         usart1: serial@fff90000 {
                                 status = "okay";
                         };
+
+                        macb0: ethernet@fffbc000 {
+                                phy-mode = "rmii";
+                                status = "okay";
+                        };
                 };
         };
 };
diff --git a/arch/arm/boot/dts/usb_a9g20.dts b/arch/arm/boot/dts/usb_a9g20.dts
index d66e2c00ac35..f04b535477f5 100644
--- a/arch/arm/boot/dts/usb_a9g20.dts
+++ b/arch/arm/boot/dts/usb_a9g20.dts
@@ -25,6 +25,11 @@
                         dbgu: serial@fffff200 {
                                 status = "okay";
                         };
+
+                        macb0: ethernet@fffc4000 {
+                                phy-mode = "rmii";
+                                status = "okay";
+                        };
                 };
         };
 };
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index b4bdf297e9fa..5d602f68a0e8 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -89,6 +89,11 @@ config EXYNOS4_DEV_DWMCI
         help
           Compile in platform device definitions for DWMCI
 
+config EXYNOS4_DEV_USB_OHCI
+        bool
+        help
+          Compile in platform device definition for USB OHCI
+
 config EXYNOS4_SETUP_I2C1
         bool
         help
@@ -150,6 +155,11 @@ config EXYNOS4_SETUP_USB_PHY
         help
           Common setup code for USB PHY controller
 
+config EXYNOS4_SETUP_SPI
+        bool
+        help
+          Common setup code for SPI GPIO configurations.
+
 # machine support
 
 if ARCH_EXYNOS4
@@ -187,6 +197,7 @@ config MACH_SMDKV310
         select EXYNOS4_DEV_DMA
         select EXYNOS4_DEV_PD
         select SAMSUNG_DEV_PWM
+        select EXYNOS4_DEV_USB_OHCI
         select EXYNOS4_DEV_SYSMMU
         select EXYNOS4_SETUP_FIMD0
         select EXYNOS4_SETUP_I2C1
@@ -300,6 +311,7 @@ config MACH_ORIGEN
         select SAMSUNG_DEV_PWM
         select EXYNOS4_DEV_DMA
         select EXYNOS4_DEV_PD
+        select EXYNOS4_DEV_USB_OHCI
         select EXYNOS4_SETUP_FIMD0
         select EXYNOS4_SETUP_SDHCI
         select EXYNOS4_SETUP_USB_PHY
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index ca85a99c159d..5fc202cdfdb6 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -49,6 +49,7 @@ obj-$(CONFIG_EXYNOS4_DEV_PD)		+= dev-pd.o
 obj-$(CONFIG_EXYNOS4_DEV_SYSMMU)        += dev-sysmmu.o
 obj-$(CONFIG_EXYNOS4_DEV_DWMCI)         += dev-dwmci.o
 obj-$(CONFIG_EXYNOS4_DEV_DMA)           += dma.o
+obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI)      += dev-ohci.o
 
 obj-$(CONFIG_ARCH_EXYNOS4)              += setup-i2c0.o
 obj-$(CONFIG_EXYNOS4_SETUP_FIMC)        += setup-fimc.o
@@ -63,3 +64,4 @@ obj-$(CONFIG_EXYNOS4_SETUP_I2C7)	+= setup-i2c7.o
 obj-$(CONFIG_EXYNOS4_SETUP_KEYPAD)      += setup-keypad.o
 obj-$(CONFIG_EXYNOS4_SETUP_SDHCI_GPIO)  += setup-sdhci-gpio.o
 obj-$(CONFIG_EXYNOS4_SETUP_USB_PHY)     += setup-usb-phy.o
+obj-$(CONFIG_EXYNOS4_SETUP_SPI)         += setup-spi.o
diff --git a/arch/arm/mach-exynos/clock.c b/arch/arm/mach-exynos/clock.c
index 5d5250df33fd..5a8c42e90005 100644
--- a/arch/arm/mach-exynos/clock.c
+++ b/arch/arm/mach-exynos/clock.c
@@ -1112,36 +1112,6 @@ static struct clksrc_clk clksrcs[] = {
                 .reg_div = { .reg = S5P_CLKDIV_LCD0, .shift = 0, .size = 4 },
         }, {
                 .clk            = {
-                        .name           = "sclk_spi",
-                        .devname        = "s3c64xx-spi.0",
-                        .enable         = exynos4_clksrc_mask_peril1_ctrl,
-                        .ctrlbit        = (1 << 16),
-                },
-                .sources = &clkset_group,
-                .reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 16, .size = 4 },
-                .reg_div = { .reg = S5P_CLKDIV_PERIL1, .shift = 0, .size = 4 },
-        }, {
-                .clk            = {
-                        .name           = "sclk_spi",
-                        .devname        = "s3c64xx-spi.1",
-                        .enable         = exynos4_clksrc_mask_peril1_ctrl,
-                        .ctrlbit        = (1 << 20),
-                },
-                .sources = &clkset_group,
-                .reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 20, .size = 4 },
-                .reg_div = { .reg = S5P_CLKDIV_PERIL1, .shift = 16, .size = 4 },
-        }, {
-                .clk            = {
-                        .name           = "sclk_spi",
-                        .devname        = "s3c64xx-spi.2",
-                        .enable         = exynos4_clksrc_mask_peril1_ctrl,
-                        .ctrlbit        = (1 << 24),
-                },
-                .sources = &clkset_group,
-                .reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 24, .size = 4 },
-                .reg_div = { .reg = S5P_CLKDIV_PERIL2, .shift = 0, .size = 4 },
-        }, {
-                .clk            = {
                         .name           = "sclk_fimg2d",
                 },
                 .sources = &clkset_mout_g2d,
@@ -1258,6 +1228,42 @@ static struct clksrc_clk clk_sclk_mmc3 = {
         .reg_div = { .reg = S5P_CLKDIV_FSYS2, .shift = 24, .size = 8 },
 };
 
+static struct clksrc_clk clk_sclk_spi0 = {
+        .clk            = {
+                .name           = "sclk_spi",
+                .devname                = "s3c64xx-spi.0",
+                .enable         = exynos4_clksrc_mask_peril1_ctrl,
+                .ctrlbit                = (1 << 16),
+        },
+        .sources = &clkset_group,
+        .reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 16, .size = 4 },
+        .reg_div = { .reg = S5P_CLKDIV_PERIL1, .shift = 0, .size = 4 },
+};
+
+static struct clksrc_clk clk_sclk_spi1 = {
+        .clk            = {
+                .name           = "sclk_spi",
+                .devname                = "s3c64xx-spi.1",
+                .enable         = exynos4_clksrc_mask_peril1_ctrl,
+                .ctrlbit                = (1 << 20),
+        },
+        .sources = &clkset_group,
+        .reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 20, .size = 4 },
+        .reg_div = { .reg = S5P_CLKDIV_PERIL1, .shift = 16, .size = 4 },
+};
+
+static struct clksrc_clk clk_sclk_spi2 = {
+        .clk            = {
+                .name           = "sclk_spi",
+                .devname                = "s3c64xx-spi.2",
+                .enable         = exynos4_clksrc_mask_peril1_ctrl,
+                .ctrlbit                = (1 << 24),
+        },
+        .sources = &clkset_group,
+        .reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 24, .size = 4 },
+        .reg_div = { .reg = S5P_CLKDIV_PERIL2, .shift = 0, .size = 4 },
+};
+
 /* Clock initialization code */
 static struct clksrc_clk *sysclks[] = {
         &clk_mout_apll,
@@ -1306,6 +1312,10 @@ static struct clksrc_clk *clksrc_cdev[] = {
         &clk_sclk_mmc1,
         &clk_sclk_mmc2,
         &clk_sclk_mmc3,
+        &clk_sclk_spi0,
+        &clk_sclk_spi1,
+        &clk_sclk_spi2,
+
 };
 
 static struct clk_lookup exynos4_clk_lookup[] = {
@@ -1319,6 +1329,9 @@ static struct clk_lookup exynos4_clk_lookup[] = {
         CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.2", &clk_sclk_mmc3.clk),
         CLKDEV_INIT("dma-pl330.0", "apb_pclk", &clk_pdma0),
         CLKDEV_INIT("dma-pl330.1", "apb_pclk", &clk_pdma1),
+        CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk0", &clk_sclk_spi0.clk),
+        CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk0", &clk_sclk_spi1.clk),
+        CLKDEV_INIT("s3c64xx-spi.2", "spi_busclk0", &clk_sclk_spi2.clk),
 };
 
 static int xtal_rate;
diff --git a/arch/arm/mach-exynos/dev-ohci.c b/arch/arm/mach-exynos/dev-ohci.c
new file mode 100644
index 000000000000..b8e75300c77d
--- /dev/null
+++ b/arch/arm/mach-exynos/dev-ohci.c
@@ -0,0 +1,52 @@
+/* linux/arch/arm/mach-exynos/dev-ohci.c
+ *
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * EXYNOS - OHCI support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/dma-mapping.h>
+#include <linux/platform_device.h>
+
+#include <mach/irqs.h>
+#include <mach/map.h>
+#include <mach/ohci.h>
+
+#include <plat/devs.h>
+#include <plat/usb-phy.h>
+
+static struct resource exynos4_ohci_resource[] = {
+        [0] = DEFINE_RES_MEM(EXYNOS4_PA_OHCI, SZ_256),
+        [1] = DEFINE_RES_IRQ(IRQ_USB_HOST),
+};
+
+static u64 exynos4_ohci_dma_mask = DMA_BIT_MASK(32);
+
+struct platform_device exynos4_device_ohci = {
+        .name           = "exynos-ohci",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(exynos4_ohci_resource),
+        .resource       = exynos4_ohci_resource,
+        .dev            = {
+                .dma_mask               = &exynos4_ohci_dma_mask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        }
+};
+
+void __init exynos4_ohci_set_platdata(struct exynos4_ohci_platdata *pd)
+{
+        struct exynos4_ohci_platdata *npd;
+
+        npd = s3c_set_platdata(pd, sizeof(struct exynos4_ohci_platdata),
+                        &exynos4_device_ohci);
+
+        if (!npd->phy_init)
+                npd->phy_init = s5p_usb_phy_init;
+        if (!npd->phy_exit)
+                npd->phy_exit = s5p_usb_phy_exit;
+}
diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h
index 713dd5251c64..f77bce04789a 100644
--- a/arch/arm/mach-exynos/include/mach/irqs.h
+++ b/arch/arm/mach-exynos/include/mach/irqs.h
@@ -72,6 +72,9 @@
 #define IRQ_IIC5                IRQ_SPI(63)
 #define IRQ_IIC6                IRQ_SPI(64)
 #define IRQ_IIC7                IRQ_SPI(65)
+#define IRQ_SPI0                IRQ_SPI(66)
+#define IRQ_SPI1                IRQ_SPI(67)
+#define IRQ_SPI2                IRQ_SPI(68)
 
 #define IRQ_USB_HOST            IRQ_SPI(70)
 #define IRQ_USB_HSOTG           IRQ_SPI(71)
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index d1829860a0ec..c754a22a2bb3 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -87,6 +87,10 @@
 #define EXYNOS4_PA_SYSMMU_TV            0x12E20000
 #define EXYNOS4_PA_SYSMMU_MFC_L         0x13620000
 #define EXYNOS4_PA_SYSMMU_MFC_R         0x13630000
+#define EXYNOS4_PA_SPI0                 0x13920000
+#define EXYNOS4_PA_SPI1                 0x13930000
+#define EXYNOS4_PA_SPI2                 0x13940000
+
 
 #define EXYNOS4_PA_GPIO1                0x11400000
 #define EXYNOS4_PA_GPIO2                0x11000000
@@ -107,6 +111,7 @@
 #define EXYNOS4_PA_SROMC                0x12570000
 
 #define EXYNOS4_PA_EHCI                 0x12580000
+#define EXYNOS4_PA_OHCI                 0x12590000
 #define EXYNOS4_PA_HSPHY                0x125B0000
 #define EXYNOS4_PA_MFC                  0x13400000
 
@@ -148,6 +153,9 @@
 #define S3C_PA_RTC                      EXYNOS4_PA_RTC
 #define S3C_PA_WDT                      EXYNOS4_PA_WATCHDOG
 #define S3C_PA_UART                     EXYNOS4_PA_UART
+#define S3C_PA_SPI0                     EXYNOS4_PA_SPI0
+#define S3C_PA_SPI1                     EXYNOS4_PA_SPI1
+#define S3C_PA_SPI2                     EXYNOS4_PA_SPI2
 
 #define S5P_PA_EHCI                     EXYNOS4_PA_EHCI
 #define S5P_PA_FIMC0                    EXYNOS4_PA_FIMC0
diff --git a/arch/arm/mach-exynos/include/mach/ohci.h b/arch/arm/mach-exynos/include/mach/ohci.h
new file mode 100644
index 000000000000..c256c595be5e
--- /dev/null
+++ b/arch/arm/mach-exynos/include/mach/ohci.h
@@ -0,0 +1,21 @@
+/*
+ * Copyright (C) 2011 Samsung Electronics Co.Ltd
+ *              http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#ifndef __MACH_EXYNOS_OHCI_H
+#define __MACH_EXYNOS_OHCI_H
+
+struct exynos4_ohci_platdata {
+        int (*phy_init)(struct platform_device *pdev, int type);
+        int (*phy_exit)(struct platform_device *pdev, int type);
+};
+
+extern void exynos4_ohci_set_platdata(struct exynos4_ohci_platdata *pd);
+
+#endif /* __MACH_EXYNOS_OHCI_H */
diff --git a/arch/arm/mach-exynos/include/mach/spi-clocks.h b/arch/arm/mach-exynos/include/mach/spi-clocks.h
new file mode 100644
index 000000000000..576efdf6d091
--- /dev/null
+++ b/arch/arm/mach-exynos/include/mach/spi-clocks.h
@@ -0,0 +1,16 @@
+/* linux/arch/arm/mach-exynos4/include/mach/spi-clocks.h
+ *
+ * Copyright (C) 2011 Samsung Electronics Co. Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARCH_SPI_CLKS_H
+#define __ASM_ARCH_SPI_CLKS_H __FILE__
+
+/* Must source from SCLK_SPI */
+#define EXYNOS4_SPI_SRCCLK_SCLK         0
+
+#endif /* __ASM_ARCH_SPI_CLKS_H */
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c
index 586eb995aa96..2b11e046d391 100644
--- a/arch/arm/mach-exynos/mach-origen.c
+++ b/arch/arm/mach-exynos/mach-origen.c
@@ -41,6 +41,7 @@
 #include <plat/fb.h>
 #include <plat/mfc.h>
 
+#include <mach/ohci.h>
 #include <mach/map.h>
 
 #include "common.h"
@@ -485,6 +486,16 @@ static void __init origen_ehci_init(void)
         s5p_ehci_set_platdata(pdata);
 }
 
+/* USB OHCI */
+static struct exynos4_ohci_platdata origen_ohci_pdata;
+
+static void __init origen_ohci_init(void)
+{
+        struct exynos4_ohci_platdata *pdata = &origen_ohci_pdata;
+
+        exynos4_ohci_set_platdata(pdata);
+}
+
 static struct gpio_keys_button origen_gpio_keys_table[] = {
         {
                 .code                   = KEY_MENU,
@@ -608,6 +619,7 @@ static struct platform_device *origen_devices[] __initdata = {
         &s5p_device_mfc_l,
         &s5p_device_mfc_r,
         &s5p_device_mixer,
+        &exynos4_device_ohci,
         &exynos4_device_pd[PD_LCD0],
         &exynos4_device_pd[PD_TV],
         &exynos4_device_pd[PD_G3D],
@@ -672,6 +684,7 @@ static void __init origen_machine_init(void)
         s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata);
 
         origen_ehci_init();
+        origen_ohci_init();
         clk_xusbxti.rate = 24000000;
 
         s5p_tv_setup();
diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c
index a27b23eee9fa..b2c5557f50e4 100644
--- a/arch/arm/mach-exynos/mach-smdkv310.c
+++ b/arch/arm/mach-exynos/mach-smdkv310.c
@@ -42,6 +42,7 @@
 #include <plat/clock.h>
 
 #include <mach/map.h>
+#include <mach/ohci.h>
 
 #include "common.h"
 
@@ -245,6 +246,16 @@ static void __init smdkv310_ehci_init(void)
         s5p_ehci_set_platdata(pdata);
 }
 
+/* USB OHCI */
+static struct exynos4_ohci_platdata smdkv310_ohci_pdata;
+
+static void __init smdkv310_ohci_init(void)
+{
+        struct exynos4_ohci_platdata *pdata = &smdkv310_ohci_pdata;
+
+        exynos4_ohci_set_platdata(pdata);
+}
+
 static struct platform_device *smdkv310_devices[] __initdata = {
         &s3c_device_hsmmc0,
         &s3c_device_hsmmc1,
@@ -261,6 +272,7 @@ static struct platform_device *smdkv310_devices[] __initdata = {
         &s5p_device_fimc3,
         &exynos4_device_ac97,
         &exynos4_device_i2s0,
+        &exynos4_device_ohci,
         &samsung_device_keypad,
         &s5p_device_mfc,
         &s5p_device_mfc_l,
@@ -363,6 +375,7 @@ static void __init smdkv310_machine_init(void)
         s5p_fimd0_set_platdata(&smdkv310_lcd0_pdata);
 
         smdkv310_ehci_init();
+        smdkv310_ohci_init();
         clk_xusbxti.rate = 24000000;
 
         platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
diff --git a/arch/arm/mach-exynos/setup-spi.c b/arch/arm/mach-exynos/setup-spi.c
new file mode 100644
index 000000000000..833ff40ee0e8
--- /dev/null
+++ b/arch/arm/mach-exynos/setup-spi.c
@@ -0,0 +1,72 @@
+/* linux/arch/arm/mach-exynos4/setup-spi.c
+ *
+ * Copyright (C) 2011 Samsung Electronics Ltd.
+ *             http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/gpio.h>
+#include <linux/platform_device.h>
+
+#include <plat/gpio-cfg.h>
+#include <plat/s3c64xx-spi.h>
+
+#ifdef CONFIG_S3C64XX_DEV_SPI0
+struct s3c64xx_spi_info s3c64xx_spi0_pdata __initdata = {
+        .fifo_lvl_mask  = 0x1ff,
+        .rx_lvl_offset  = 15,
+        .high_speed     = 1,
+        .clk_from_cmu   = true,
+        .tx_st_done     = 25,
+};
+
+int s3c64xx_spi0_cfg_gpio(struct platform_device *dev)
+{
+        s3c_gpio_cfgpin(EXYNOS4_GPB(0), S3C_GPIO_SFN(2));
+        s3c_gpio_setpull(EXYNOS4_GPB(0), S3C_GPIO_PULL_UP);
+        s3c_gpio_cfgall_range(EXYNOS4_GPB(2), 2,
+                              S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
+        return 0;
+}
+#endif
+
+#ifdef CONFIG_S3C64XX_DEV_SPI1
+struct s3c64xx_spi_info s3c64xx_spi1_pdata __initdata = {
+        .fifo_lvl_mask  = 0x7f,
+        .rx_lvl_offset  = 15,
+        .high_speed     = 1,
+        .clk_from_cmu   = true,
+        .tx_st_done     = 25,
+};
+
+int s3c64xx_spi1_cfg_gpio(struct platform_device *dev)
+{
+        s3c_gpio_cfgpin(EXYNOS4_GPB(4), S3C_GPIO_SFN(2));
+        s3c_gpio_setpull(EXYNOS4_GPB(4), S3C_GPIO_PULL_UP);
+        s3c_gpio_cfgall_range(EXYNOS4_GPB(6), 2,
+                              S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
+        return 0;
+}
+#endif
+
+#ifdef CONFIG_S3C64XX_DEV_SPI2
+struct s3c64xx_spi_info s3c64xx_spi2_pdata __initdata = {
+        .fifo_lvl_mask  = 0x7f,
+        .rx_lvl_offset  = 15,
+        .high_speed     = 1,
+        .clk_from_cmu   = true,
+        .tx_st_done     = 25,
+};
+
+int s3c64xx_spi2_cfg_gpio(struct platform_device *dev)
+{
+        s3c_gpio_cfgpin(EXYNOS4_GPC1(1), S3C_GPIO_SFN(5));
+        s3c_gpio_setpull(EXYNOS4_GPC1(1), S3C_GPIO_PULL_UP);
+        s3c_gpio_cfgall_range(EXYNOS4_GPC1(3), 2,
+                              S3C_GPIO_SFN(5), S3C_GPIO_PULL_UP);
+        return 0;
+}
+#endif
diff --git a/arch/arm/mach-exynos/setup-usb-phy.c b/arch/arm/mach-exynos/setup-usb-phy.c
index 39aca045f660..41743d21e8c6 100644
--- a/arch/arm/mach-exynos/setup-usb-phy.c
+++ b/arch/arm/mach-exynos/setup-usb-phy.c
@@ -19,6 +19,13 @@
 #include <plat/cpu.h>
 #include <plat/usb-phy.h>
 
+static atomic_t host_usage;
+
+static int exynos4_usb_host_phy_is_on(void)
+{
+        return (readl(EXYNOS4_PHYPWR) & PHY1_STD_ANALOG_POWERDOWN) ? 0 : 1;
+}
+
 static int exynos4_usb_phy1_init(struct platform_device *pdev)
 {
         struct clk *otg_clk;
@@ -27,6 +34,8 @@ static int exynos4_usb_phy1_init(struct platform_device *pdev)
         u32 rstcon;
         int err;
 
+        atomic_inc(&host_usage);
+
         otg_clk = clk_get(&pdev->dev, "otg");
         if (IS_ERR(otg_clk)) {
                 dev_err(&pdev->dev, "Failed to get otg clock\n");
@@ -39,6 +48,9 @@ static int exynos4_usb_phy1_init(struct platform_device *pdev)
                 return err;
         }
 
+        if (exynos4_usb_host_phy_is_on())
+                return 0;
+
         writel(readl(S5P_USBHOST_PHY_CONTROL) | S5P_USBHOST_PHY_ENABLE,
                         S5P_USBHOST_PHY_CONTROL);
 
@@ -95,6 +107,9 @@ static int exynos4_usb_phy1_exit(struct platform_device *pdev)
         struct clk *otg_clk;
         int err;
 
+        if (atomic_dec_return(&host_usage) > 0)
+                return 0;
+
         otg_clk = clk_get(&pdev->dev, "otg");
         if (IS_ERR(otg_clk)) {
                 dev_err(&pdev->dev, "Failed to get otg clock\n");
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c
index 3e6dfab59ef6..17cb76060125 100644
--- a/arch/arm/mach-mmp/aspenite.c
+++ b/arch/arm/mach-mmp/aspenite.c
@@ -120,8 +120,8 @@ static struct resource smc91x_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = gpio_to_irq(27),
-                .end    = gpio_to_irq(27),
+                .start  = MMP_GPIO_TO_IRQ(27),
+                .end    = MMP_GPIO_TO_IRQ(27),
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
         }
 };
@@ -232,6 +232,7 @@ static void __init common_init(void)
         pxa168_add_nand(&aspenite_nand_info);
         pxa168_add_fb(&aspenite_lcd_info);
         pxa168_add_keypad(&aspenite_keypad_info);
+        platform_device_register(&pxa168_device_gpio);
 
         /* off-chip devices */
         platform_device_register(&smc91x_device);
diff --git a/arch/arm/mach-mmp/avengers_lite.c b/arch/arm/mach-mmp/avengers_lite.c
index 8de3dc6131a4..b148a9dc5a44 100644
--- a/arch/arm/mach-mmp/avengers_lite.c
+++ b/arch/arm/mach-mmp/avengers_lite.c
@@ -38,6 +38,7 @@ static void __init avengers_lite_init(void)
 
         /* on-chip devices */
         pxa168_add_uart(2);
+        platform_device_register(&pxa168_device_gpio);
 }
 
 MACHINE_START(AVENGERS_LITE, "PXA168 Avengers lite Development Platform")
diff --git a/arch/arm/mach-mmp/brownstone.c b/arch/arm/mach-mmp/brownstone.c
index e16f04b39b15..d839fe6421e6 100644
--- a/arch/arm/mach-mmp/brownstone.c
+++ b/arch/arm/mach-mmp/brownstone.c
@@ -202,6 +202,7 @@ static void __init brownstone_init(void)
         /* on-chip devices */
         mmp2_add_uart(1);
         mmp2_add_uart(3);
+        platform_device_register(&mmp2_device_gpio);
         mmp2_add_twsi(1, NULL, ARRAY_AND_SIZE(brownstone_twsi1_info));
         mmp2_add_sdhost(0, &mmp2_sdh_platdata_mmc0); /* SD/MMC */
         mmp2_add_sdhost(2, &mmp2_sdh_platdata_mmc2); /* eMMC */
diff --git a/arch/arm/mach-mmp/flint.c b/arch/arm/mach-mmp/flint.c
index 5a6a27a6cfd0..2ee8cd7829dd 100644
--- a/arch/arm/mach-mmp/flint.c
+++ b/arch/arm/mach-mmp/flint.c
@@ -87,8 +87,8 @@ static struct resource smc91x_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = gpio_to_irq(155),
-                .end    = gpio_to_irq(155),
+                .start  = MMP_GPIO_TO_IRQ(155),
+                .end    = MMP_GPIO_TO_IRQ(155),
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
         }
 };
@@ -110,6 +110,7 @@ static void __init flint_init(void)
         /* on-chip devices */
         mmp2_add_uart(1);
         mmp2_add_uart(2);
+        platform_device_register(&mmp2_device_gpio);
 
         /* off-chip devices */
         platform_device_register(&smc91x_device);
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c
index 1e3abbe37cac..87765467de63 100644
--- a/arch/arm/mach-mmp/gplugd.c
+++ b/arch/arm/mach-mmp/gplugd.c
@@ -184,6 +184,7 @@ static void __init gplugd_init(void)
         pxa168_add_uart(3);
         pxa168_add_ssp(1);
         pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(gplugd_i2c_board_info));
+        platform_device_register(&pxa168_device_gpio);
 
         pxa168_add_eth(&gplugd_eth_platform_data);
 }
diff --git a/arch/arm/mach-mmp/include/mach/gpio-pxa.h b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
index 99b4ce1b6562..0e135a599f3e 100644
--- a/arch/arm/mach-mmp/include/mach/gpio-pxa.h
+++ b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
@@ -2,6 +2,7 @@
 #define __ASM_MACH_GPIO_PXA_H
 
 #include <mach/addr-map.h>
+#include <mach/cputype.h>
 #include <mach/irqs.h>
 
 #define GPIO_REGS_VIRT  (APB_VIRT_BASE + 0x19000)
@@ -9,8 +10,6 @@
 #define BANK_OFF(n)     (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
 #define GPIO_REG(x)     (*(volatile u32 *)(GPIO_REGS_VIRT + (x)))
 
-#define NR_BUILTIN_GPIO         IRQ_GPIO_NUM
-
 #define gpio_to_bank(gpio)      ((gpio) >> 5)
 
 /* NOTE: these macros are defined here to make optimization of
diff --git a/arch/arm/mach-mmp/include/mach/gpio.h b/arch/arm/mach-mmp/include/mach/gpio.h
index 681262359d1c..13219ebf5128 100644
--- a/arch/arm/mach-mmp/include/mach/gpio.h
+++ b/arch/arm/mach-mmp/include/mach/gpio.h
@@ -3,11 +3,6 @@
 
 #include <asm-generic/gpio.h>
 
-#define gpio_to_irq(gpio)       (IRQ_GPIO_START + (gpio))
-#define irq_to_gpio(irq)        ((irq) - IRQ_GPIO_START)
+#include <mach/cputype.h>
 
-#define __gpio_is_inverted(gpio)        (0)
-#define __gpio_is_occupied(gpio)        (0)
-
-#include <plat/gpio.h>
 #endif /* __ASM_MACH_GPIO_H */
diff --git a/arch/arm/mach-mmp/include/mach/irqs.h b/arch/arm/mach-mmp/include/mach/irqs.h
index a09d328e2ddd..34635a0bbb59 100644
--- a/arch/arm/mach-mmp/include/mach/irqs.h
+++ b/arch/arm/mach-mmp/include/mach/irqs.h
@@ -219,10 +219,10 @@
 #define IRQ_MMP2_MUX_END                (IRQ_MMP2_SSP_BASE + 2)
 
 #define IRQ_GPIO_START                  128
-#define IRQ_GPIO_NUM                    192
-#define IRQ_GPIO(x)                     (IRQ_GPIO_START + (x))
+#define MMP_NR_BUILTIN_GPIO             192
+#define MMP_GPIO_TO_IRQ(gpio)           (IRQ_GPIO_START + (gpio))
 
-#define IRQ_BOARD_START                 (IRQ_GPIO_START + IRQ_GPIO_NUM)
+#define IRQ_BOARD_START                 (IRQ_GPIO_START + MMP_NR_BUILTIN_GPIO)
 
 #define NR_IRQS                         (IRQ_BOARD_START)
 
diff --git a/arch/arm/mach-mmp/include/mach/mmp2.h b/arch/arm/mach-mmp/include/mach/mmp2.h
index 2f7b2d3c2b18..cba22fed2265 100644
--- a/arch/arm/mach-mmp/include/mach/mmp2.h
+++ b/arch/arm/mach-mmp/include/mach/mmp2.h
@@ -32,6 +32,8 @@ extern struct pxa_device_desc mmp2_device_sdh3;
 extern struct pxa_device_desc mmp2_device_asram;
 extern struct pxa_device_desc mmp2_device_isram;
 
+extern struct platform_device mmp2_device_gpio;
+
 static inline int mmp2_add_uart(int id)
 {
         struct pxa_device_desc *d = NULL;
diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h
index a677aa732c26..dc03d580a06d 100644
--- a/arch/arm/mach-mmp/include/mach/pxa168.h
+++ b/arch/arm/mach-mmp/include/mach/pxa168.h
@@ -43,6 +43,8 @@ struct pxa168_usb_pdata {
 /* pdata can be NULL */
 int __init pxa168_add_usb_host(struct pxa168_usb_pdata *pdata);
 
+extern struct platform_device pxa168_device_gpio;
+
 static inline int pxa168_add_uart(int id)
 {
         struct pxa_device_desc *d = NULL;
diff --git a/arch/arm/mach-mmp/include/mach/pxa910.h b/arch/arm/mach-mmp/include/mach/pxa910.h
index 91be75591398..4de13abef7bb 100644
--- a/arch/arm/mach-mmp/include/mach/pxa910.h
+++ b/arch/arm/mach-mmp/include/mach/pxa910.h
@@ -21,6 +21,8 @@ extern struct pxa_device_desc pxa910_device_pwm3;
 extern struct pxa_device_desc pxa910_device_pwm4;
 extern struct pxa_device_desc pxa910_device_nand;
 
+extern struct platform_device pxa910_device_gpio;
+
 static inline int pxa910_add_uart(int id)
 {
         struct pxa_device_desc *d = NULL;
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
index 5dd1d4a6aeb9..617c60a170a4 100644
--- a/arch/arm/mach-mmp/mmp2.c
+++ b/arch/arm/mach-mmp/mmp2.c
@@ -13,6 +13,7 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/io.h>
+#include <linux/platform_device.h>
 
 #include <asm/hardware/cache-tauros2.h>
 
@@ -24,7 +25,6 @@
 #include <mach/irqs.h>
 #include <mach/dma.h>
 #include <mach/mfp.h>
-#include <mach/gpio-pxa.h>
 #include <mach/devices.h>
 #include <mach/mmp2.h>
 
@@ -33,8 +33,6 @@
 
 #define MFPR_VIRT_BASE  (APB_VIRT_BASE + 0x1e000)
 
-#define APMASK(i)       (GPIO_REGS_VIRT + BANK_OFF(i) + 0x9c)
-
 static struct mfp_addr_map mmp2_addr_map[] __initdata = {
 
         MFP_ADDR_X(GPIO0, GPIO58, 0x54),
@@ -95,24 +93,9 @@ void mmp2_clear_pmic_int(void)
         __raw_writel(data, mfpr_pmic);
 }
 
-static void __init mmp2_init_gpio(void)
-{
-        int i;
-
-        /* enable GPIO clock */
-        __raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_MMP2_GPIO);
-
-        /* unmask GPIO edge detection for all 6 banks -- APMASKx */
-        for (i = 0; i < 6; i++)
-                __raw_writel(0xffffffff, APMASK(i));
-
-        pxa_init_gpio(IRQ_MMP2_GPIO, 0, 167, NULL);
-}
-
 void __init mmp2_init_irq(void)
 {
         mmp2_init_icu();
-        mmp2_init_gpio();
 }
 
 static void sdhc_clk_enable(struct clk *clk)
@@ -149,6 +132,7 @@ static APBC_CLK(twsi3, MMP2_TWSI3, 0, 26000000);
 static APBC_CLK(twsi4, MMP2_TWSI4, 0, 26000000);
 static APBC_CLK(twsi5, MMP2_TWSI5, 0, 26000000);
 static APBC_CLK(twsi6, MMP2_TWSI6, 0, 26000000);
+static APBC_CLK(gpio, MMP2_GPIO, 0, 26000000);
 
 static APMU_CLK(nand, NAND, 0xbf, 100000000);
 static APMU_CLK_OPS(sdh0, SDH0, 0x1b, 200000000, &sdhc_clk_ops);
@@ -168,6 +152,7 @@ static struct clk_lookup mmp2_clkregs[] = {
         INIT_CLKREG(&clk_twsi5, "pxa2xx-i2c.4", NULL),
         INIT_CLKREG(&clk_twsi6, "pxa2xx-i2c.5", NULL),
         INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
+        INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
         INIT_CLKREG(&clk_sdh0, "sdhci-pxav3.0", "PXA-SDHCLK"),
         INIT_CLKREG(&clk_sdh1, "sdhci-pxav3.1", "PXA-SDHCLK"),
         INIT_CLKREG(&clk_sdh2, "sdhci-pxav3.2", "PXA-SDHCLK"),
@@ -230,3 +215,21 @@ MMP2_DEVICE(asram, "asram", -1, NONE, 0xe0000000, 0x4000);
 /* 0xd1000000 ~ 0xd101ffff is reserved for secure processor */
 MMP2_DEVICE(isram, "isram", -1, NONE, 0xd1020000, 0x18000);
 
+struct resource mmp2_resource_gpio[] = {
+        {
+                .start  = 0xd4019000,
+                .end    = 0xd4019fff,
+                .flags  = IORESOURCE_MEM,
+        }, {
+                .start  = IRQ_MMP2_GPIO,
+                .end    = IRQ_MMP2_GPIO,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device mmp2_device_gpio = {
+        .name           = "pxa-gpio",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(mmp2_resource_gpio),
+        .resource       = mmp2_resource_gpio,
+};
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index 13f23867a86a..7bc17eaa12eb 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -13,6 +13,7 @@
 #include <linux/list.h>
 #include <linux/io.h>
 #include <linux/clk.h>
+#include <linux/platform_device.h>
 
 #include <asm/mach/time.h>
 #include <mach/addr-map.h>
@@ -20,7 +21,6 @@
 #include <mach/regs-apbc.h>
 #include <mach/regs-apmu.h>
 #include <mach/irqs.h>
-#include <mach/gpio-pxa.h>
 #include <mach/dma.h>
 #include <mach/devices.h>
 #include <mach/mfp.h>
@@ -43,26 +43,9 @@ static struct mfp_addr_map pxa168_mfp_addr_map[] __initdata =
         MFP_ADDR_END,
 };
 
-#define APMASK(i)       (GPIO_REGS_VIRT + BANK_OFF(i) + 0x09c)
-
-static void __init pxa168_init_gpio(void)
-{
-        int i;
-
-        /* enable GPIO clock */
-        __raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_PXA168_GPIO);
-
-        /* unmask GPIO edge detection for all 4 banks - APMASKx */
-        for (i = 0; i < 4; i++)
-                __raw_writel(0xffffffff, APMASK(i));
-
-        pxa_init_gpio(IRQ_PXA168_GPIOX, 0, 127, NULL);
-}
-
 void __init pxa168_init_irq(void)
 {
         icu_init_irq();
-        pxa168_init_gpio();
 }
 
 /* APB peripheral clocks */
@@ -80,6 +63,7 @@ static APBC_CLK(ssp2, PXA168_SSP2, 4, 0);
 static APBC_CLK(ssp3, PXA168_SSP3, 4, 0);
 static APBC_CLK(ssp4, PXA168_SSP4, 4, 0);
 static APBC_CLK(ssp5, PXA168_SSP5, 4, 0);
+static APBC_CLK(gpio, PXA168_GPIO, 0, 13000000);
 static APBC_CLK(keypad, PXA168_KPC, 0, 32000);
 
 static APMU_CLK(nand, NAND, 0x19b, 156000000);
@@ -105,6 +89,7 @@ static struct clk_lookup pxa168_clkregs[] = {
         INIT_CLKREG(&clk_ssp5, "pxa168-ssp.4", NULL),
         INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
         INIT_CLKREG(&clk_lcd, "pxa168-fb", NULL),
+        INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
         INIT_CLKREG(&clk_keypad, "pxa27x-keypad", NULL),
         INIT_CLKREG(&clk_eth, "pxa168-eth", "MFUCLK"),
         INIT_CLKREG(&clk_usb, "pxa168-ehci", "PXA168-USBCLK"),
@@ -174,6 +159,25 @@ PXA168_DEVICE(fb, "pxa168-fb", -1, LCD, 0xd420b000, 0x1c8);
 PXA168_DEVICE(keypad, "pxa27x-keypad", -1, KEYPAD, 0xd4012000, 0x4c);
 PXA168_DEVICE(eth, "pxa168-eth", -1, MFU, 0xc0800000, 0x0fff);
 
+struct resource pxa168_resource_gpio[] = {
+        {
+                .start  = 0xd4019000,
+                .end    = 0xd4019fff,
+                .flags  = IORESOURCE_MEM,
+        }, {
+                .start  = IRQ_PXA168_GPIOX,
+                .end    = IRQ_PXA168_GPIOX,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device pxa168_device_gpio = {
+        .name           = "pxa-gpio",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(pxa168_resource_gpio),
+        .resource       = pxa168_resource_gpio,
+};
+
 struct resource pxa168_usb_host_resources[] = {
         /* USB Host conroller register base */
         [0] = {
diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c
index 4ebbfbba39fc..3241a25784d0 100644
--- a/arch/arm/mach-mmp/pxa910.c
+++ b/arch/arm/mach-mmp/pxa910.c
@@ -12,6 +12,7 @@
 #include <linux/init.h>
 #include <linux/list.h>
 #include <linux/io.h>
+#include <linux/platform_device.h>
 
 #include <asm/mach/time.h>
 #include <mach/addr-map.h>
@@ -19,7 +20,6 @@
 #include <mach/regs-apmu.h>
 #include <mach/cputype.h>
 #include <mach/irqs.h>
-#include <mach/gpio-pxa.h>
 #include <mach/dma.h>
 #include <mach/mfp.h>
 #include <mach/devices.h>
@@ -77,26 +77,9 @@ static struct mfp_addr_map pxa910_mfp_addr_map[] __initdata =
         MFP_ADDR_END,
 };
 
-#define APMASK(i)       (GPIO_REGS_VIRT + BANK_OFF(i) + 0x09c)
-
-static void __init pxa910_init_gpio(void)
-{
-        int i;
-
-        /* enable GPIO clock */
-        __raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_PXA910_GPIO);
-
-        /* unmask GPIO edge detection for all 4 banks - APMASKx */
-        for (i = 0; i < 4; i++)
-                __raw_writel(0xffffffff, APMASK(i));
-
-        pxa_init_gpio(IRQ_PXA910_AP_GPIO, 0, 127, NULL);
-}
-
 void __init pxa910_init_irq(void)
 {
         icu_init_irq();
-        pxa910_init_gpio();
 }
 
 /* APB peripheral clocks */
@@ -108,6 +91,7 @@ static APBC_CLK(pwm1, PXA910_PWM1, 1, 13000000);
 static APBC_CLK(pwm2, PXA910_PWM2, 1, 13000000);
 static APBC_CLK(pwm3, PXA910_PWM3, 1, 13000000);
 static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000);
+static APBC_CLK(gpio, PXA910_GPIO, 0, 13000000);
 
 static APMU_CLK(nand, NAND, 0x19b, 156000000);
 static APMU_CLK(u2o, USB, 0x1b, 480000000);
@@ -123,6 +107,7 @@ static struct clk_lookup pxa910_clkregs[] = {
         INIT_CLKREG(&clk_pwm3, "pxa910-pwm.2", NULL),
         INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL),
         INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
+        INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
         INIT_CLKREG(&clk_u2o, "pxa-u2o", "U2OCLK"),
 };
 
@@ -179,3 +164,22 @@ PXA910_DEVICE(pwm2, "pxa910-pwm", 1, NONE, 0xd401a400, 0x10);
 PXA910_DEVICE(pwm3, "pxa910-pwm", 2, NONE, 0xd401a800, 0x10);
 PXA910_DEVICE(pwm4, "pxa910-pwm", 3, NONE, 0xd401ac00, 0x10);
 PXA910_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99);
+
+struct resource pxa910_resource_gpio[] = {
+        {
+                .start  = 0xd4019000,
+                .end    = 0xd4019fff,
+                .flags  = IORESOURCE_MEM,
+        }, {
+                .start  = IRQ_PXA910_AP_GPIO,
+                .end    = IRQ_PXA910_AP_GPIO,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device pxa910_device_gpio = {
+        .name           = "pxa-gpio",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(pxa910_resource_gpio),
+        .resource       = pxa910_resource_gpio,
+};
diff --git a/arch/arm/mach-mmp/tavorevb.c b/arch/arm/mach-mmp/tavorevb.c
index 257a21283ec1..8e3b5af04a57 100644
--- a/arch/arm/mach-mmp/tavorevb.c
+++ b/arch/arm/mach-mmp/tavorevb.c
@@ -19,6 +19,7 @@
 #include <mach/addr-map.h>
 #include <mach/mfp-pxa910.h>
 #include <mach/pxa910.h>
+#include <mach/irqs.h>
 
 #include "common.h"
 
@@ -71,8 +72,8 @@ static struct resource smc91x_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = gpio_to_irq(80),
-                .end    = gpio_to_irq(80),
+                .start  = MMP_GPIO_TO_IRQ(80),
+                .end    = MMP_GPIO_TO_IRQ(80),
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
         }
 };
@@ -93,6 +94,7 @@ static void __init tavorevb_init(void)
 
         /* on-chip devices */
         pxa910_add_uart(1);
+        platform_device_register(&pxa910_device_gpio);
 
         /* off-chip devices */
         platform_device_register(&smc91x_device);
diff --git a/arch/arm/mach-mmp/teton_bga.c b/arch/arm/mach-mmp/teton_bga.c
index 8ac22a62bf1a..0523e422990e 100644
--- a/arch/arm/mach-mmp/teton_bga.c
+++ b/arch/arm/mach-mmp/teton_bga.c
@@ -66,7 +66,7 @@ static struct pxa27x_keypad_platform_data teton_bga_keypad_info __initdata = {
 static struct i2c_board_info teton_bga_i2c_info[] __initdata = {
         {
                 I2C_BOARD_INFO("ds1337", 0x68),
-                .irq = gpio_to_irq(RTC_INT_GPIO)
+                .irq = MMP_GPIO_TO_IRQ(RTC_INT_GPIO)
         },
 };
 
@@ -78,6 +78,7 @@ static void __init teton_bga_init(void)
         pxa168_add_uart(1);
         pxa168_add_keypad(&teton_bga_keypad_info);
         pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(teton_bga_i2c_info));
+        platform_device_register(&pxa168_device_gpio);
 }
 
 MACHINE_START(TETON_BGA, "PXA168-based Teton BGA Development Platform")
diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c
index f02658825576..5ac5d5832e45 100644
--- a/arch/arm/mach-mmp/ttc_dkb.c
+++ b/arch/arm/mach-mmp/ttc_dkb.c
@@ -24,12 +24,13 @@
 #include <mach/addr-map.h>
 #include <mach/mfp-pxa910.h>
 #include <mach/pxa910.h>
+#include <mach/irqs.h>
 
 #include "common.h"
 
-#define TTCDKB_GPIO_EXT0(x)     (NR_BUILTIN_GPIO + ((x < 0) ? 0 :       \
+#define TTCDKB_GPIO_EXT0(x)     (MMP_NR_BUILTIN_GPIO + ((x < 0) ? 0 :   \
                                 ((x < 16) ? x : 15)))
-#define TTCDKB_GPIO_EXT1(x)     (NR_BUILTIN_GPIO + 16 + ((x < 0) ? 0 :  \
+#define TTCDKB_GPIO_EXT1(x)     (MMP_NR_BUILTIN_GPIO + 16 + ((x < 0) ? 0 : \
                                 ((x < 16) ? x : 15)))
 
 /*
@@ -122,6 +123,7 @@ static struct platform_device ttc_dkb_device_onenand = {
 };
 
 static struct platform_device *ttc_dkb_devices[] = {
+        &pxa910_device_gpio,
         &ttc_dkb_device_onenand,
 };
 
@@ -136,7 +138,7 @@ static struct i2c_board_info ttc_dkb_i2c_info[] = {
         {
                 .type           = "max7312",
                 .addr           = 0x23,
-                .irq            = IRQ_GPIO(80),
+                .irq            = MMP_GPIO_TO_IRQ(80),
                 .platform_data  = &max7312_data,
         },
 };
diff --git a/arch/arm/mach-mxs/clock-mx28.c b/arch/arm/mach-mxs/clock-mx28.c
index da6e4aad177c..df0ad3ce234b 100644
--- a/arch/arm/mach-mxs/clock-mx28.c
+++ b/arch/arm/mach-mxs/clock-mx28.c
@@ -22,6 +22,7 @@
 #include <linux/io.h>
 #include <linux/jiffies.h>
 #include <linux/clkdev.h>
+#include <linux/spinlock.h>
 
 #include <asm/clkdev.h>
 #include <asm/div64.h>
@@ -29,6 +30,7 @@
 #include <mach/mx28.h>
 #include <mach/common.h>
 #include <mach/clock.h>
+#include <mach/digctl.h>
 
 #include "regs-clkctrl-mx28.h"
 
@@ -43,6 +45,33 @@ static struct clk emi_clk;
 static struct clk saif0_clk;
 static struct clk saif1_clk;
 static struct clk clk32k_clk;
+static DEFINE_SPINLOCK(clkmux_lock);
+
+/*
+ * HW_SAIF_CLKMUX_SEL:
+ *  DIRECT(0x0): SAIF0 clock pins selected for SAIF0 input clocks, and SAIF1
+ *              clock pins selected for SAIF1 input clocks.
+ *  CROSSINPUT(0x1): SAIF1 clock inputs selected for SAIF0 input clocks, and
+ *              SAIF0 clock inputs selected for SAIF1 input clocks.
+ *  EXTMSTR0(0x2): SAIF0 clock pin selected for both SAIF0 and SAIF1 input
+ *              clocks.
+ *  EXTMSTR1(0x3): SAIF1 clock pin selected for both SAIF0 and SAIF1 input
+ *              clocks.
+ */
+int mxs_saif_clkmux_select(unsigned int clkmux)
+{
+        if (clkmux > 0x3)
+                return -EINVAL;
+
+        spin_lock(&clkmux_lock);
+        __raw_writel(BM_DIGCTL_CTRL_SAIF_CLKMUX,
+                        DIGCTRL_BASE_ADDR + HW_DIGCTL_CTRL + MXS_CLR_ADDR);
+        __raw_writel(clkmux << BP_DIGCTL_CTRL_SAIF_CLKMUX,
+                        DIGCTRL_BASE_ADDR + HW_DIGCTL_CTRL + MXS_SET_ADDR);
+        spin_unlock(&clkmux_lock);
+
+        return 0;
+}
 
 static int _raw_clk_enable(struct clk *clk)
 {
@@ -785,6 +814,15 @@ int __init mx28_clocks_init(void)
         clk_set_parent(&saif0_clk, &pll0_clk);
         clk_set_parent(&saif1_clk, &pll0_clk);
 
+        /*
+         * Set an initial clock rate for the saif internal logic to work
+         * properly. This is important when working in EXTMASTER mode that
+         * uses the other saif's BITCLK&LRCLK but it still needs a basic
+         * clock which should be fast enough for the internal logic.
+         */
+        clk_set_rate(&saif0_clk, 24000000);
+        clk_set_rate(&saif1_clk, 24000000);
+
         clkdev_add_table(lookups, ARRAY_SIZE(lookups));
 
         mxs_timer_init(&clk32k_clk, MX28_INT_TIMER0);
diff --git a/arch/arm/mach-mxs/devices-mx28.h b/arch/arm/mach-mxs/devices-mx28.h
index c8887103f0e3..4f50094e293d 100644
--- a/arch/arm/mach-mxs/devices-mx28.h
+++ b/arch/arm/mach-mxs/devices-mx28.h
@@ -47,6 +47,7 @@ struct platform_device *__init mx28_add_mxsfb(
                 const struct mxsfb_platform_data *pdata);
 
 extern const struct mxs_saif_data mx28_saif_data[] __initconst;
-#define mx28_add_saif(id)              mxs_add_saif(&mx28_saif_data[id])
+#define mx28_add_saif(id, pdata) \
+        mxs_add_saif(&mx28_saif_data[id], pdata)
 
 struct platform_device *__init mx28_add_rtc_stmp3xxx(void);
diff --git a/arch/arm/mach-mxs/devices/platform-mxs-saif.c b/arch/arm/mach-mxs/devices/platform-mxs-saif.c
index 1ec965e9fe92..f6e3a60b4201 100644
--- a/arch/arm/mach-mxs/devices/platform-mxs-saif.c
+++ b/arch/arm/mach-mxs/devices/platform-mxs-saif.c
@@ -32,7 +32,8 @@ const struct mxs_saif_data mx28_saif_data[] __initconst = {
 };
 #endif
 
-struct platform_device *__init mxs_add_saif(const struct mxs_saif_data *data)
+struct platform_device *__init mxs_add_saif(const struct mxs_saif_data *data,
+                                const struct mxs_saif_platform_data *pdata)
 {
         struct resource res[] = {
                 {
@@ -56,5 +57,5 @@ struct platform_device *__init mxs_add_saif(const struct mxs_saif_data *data)
         };
 
         return mxs_add_platform_device("mxs-saif", data->id, res,
-                                        ARRAY_SIZE(res), NULL, 0);
+                                ARRAY_SIZE(res), pdata, sizeof(*pdata));
 }
diff --git a/arch/arm/mach-mxs/include/mach/common.h b/arch/arm/mach-mxs/include/mach/common.h
index 1388485414c9..e1237ab25862 100644
--- a/arch/arm/mach-mxs/include/mach/common.h
+++ b/arch/arm/mach-mxs/include/mach/common.h
@@ -17,6 +17,7 @@ extern const u32 *mxs_get_ocotp(void);
 extern int mxs_reset_block(void __iomem *);
 extern void mxs_timer_init(struct clk *, int);
 extern void mxs_restart(char, const char *);
+extern int mxs_saif_clkmux_select(unsigned int clkmux);
 
 extern int mx23_register_gpios(void);
 extern int mx23_clocks_init(void);
diff --git a/arch/arm/mach-mxs/include/mach/devices-common.h b/arch/arm/mach-mxs/include/mach/devices-common.h
index a8080f44c03d..dc369c1239fc 100644
--- a/arch/arm/mach-mxs/include/mach/devices-common.h
+++ b/arch/arm/mach-mxs/include/mach/devices-common.h
@@ -94,6 +94,7 @@ struct platform_device *__init mxs_add_mxs_pwm(
                 resource_size_t iobase, int id);
 
 /* saif */
+#include <sound/saif.h>
 struct mxs_saif_data {
         int id;
         resource_size_t iobase;
@@ -103,4 +104,5 @@ struct mxs_saif_data {
 };
 
 struct platform_device *__init mxs_add_saif(
-                const struct mxs_saif_data *data);
+                const struct mxs_saif_data *data,
+                const struct mxs_saif_platform_data *pdata);
diff --git a/arch/arm/mach-mxs/include/mach/digctl.h b/arch/arm/mach-mxs/include/mach/digctl.h
new file mode 100644
index 000000000000..49a888c65d6d
--- /dev/null
+++ b/arch/arm/mach-mxs/include/mach/digctl.h
@@ -0,0 +1,21 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __MACH_DIGCTL_H__
+#define __MACH_DIGCTL_H__
+
+/* MXS DIGCTL SAIF CLKMUX */
+#define MXS_DIGCTL_SAIF_CLKMUX_DIRECT           0x0
+#define MXS_DIGCTL_SAIF_CLKMUX_CROSSINPUT       0x1
+#define MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0         0x2
+#define MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR1         0x3
+
+#define HW_DIGCTL_CTRL                  0x0
+#define  BP_DIGCTL_CTRL_SAIF_CLKMUX     10
+#define  BM_DIGCTL_CTRL_SAIF_CLKMUX     (0x3 << 10)
+#endif
diff --git a/arch/arm/mach-mxs/mach-mx28evk.c b/arch/arm/mach-mxs/mach-mx28evk.c
index d0cc37fd23a4..eb0597be4e23 100644
--- a/arch/arm/mach-mxs/mach-mx28evk.c
+++ b/arch/arm/mach-mxs/mach-mx28evk.c
@@ -27,6 +27,7 @@
 
 #include <mach/common.h>
 #include <mach/iomux-mx28.h>
+#include <mach/digctl.h>
 
 #include "devices-mx28.h"
 
@@ -421,6 +422,18 @@ static struct gpio mx28evk_lcd_gpios[] = {
         { MX28EVK_BL_ENABLE, GPIOF_OUT_INIT_HIGH, "bl-enable" },
 };
 
+static const struct mxs_saif_platform_data
+                        mx28evk_mxs_saif_pdata[] __initconst = {
+        /* working on EXTMSTR0 mode (saif0 master, saif1 slave) */
+        {
+                .master_mode = 1,
+                .master_id = 0,
+        }, {
+                .master_mode = 0,
+                .master_id = 0,
+        },
+};
+
 static void __init mx28evk_init(void)
 {
         int ret;
@@ -454,8 +467,9 @@ static void __init mx28evk_init(void)
         else
                 mx28_add_mxsfb(&mx28evk_mxsfb_pdata);
 
-        mx28_add_saif(0);
-        mx28_add_saif(1);
+        mxs_saif_clkmux_select(MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0);
+        mx28_add_saif(0, &mx28evk_mxs_saif_pdata[0]);
+        mx28_add_saif(1, &mx28evk_mxs_saif_pdata[1]);
 
         mx28_add_mxs_i2c(0);
         i2c_register_board_info(0, mxs_i2c0_board_info,
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 5598e00ccf52..4b4c9e25a83e 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -410,6 +410,7 @@ static struct omap2_hsmmc_info mmc[] = {
         {
                 .mmc            = 5,
                 .caps           = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD,
+                .pm_caps        = MMC_PM_KEEP_POWER,
                 .gpio_cd        = -EINVAL,
                 .gpio_wp        = -EINVAL,
                 .ocr_mask       = MMC_VDD_165_195,
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index f5a3a3f11739..4b1cfe32e6ba 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -24,6 +24,7 @@
 #include <linux/i2c/pca953x.h>
 #include <linux/can/platform/ti_hecc.h>
 #include <linux/davinci_emac.h>
+#include <linux/mmc/host.h>
 
 #include <mach/hardware.h>
 #include <mach/am35xx.h>
@@ -40,6 +41,7 @@
 
 #include "mux.h"
 #include "control.h"
+#include "hsmmc.h"
 
 #define AM35XX_EVM_MDIO_FREQUENCY       (1000000)
 
@@ -455,6 +457,23 @@ static void am3517_evm_hecc_init(struct ti_hecc_platform_data *pdata)
 static struct omap_board_config_kernel am3517_evm_config[] __initdata = {
 };
 
+static struct omap2_hsmmc_info mmc[] = {
+        {
+                .mmc            = 1,
+                .caps           = MMC_CAP_4_BIT_DATA,
+                .gpio_cd        = 127,
+                .gpio_wp        = 126,
+        },
+        {
+                .mmc            = 2,
+                .caps           = MMC_CAP_4_BIT_DATA,
+                .gpio_cd        = 128,
+                .gpio_wp        = 129,
+        },
+        {}      /* Terminator */
+};
+
+
 static void __init am3517_evm_init(void)
 {
         omap_board_config = am3517_evm_config;
@@ -483,6 +502,9 @@ static void __init am3517_evm_init(void)
 
         /* MUSB */
         am3517_evm_musb_init();
+
+        /* MMC init function */
+        omap2_hsmmc_init(mmc);
 }
 
 MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM")
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index 039cadf84c11..d75e5f6b8a01 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3297,7 +3297,7 @@ static struct omap_clk omap3xxx_clks[] = {
         CLK(NULL,       "cpefuse_fck",  &cpefuse_fck,   CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
         CLK(NULL,       "ts_fck",       &ts_fck,        CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
         CLK(NULL,       "usbtll_fck",   &usbtll_fck,    CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
-        CLK("usbhs-omap.0",     "usbtll_fck",   &usbtll_fck,    CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
+        CLK("usbhs_omap",       "usbtll_fck",   &usbtll_fck,    CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
         CLK("omap-mcbsp.1",     "prcm_fck",     &core_96m_fck,  CK_3XXX),
         CLK("omap-mcbsp.5",     "prcm_fck",     &core_96m_fck,  CK_3XXX),
         CLK(NULL,       "core_96m_fck", &core_96m_fck,  CK_3XXX),
@@ -3333,7 +3333,7 @@ static struct omap_clk omap3xxx_clks[] = {
         CLK(NULL,       "pka_ick",      &pka_ick,       CK_34XX | CK_36XX),
         CLK(NULL,       "core_l4_ick",  &core_l4_ick,   CK_3XXX),
         CLK(NULL,       "usbtll_ick",   &usbtll_ick,    CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
-        CLK("usbhs-omap.0",     "usbtll_ick",   &usbtll_ick,    CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
+        CLK("usbhs_omap",       "usbtll_ick",   &usbtll_ick,    CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
         CLK("omap_hsmmc.2",     "ick",  &mmchs3_ick,    CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
         CLK(NULL,       "icr_ick",      &icr_ick,       CK_34XX | CK_36XX),
         CLK("omap-aes", "ick",  &aes2_ick,      CK_34XX | CK_36XX),
@@ -3379,20 +3379,18 @@ static struct omap_clk omap3xxx_clks[] = {
         CLK(NULL,       "cam_ick",      &cam_ick,       CK_34XX | CK_36XX),
         CLK(NULL,       "csi2_96m_fck", &csi2_96m_fck,  CK_34XX | CK_36XX),
         CLK(NULL,       "usbhost_120m_fck", &usbhost_120m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
-        CLK("usbhs-omap.0",     "hs_fck", &usbhost_120m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
         CLK(NULL,       "usbhost_48m_fck", &usbhost_48m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
-        CLK("usbhs-omap.0",     "fs_fck", &usbhost_48m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
         CLK(NULL,       "usbhost_ick",  &usbhost_ick,   CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
-        CLK("usbhs-omap.0",     "usbhost_ick",  &usbhost_ick,   CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
-        CLK("usbhs-omap.0",     "utmi_p1_gfclk",        &dummy_ck,      CK_3XXX),
-        CLK("usbhs-omap.0",     "utmi_p2_gfclk",        &dummy_ck,      CK_3XXX),
-        CLK("usbhs-omap.0",     "xclk60mhsp1_ck",       &dummy_ck,      CK_3XXX),
-        CLK("usbhs-omap.0",     "xclk60mhsp2_ck",       &dummy_ck,      CK_3XXX),
-        CLK("usbhs-omap.0",     "usb_host_hs_utmi_p1_clk",      &dummy_ck,      CK_3XXX),
-        CLK("usbhs-omap.0",     "usb_host_hs_utmi_p2_clk",      &dummy_ck,      CK_3XXX),
-        CLK("usbhs-omap.0",     "usb_tll_hs_usb_ch0_clk",       &dummy_ck,      CK_3XXX),
-        CLK("usbhs-omap.0",     "usb_tll_hs_usb_ch1_clk",       &dummy_ck,      CK_3XXX),
-        CLK("usbhs-omap.0",     "init_60m_fclk",        &dummy_ck,      CK_3XXX),
+        CLK("usbhs_omap",       "usbhost_ick",  &usbhost_ick,   CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
+        CLK("usbhs_omap",       "utmi_p1_gfclk",        &dummy_ck,      CK_3XXX),
+        CLK("usbhs_omap",       "utmi_p2_gfclk",        &dummy_ck,      CK_3XXX),
+        CLK("usbhs_omap",       "xclk60mhsp1_ck",       &dummy_ck,      CK_3XXX),
+        CLK("usbhs_omap",       "xclk60mhsp2_ck",       &dummy_ck,      CK_3XXX),
+        CLK("usbhs_omap",       "usb_host_hs_utmi_p1_clk",      &dummy_ck,      CK_3XXX),
+        CLK("usbhs_omap",       "usb_host_hs_utmi_p2_clk",      &dummy_ck,      CK_3XXX),
+        CLK("usbhs_omap",       "usb_tll_hs_usb_ch0_clk",       &dummy_ck,      CK_3XXX),
+        CLK("usbhs_omap",       "usb_tll_hs_usb_ch1_clk",       &dummy_ck,      CK_3XXX),
+        CLK("usbhs_omap",       "init_60m_fclk",        &dummy_ck,      CK_3XXX),
         CLK(NULL,       "usim_fck",     &usim_fck,      CK_3430ES2PLUS | CK_36XX),
         CLK(NULL,       "gpt1_fck",     &gpt1_fck,      CK_3XXX),
         CLK(NULL,       "wkup_32k_fck", &wkup_32k_fck,  CK_3XXX),
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 730097ee0f23..08e86d793a1f 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -3304,7 +3304,7 @@ static struct omap_clk omap44xx_clks[] = {
         CLK(NULL,       "uart2_fck",                    &uart2_fck,     CK_443X),
         CLK(NULL,       "uart3_fck",                    &uart3_fck,     CK_443X),
         CLK(NULL,       "uart4_fck",                    &uart4_fck,     CK_443X),
-        CLK("usbhs-omap.0",     "fs_fck",               &usb_host_fs_fck,       CK_443X),
+        CLK("usbhs_omap",       "fs_fck",               &usb_host_fs_fck,       CK_443X),
         CLK(NULL,       "utmi_p1_gfclk",                &utmi_p1_gfclk, CK_443X),
         CLK(NULL,       "usb_host_hs_utmi_p1_clk",      &usb_host_hs_utmi_p1_clk,       CK_443X),
         CLK(NULL,       "utmi_p2_gfclk",                &utmi_p2_gfclk, CK_443X),
@@ -3315,7 +3315,7 @@ static struct omap_clk omap44xx_clks[] = {
         CLK(NULL,       "usb_host_hs_hsic60m_p2_clk",   &usb_host_hs_hsic60m_p2_clk,    CK_443X),
         CLK(NULL,       "usb_host_hs_hsic480m_p2_clk",  &usb_host_hs_hsic480m_p2_clk,   CK_443X),
         CLK(NULL,       "usb_host_hs_func48mclk",       &usb_host_hs_func48mclk,        CK_443X),
-        CLK("usbhs-omap.0",     "hs_fck",               &usb_host_hs_fck,       CK_443X),
+        CLK("usbhs_omap",       "hs_fck",               &usb_host_hs_fck,       CK_443X),
         CLK(NULL,       "otg_60m_gfclk",                &otg_60m_gfclk, CK_443X),
         CLK(NULL,       "usb_otg_hs_xclk",              &usb_otg_hs_xclk,       CK_443X),
         CLK("musb-omap2430",    "ick",                          &usb_otg_hs_ick,        CK_443X),
@@ -3323,7 +3323,7 @@ static struct omap_clk omap44xx_clks[] = {
         CLK(NULL,       "usb_tll_hs_usb_ch2_clk",       &usb_tll_hs_usb_ch2_clk,        CK_443X),
         CLK(NULL,       "usb_tll_hs_usb_ch0_clk",       &usb_tll_hs_usb_ch0_clk,        CK_443X),
         CLK(NULL,       "usb_tll_hs_usb_ch1_clk",       &usb_tll_hs_usb_ch1_clk,        CK_443X),
-        CLK("usbhs-omap.0",     "usbtll_ick",           &usb_tll_hs_ick,        CK_443X),
+        CLK("usbhs_omap",       "usbtll_ick",           &usb_tll_hs_ick,        CK_443X),
         CLK(NULL,       "usim_ck",                      &usim_ck,       CK_443X),
         CLK(NULL,       "usim_fclk",                    &usim_fclk,     CK_443X),
         CLK(NULL,       "usim_fck",                     &usim_fck,      CK_443X),
@@ -3383,8 +3383,8 @@ static struct omap_clk omap44xx_clks[] = {
         CLK(NULL,       "uart2_ick",                    &dummy_ck,      CK_443X),
         CLK(NULL,       "uart3_ick",                    &dummy_ck,      CK_443X),
         CLK(NULL,       "uart4_ick",                    &dummy_ck,      CK_443X),
-        CLK("usbhs-omap.0",     "usbhost_ick",          &dummy_ck,              CK_443X),
-        CLK("usbhs-omap.0",     "usbtll_fck",           &dummy_ck,      CK_443X),
+        CLK("usbhs_omap",       "usbhost_ick",          &dummy_ck,              CK_443X),
+        CLK("usbhs_omap",       "usbtll_fck",           &dummy_ck,      CK_443X),
         CLK("omap_wdt", "ick",                          &dummy_ck,      CK_443X),
         CLK("omap_timer.1",     "32k_ck",       &sys_32k_ck,    CK_443X),
         CLK("omap_timer.2",     "32k_ck",       &sys_32k_ck,    CK_443X),
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index f4a1020559a7..bd844af13af5 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -171,6 +171,17 @@ static void omap4_hsmmc1_after_set_reg(struct device *dev, int slot,
         }
 }
 
+static void hsmmc2_select_input_clk_src(struct omap_mmc_platform_data *mmc)
+{
+        u32 reg;
+
+        if (mmc->slots[0].internal_clock) {
+                reg = omap_ctrl_readl(control_devconf1_offset);
+                reg |= OMAP2_MMCSDIO2ADPCLKISEL;
+                omap_ctrl_writel(reg, control_devconf1_offset);
+        }
+}
+
 static void hsmmc23_before_set_reg(struct device *dev, int slot,
                                    int power_on, int vdd)
 {
@@ -179,16 +190,19 @@ static void hsmmc23_before_set_reg(struct device *dev, int slot,
         if (mmc->slots[0].remux)
                 mmc->slots[0].remux(dev, slot, power_on);
 
-        if (power_on) {
-                /* Only MMC2 supports a CLKIN */
-                if (mmc->slots[0].internal_clock) {
-                        u32 reg;
+        if (power_on)
+                hsmmc2_select_input_clk_src(mmc);
+}
 
-                        reg = omap_ctrl_readl(control_devconf1_offset);
-                        reg |= OMAP2_MMCSDIO2ADPCLKISEL;
-                        omap_ctrl_writel(reg, control_devconf1_offset);
-                }
-        }
+static int am35x_hsmmc2_set_power(struct device *dev, int slot,
+                                  int power_on, int vdd)
+{
+        struct omap_mmc_platform_data *mmc = dev->platform_data;
+
+        if (power_on)
+                hsmmc2_select_input_clk_src(mmc);
+
+        return 0;
 }
 
 static int nop_mmc_set_power(struct device *dev, int slot, int power_on,
@@ -200,10 +214,12 @@ static int nop_mmc_set_power(struct device *dev, int slot, int power_on,
 static inline void omap_hsmmc_mux(struct omap_mmc_platform_data *mmc_controller,
                         int controller_nr)
 {
-        if (gpio_is_valid(mmc_controller->slots[0].switch_pin))
+        if (gpio_is_valid(mmc_controller->slots[0].switch_pin) &&
+                (mmc_controller->slots[0].switch_pin < OMAP_MAX_GPIO_LINES))
                 omap_mux_init_gpio(mmc_controller->slots[0].switch_pin,
                                         OMAP_PIN_INPUT_PULLUP);
-        if (gpio_is_valid(mmc_controller->slots[0].gpio_wp))
+        if (gpio_is_valid(mmc_controller->slots[0].gpio_wp) &&
+                (mmc_controller->slots[0].gpio_wp < OMAP_MAX_GPIO_LINES))
                 omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp,
                                         OMAP_PIN_INPUT_PULLUP);
         if (cpu_is_omap34xx()) {
@@ -296,6 +312,7 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
         mmc->slots[0].name = hc_name;
         mmc->nr_slots = 1;
         mmc->slots[0].caps = c->caps;
+        mmc->slots[0].pm_caps = c->pm_caps;
         mmc->slots[0].internal_clock = !c->ext_clock;
         mmc->dma_mask = 0xffffffff;
         if (cpu_is_omap44xx())
@@ -336,11 +353,17 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
          *
          * temporary HACK: ocr_mask instead of fixed supply
          */
-        mmc->slots[0].ocr_mask = c->ocr_mask;
-
-        if (cpu_is_omap3517() || cpu_is_omap3505())
-                mmc->slots[0].set_power = nop_mmc_set_power;
+        if (cpu_is_omap3505() || cpu_is_omap3517())
+                mmc->slots[0].ocr_mask = MMC_VDD_165_195 |
+                                         MMC_VDD_26_27 |
+                                         MMC_VDD_27_28 |
+                                         MMC_VDD_29_30 |
+                                         MMC_VDD_30_31 |
+                                         MMC_VDD_31_32;
         else
+                mmc->slots[0].ocr_mask = c->ocr_mask;
+
+        if (!cpu_is_omap3517() && !cpu_is_omap3505())
                 mmc->slots[0].features |= HSMMC_HAS_PBIAS;
 
         if (cpu_is_omap44xx() && (omap_rev() > OMAP4430_REV_ES1_0))
@@ -363,6 +386,9 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
                         }
                 }
 
+                if (cpu_is_omap3517() || cpu_is_omap3505())
+                        mmc->slots[0].set_power = nop_mmc_set_power;
+
                 /* OMAP3630 HSMMC1 supports only 4-bit */
                 if (cpu_is_omap3630() &&
                                 (c->caps & MMC_CAP_8_BIT_DATA)) {
@@ -372,6 +398,9 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
                 }
                 break;
         case 2:
+                if (cpu_is_omap3517() || cpu_is_omap3505())
+                        mmc->slots[0].set_power = am35x_hsmmc2_set_power;
+
                 if (c->ext_clock)
                         c->transceiver = 1;
                 if (c->transceiver && (c->caps & MMC_CAP_8_BIT_DATA)) {
diff --git a/arch/arm/mach-omap2/hsmmc.h b/arch/arm/mach-omap2/hsmmc.h
index f757e78d4d4f..c4409730c4bb 100644
--- a/arch/arm/mach-omap2/hsmmc.h
+++ b/arch/arm/mach-omap2/hsmmc.h
@@ -12,6 +12,7 @@ struct omap2_hsmmc_info {
         u8      mmc;            /* controller 1/2/3 */
         u32     caps;           /* 4/8 wires and any additional host
                                  * capabilities OR'd (ref. linux/mmc/host.h) */
+        u32     pm_caps;        /* PM capabilities */
         bool    transceiver;    /* MMC-2 option */
         bool    ext_clock;      /* use external pin for input clock */
         bool    cover_only;     /* No card detect - just cover switch */
diff --git a/arch/arm/mach-omap2/usb-host.c b/arch/arm/mach-omap2/usb-host.c
index 89ae29847c59..771dc781b746 100644
--- a/arch/arm/mach-omap2/usb-host.c
+++ b/arch/arm/mach-omap2/usb-host.c
@@ -28,51 +28,28 @@
 #include <mach/hardware.h>
 #include <mach/irqs.h>
 #include <plat/usb.h>
+#include <plat/omap_device.h>
 
 #include "mux.h"
 
 #ifdef CONFIG_MFD_OMAP_USB_HOST
 
-#define OMAP_USBHS_DEVICE       "usbhs-omap"
-
-static struct resource usbhs_resources[] = {
-        {
-                .name   = "uhh",
-                .flags  = IORESOURCE_MEM,
-        },
-        {
-                .name   = "tll",
-                .flags  = IORESOURCE_MEM,
-        },
-        {
-                .name   = "ehci",
-                .flags  = IORESOURCE_MEM,
-        },
-        {
-                .name   = "ehci-irq",
-                .flags  = IORESOURCE_IRQ,
-        },
-        {
-                .name   = "ohci",
-                .flags  = IORESOURCE_MEM,
-        },
-        {
-                .name   = "ohci-irq",
-                .flags  = IORESOURCE_IRQ,
-        }
-};
-
-static struct platform_device usbhs_device = {
-        .name           = OMAP_USBHS_DEVICE,
-        .id             = 0,
-        .num_resources  = ARRAY_SIZE(usbhs_resources),
-        .resource       = usbhs_resources,
-};
+#define OMAP_USBHS_DEVICE       "usbhs_omap"
+#define USBHS_UHH_HWMODNAME     "usb_host_hs"
+#define USBHS_TLL_HWMODNAME     "usb_tll_hs"
 
 static struct usbhs_omap_platform_data          usbhs_data;
 static struct ehci_hcd_omap_platform_data       ehci_data;
 static struct ohci_hcd_omap_platform_data       ohci_data;
 
+static struct omap_device_pm_latency omap_uhhtll_latency[] = {
+          {
+                .deactivate_func = omap_device_idle_hwmods,
+                .activate_func   = omap_device_enable_hwmods,
+                .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
+          },
+};
+
 /* MUX settings for EHCI pins */
 /*
  * setup_ehci_io_mux - initialize IO pad mux for USBHOST
@@ -508,7 +485,10 @@ static void setup_4430ohci_io_mux(const enum usbhs_omap_port_mode *port_mode)
 
 void __init usbhs_init(const struct usbhs_omap_board_data *pdata)
 {
-        int     i;
+        struct omap_hwmod       *oh[2];
+        struct omap_device      *od;
+        int                     bus_id = -1;
+        int                     i;
 
         for (i = 0; i < OMAP3_HS_USB_PORTS; i++) {
                 usbhs_data.port_mode[i] = pdata->port_mode[i];
@@ -523,44 +503,34 @@ void __init usbhs_init(const struct usbhs_omap_board_data *pdata)
         usbhs_data.ohci_data = &ohci_data;
 
         if (cpu_is_omap34xx()) {
-                usbhs_resources[0].start = OMAP34XX_UHH_CONFIG_BASE;
-                usbhs_resources[0].end = OMAP34XX_UHH_CONFIG_BASE + SZ_1K - 1;
-                usbhs_resources[1].start = OMAP34XX_USBTLL_BASE;
-                usbhs_resources[1].end = OMAP34XX_USBTLL_BASE + SZ_4K - 1;
-                usbhs_resources[2].start        = OMAP34XX_EHCI_BASE;
-                usbhs_resources[2].end  = OMAP34XX_EHCI_BASE + SZ_1K - 1;
-                usbhs_resources[3].start = INT_34XX_EHCI_IRQ;
-                usbhs_resources[4].start        = OMAP34XX_OHCI_BASE;
-                usbhs_resources[4].end  = OMAP34XX_OHCI_BASE + SZ_1K - 1;
-                usbhs_resources[5].start = INT_34XX_OHCI_IRQ;
                 setup_ehci_io_mux(pdata->port_mode);
                 setup_ohci_io_mux(pdata->port_mode);
         } else if (cpu_is_omap44xx()) {
-                usbhs_resources[0].start = OMAP44XX_UHH_CONFIG_BASE;
-                usbhs_resources[0].end = OMAP44XX_UHH_CONFIG_BASE + SZ_1K - 1;
-                usbhs_resources[1].start = OMAP44XX_USBTLL_BASE;
-                usbhs_resources[1].end = OMAP44XX_USBTLL_BASE + SZ_4K - 1;
-                usbhs_resources[2].start = OMAP44XX_HSUSB_EHCI_BASE;
-                usbhs_resources[2].end = OMAP44XX_HSUSB_EHCI_BASE + SZ_1K - 1;
-                usbhs_resources[3].start = OMAP44XX_IRQ_EHCI;
-                usbhs_resources[4].start = OMAP44XX_HSUSB_OHCI_BASE;
-                usbhs_resources[4].end = OMAP44XX_HSUSB_OHCI_BASE + SZ_1K - 1;
-                usbhs_resources[5].start = OMAP44XX_IRQ_OHCI;
                 setup_4430ehci_io_mux(pdata->port_mode);
                 setup_4430ohci_io_mux(pdata->port_mode);
         }
 
-        if (platform_device_add_data(&usbhs_device,
-                                &usbhs_data, sizeof(usbhs_data)) < 0) {
-                printk(KERN_ERR "USBHS platform_device_add_data failed\n");
-                goto init_end;
+        oh[0] = omap_hwmod_lookup(USBHS_UHH_HWMODNAME);
+        if (!oh[0]) {
+                pr_err("Could not look up %s\n", USBHS_UHH_HWMODNAME);
+                return;
         }
 
-        if (platform_device_register(&usbhs_device) < 0)
-                printk(KERN_ERR "USBHS platform_device_register failed\n");
+        oh[1] = omap_hwmod_lookup(USBHS_TLL_HWMODNAME);
+        if (!oh[1]) {
+                pr_err("Could not look up %s\n", USBHS_TLL_HWMODNAME);
+                return;
+        }
 
-init_end:
-        return;
+        od = omap_device_build_ss(OMAP_USBHS_DEVICE, bus_id, oh, 2,
+                                (void *)&usbhs_data, sizeof(usbhs_data),
+                                omap_uhhtll_latency,
+                                ARRAY_SIZE(omap_uhhtll_latency), false);
+        if (IS_ERR(od)) {
+                pr_err("Could not build hwmod devices %s,%s\n",
+                        USBHS_UHH_HWMODNAME, USBHS_TLL_HWMODNAME);
+                return;
+        }
 }
 
 #else
@@ -570,5 +540,3 @@ void __init usbhs_init(const struct usbhs_omap_board_data *pdata)
 }
 
 #endif
-
-
diff --git a/arch/arm/mach-pxa/am200epd.c b/arch/arm/mach-pxa/am200epd.c
index 4cb069fd9af2..ccdac4b6a469 100644
--- a/arch/arm/mach-pxa/am200epd.c
+++ b/arch/arm/mach-pxa/am200epd.c
@@ -138,7 +138,7 @@ static void am200_cleanup(struct metronomefb_par *par)
 {
         int i;
 
-        free_irq(IRQ_GPIO(RDY_GPIO_PIN), par);
+        free_irq(PXA_GPIO_TO_IRQ(RDY_GPIO_PIN), par);
 
         for (i = 0; i < ARRAY_SIZE(gpios); i++)
                 gpio_free(gpios[i]);
@@ -292,7 +292,7 @@ static int am200_setup_irq(struct fb_info *info)
 {
         int ret;
 
-        ret = request_irq(IRQ_GPIO(RDY_GPIO_PIN), am200_handle_irq,
+        ret = request_irq(PXA_GPIO_TO_IRQ(RDY_GPIO_PIN), am200_handle_irq,
                                 IRQF_DISABLED|IRQF_TRIGGER_FALLING,
                                 "AM200", info->par);
         if (ret)
diff --git a/arch/arm/mach-pxa/am300epd.c b/arch/arm/mach-pxa/am300epd.c
index fa8bad235d9f..76c4b9494031 100644
--- a/arch/arm/mach-pxa/am300epd.c
+++ b/arch/arm/mach-pxa/am300epd.c
@@ -176,7 +176,7 @@ static void am300_cleanup(struct broadsheetfb_par *par)
 {
         int i;
 
-        free_irq(IRQ_GPIO(RDY_GPIO_PIN), par);
+        free_irq(PXA_GPIO_TO_IRQ(RDY_GPIO_PIN), par);
 
         for (i = 0; i < ARRAY_SIZE(gpios); i++)
                 gpio_free(gpios[i]);
@@ -240,7 +240,7 @@ static int am300_setup_irq(struct fb_info *info)
         int ret;
         struct broadsheetfb_par *par = info->par;
 
-        ret = request_irq(IRQ_GPIO(RDY_GPIO_PIN), am300_handle_irq,
+        ret = request_irq(PXA_GPIO_TO_IRQ(RDY_GPIO_PIN), am300_handle_irq,
                                 IRQF_DISABLED|IRQF_TRIGGER_RISING,
                                 "AM300", par);
         if (ret)
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
index a34de9a0d5e5..c35456f02acb 100644
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -180,7 +180,7 @@ static unsigned long balloon3_ac97_pin_config[] __initdata = {
 };
 
 static struct ucb1400_pdata vpac270_ucb1400_pdata = {
-        .irq            = IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ),
+        .irq            = PXA_GPIO_TO_IRQ(BALLOON3_GPIO_CODEC_IRQ),
 };
 
 
diff --git a/arch/arm/mach-pxa/capc7117.c b/arch/arm/mach-pxa/capc7117.c
index c2f0be040d27..c91727d1fe09 100644
--- a/arch/arm/mach-pxa/capc7117.c
+++ b/arch/arm/mach-pxa/capc7117.c
@@ -50,8 +50,8 @@ static struct resource capc7117_ide_resources[] = {
                .flags = IORESOURCE_MEM
         },
         [2] = {
-               .start = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO76)),
-               .end = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO76)),
+               .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO76)),
+               .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO76)),
                .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING
         }
 };
@@ -80,7 +80,7 @@ static void __init capc7117_ide_init(void)
 static struct plat_serial8250_port ti16c752_platform_data[] = {
         [0] = {
                .mapbase = 0x14000000,
-               .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO78)),
+               .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO78)),
                .irqflags = IRQF_TRIGGER_RISING,
                .flags = TI16C752_FLAGS,
                .iotype = UPIO_MEM,
@@ -89,7 +89,7 @@ static struct plat_serial8250_port ti16c752_platform_data[] = {
         },
         [1] = {
                .mapbase = 0x14000040,
-               .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO79)),
+               .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO79)),
                .irqflags = IRQF_TRIGGER_RISING,
                .flags = TI16C752_FLAGS,
                .iotype = UPIO_MEM,
@@ -98,7 +98,7 @@ static struct plat_serial8250_port ti16c752_platform_data[] = {
         },
         [2] = {
                .mapbase = 0x14000080,
-               .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO80)),
+               .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO80)),
                .irqflags = IRQF_TRIGGER_RISING,
                .flags = TI16C752_FLAGS,
                .iotype = UPIO_MEM,
@@ -107,7 +107,7 @@ static struct plat_serial8250_port ti16c752_platform_data[] = {
         },
         [3] = {
                .mapbase = 0x140000c0,
-               .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO81)),
+               .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO81)),
                .irqflags = IRQF_TRIGGER_RISING,
                .flags = TI16C752_FLAGS,
                .iotype = UPIO_MEM,
diff --git a/arch/arm/mach-pxa/cm-x270.c b/arch/arm/mach-pxa/cm-x270.c
index 13518a705399..431ef56700c4 100644
--- a/arch/arm/mach-pxa/cm-x270.c
+++ b/arch/arm/mach-pxa/cm-x270.c
@@ -33,7 +33,7 @@
 /* GPIO IRQ usage */
 #define GPIO83_MMC_IRQ          (83)
 
-#define CMX270_MMC_IRQ          IRQ_GPIO(GPIO83_MMC_IRQ)
+#define CMX270_MMC_IRQ          PXA_GPIO_TO_IRQ(GPIO83_MMC_IRQ)
 
 /* MMC power enable */
 #define GPIO105_MMC_POWER       (105)
@@ -380,7 +380,7 @@ static struct spi_board_info cm_x270_spi_devices[] __initdata = {
                 .modalias               = "libertas_spi",
                 .max_speed_hz           = 13000000,
                 .bus_num                = 2,
-                .irq                    = gpio_to_irq(95),
+                .irq                    = PXA_GPIO_TO_IRQ(95),
                 .chip_select            = 0,
                 .controller_data        = &cm_x270_libertas_chip,
                 .platform_data          = &cm_x270_libertas_pdata,
diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c
index ec170a552c23..8fa4ad27edf3 100644
--- a/arch/arm/mach-pxa/cm-x2xx.c
+++ b/arch/arm/mach-pxa/cm-x2xx.c
@@ -58,8 +58,8 @@ extern void cmx270_init(void);
 #define CMX255_GPIO_IT8152_IRQ  (0)
 #define CMX270_GPIO_IT8152_IRQ  (22)
 
-#define CMX255_ETHIRQ           IRQ_GPIO(GPIO22_ETHIRQ)
-#define CMX270_ETHIRQ           IRQ_GPIO(GPIO10_ETHIRQ)
+#define CMX255_ETHIRQ           PXA_GPIO_TO_IRQ(GPIO22_ETHIRQ)
+#define CMX270_ETHIRQ           PXA_GPIO_TO_IRQ(GPIO10_ETHIRQ)
 
 #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
 static struct resource cmx255_dm9000_resource[] = {
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
index 7236974da0b7..4b981b82d2a5 100644
--- a/arch/arm/mach-pxa/cm-x300.c
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -64,7 +64,7 @@
 #define GPIO82_MMC_IRQ          (82)
 #define GPIO85_MMC_WP           (85)
 
-#define CM_X300_MMC_IRQ         IRQ_GPIO(GPIO82_MMC_IRQ)
+#define CM_X300_MMC_IRQ         PXA_GPIO_TO_IRQ(GPIO82_MMC_IRQ)
 
 #define GPIO95_RTC_CS           (95)
 #define GPIO96_RTC_WR           (96)
@@ -229,8 +229,8 @@ static struct resource dm9000_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [2] = {
-                .start  = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO99)),
-                .end    = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO99)),
+                .start  = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO99)),
+                .end    = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO99)),
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
         }
 };
diff --git a/arch/arm/mach-pxa/colibri-pxa270.c b/arch/arm/mach-pxa/colibri-pxa270.c
index 6a685165c9f2..29d5d541f602 100644
--- a/arch/arm/mach-pxa/colibri-pxa270.c
+++ b/arch/arm/mach-pxa/colibri-pxa270.c
@@ -218,8 +218,8 @@ static struct resource colibri_pxa270_dm9000_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         {
-                .start  = gpio_to_irq(GPIO114_COLIBRI_PXA270_ETH_IRQ),
-                .end    = gpio_to_irq(GPIO114_COLIBRI_PXA270_ETH_IRQ),
+                .start  = PXA_GPIO_TO_IRQ(GPIO114_COLIBRI_PXA270_ETH_IRQ),
+                .end    = PXA_GPIO_TO_IRQ(GPIO114_COLIBRI_PXA270_ETH_IRQ),
                 .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_RISING,
         },
 };
@@ -249,7 +249,7 @@ static pxa2xx_audio_ops_t colibri_pxa270_ac97_pdata = {
 };
 
 static struct ucb1400_pdata colibri_pxa270_ucb1400_pdata = {
-        .irq            = gpio_to_irq(GPIO113_COLIBRI_PXA270_TS_IRQ),
+        .irq            = PXA_GPIO_TO_IRQ(GPIO113_COLIBRI_PXA270_TS_IRQ),
 };
 
 static struct platform_device colibri_pxa270_ucb1400_device = {
diff --git a/arch/arm/mach-pxa/colibri-pxa300.c b/arch/arm/mach-pxa/colibri-pxa300.c
index c01059a61f33..0846d210cb05 100644
--- a/arch/arm/mach-pxa/colibri-pxa300.c
+++ b/arch/arm/mach-pxa/colibri-pxa300.c
@@ -78,8 +78,8 @@ static struct resource colibri_asix_resource[] = {
                 .flags = IORESOURCE_MEM,
         },
         [1] = {
-                .start = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO),
-                .end   = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO),
+                .start = PXA_GPIO_TO_IRQ(COLIBRI_ETH_IRQ_GPIO),
+                .end   = PXA_GPIO_TO_IRQ(COLIBRI_ETH_IRQ_GPIO),
                 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
         }
 };
diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c
index 5028f2300d50..6ad3359063af 100644
--- a/arch/arm/mach-pxa/colibri-pxa320.c
+++ b/arch/arm/mach-pxa/colibri-pxa320.c
@@ -115,8 +115,8 @@ static struct resource colibri_asix_resource[] = {
                 .flags = IORESOURCE_MEM,
         },
         [1] = {
-                .start = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO),
-                .end   = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO),
+                .start = PXA_GPIO_TO_IRQ(COLIBRI_ETH_IRQ_GPIO),
+                .end   = PXA_GPIO_TO_IRQ(COLIBRI_ETH_IRQ_GPIO),
                 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
         }
 };
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index 9d4dc5970b9c..66600f05e436 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -531,7 +531,7 @@ static struct spi_board_info corgi_spi_devices[] = {
                 .chip_select    = 0,
                 .platform_data  = &corgi_ads7846_info,
                 .controller_data= &corgi_ads7846_chip,
-                .irq            = gpio_to_irq(CORGI_GPIO_TP_INT),
+                .irq            = PXA_GPIO_TO_IRQ(CORGI_GPIO_TP_INT),
         }, {
                 .modalias       = "corgi-lcd",
                 .max_speed_hz   = 50000,
diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c
index 29034778bfda..39e265cfc86d 100644
--- a/arch/arm/mach-pxa/corgi_pm.c
+++ b/arch/arm/mach-pxa/corgi_pm.c
@@ -15,6 +15,7 @@
 #include <linux/kernel.h>
 #include <linux/delay.h>
 #include <linux/gpio.h>
+#include <linux/gpio-pxa.h>
 #include <linux/interrupt.h>
 #include <linux/platform_device.h>
 #include <linux/apm-emulation.h>
@@ -40,7 +41,9 @@ static struct gpio charger_gpios[] = {
         { CORGI_GPIO_ADC_TEMP_ON, GPIOF_OUT_INIT_LOW, "ADC Temp On" },
         { CORGI_GPIO_CHRG_ON,     GPIOF_OUT_INIT_LOW, "Charger On" },
         { CORGI_GPIO_CHRG_UKN,    GPIOF_OUT_INIT_LOW, "Charger Unknown" },
+        { CORGI_GPIO_AC_IN,       GPIOF_IN, "Charger Detection" },
         { CORGI_GPIO_KEY_INT,     GPIOF_IN, "Key Interrupt" },
+        { CORGI_GPIO_WAKEUP,      GPIOF_IN, "System wakeup notification" },
 };
 
 static void corgi_charger_init(void)
@@ -90,7 +93,12 @@ static int corgi_should_wakeup(unsigned int resume_on_alarm)
 {
         int is_resume = 0;
 
-        dev_dbg(sharpsl_pm.dev, "GPLR0 = %x,%x\n", GPLR0, PEDR);
+        dev_dbg(sharpsl_pm.dev, "PEDR = %x, GPIO_AC_IN = %d, "
+                "GPIO_CHRG_FULL = %d, GPIO_KEY_INT = %d, GPIO_WAKEUP = %d\n",
+                PEDR, gpio_get_value(CORGI_GPIO_AC_IN),
+                gpio_get_value(CORGI_GPIO_CHRG_FULL),
+                gpio_get_value(CORGI_GPIO_KEY_INT),
+                gpio_get_value(CORGI_GPIO_WAKEUP));
 
         if ((PEDR & GPIO_bit(CORGI_GPIO_AC_IN))) {
                 if (sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN)) {
@@ -124,14 +132,21 @@ static int corgi_should_wakeup(unsigned int resume_on_alarm)
 
 static unsigned long corgi_charger_wakeup(void)
 {
-        return ~GPLR0 & ( GPIO_bit(CORGI_GPIO_AC_IN) | GPIO_bit(CORGI_GPIO_KEY_INT) | GPIO_bit(CORGI_GPIO_WAKEUP) );
+        unsigned long ret;
+
+        ret = (!gpio_get_value(CORGI_GPIO_AC_IN) << GPIO_bit(CORGI_GPIO_AC_IN))
+                | (!gpio_get_value(CORGI_GPIO_KEY_INT)
+                << GPIO_bit(CORGI_GPIO_KEY_INT))
+                | (!gpio_get_value(CORGI_GPIO_WAKEUP)
+                << GPIO_bit(CORGI_GPIO_WAKEUP));
+        return ret;
 }
 
 unsigned long corgipm_read_devdata(int type)
 {
         switch(type) {
         case SHARPSL_STATUS_ACIN:
-                return ((GPLR(CORGI_GPIO_AC_IN) & GPIO_bit(CORGI_GPIO_AC_IN)) != 0);
+                return !gpio_get_value(CORGI_GPIO_AC_IN);
         case SHARPSL_STATUS_LOCK:
                 return gpio_get_value(sharpsl_pm.machinfo->gpio_batlock);
         case SHARPSL_STATUS_CHRGFULL:
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c
index 2e0425404de5..18fd177073f4 100644
--- a/arch/arm/mach-pxa/devices.c
+++ b/arch/arm/mach-pxa/devices.c
@@ -415,9 +415,29 @@ static struct resource pxa_rtc_resources[] = {
         },
 };
 
+static struct resource sa1100_rtc_resources[] = {
+        [0] = {
+                .start  = 0x40900000,
+                .end    = 0x409000ff,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_RTC1Hz,
+                .end    = IRQ_RTC1Hz,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                .start  = IRQ_RTCAlrm,
+                .end    = IRQ_RTCAlrm,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
 struct platform_device sa1100_device_rtc = {
         .name           = "sa1100-rtc",
         .id             = -1,
+        .num_resources  = ARRAY_SIZE(sa1100_rtc_resources),
+        .resource       = sa1100_rtc_resources,
 };
 
 struct platform_device pxa_device_rtc = {
@@ -1051,6 +1071,36 @@ struct platform_device pxa3xx_device_ssp4 = {
 };
 #endif /* CONFIG_PXA3xx || CONFIG_PXA95x */
 
+struct resource pxa_resource_gpio[] = {
+        {
+                .start  = 0x40e00000,
+                .end    = 0x40e0ffff,
+                .flags  = IORESOURCE_MEM,
+        }, {
+                .start  = IRQ_GPIO0,
+                .end    = IRQ_GPIO0,
+                .name   = "gpio0",
+                .flags  = IORESOURCE_IRQ,
+        }, {
+                .start  = IRQ_GPIO1,
+                .end    = IRQ_GPIO1,
+                .name   = "gpio1",
+                .flags  = IORESOURCE_IRQ,
+        }, {
+                .start  = IRQ_GPIO_2_x,
+                .end    = IRQ_GPIO_2_x,
+                .name   = "gpio_mux",
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device pxa_device_gpio = {
+        .name           = "pxa-gpio",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(pxa_resource_gpio),
+        .resource       = pxa_resource_gpio,
+};
+
 /* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
  * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
 void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info)
diff --git a/arch/arm/mach-pxa/devices.h b/arch/arm/mach-pxa/devices.h
index 2fd5a8b35757..1475db107254 100644
--- a/arch/arm/mach-pxa/devices.h
+++ b/arch/arm/mach-pxa/devices.h
@@ -16,6 +16,7 @@ extern struct platform_device pxa_device_ficp;
 extern struct platform_device sa1100_device_rtc;
 extern struct platform_device pxa_device_rtc;
 extern struct platform_device pxa_device_ac97;
+extern struct platform_device pxa_device_gpio;
 
 extern struct platform_device pxa27x_device_i2c_power;
 extern struct platform_device pxa27x_device_ohci;
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index bd396ba67af7..d80c0ba9a095 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -70,7 +70,7 @@
 /* common  GPIOs */
 #define GPIO11_NAND_CS          (11)
 #define GPIO41_ETHIRQ           (41)
-#define EM_X270_ETHIRQ          IRQ_GPIO(GPIO41_ETHIRQ)
+#define EM_X270_ETHIRQ          PXA_GPIO_TO_IRQ(GPIO41_ETHIRQ)
 #define GPIO115_WLAN_PWEN       (115)
 #define GPIO19_WLAN_STRAP       (19)
 #define GPIO9_USB_VBUS_EN       (9)
@@ -805,7 +805,7 @@ static struct spi_board_info em_x270_spi_devices[] __initdata = {
                 .modalias               = "libertas_spi",
                 .max_speed_hz           = 13000000,
                 .bus_num                = 2,
-                .irq                    = IRQ_GPIO(116),
+                .irq                    = PXA_GPIO_TO_IRQ(116),
                 .chip_select            = 0,
                 .controller_data        = &em_x270_libertas_chip,
                 .platform_data          = &em_x270_libertas_pdata,
@@ -1203,7 +1203,7 @@ static struct da903x_platform_data em_x270_da9030_info = {
 
 static struct i2c_board_info em_x270_i2c_pmic_info = {
         I2C_BOARD_INFO("da9030", 0x49),
-        .irq = IRQ_GPIO(0),
+        .irq = PXA_GPIO_TO_IRQ(0),
         .platform_data = &em_x270_da9030_info,
 };
 
diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c
index 69473db97758..f79a610c62fc 100644
--- a/arch/arm/mach-pxa/eseries.c
+++ b/arch/arm/mach-pxa/eseries.c
@@ -119,8 +119,8 @@ struct resource eseries_tmio_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = IRQ_GPIO(GPIO_ESERIES_TMIO_IRQ),
-                .end    = IRQ_GPIO(GPIO_ESERIES_TMIO_IRQ),
+                .start  = PXA_GPIO_TO_IRQ(GPIO_ESERIES_TMIO_IRQ),
+                .end    = PXA_GPIO_TO_IRQ(GPIO_ESERIES_TMIO_IRQ),
                 .flags  = IORESOURCE_IRQ,
         },
 };
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index ce16bdae96de..fb9b62dcf4ca 100644
--- a/arch/arm/mach-pxa/hx4700.c
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -252,8 +252,8 @@ static struct resource asic3_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = gpio_to_irq(GPIO12_HX4700_ASIC3_IRQ),
-                .end    = gpio_to_irq(GPIO12_HX4700_ASIC3_IRQ),
+                .start  = PXA_GPIO_TO_IRQ(GPIO12_HX4700_ASIC3_IRQ),
+                .end    = PXA_GPIO_TO_IRQ(GPIO12_HX4700_ASIC3_IRQ),
                 .flags  = IORESOURCE_IRQ,
         },
         /* SD part */
@@ -263,8 +263,8 @@ static struct resource asic3_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [3] = {
-                .start  = gpio_to_irq(GPIO66_HX4700_ASIC3_nSDIO_IRQ),
-                .end    = gpio_to_irq(GPIO66_HX4700_ASIC3_nSDIO_IRQ),
+                .start  = PXA_GPIO_TO_IRQ(GPIO66_HX4700_ASIC3_nSDIO_IRQ),
+                .end    = PXA_GPIO_TO_IRQ(GPIO66_HX4700_ASIC3_nSDIO_IRQ),
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -587,7 +587,7 @@ static struct spi_board_info tsc2046_board_info[] __initdata = {
                 .modalias        = "ads7846",
                 .bus_num         = 2,
                 .max_speed_hz    = 2600000, /* 100 kHz sample rate */
-                .irq             = gpio_to_irq(GPIO58_HX4700_TSC2046_nPENIRQ),
+                .irq             = PXA_GPIO_TO_IRQ(GPIO58_HX4700_TSC2046_nPENIRQ),
                 .platform_data   = &tsc2046_info,
                 .controller_data = &tsc2046_chip,
         },
@@ -635,15 +635,15 @@ static struct resource power_supply_resources[] = {
                 .name  = "ac",
                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
                          IORESOURCE_IRQ_LOWEDGE,
-                .start = gpio_to_irq(GPIOD9_nAC_IN),
-                .end   = gpio_to_irq(GPIOD9_nAC_IN),
+                .start = PXA_GPIO_TO_IRQ(GPIOD9_nAC_IN),
+                .end   = PXA_GPIO_TO_IRQ(GPIOD9_nAC_IN),
         },
         [1] = {
                 .name  = "usb",
                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
                          IORESOURCE_IRQ_LOWEDGE,
-                .start = gpio_to_irq(GPIOD14_nUSBC_DETECT),
-                .end   = gpio_to_irq(GPIOD14_nUSBC_DETECT),
+                .start = PXA_GPIO_TO_IRQ(GPIOD14_nUSBC_DETECT),
+                .end   = PXA_GPIO_TO_IRQ(GPIOD14_nUSBC_DETECT),
         },
 };
 
diff --git a/arch/arm/mach-pxa/icontrol.c b/arch/arm/mach-pxa/icontrol.c
index e239b82c99d7..67400192ed3b 100644
--- a/arch/arm/mach-pxa/icontrol.c
+++ b/arch/arm/mach-pxa/icontrol.c
@@ -86,7 +86,7 @@ static struct spi_board_info mcp251x_board_info[] = {
                 .chip_select     = 0,
                 .platform_data   = &mcp251x_info,
                 .controller_data = &mcp251x_chip_info1,
-                .irq             = gpio_to_irq(ICONTROL_MCP251x_nIRQ1)
+                .irq             = PXA_GPIO_TO_IRQ(ICONTROL_MCP251x_nIRQ1)
         },
         {
                 .modalias        = "mcp2515",
@@ -95,7 +95,7 @@ static struct spi_board_info mcp251x_board_info[] = {
                 .chip_select     = 1,
                 .platform_data   = &mcp251x_info,
                 .controller_data = &mcp251x_chip_info2,
-                .irq             = gpio_to_irq(ICONTROL_MCP251x_nIRQ2)
+                .irq             = PXA_GPIO_TO_IRQ(ICONTROL_MCP251x_nIRQ2)
         },
         {
                 .modalias        = "mcp2515",
@@ -104,7 +104,7 @@ static struct spi_board_info mcp251x_board_info[] = {
                 .chip_select     = 0,
                 .platform_data   = &mcp251x_info,
                 .controller_data = &mcp251x_chip_info3,
-                .irq             = gpio_to_irq(ICONTROL_MCP251x_nIRQ3)
+                .irq             = PXA_GPIO_TO_IRQ(ICONTROL_MCP251x_nIRQ3)
         },
         {
                 .modalias        = "mcp2515",
@@ -113,7 +113,7 @@ static struct spi_board_info mcp251x_board_info[] = {
                 .chip_select     = 1,
                 .platform_data   = &mcp251x_info,
                 .controller_data = &mcp251x_chip_info4,
-                .irq             = gpio_to_irq(ICONTROL_MCP251x_nIRQ4)
+                .irq             = PXA_GPIO_TO_IRQ(ICONTROL_MCP251x_nIRQ4)
         }
 };
 
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c
index fbabd84e110c..8af1840e12cc 100644
--- a/arch/arm/mach-pxa/idp.c
+++ b/arch/arm/mach-pxa/idp.c
@@ -75,8 +75,8 @@ static struct resource smc91x_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = IRQ_GPIO(4),
-                .end    = IRQ_GPIO(4),
+                .start  = PXA_GPIO_TO_IRQ(4),
+                .end    = PXA_GPIO_TO_IRQ(4),
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
         }
 };
diff --git a/arch/arm/mach-pxa/include/mach/balloon3.h b/arch/arm/mach-pxa/include/mach/balloon3.h
index 6d7eab3d0867..f02fa1e6ba86 100644
--- a/arch/arm/mach-pxa/include/mach/balloon3.h
+++ b/arch/arm/mach-pxa/include/mach/balloon3.h
@@ -172,9 +172,9 @@ enum balloon3_features {
 /* Balloon3 Interrupts */
 #define BALLOON3_IRQ(x)         (IRQ_BOARD_START + (x))
 
-#define BALLOON3_AUX_NIRQ       IRQ_GPIO(BALLOON3_GPIO_AUX_NIRQ)
-#define BALLOON3_CODEC_IRQ      IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ)
-#define BALLOON3_S0_CD_IRQ      IRQ_GPIO(BALLOON3_GPIO_S0_CD)
+#define BALLOON3_AUX_NIRQ       PXA_GPIO_TO_IRQ(BALLOON3_GPIO_AUX_NIRQ)
+#define BALLOON3_CODEC_IRQ      PXA_GPIO_TO_IRQ(BALLOON3_GPIO_CODEC_IRQ)
+#define BALLOON3_S0_CD_IRQ      PXA_GPIO_TO_IRQ(BALLOON3_GPIO_S0_CD)
 
 #define BALLOON3_NR_IRQS        (IRQ_BOARD_START + 16)
 
diff --git a/arch/arm/mach-pxa/include/mach/corgi.h b/arch/arm/mach-pxa/include/mach/corgi.h
index 5dfd1195a5a7..f3c3493b468d 100644
--- a/arch/arm/mach-pxa/include/mach/corgi.h
+++ b/arch/arm/mach-pxa/include/mach/corgi.h
@@ -66,18 +66,18 @@
 /*
  * Corgi Interrupts
  */
-#define CORGI_IRQ_GPIO_KEY_INT          IRQ_GPIO(0)
-#define CORGI_IRQ_GPIO_AC_IN            IRQ_GPIO(1)
-#define CORGI_IRQ_GPIO_WAKEUP           IRQ_GPIO(3)
-#define CORGI_IRQ_GPIO_AK_INT           IRQ_GPIO(4)
-#define CORGI_IRQ_GPIO_TP_INT           IRQ_GPIO(5)
-#define CORGI_IRQ_GPIO_nSD_DETECT       IRQ_GPIO(9)
-#define CORGI_IRQ_GPIO_nSD_INT          IRQ_GPIO(10)
-#define CORGI_IRQ_GPIO_MAIN_BAT_LOW     IRQ_GPIO(11)
-#define CORGI_IRQ_GPIO_CF_CD            IRQ_GPIO(14)
-#define CORGI_IRQ_GPIO_CHRG_FULL        IRQ_GPIO(16)    /* Battery fully charged */
-#define CORGI_IRQ_GPIO_CF_IRQ           IRQ_GPIO(17)
-#define CORGI_IRQ_GPIO_KEY_SENSE(a)     IRQ_GPIO(58+(a))        /* Keyboard Sense lines */
+#define CORGI_IRQ_GPIO_KEY_INT          PXA_GPIO_TO_IRQ(0)
+#define CORGI_IRQ_GPIO_AC_IN            PXA_GPIO_TO_IRQ(1)
+#define CORGI_IRQ_GPIO_WAKEUP           PXA_GPIO_TO_IRQ(3)
+#define CORGI_IRQ_GPIO_AK_INT           PXA_GPIO_TO_IRQ(4)
+#define CORGI_IRQ_GPIO_TP_INT           PXA_GPIO_TO_IRQ(5)
+#define CORGI_IRQ_GPIO_nSD_DETECT       PXA_GPIO_TO_IRQ(9)
+#define CORGI_IRQ_GPIO_nSD_INT          PXA_GPIO_TO_IRQ(10)
+#define CORGI_IRQ_GPIO_MAIN_BAT_LOW     PXA_GPIO_TO_IRQ(11)
+#define CORGI_IRQ_GPIO_CF_CD            PXA_GPIO_TO_IRQ(14)
+#define CORGI_IRQ_GPIO_CHRG_FULL        PXA_GPIO_TO_IRQ(16)     /* Battery fully charged */
+#define CORGI_IRQ_GPIO_CF_IRQ           PXA_GPIO_TO_IRQ(17)
+#define CORGI_IRQ_GPIO_KEY_SENSE(a)     PXA_GPIO_TO_IRQ(58+(a)) /* Keyboard Sense lines */
 
 
 /*
@@ -98,7 +98,7 @@
                         CORGI_SCP_MIC_BIAS )
 #define CORGI_SCOOP_IO_OUT      ( CORGI_SCP_MUTE_L | CORGI_SCP_MUTE_R )
 
-#define CORGI_SCOOP_GPIO_BASE           (NR_BUILTIN_GPIO)
+#define CORGI_SCOOP_GPIO_BASE           (PXA_NR_BUILTIN_GPIO)
 #define CORGI_GPIO_LED_GREEN            (CORGI_SCOOP_GPIO_BASE + 0)
 #define CORGI_GPIO_SWA                  (CORGI_SCOOP_GPIO_BASE + 1)  /* Hinge Switch A */
 #define CORGI_GPIO_SWB                  (CORGI_SCOOP_GPIO_BASE + 2)  /* Hinge Switch B */
diff --git a/arch/arm/mach-pxa/include/mach/csb726.h b/arch/arm/mach-pxa/include/mach/csb726.h
index 747ab1a71f2f..2628e7b72116 100644
--- a/arch/arm/mach-pxa/include/mach/csb726.h
+++ b/arch/arm/mach-pxa/include/mach/csb726.h
@@ -19,8 +19,8 @@
 #define CSB726_FLASH_SIZE       (64 * 1024 * 1024)
 #define CSB726_FLASH_uMON       (8 * 1024 * 1024)
 
-#define CSB726_IRQ_LAN          gpio_to_irq(CSB726_GPIO_IRQ_LAN)
-#define CSB726_IRQ_SM501        gpio_to_irq(CSB726_GPIO_IRQ_SM501)
+#define CSB726_IRQ_LAN          PXA_GPIO_TO_IRQ(CSB726_GPIO_IRQ_LAN)
+#define CSB726_IRQ_SM501        PXA_GPIO_TO_IRQ(CSB726_GPIO_IRQ_SM501)
 
 #endif
 
diff --git a/arch/arm/mach-pxa/include/mach/gpio-pxa.h b/arch/arm/mach-pxa/include/mach/gpio-pxa.h
deleted file mode 100644
index 41b4c93a96c2..000000000000
--- a/arch/arm/mach-pxa/include/mach/gpio-pxa.h
+++ /dev/null
@@ -1,133 +0,0 @@
-/*
- * Written by Philipp Zabel <philipp.zabel@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- */
-#ifndef __MACH_PXA_GPIO_PXA_H
-#define __MACH_PXA_GPIO_PXA_H
-
-#include <mach/irqs.h>
-#include <mach/hardware.h>
-
-#define GPIO_REGS_VIRT  io_p2v(0x40E00000)
-
-#define BANK_OFF(n)     (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
-#define GPIO_REG(x)     (*(volatile u32 *)(GPIO_REGS_VIRT + (x)))
-
-/* GPIO Pin Level Registers */
-#define GPLR0           GPIO_REG(BANK_OFF(0) + 0x00)
-#define GPLR1           GPIO_REG(BANK_OFF(1) + 0x00)
-#define GPLR2           GPIO_REG(BANK_OFF(2) + 0x00)
-#define GPLR3           GPIO_REG(BANK_OFF(3) + 0x00)
-
-/* GPIO Pin Direction Registers */
-#define GPDR0           GPIO_REG(BANK_OFF(0) + 0x0c)
-#define GPDR1           GPIO_REG(BANK_OFF(1) + 0x0c)
-#define GPDR2           GPIO_REG(BANK_OFF(2) + 0x0c)
-#define GPDR3           GPIO_REG(BANK_OFF(3) + 0x0c)
-
-/* GPIO Pin Output Set Registers */
-#define GPSR0           GPIO_REG(BANK_OFF(0) + 0x18)
-#define GPSR1           GPIO_REG(BANK_OFF(1) + 0x18)
-#define GPSR2           GPIO_REG(BANK_OFF(2) + 0x18)
-#define GPSR3           GPIO_REG(BANK_OFF(3) + 0x18)
-
-/* GPIO Pin Output Clear Registers */
-#define GPCR0           GPIO_REG(BANK_OFF(0) + 0x24)
-#define GPCR1           GPIO_REG(BANK_OFF(1) + 0x24)
-#define GPCR2           GPIO_REG(BANK_OFF(2) + 0x24)
-#define GPCR3           GPIO_REG(BANK_OFF(3) + 0x24)
-
-/* GPIO Rising Edge Detect Registers */
-#define GRER0           GPIO_REG(BANK_OFF(0) + 0x30)
-#define GRER1           GPIO_REG(BANK_OFF(1) + 0x30)
-#define GRER2           GPIO_REG(BANK_OFF(2) + 0x30)
-#define GRER3           GPIO_REG(BANK_OFF(3) + 0x30)
-
-/* GPIO Falling Edge Detect Registers */
-#define GFER0           GPIO_REG(BANK_OFF(0) + 0x3c)
-#define GFER1           GPIO_REG(BANK_OFF(1) + 0x3c)
-#define GFER2           GPIO_REG(BANK_OFF(2) + 0x3c)
-#define GFER3           GPIO_REG(BANK_OFF(3) + 0x3c)
-
-/* GPIO Edge Detect Status Registers */
-#define GEDR0           GPIO_REG(BANK_OFF(0) + 0x48)
-#define GEDR1           GPIO_REG(BANK_OFF(1) + 0x48)
-#define GEDR2           GPIO_REG(BANK_OFF(2) + 0x48)
-#define GEDR3           GPIO_REG(BANK_OFF(3) + 0x48)
-
-/* GPIO Alternate Function Select Registers */
-#define GAFR0_L         GPIO_REG(0x0054)
-#define GAFR0_U         GPIO_REG(0x0058)
-#define GAFR1_L         GPIO_REG(0x005C)
-#define GAFR1_U         GPIO_REG(0x0060)
-#define GAFR2_L         GPIO_REG(0x0064)
-#define GAFR2_U         GPIO_REG(0x0068)
-#define GAFR3_L         GPIO_REG(0x006C)
-#define GAFR3_U         GPIO_REG(0x0070)
-
-/* More handy macros.  The argument is a literal GPIO number. */
-
-#define GPIO_bit(x)     (1 << ((x) & 0x1f))
-
-#define GPLR(x)         GPIO_REG(BANK_OFF((x) >> 5) + 0x00)
-#define GPDR(x)         GPIO_REG(BANK_OFF((x) >> 5) + 0x0c)
-#define GPSR(x)         GPIO_REG(BANK_OFF((x) >> 5) + 0x18)
-#define GPCR(x)         GPIO_REG(BANK_OFF((x) >> 5) + 0x24)
-#define GRER(x)         GPIO_REG(BANK_OFF((x) >> 5) + 0x30)
-#define GFER(x)         GPIO_REG(BANK_OFF((x) >> 5) + 0x3c)
-#define GEDR(x)         GPIO_REG(BANK_OFF((x) >> 5) + 0x48)
-#define GAFR(x)         GPIO_REG(0x54 + (((x) & 0x70) >> 2))
-
-
-#define NR_BUILTIN_GPIO         PXA_GPIO_IRQ_NUM
-
-#define gpio_to_bank(gpio)      ((gpio) >> 5)
-
-#ifdef CONFIG_CPU_PXA26x
-/* GPIO86/87/88/89 on PXA26x have their direction bits in GPDR2 inverted,
- * as well as their Alternate Function value being '1' for GPIO in GAFRx.
- */
-static inline int __gpio_is_inverted(unsigned gpio)
-{
-        return cpu_is_pxa25x() && gpio > 85;
-}
-#else
-static inline int __gpio_is_inverted(unsigned gpio) { return 0; }
-#endif
-
-/*
- * On PXA25x and PXA27x, GAFRx and GPDRx together decide the alternate
- * function of a GPIO, and GPDRx cannot be altered once configured. It
- * is attributed as "occupied" here (I know this terminology isn't
- * accurate, you are welcome to propose a better one :-)
- */
-static inline int __gpio_is_occupied(unsigned gpio)
-{
-        if (cpu_is_pxa27x() || cpu_is_pxa25x()) {
-                int af = (GAFR(gpio) >> ((gpio & 0xf) * 2)) & 0x3;
-                int dir = GPDR(gpio) & GPIO_bit(gpio);
-
-                if (__gpio_is_inverted(gpio))
-                        return af != 1 || dir == 0;
-                else
-                        return af != 0 || dir != 0;
-        } else
-                return GPDR(gpio) & GPIO_bit(gpio);
-}
-
-#include <plat/gpio-pxa.h>
-#endif /* __MACH_PXA_GPIO_PXA_H */
diff --git a/arch/arm/mach-pxa/include/mach/gpio.h b/arch/arm/mach-pxa/include/mach/gpio.h
index 004cade7bb13..0248e433bc98 100644
--- a/arch/arm/mach-pxa/include/mach/gpio.h
+++ b/arch/arm/mach-pxa/include/mach/gpio.h
@@ -25,24 +25,8 @@
 #define __ASM_ARCH_PXA_GPIO_H
 
 #include <asm-generic/gpio.h>
-/* The defines for the driver are needed for the accelerated accessors */
-#include "gpio-pxa.h"
 
-#define gpio_to_irq(gpio)       IRQ_GPIO(gpio)
+#include <mach/irqs.h>
+#include <mach/hardware.h>
 
-static inline int irq_to_gpio(unsigned int irq)
-{
-        int gpio;
-
-        if (irq == IRQ_GPIO0 || irq == IRQ_GPIO1)
-                return irq - IRQ_GPIO0;
-
-        gpio = irq - PXA_GPIO_IRQ_BASE;
-        if (gpio >= 2 && gpio < NR_BUILTIN_GPIO)
-                return gpio;
-
-        return -1;
-}
-
-#include <plat/gpio.h>
 #endif
diff --git a/arch/arm/mach-pxa/include/mach/gumstix.h b/arch/arm/mach-pxa/include/mach/gumstix.h
index 9b898680b206..dba14b6503ad 100644
--- a/arch/arm/mach-pxa/include/mach/gumstix.h
+++ b/arch/arm/mach-pxa/include/mach/gumstix.h
@@ -24,7 +24,7 @@ has detected a cable insertion; driven low otherwise. */
 #define GPIO_GUMSTIX_USB_GPIOx          41
 
 /* usb state change */
-#define GUMSTIX_USB_INTR_IRQ            IRQ_GPIO(GPIO_GUMSTIX_USB_GPIOn)
+#define GUMSTIX_USB_INTR_IRQ            PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_USB_GPIOn)
 
 #define GPIO_GUMSTIX_USB_GPIOn_MD       (GPIO_GUMSTIX_USB_GPIOn | GPIO_IN)
 #define GPIO_GUMSTIX_USB_GPIOx_CON_MD   (GPIO_GUMSTIX_USB_GPIOx | GPIO_OUT)
@@ -35,7 +35,7 @@ has detected a cable insertion; driven low otherwise. */
  */
 #define GUMSTIX_GPIO_nSD_WP             22 /* SD Write Protect */
 #define GUMSTIX_GPIO_nSD_DETECT         11 /* MMC/SD Card Detect */
-#define GUMSTIX_IRQ_GPIO_nSD_DETECT     IRQ_GPIO(GUMSTIX_GPIO_nSD_DETECT)
+#define GUMSTIX_IRQ_GPIO_nSD_DETECT     PXA_GPIO_TO_IRQ(GUMSTIX_GPIO_nSD_DETECT)
 
 /*
  * SMC Ethernet definitions
@@ -49,10 +49,10 @@ has detected a cable insertion; driven low otherwise. */
 
 #define GPIO_GUMSTIX_ETH0               36
 #define GPIO_GUMSTIX_ETH0_MD            (GPIO_GUMSTIX_ETH0 | GPIO_IN)
-#define GUMSTIX_ETH0_IRQ                IRQ_GPIO(GPIO_GUMSTIX_ETH0)
+#define GUMSTIX_ETH0_IRQ                PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH0)
 #define GPIO_GUMSTIX_ETH1               27
 #define GPIO_GUMSTIX_ETH1_MD            (GPIO_GUMSTIX_ETH1 | GPIO_IN)
-#define GUMSTIX_ETH1_IRQ                IRQ_GPIO(GPIO_GUMSTIX_ETH1)
+#define GUMSTIX_ETH1_IRQ                PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH1)
 
 
 /* CF reset line */
@@ -63,18 +63,18 @@ has detected a cable insertion; driven low otherwise. */
 #define GPIO4_nSTSCHG                   GPIO4_nBVD1
 #define GPIO11_nCD                      11
 #define GPIO26_PRDY_nBSY                26
-#define GUMSTIX_S0_nSTSCHG_IRQ          IRQ_GPIO(GPIO4_nSTSCHG)
-#define GUMSTIX_S0_nCD_IRQ              IRQ_GPIO(GPIO11_nCD)
-#define GUMSTIX_S0_PRDY_nBSY_IRQ        IRQ_GPIO(GPIO26_PRDY_nBSY)
+#define GUMSTIX_S0_nSTSCHG_IRQ          PXA_GPIO_TO_IRQ(GPIO4_nSTSCHG)
+#define GUMSTIX_S0_nCD_IRQ              PXA_GPIO_TO_IRQ(GPIO11_nCD)
+#define GUMSTIX_S0_PRDY_nBSY_IRQ        PXA_GPIO_TO_IRQ(GPIO26_PRDY_nBSY)
 
 /* CF slot 1 */
 #define GPIO18_nBVD1                    18
 #define GPIO18_nSTSCHG                  GPIO18_nBVD1
 #define GPIO36_nCD                      36
 #define GPIO27_PRDY_nBSY                27
-#define GUMSTIX_S1_nSTSCHG_IRQ          IRQ_GPIO(GPIO18_nSTSCHG)
-#define GUMSTIX_S1_nCD_IRQ              IRQ_GPIO(GPIO36_nCD)
-#define GUMSTIX_S1_PRDY_nBSY_IRQ        IRQ_GPIO(GPIO27_PRDY_nBSY)
+#define GUMSTIX_S1_nSTSCHG_IRQ          PXA_GPIO_TO_IRQ(GPIO18_nSTSCHG)
+#define GUMSTIX_S1_nCD_IRQ              PXA_GPIO_TO_IRQ(GPIO36_nCD)
+#define GUMSTIX_S1_PRDY_nBSY_IRQ        PXA_GPIO_TO_IRQ(GPIO27_PRDY_nBSY)
 
 /* CF GPIO line modes */
 #define GPIO4_nSTSCHG_MD                (GPIO4_nSTSCHG | GPIO_IN)
diff --git a/arch/arm/mach-pxa/include/mach/hx4700.h b/arch/arm/mach-pxa/include/mach/hx4700.h
index 37408449ec25..8bc02913517c 100644
--- a/arch/arm/mach-pxa/include/mach/hx4700.h
+++ b/arch/arm/mach-pxa/include/mach/hx4700.h
@@ -15,7 +15,7 @@
 #include <linux/gpio.h>
 #include <linux/mfd/asic3.h>
 
-#define HX4700_ASIC3_GPIO_BASE  NR_BUILTIN_GPIO
+#define HX4700_ASIC3_GPIO_BASE  PXA_NR_BUILTIN_GPIO
 #define HX4700_EGPIO_BASE       (HX4700_ASIC3_GPIO_BASE + ASIC3_NUM_GPIOS)
 #define HX4700_NR_IRQS          (IRQ_BOARD_START + 70)
 
diff --git a/arch/arm/mach-pxa/include/mach/idp.h b/arch/arm/mach-pxa/include/mach/idp.h
index 5eff96fcc944..22a96f87232b 100644
--- a/arch/arm/mach-pxa/include/mach/idp.h
+++ b/arch/arm/mach-pxa/include/mach/idp.h
@@ -131,28 +131,26 @@
 #define PCC_VS2         (1 << 1)
 #define PCC_VS1         (1 << 0)
 
-#define PCC_DETECT(x)   (GPLR(7 + (x)) & GPIO_bit(7 + (x)))
-
 /* A listing of interrupts used by external hardware devices */
 
-#define TOUCH_PANEL_IRQ                 IRQ_GPIO(5)
-#define IDE_IRQ                         IRQ_GPIO(21)
+#define TOUCH_PANEL_IRQ                 PXA_GPIO_TO_IRQ(5)
+#define IDE_IRQ                         PXA_GPIO_TO_IRQ(21)
 
 #define TOUCH_PANEL_IRQ_EDGE            IRQ_TYPE_EDGE_FALLING
 
-#define ETHERNET_IRQ                    IRQ_GPIO(4)
+#define ETHERNET_IRQ                    PXA_GPIO_TO_IRQ(4)
 #define ETHERNET_IRQ_EDGE               IRQ_TYPE_EDGE_RISING
 
 #define IDE_IRQ_EDGE                    IRQ_TYPE_EDGE_RISING
 
-#define PCMCIA_S0_CD_VALID              IRQ_GPIO(7)
+#define PCMCIA_S0_CD_VALID              PXA_GPIO_TO_IRQ(7)
 #define PCMCIA_S0_CD_VALID_EDGE         IRQ_TYPE_EDGE_BOTH
 
-#define PCMCIA_S1_CD_VALID              IRQ_GPIO(8)
+#define PCMCIA_S1_CD_VALID              PXA_GPIO_TO_IRQ(8)
 #define PCMCIA_S1_CD_VALID_EDGE         IRQ_TYPE_EDGE_BOTH
 
-#define PCMCIA_S0_RDYINT                IRQ_GPIO(19)
-#define PCMCIA_S1_RDYINT                IRQ_GPIO(22)
+#define PCMCIA_S0_RDYINT                PXA_GPIO_TO_IRQ(19)
+#define PCMCIA_S1_RDYINT                PXA_GPIO_TO_IRQ(22)
 
 
 /*
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h
index 7cc5a781e99e..32975adf3ca4 100644
--- a/arch/arm/mach-pxa/include/mach/irqs.h
+++ b/arch/arm/mach-pxa/include/mach/irqs.h
@@ -88,10 +88,8 @@
 #define IRQ_U2P         PXA_IRQ(93)     /* USB PHY D+/D- Lines (PXA935) */
 
 #define PXA_GPIO_IRQ_BASE       PXA_IRQ(96)
-#define PXA_GPIO_IRQ_NUM        (192)
-
-#define GPIO_2_x_TO_IRQ(x)      (PXA_GPIO_IRQ_BASE + (x))
-#define IRQ_GPIO(x)     (((x) < 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_x_TO_IRQ(x))
+#define PXA_NR_BUILTIN_GPIO     (192)
+#define PXA_GPIO_TO_IRQ(x)      (PXA_GPIO_IRQ_BASE + (x))
 
 /*
  * The following interrupts are for board specific purposes. Since
@@ -100,7 +98,7 @@
  * By default, no board IRQ is reserved. It should be finished in
  * custom board since sparse IRQ is already enabled.
  */
-#define IRQ_BOARD_START         (PXA_GPIO_IRQ_BASE + PXA_GPIO_IRQ_NUM)
+#define IRQ_BOARD_START         (PXA_GPIO_IRQ_BASE + PXA_NR_BUILTIN_GPIO)
 
 #define NR_IRQS                 (IRQ_BOARD_START)
 
diff --git a/arch/arm/mach-pxa/include/mach/littleton.h b/arch/arm/mach-pxa/include/mach/littleton.h
index b6238cbd8aea..8066be54e9f5 100644
--- a/arch/arm/mach-pxa/include/mach/littleton.h
+++ b/arch/arm/mach-pxa/include/mach/littleton.h
@@ -1,13 +1,11 @@
 #ifndef __ASM_ARCH_LITTLETON_H
 #define __ASM_ARCH_LITTLETON_H
 
-#include <mach/gpio-pxa.h>
-
 #define LITTLETON_ETH_PHYS      0x30000000
 
 #define LITTLETON_GPIO_LCD_CS   (17)
 
-#define EXT0_GPIO_BASE  (NR_BUILTIN_GPIO)
+#define EXT0_GPIO_BASE  (PXA_NR_BUILTIN_GPIO)
 #define EXT0_GPIO(x)    (EXT0_GPIO_BASE + (x))
 
 #define LITTLETON_NR_IRQS       (IRQ_BOARD_START + 8)
diff --git a/arch/arm/mach-pxa/include/mach/magician.h b/arch/arm/mach-pxa/include/mach/magician.h
index 7cbfc5d3f9df..ba6a6e1d29e9 100644
--- a/arch/arm/mach-pxa/include/mach/magician.h
+++ b/arch/arm/mach-pxa/include/mach/magician.h
@@ -78,7 +78,7 @@
  * CPLD EGPIOs
  */
 
-#define MAGICIAN_EGPIO_BASE                     NR_BUILTIN_GPIO
+#define MAGICIAN_EGPIO_BASE                     PXA_NR_BUILTIN_GPIO
 #define MAGICIAN_EGPIO(reg,bit) \
         (MAGICIAN_EGPIO_BASE + 8*reg + bit)
 
diff --git a/arch/arm/mach-pxa/include/mach/palmld.h b/arch/arm/mach-pxa/include/mach/palmld.h
index ae536e86d8e8..2c4471336570 100644
--- a/arch/arm/mach-pxa/include/mach/palmld.h
+++ b/arch/arm/mach-pxa/include/mach/palmld.h
@@ -68,10 +68,10 @@
 /* 20, 53 and 86 are usb related too */
 
 /* INTERRUPTS */
-#define IRQ_GPIO_PALMLD_GPIO_RESET      IRQ_GPIO(GPIO_NR_PALMLD_GPIO_RESET)
-#define IRQ_GPIO_PALMLD_SD_DETECT_N     IRQ_GPIO(GPIO_NR_PALMLD_SD_DETECT_N)
-#define IRQ_GPIO_PALMLD_WM9712_IRQ      IRQ_GPIO(GPIO_NR_PALMLD_WM9712_IRQ)
-#define IRQ_GPIO_PALMLD_IDE_IRQ         IRQ_GPIO(GPIO_NR_PALMLD_IDE_IRQ)
+#define IRQ_GPIO_PALMLD_GPIO_RESET      PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_GPIO_RESET)
+#define IRQ_GPIO_PALMLD_SD_DETECT_N     PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_SD_DETECT_N)
+#define IRQ_GPIO_PALMLD_WM9712_IRQ      PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_WM9712_IRQ)
+#define IRQ_GPIO_PALMLD_IDE_IRQ         PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_IDE_IRQ)
 
 
 /** HERE ARE INIT VALUES **/
diff --git a/arch/arm/mach-pxa/include/mach/palmt5.h b/arch/arm/mach-pxa/include/mach/palmt5.h
index 6baf7469d4ec..0bd4f036c72f 100644
--- a/arch/arm/mach-pxa/include/mach/palmt5.h
+++ b/arch/arm/mach-pxa/include/mach/palmt5.h
@@ -48,10 +48,10 @@
 #define GPIO_NR_PALMT5_BT_RESET                 83
 
 /* INTERRUPTS */
-#define IRQ_GPIO_PALMT5_SD_DETECT_N     IRQ_GPIO(GPIO_NR_PALMT5_SD_DETECT_N)
-#define IRQ_GPIO_PALMT5_WM9712_IRQ      IRQ_GPIO(GPIO_NR_PALMT5_WM9712_IRQ)
-#define IRQ_GPIO_PALMT5_USB_DETECT      IRQ_GPIO(GPIO_NR_PALMT5_USB_DETECT)
-#define IRQ_GPIO_PALMT5_GPIO_RESET      IRQ_GPIO(GPIO_NR_PALMT5_GPIO_RESET)
+#define IRQ_GPIO_PALMT5_SD_DETECT_N     PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_SD_DETECT_N)
+#define IRQ_GPIO_PALMT5_WM9712_IRQ      PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_WM9712_IRQ)
+#define IRQ_GPIO_PALMT5_USB_DETECT      PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_USB_DETECT)
+#define IRQ_GPIO_PALMT5_GPIO_RESET      PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_GPIO_RESET)
 
 /** HERE ARE INIT VALUES **/
 
diff --git a/arch/arm/mach-pxa/include/mach/palmtc.h b/arch/arm/mach-pxa/include/mach/palmtc.h
index 3f9dd3fd4638..c383a21680b6 100644
--- a/arch/arm/mach-pxa/include/mach/palmtc.h
+++ b/arch/arm/mach-pxa/include/mach/palmtc.h
@@ -52,8 +52,8 @@
 #define GPIO_NR_PALMTC_IR_DISABLE       45
 
 /* IRQs */
-#define IRQ_GPIO_PALMTC_SD_DETECT_N     IRQ_GPIO(GPIO_NR_PALMTC_SD_DETECT_N)
-#define IRQ_GPIO_PALMTC_WLAN_READY      IRQ_GPIO(GPIO_NR_PALMTC_WLAN_READY)
+#define IRQ_GPIO_PALMTC_SD_DETECT_N     PXA_GPIO_TO_IRQ(GPIO_NR_PALMTC_SD_DETECT_N)
+#define IRQ_GPIO_PALMTC_WLAN_READY      PXA_GPIO_TO_IRQ(GPIO_NR_PALMTC_WLAN_READY)
 
 /* UCB1400 GPIOs */
 #define GPIO_NR_PALMTC_POWER_DETECT     (0x80 | 0x00)
diff --git a/arch/arm/mach-pxa/include/mach/palmtx.h b/arch/arm/mach-pxa/include/mach/palmtx.h
index 7074a6ed46c6..f2e530380253 100644
--- a/arch/arm/mach-pxa/include/mach/palmtx.h
+++ b/arch/arm/mach-pxa/include/mach/palmtx.h
@@ -62,10 +62,10 @@
 #define GPIO_NR_PALMTX_NAND_BUFFER_DIR          79
 
 /* INTERRUPTS */
-#define IRQ_GPIO_PALMTX_SD_DETECT_N     IRQ_GPIO(GPIO_NR_PALMTX_SD_DETECT_N)
-#define IRQ_GPIO_PALMTX_WM9712_IRQ      IRQ_GPIO(GPIO_NR_PALMTX_WM9712_IRQ)
-#define IRQ_GPIO_PALMTX_USB_DETECT      IRQ_GPIO(GPIO_NR_PALMTX_USB_DETECT)
-#define IRQ_GPIO_PALMTX_GPIO_RESET      IRQ_GPIO(GPIO_NR_PALMTX_GPIO_RESET)
+#define IRQ_GPIO_PALMTX_SD_DETECT_N     PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_SD_DETECT_N)
+#define IRQ_GPIO_PALMTX_WM9712_IRQ      PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_WM9712_IRQ)
+#define IRQ_GPIO_PALMTX_USB_DETECT      PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_USB_DETECT)
+#define IRQ_GPIO_PALMTX_GPIO_RESET      PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_GPIO_RESET)
 
 /** HERE ARE INIT VALUES **/
 
diff --git a/arch/arm/mach-pxa/include/mach/pcm027.h b/arch/arm/mach-pxa/include/mach/pcm027.h
index 4bac588478a8..6bf28de228bd 100644
--- a/arch/arm/mach-pxa/include/mach/pcm027.h
+++ b/arch/arm/mach-pxa/include/mach/pcm027.h
@@ -34,7 +34,7 @@
 
 /* I2C RTC */
 #define PCM027_RTC_IRQ_GPIO     0
-#define PCM027_RTC_IRQ          IRQ_GPIO(PCM027_RTC_IRQ_GPIO)
+#define PCM027_RTC_IRQ          PXA_GPIO_TO_IRQ(PCM027_RTC_IRQ_GPIO)
 #define PCM027_RTC_IRQ_EDGE     IRQ_TYPE_EDGE_FALLING
 #define ADR_PCM027_RTC          0x51    /* I2C address */
 
@@ -43,21 +43,21 @@
 
 /* Ethernet chip (SMSC91C111) */
 #define PCM027_ETH_IRQ_GPIO     52
-#define PCM027_ETH_IRQ          IRQ_GPIO(PCM027_ETH_IRQ_GPIO)
+#define PCM027_ETH_IRQ          PXA_GPIO_TO_IRQ(PCM027_ETH_IRQ_GPIO)
 #define PCM027_ETH_IRQ_EDGE     IRQ_TYPE_EDGE_RISING
 #define PCM027_ETH_PHYS         PXA_CS5_PHYS
 #define PCM027_ETH_SIZE         (1*1024*1024)
 
 /* CAN controller SJA1000 (unsupported yet) */
 #define PCM027_CAN_IRQ_GPIO     114
-#define PCM027_CAN_IRQ          IRQ_GPIO(PCM027_CAN_IRQ_GPIO)
+#define PCM027_CAN_IRQ          PXA_GPIO_TO_IRQ(PCM027_CAN_IRQ_GPIO)
 #define PCM027_CAN_IRQ_EDGE     IRQ_TYPE_EDGE_FALLING
 #define PCM027_CAN_PHYS         0x22000000
 #define PCM027_CAN_SIZE         0x100
 
 /* SPI GPIO expander (unsupported yet) */
 #define PCM027_EGPIO_IRQ_GPIO   27
-#define PCM027_EGPIO_IRQ        IRQ_GPIO(PCM027_EGPIO_IRQ_GPIO)
+#define PCM027_EGPIO_IRQ        PXA_GPIO_TO_IRQ(PCM027_EGPIO_IRQ_GPIO)
 #define PCM027_EGPIO_IRQ_EDGE   IRQ_TYPE_EDGE_FALLING
 #define PCM027_EGPIO_CS         24
 /*
diff --git a/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h b/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h
index 8a4383b776d7..d72791695b26 100644
--- a/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h
+++ b/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h
@@ -28,14 +28,14 @@
 
 /* CPLD's interrupt controller is connected to PCM-027 GPIO 9 */
 #define PCM990_CTRL_INT_IRQ_GPIO        9
-#define PCM990_CTRL_INT_IRQ             IRQ_GPIO(PCM990_CTRL_INT_IRQ_GPIO)
+#define PCM990_CTRL_INT_IRQ             PXA_GPIO_TO_IRQ(PCM990_CTRL_INT_IRQ_GPIO)
 #define PCM990_CTRL_INT_IRQ_EDGE        IRQ_TYPE_EDGE_RISING
 #define PCM990_CTRL_PHYS                PXA_CS1_PHYS    /* 16-Bit */
 #define PCM990_CTRL_BASE                0xea000000
 #define PCM990_CTRL_SIZE                (1*1024*1024)
 
 #define PCM990_CTRL_PWR_IRQ_GPIO        14
-#define PCM990_CTRL_PWR_IRQ             IRQ_GPIO(PCM990_CTRL_PWR_IRQ_GPIO)
+#define PCM990_CTRL_PWR_IRQ             PXA_GPIO_TO_IRQ(PCM990_CTRL_PWR_IRQ_GPIO)
 #define PCM990_CTRL_PWR_IRQ_EDGE        IRQ_TYPE_EDGE_RISING
 
 /* visible CPLD (U7) registers */
@@ -132,7 +132,7 @@
  * IDE
  */
 #define PCM990_IDE_IRQ_GPIO     13
-#define PCM990_IDE_IRQ          IRQ_GPIO(PCM990_IDE_IRQ_GPIO)
+#define PCM990_IDE_IRQ          PXA_GPIO_TO_IRQ(PCM990_IDE_IRQ_GPIO)
 #define PCM990_IDE_IRQ_EDGE     IRQ_TYPE_EDGE_RISING
 #define PCM990_IDE_PLD_PHYS     0x20000000      /* 16 bit wide */
 #define PCM990_IDE_PLD_BASE     0xee000000
@@ -188,11 +188,11 @@
  * Compact Flash
  */
 #define PCM990_CF_IRQ_GPIO      11
-#define PCM990_CF_IRQ           IRQ_GPIO(PCM990_CF_IRQ_GPIO)
+#define PCM990_CF_IRQ           PXA_GPIO_TO_IRQ(PCM990_CF_IRQ_GPIO)
 #define PCM990_CF_IRQ_EDGE      IRQ_TYPE_EDGE_RISING
 
 #define PCM990_CF_CD_GPIO       12
-#define PCM990_CF_CD            IRQ_GPIO(PCM990_CF_CD_GPIO)
+#define PCM990_CF_CD            PXA_GPIO_TO_IRQ(PCM990_CF_CD_GPIO)
 #define PCM990_CF_CD_EDGE       IRQ_TYPE_EDGE_RISING
 
 #define PCM990_CF_PLD_PHYS      0x30000000      /* 16 bit wide */
@@ -258,14 +258,14 @@
  * Wolfson AC97 Touch
  */
 #define PCM990_AC97_IRQ_GPIO    10
-#define PCM990_AC97_IRQ         IRQ_GPIO(PCM990_AC97_IRQ_GPIO)
+#define PCM990_AC97_IRQ         PXA_GPIO_TO_IRQ(PCM990_AC97_IRQ_GPIO)
 #define PCM990_AC97_IRQ_EDGE    IRQ_TYPE_EDGE_RISING
 
 /*
  * MMC phyCORE
  */
 #define PCM990_MMC0_IRQ_GPIO    9
-#define PCM990_MMC0_IRQ         IRQ_GPIO(PCM990_MMC0_IRQ_GPIO)
+#define PCM990_MMC0_IRQ         PXA_GPIO_TO_IRQ(PCM990_MMC0_IRQ_GPIO)
 #define PCM990_MMC0_IRQ_EDGE    IRQ_TYPE_EDGE_FALLING
 
 /*
diff --git a/arch/arm/mach-pxa/include/mach/poodle.h b/arch/arm/mach-pxa/include/mach/poodle.h
index 83d1cfd00fc9..f32ff75dcca8 100644
--- a/arch/arm/mach-pxa/include/mach/poodle.h
+++ b/arch/arm/mach-pxa/include/mach/poodle.h
@@ -47,18 +47,18 @@
 #define POODLE_GPIO_DISCHARGE_ON        (42) /* Enable battery discharge */
 
 /* PXA GPIOs */
-#define POODLE_IRQ_GPIO_ON_KEY          IRQ_GPIO(0)
-#define POODLE_IRQ_GPIO_AC_IN           IRQ_GPIO(1)
-#define POODLE_IRQ_GPIO_HP_IN           IRQ_GPIO(4)
-#define POODLE_IRQ_GPIO_CO              IRQ_GPIO(16)
-#define POODLE_IRQ_GPIO_TP_INT          IRQ_GPIO(5)
-#define POODLE_IRQ_GPIO_WAKEUP          IRQ_GPIO(11)
-#define POODLE_IRQ_GPIO_GA_INT          IRQ_GPIO(10)
-#define POODLE_IRQ_GPIO_CF_IRQ          IRQ_GPIO(17)
-#define POODLE_IRQ_GPIO_CF_CD           IRQ_GPIO(14)
-#define POODLE_IRQ_GPIO_nSD_INT         IRQ_GPIO(8)
-#define POODLE_IRQ_GPIO_nSD_DETECT      IRQ_GPIO(9)
-#define POODLE_IRQ_GPIO_MAIN_BAT_LOW    IRQ_GPIO(13)
+#define POODLE_IRQ_GPIO_ON_KEY          PXA_GPIO_TO_IRQ(0)
+#define POODLE_IRQ_GPIO_AC_IN           PXA_GPIO_TO_IRQ(1)
+#define POODLE_IRQ_GPIO_HP_IN           PXA_GPIO_TO_IRQ(4)
+#define POODLE_IRQ_GPIO_CO              PXA_GPIO_TO_IRQ(16)
+#define POODLE_IRQ_GPIO_TP_INT          PXA_GPIO_TO_IRQ(5)
+#define POODLE_IRQ_GPIO_WAKEUP          PXA_GPIO_TO_IRQ(11)
+#define POODLE_IRQ_GPIO_GA_INT          PXA_GPIO_TO_IRQ(10)
+#define POODLE_IRQ_GPIO_CF_IRQ          PXA_GPIO_TO_IRQ(17)
+#define POODLE_IRQ_GPIO_CF_CD           PXA_GPIO_TO_IRQ(14)
+#define POODLE_IRQ_GPIO_nSD_INT         PXA_GPIO_TO_IRQ(8)
+#define POODLE_IRQ_GPIO_nSD_DETECT      PXA_GPIO_TO_IRQ(9)
+#define POODLE_IRQ_GPIO_MAIN_BAT_LOW    PXA_GPIO_TO_IRQ(13)
 
 /* SCOOP GPIOs */
 #define POODLE_SCOOP_CHARGE_ON  SCOOP_GPCR_PA11
@@ -71,7 +71,7 @@
 #define POODLE_SCOOP_IO_DIR     ( POODLE_SCOOP_VPEN | POODLE_SCOOP_HS_OUT )
 #define POODLE_SCOOP_IO_OUT     ( 0 )
 
-#define POODLE_SCOOP_GPIO_BASE  (NR_BUILTIN_GPIO)
+#define POODLE_SCOOP_GPIO_BASE  (PXA_NR_BUILTIN_GPIO)
 #define POODLE_GPIO_CHARGE_ON   (POODLE_SCOOP_GPIO_BASE + 0)
 #define POODLE_GPIO_CP401       (POODLE_SCOOP_GPIO_BASE + 2)
 #define POODLE_GPIO_VPEN        (POODLE_SCOOP_GPIO_BASE + 7)
diff --git a/arch/arm/mach-pxa/include/mach/spitz.h b/arch/arm/mach-pxa/include/mach/spitz.h
index 685749a51c42..0bfe6507c95d 100644
--- a/arch/arm/mach-pxa/include/mach/spitz.h
+++ b/arch/arm/mach-pxa/include/mach/spitz.h
@@ -108,7 +108,7 @@
 #define SPITZ_SCP_SUS_CLR     (SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON)
 #define SPITZ_SCP_SUS_SET     0
 
-#define SPITZ_SCP_GPIO_BASE     (NR_BUILTIN_GPIO)
+#define SPITZ_SCP_GPIO_BASE     (PXA_NR_BUILTIN_GPIO)
 #define SPITZ_GPIO_LED_GREEN    (SPITZ_SCP_GPIO_BASE + 0)
 #define SPITZ_GPIO_JK_B         (SPITZ_SCP_GPIO_BASE + 1)
 #define SPITZ_GPIO_CHRG_ON      (SPITZ_SCP_GPIO_BASE + 2)
@@ -140,7 +140,7 @@
                              SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS)
 #define SPITZ_SCP2_SUS_SET  (SPITZ_SCP2_IR_ON | SPITZ_SCP2_RESERVED_1)
 
-#define SPITZ_SCP2_GPIO_BASE            (NR_BUILTIN_GPIO + 12)
+#define SPITZ_SCP2_GPIO_BASE            (PXA_NR_BUILTIN_GPIO + 12)
 #define SPITZ_GPIO_IR_ON                (SPITZ_SCP2_GPIO_BASE + 0)
 #define SPITZ_GPIO_AKIN_PULLUP          (SPITZ_SCP2_GPIO_BASE + 1)
 #define SPITZ_GPIO_RESERVED_1           (SPITZ_SCP2_GPIO_BASE + 2)
@@ -152,7 +152,7 @@
 #define SPITZ_GPIO_MIC_BIAS             (SPITZ_SCP2_GPIO_BASE + 8)
 
 /* Akita IO Expander GPIOs */
-#define AKITA_IOEXP_GPIO_BASE           (NR_BUILTIN_GPIO + 12)
+#define AKITA_IOEXP_GPIO_BASE           (PXA_NR_BUILTIN_GPIO + 12)
 #define AKITA_GPIO_RESERVED_0           (AKITA_IOEXP_GPIO_BASE + 0)
 #define AKITA_GPIO_RESERVED_1           (AKITA_IOEXP_GPIO_BASE + 1)
 #define AKITA_GPIO_MIC_BIAS             (AKITA_IOEXP_GPIO_BASE + 2)
@@ -164,23 +164,23 @@
 
 /* Spitz IRQ Definitions */
 
-#define SPITZ_IRQ_GPIO_KEY_INT        IRQ_GPIO(SPITZ_GPIO_KEY_INT)
-#define SPITZ_IRQ_GPIO_AC_IN          IRQ_GPIO(SPITZ_GPIO_AC_IN)
-#define SPITZ_IRQ_GPIO_AK_INT         IRQ_GPIO(SPITZ_GPIO_AK_INT)
-#define SPITZ_IRQ_GPIO_HP_IN          IRQ_GPIO(SPITZ_GPIO_HP_IN)
-#define SPITZ_IRQ_GPIO_TP_INT         IRQ_GPIO(SPITZ_GPIO_TP_INT)
-#define SPITZ_IRQ_GPIO_SYNC           IRQ_GPIO(SPITZ_GPIO_SYNC)
-#define SPITZ_IRQ_GPIO_ON_KEY         IRQ_GPIO(SPITZ_GPIO_ON_KEY)
-#define SPITZ_IRQ_GPIO_SWA            IRQ_GPIO(SPITZ_GPIO_SWA)
-#define SPITZ_IRQ_GPIO_SWB            IRQ_GPIO(SPITZ_GPIO_SWB)
-#define SPITZ_IRQ_GPIO_BAT_COVER      IRQ_GPIO(SPITZ_GPIO_BAT_COVER)
-#define SPITZ_IRQ_GPIO_FATAL_BAT      IRQ_GPIO(SPITZ_GPIO_FATAL_BAT)
-#define SPITZ_IRQ_GPIO_CO             IRQ_GPIO(SPITZ_GPIO_CO)
-#define SPITZ_IRQ_GPIO_CF_IRQ         IRQ_GPIO(SPITZ_GPIO_CF_IRQ)
-#define SPITZ_IRQ_GPIO_CF_CD          IRQ_GPIO(SPITZ_GPIO_CF_CD)
-#define SPITZ_IRQ_GPIO_CF2_IRQ        IRQ_GPIO(SPITZ_GPIO_CF2_IRQ)
-#define SPITZ_IRQ_GPIO_nSD_INT        IRQ_GPIO(SPITZ_GPIO_nSD_INT)
-#define SPITZ_IRQ_GPIO_nSD_DETECT     IRQ_GPIO(SPITZ_GPIO_nSD_DETECT)
+#define SPITZ_IRQ_GPIO_KEY_INT        PXA_GPIO_TO_IRQ(SPITZ_GPIO_KEY_INT)
+#define SPITZ_IRQ_GPIO_AC_IN          PXA_GPIO_TO_IRQ(SPITZ_GPIO_AC_IN)
+#define SPITZ_IRQ_GPIO_AK_INT         PXA_GPIO_TO_IRQ(SPITZ_GPIO_AK_INT)
+#define SPITZ_IRQ_GPIO_HP_IN          PXA_GPIO_TO_IRQ(SPITZ_GPIO_HP_IN)
+#define SPITZ_IRQ_GPIO_TP_INT         PXA_GPIO_TO_IRQ(SPITZ_GPIO_TP_INT)
+#define SPITZ_IRQ_GPIO_SYNC           PXA_GPIO_TO_IRQ(SPITZ_GPIO_SYNC)
+#define SPITZ_IRQ_GPIO_ON_KEY         PXA_GPIO_TO_IRQ(SPITZ_GPIO_ON_KEY)
+#define SPITZ_IRQ_GPIO_SWA            PXA_GPIO_TO_IRQ(SPITZ_GPIO_SWA)
+#define SPITZ_IRQ_GPIO_SWB            PXA_GPIO_TO_IRQ(SPITZ_GPIO_SWB)
+#define SPITZ_IRQ_GPIO_BAT_COVER      PXA_GPIO_TO_IRQ(SPITZ_GPIO_BAT_COVER)
+#define SPITZ_IRQ_GPIO_FATAL_BAT      PXA_GPIO_TO_IRQ(SPITZ_GPIO_FATAL_BAT)
+#define SPITZ_IRQ_GPIO_CO             PXA_GPIO_TO_IRQ(SPITZ_GPIO_CO)
+#define SPITZ_IRQ_GPIO_CF_IRQ         PXA_GPIO_TO_IRQ(SPITZ_GPIO_CF_IRQ)
+#define SPITZ_IRQ_GPIO_CF_CD          PXA_GPIO_TO_IRQ(SPITZ_GPIO_CF_CD)
+#define SPITZ_IRQ_GPIO_CF2_IRQ        PXA_GPIO_TO_IRQ(SPITZ_GPIO_CF2_IRQ)
+#define SPITZ_IRQ_GPIO_nSD_INT        PXA_GPIO_TO_IRQ(SPITZ_GPIO_nSD_INT)
+#define SPITZ_IRQ_GPIO_nSD_DETECT     PXA_GPIO_TO_IRQ(SPITZ_GPIO_nSD_DETECT)
 
 /*
  * Shared data structures
diff --git a/arch/arm/mach-pxa/include/mach/tosa.h b/arch/arm/mach-pxa/include/mach/tosa.h
index 1272c4b56ceb..2bb0e862598c 100644
--- a/arch/arm/mach-pxa/include/mach/tosa.h
+++ b/arch/arm/mach-pxa/include/mach/tosa.h
@@ -24,7 +24,7 @@
 /*
  * SCOOP2 internal GPIOs
  */
-#define TOSA_SCOOP_GPIO_BASE            NR_BUILTIN_GPIO
+#define TOSA_SCOOP_GPIO_BASE            PXA_NR_BUILTIN_GPIO
 #define TOSA_SCOOP_PXA_VCORE1           SCOOP_GPCR_PA11
 #define TOSA_GPIO_TC6393XB_REST_IN      (TOSA_SCOOP_GPIO_BASE + 1)
 #define TOSA_GPIO_IR_POWERDWN           (TOSA_SCOOP_GPIO_BASE + 2)
@@ -42,7 +42,7 @@
 /*
  * SCOOP2 jacket GPIOs
  */
-#define TOSA_SCOOP_JC_GPIO_BASE         (NR_BUILTIN_GPIO + 12)
+#define TOSA_SCOOP_JC_GPIO_BASE         (PXA_NR_BUILTIN_GPIO + 12)
 #define TOSA_GPIO_BT_LED                (TOSA_SCOOP_JC_GPIO_BASE + 0)
 #define TOSA_GPIO_NOTE_LED              (TOSA_SCOOP_JC_GPIO_BASE + 1)
 #define TOSA_GPIO_CHRG_ERR_LED          (TOSA_SCOOP_JC_GPIO_BASE + 2)
@@ -59,7 +59,7 @@
 /*
  * TC6393XB GPIOs
  */
-#define TOSA_TC6393XB_GPIO_BASE         (NR_BUILTIN_GPIO + 2 * 12)
+#define TOSA_TC6393XB_GPIO_BASE         (PXA_NR_BUILTIN_GPIO + 2 * 12)
 
 #define TOSA_GPIO_TG_ON                 (TOSA_TC6393XB_GPIO_BASE + 0)
 #define TOSA_GPIO_L_MUTE                (TOSA_TC6393XB_GPIO_BASE + 1)
@@ -141,30 +141,30 @@
 /*
  * Interrupts
  */
-#define TOSA_IRQ_GPIO_WAKEUP            IRQ_GPIO(TOSA_GPIO_WAKEUP)
-#define TOSA_IRQ_GPIO_AC_IN             IRQ_GPIO(TOSA_GPIO_AC_IN)
-#define TOSA_IRQ_GPIO_RECORD_BTN        IRQ_GPIO(TOSA_GPIO_RECORD_BTN)
-#define TOSA_IRQ_GPIO_SYNC              IRQ_GPIO(TOSA_GPIO_SYNC)
-#define TOSA_IRQ_GPIO_USB_IN            IRQ_GPIO(TOSA_GPIO_USB_IN)
-#define TOSA_IRQ_GPIO_JACKET_DETECT     IRQ_GPIO(TOSA_GPIO_JACKET_DETECT)
-#define TOSA_IRQ_GPIO_nSD_INT           IRQ_GPIO(TOSA_GPIO_nSD_INT)
-#define TOSA_IRQ_GPIO_nSD_DETECT        IRQ_GPIO(TOSA_GPIO_nSD_DETECT)
-#define TOSA_IRQ_GPIO_BAT1_CRG          IRQ_GPIO(TOSA_GPIO_BAT1_CRG)
-#define TOSA_IRQ_GPIO_CF_CD             IRQ_GPIO(TOSA_GPIO_CF_CD)
-#define TOSA_IRQ_GPIO_BAT0_CRG          IRQ_GPIO(TOSA_GPIO_BAT0_CRG)
-#define TOSA_IRQ_GPIO_TC6393XB_INT      IRQ_GPIO(TOSA_GPIO_TC6393XB_INT)
-#define TOSA_IRQ_GPIO_BAT0_LOW          IRQ_GPIO(TOSA_GPIO_BAT0_LOW)
-#define TOSA_IRQ_GPIO_EAR_IN            IRQ_GPIO(TOSA_GPIO_EAR_IN)
-#define TOSA_IRQ_GPIO_CF_IRQ            IRQ_GPIO(TOSA_GPIO_CF_IRQ)
-#define TOSA_IRQ_GPIO_ON_KEY            IRQ_GPIO(TOSA_GPIO_ON_KEY)
-#define TOSA_IRQ_GPIO_VGA_LINE          IRQ_GPIO(TOSA_GPIO_VGA_LINE)
-#define TOSA_IRQ_GPIO_TP_INT            IRQ_GPIO(TOSA_GPIO_TP_INT)
-#define TOSA_IRQ_GPIO_JC_CF_IRQ         IRQ_GPIO(TOSA_GPIO_JC_CF_IRQ)
-#define TOSA_IRQ_GPIO_BAT_LOCKED        IRQ_GPIO(TOSA_GPIO_BAT_LOCKED)
-#define TOSA_IRQ_GPIO_BAT1_LOW          IRQ_GPIO(TOSA_GPIO_BAT1_LOW)
-#define TOSA_IRQ_GPIO_KEY_SENSE(a)      IRQ_GPIO(69+(a))
-
-#define TOSA_IRQ_GPIO_MAIN_BAT_LOW      IRQ_GPIO(TOSA_GPIO_MAIN_BAT_LOW)
+#define TOSA_IRQ_GPIO_WAKEUP            PXA_GPIO_TO_IRQ(TOSA_GPIO_WAKEUP)
+#define TOSA_IRQ_GPIO_AC_IN             PXA_GPIO_TO_IRQ(TOSA_GPIO_AC_IN)
+#define TOSA_IRQ_GPIO_RECORD_BTN        PXA_GPIO_TO_IRQ(TOSA_GPIO_RECORD_BTN)
+#define TOSA_IRQ_GPIO_SYNC              PXA_GPIO_TO_IRQ(TOSA_GPIO_SYNC)
+#define TOSA_IRQ_GPIO_USB_IN            PXA_GPIO_TO_IRQ(TOSA_GPIO_USB_IN)
+#define TOSA_IRQ_GPIO_JACKET_DETECT     PXA_GPIO_TO_IRQ(TOSA_GPIO_JACKET_DETECT)
+#define TOSA_IRQ_GPIO_nSD_INT           PXA_GPIO_TO_IRQ(TOSA_GPIO_nSD_INT)
+#define TOSA_IRQ_GPIO_nSD_DETECT        PXA_GPIO_TO_IRQ(TOSA_GPIO_nSD_DETECT)
+#define TOSA_IRQ_GPIO_BAT1_CRG          PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT1_CRG)
+#define TOSA_IRQ_GPIO_CF_CD             PXA_GPIO_TO_IRQ(TOSA_GPIO_CF_CD)
+#define TOSA_IRQ_GPIO_BAT0_CRG          PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT0_CRG)
+#define TOSA_IRQ_GPIO_TC6393XB_INT      PXA_GPIO_TO_IRQ(TOSA_GPIO_TC6393XB_INT)
+#define TOSA_IRQ_GPIO_BAT0_LOW          PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT0_LOW)
+#define TOSA_IRQ_GPIO_EAR_IN            PXA_GPIO_TO_IRQ(TOSA_GPIO_EAR_IN)
+#define TOSA_IRQ_GPIO_CF_IRQ            PXA_GPIO_TO_IRQ(TOSA_GPIO_CF_IRQ)
+#define TOSA_IRQ_GPIO_ON_KEY            PXA_GPIO_TO_IRQ(TOSA_GPIO_ON_KEY)
+#define TOSA_IRQ_GPIO_VGA_LINE          PXA_GPIO_TO_IRQ(TOSA_GPIO_VGA_LINE)
+#define TOSA_IRQ_GPIO_TP_INT            PXA_GPIO_TO_IRQ(TOSA_GPIO_TP_INT)
+#define TOSA_IRQ_GPIO_JC_CF_IRQ         PXA_GPIO_TO_IRQ(TOSA_GPIO_JC_CF_IRQ)
+#define TOSA_IRQ_GPIO_BAT_LOCKED        PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT_LOCKED)
+#define TOSA_IRQ_GPIO_BAT1_LOW          PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT1_LOW)
+#define TOSA_IRQ_GPIO_KEY_SENSE(a)      PXA_GPIO_TO_IRQ(69+(a))
+
+#define TOSA_IRQ_GPIO_MAIN_BAT_LOW      PXA_GPIO_TO_IRQ(TOSA_GPIO_MAIN_BAT_LOW)
 
 #define TOSA_KEY_SYNC           KEY_102ND /* ??? */
 
diff --git a/arch/arm/mach-pxa/include/mach/trizeps4.h b/arch/arm/mach-pxa/include/mach/trizeps4.h
index 903e1a2e6641..d2ca01053f69 100644
--- a/arch/arm/mach-pxa/include/mach/trizeps4.h
+++ b/arch/arm/mach-pxa/include/mach/trizeps4.h
@@ -43,30 +43,30 @@
 
 /* Ethernet Controller Davicom DM9000 */
 #define GPIO_DM9000             101
-#define TRIZEPS4_ETH_IRQ        IRQ_GPIO(GPIO_DM9000)
+#define TRIZEPS4_ETH_IRQ        PXA_GPIO_TO_IRQ(GPIO_DM9000)
 
 /* UCB1400 audio / TS-controller */
 #define GPIO_UCB1400            1
-#define TRIZEPS4_UCB1400_IRQ    IRQ_GPIO(GPIO_UCB1400)
+#define TRIZEPS4_UCB1400_IRQ    PXA_GPIO_TO_IRQ(GPIO_UCB1400)
 
 /* PCMCIA socket Compact Flash */
 #define GPIO_PCD                11              /* PCMCIA Card Detect */
-#define TRIZEPS4_CD_IRQ         IRQ_GPIO(GPIO_PCD)
+#define TRIZEPS4_CD_IRQ         PXA_GPIO_TO_IRQ(GPIO_PCD)
 #define GPIO_PRDY               13              /* READY / nINT */
-#define TRIZEPS4_READY_NINT     IRQ_GPIO(GPIO_PRDY)
+#define TRIZEPS4_READY_NINT     PXA_GPIO_TO_IRQ(GPIO_PRDY)
 
 /* MMC socket */
 #define GPIO_MMC_DET            12
-#define TRIZEPS4_MMC_IRQ        IRQ_GPIO(GPIO_MMC_DET)
+#define TRIZEPS4_MMC_IRQ        PXA_GPIO_TO_IRQ(GPIO_MMC_DET)
 
 /* DOC NAND chip */
 #define GPIO_DOC_LOCK           94
 #define GPIO_DOC_IRQ            93
-#define TRIZEPS4_DOC_IRQ        IRQ_GPIO(GPIO_DOC_IRQ)
+#define TRIZEPS4_DOC_IRQ        PXA_GPIO_TO_IRQ(GPIO_DOC_IRQ)
 
 /* SPI interface */
 #define GPIO_SPI                53
-#define TRIZEPS4_SPI_IRQ        IRQ_GPIO(GPIO_SPI)
+#define TRIZEPS4_SPI_IRQ        PXA_GPIO_TO_IRQ(GPIO_SPI)
 
 /* LEDS using tx2 / rx2 */
 #define GPIO_SYS_BUSY_LED       46
@@ -74,7 +74,7 @@
 
 /* Off-module PIC on ConXS board */
 #define GPIO_PIC                0
-#define TRIZEPS4_PIC_IRQ        IRQ_GPIO(GPIO_PIC)
+#define TRIZEPS4_PIC_IRQ        PXA_GPIO_TO_IRQ(GPIO_PIC)
 
 #ifdef CONFIG_MACH_TRIZEPS_CONXS
 /* for CONXS base board define these registers */
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index 532c5d3a97d2..5dae15ea6718 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -22,7 +22,6 @@
 
 #include <mach/hardware.h>
 #include <mach/irqs.h>
-#include <mach/gpio-pxa.h>
 
 #include "generic.h"
 
@@ -92,44 +91,6 @@ static struct irq_chip pxa_internal_irq_chip = {
         .irq_unmask     = pxa_unmask_irq,
 };
 
-/*
- * GPIO IRQs for GPIO 0 and 1
- */
-static int pxa_set_low_gpio_type(struct irq_data *d, unsigned int type)
-{
-        int gpio = d->irq - IRQ_GPIO0;
-
-        if (__gpio_is_occupied(gpio)) {
-                pr_err("%s failed: GPIO is configured\n", __func__);
-                return -EINVAL;
-        }
-
-        if (type & IRQ_TYPE_EDGE_RISING)
-                GRER0 |= GPIO_bit(gpio);
-        else
-                GRER0 &= ~GPIO_bit(gpio);
-
-        if (type & IRQ_TYPE_EDGE_FALLING)
-                GFER0 |= GPIO_bit(gpio);
-        else
-                GFER0 &= ~GPIO_bit(gpio);
-
-        return 0;
-}
-
-static void pxa_ack_low_gpio(struct irq_data *d)
-{
-        GEDR0 = (1 << (d->irq - IRQ_GPIO0));
-}
-
-static struct irq_chip pxa_low_gpio_chip = {
-        .name           = "GPIO-l",
-        .irq_ack        = pxa_ack_low_gpio,
-        .irq_mask       = pxa_mask_irq,
-        .irq_unmask     = pxa_unmask_irq,
-        .irq_set_type   = pxa_set_low_gpio_type,
-};
-
 asmlinkage void __exception_irq_entry icip_handle_irq(struct pt_regs *regs)
 {
         uint32_t icip, icmr, mask;
@@ -160,26 +121,7 @@ asmlinkage void __exception_irq_entry ichp_handle_irq(struct pt_regs *regs)
         } while (1);
 }
 
-static void __init pxa_init_low_gpio_irq(set_wake_t fn)
-{
-        int irq;
-
-        /* clear edge detection on GPIO 0 and 1 */
-        GFER0 &= ~0x3;
-        GRER0 &= ~0x3;
-        GEDR0 = 0x3;
-
-        for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) {
-                irq_set_chip_and_handler(irq, &pxa_low_gpio_chip,
-                                         handle_edge_irq);
-                irq_set_chip_data(irq, irq_base(0));
-                set_irq_flags(irq, IRQF_VALID);
-        }
-
-        pxa_low_gpio_chip.irq_set_wake = fn;
-}
-
-void __init pxa_init_irq(int irq_nr, set_wake_t fn)
+void __init pxa_init_irq(int irq_nr, int (*fn)(struct irq_data *, unsigned int))
 {
         int irq, i, n;
 
@@ -209,7 +151,6 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn)
         __raw_writel(1, irq_base(0) + ICCR);
 
         pxa_internal_irq_chip.irq_set_wake = fn;
-        pxa_init_low_gpio_irq(fn);
 }
 
 #ifdef CONFIG_PM
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c
index c337c7eed514..1fb86edb857c 100644
--- a/arch/arm/mach-pxa/littleton.c
+++ b/arch/arm/mach-pxa/littleton.c
@@ -124,8 +124,8 @@ static struct resource smc91x_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO90)),
-                .end    = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO90)),
+                .start  = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO90)),
+                .end    = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO90)),
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
         }
 };
@@ -396,7 +396,7 @@ static struct i2c_board_info littleton_i2c_info[] = {
                 .type           = "da9034",
                 .addr           = 0x34,
                 .platform_data  = &littleton_da9034_info,
-                .irq            = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO18)),
+                .irq            = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO18)),
         },
         [1] = {
                 .type           = "max7320",
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index 6119c015f393..cee9ce2fc0b5 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -152,8 +152,8 @@ static void __init lpd270_init_irq(void)
                                          handle_level_irq);
                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
         }
-        irq_set_chained_handler(IRQ_GPIO(0), lpd270_irq_handler);
-        irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
+        irq_set_chained_handler(PXA_GPIO_TO_IRQ(0), lpd270_irq_handler);
+        irq_set_irq_type(PXA_GPIO_TO_IRQ(0), IRQ_TYPE_EDGE_FALLING);
 }
 
 
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index 4b7a52871652..6ebd276aebeb 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -170,8 +170,8 @@ static void __init lubbock_init_irq(void)
                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
         }
 
-        irq_set_chained_handler(IRQ_GPIO(0), lubbock_irq_handler);
-        irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
+        irq_set_chained_handler(PXA_GPIO_TO_IRQ(0), lubbock_irq_handler);
+        irq_set_irq_type(PXA_GPIO_TO_IRQ(0), IRQ_TYPE_EDGE_FALLING);
 }
 
 #ifdef CONFIG_PM
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c
index 4e6774fff422..3d6baf91396c 100644
--- a/arch/arm/mach-pxa/magician.c
+++ b/arch/arm/mach-pxa/magician.c
@@ -184,8 +184,8 @@ static struct resource egpio_resources[] = {
                 .flags = IORESOURCE_MEM,
         },
         [1] = {
-                .start = gpio_to_irq(GPIO13_MAGICIAN_CPLD_IRQ),
-                .end   = gpio_to_irq(GPIO13_MAGICIAN_CPLD_IRQ),
+                .start = PXA_GPIO_TO_IRQ(GPIO13_MAGICIAN_CPLD_IRQ),
+                .end   = PXA_GPIO_TO_IRQ(GPIO13_MAGICIAN_CPLD_IRQ),
                 .flags = IORESOURCE_IRQ,
         },
 };
@@ -468,8 +468,8 @@ static struct resource pasic3_resources[] = {
         },
         /* No IRQ handler in the PASIC3, DS1WM needs an external IRQ */
         [1] = {
-                .start  = gpio_to_irq(GPIO107_MAGICIAN_DS1WM_IRQ),
-                .end    = gpio_to_irq(GPIO107_MAGICIAN_DS1WM_IRQ),
+                .start  = PXA_GPIO_TO_IRQ(GPIO107_MAGICIAN_DS1WM_IRQ),
+                .end    = PXA_GPIO_TO_IRQ(GPIO107_MAGICIAN_DS1WM_IRQ),
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
         }
 };
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index ca14555d5e15..1aebaf719462 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -178,8 +178,8 @@ static void __init mainstone_init_irq(void)
         MST_INTMSKENA = 0;
         MST_INTSETCLR = 0;
 
-        irq_set_chained_handler(IRQ_GPIO(0), mainstone_irq_handler);
-        irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
+        irq_set_chained_handler(PXA_GPIO_TO_IRQ(0), mainstone_irq_handler);
+        irq_set_irq_type(PXA_GPIO_TO_IRQ(0), IRQ_TYPE_EDGE_FALLING);
 }
 
 #ifdef CONFIG_PM
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index 43a5f6861ca3..f14775536b83 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -13,6 +13,7 @@
  *  published by the Free Software Foundation.
  */
 #include <linux/gpio.h>
+#include <linux/gpio-pxa.h>
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
@@ -20,7 +21,6 @@
 
 #include <mach/pxa2xx-regs.h>
 #include <mach/mfp-pxa2xx.h>
-#include <mach/gpio-pxa.h>
 
 #include "generic.h"
 
@@ -29,6 +29,10 @@
 #define GAFR_L(x)       __GAFR(0, x)
 #define GAFR_U(x)       __GAFR(1, x)
 
+#define BANK_OFF(n)     (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
+#define GPLR(x)         __REG2(0x40E00000, BANK_OFF((x) >> 5))
+#define GPDR(x)         __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x0c)
+
 #define PWER_WE35       (1 << 24)
 
 struct gpio_desc {
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index dce71b4a3a55..e80a3db735c2 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -537,15 +537,15 @@ static struct pda_power_pdata power_pdata = {
 static struct resource power_resources[] = {
         [0] = {
                 .name   = "ac",
-                .start  = gpio_to_irq(GPIO96_AC_DETECT),
-                .end    = gpio_to_irq(GPIO96_AC_DETECT),
+                .start  = PXA_GPIO_TO_IRQ(GPIO96_AC_DETECT),
+                .end    = PXA_GPIO_TO_IRQ(GPIO96_AC_DETECT),
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
                 IORESOURCE_IRQ_LOWEDGE,
         },
         [1] = {
                 .name   = "usb",
-                .start  = gpio_to_irq(GPIO13_nUSB_DETECT),
-                .end    = gpio_to_irq(GPIO13_nUSB_DETECT),
+                .start  = PXA_GPIO_TO_IRQ(GPIO13_nUSB_DETECT),
+                .end    = PXA_GPIO_TO_IRQ(GPIO13_nUSB_DETECT),
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
                 IORESOURCE_IRQ_LOWEDGE,
         },
diff --git a/arch/arm/mach-pxa/mxm8x10.c b/arch/arm/mach-pxa/mxm8x10.c
index 90928d6e1a5b..83570a79e7d2 100644
--- a/arch/arm/mach-pxa/mxm8x10.c
+++ b/arch/arm/mach-pxa/mxm8x10.c
@@ -417,8 +417,8 @@ static struct resource dm9k_resources[] = {
                .flags = IORESOURCE_MEM
         },
         [2] = {
-               .start = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO9)),
-               .end = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO9)),
+               .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO9)),
+               .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO9)),
                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE
         }
 };
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index 6d38c6548b3d..abab4e2b122c 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -378,7 +378,7 @@ struct pxacamera_platform_data pcm990_pxacamera_platform_data = {
 #include <linux/i2c/pca953x.h>
 
 static struct pca953x_platform_data pca9536_data = {
-        .gpio_base      = NR_BUILTIN_GPIO,
+        .gpio_base      = PXA_NR_BUILTIN_GPIO,
 };
 
 static int gpio_bus_switch = -EINVAL;
@@ -406,9 +406,9 @@ static unsigned long pcm990_camera_query_bus_param(struct soc_camera_link *link)
         int ret;
 
         if (gpio_bus_switch < 0) {
-                ret = gpio_request(NR_BUILTIN_GPIO, "camera");
+                ret = gpio_request(PXA_NR_BUILTIN_GPIO, "camera");
                 if (!ret) {
-                        gpio_bus_switch = NR_BUILTIN_GPIO;
+                        gpio_bus_switch = PXA_NR_BUILTIN_GPIO;
                         gpio_direction_output(gpio_bus_switch, 0);
                 }
         }
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index b260ce872d2d..69036e42ca31 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -166,8 +166,8 @@ static struct resource locomo_resources[] = {
                 .flags          = IORESOURCE_MEM,
         },
         [1] = {
-                .start          = IRQ_GPIO(10),
-                .end            = IRQ_GPIO(10),
+                .start          = PXA_GPIO_TO_IRQ(10),
+                .end            = PXA_GPIO_TO_IRQ(10),
                 .flags          = IORESOURCE_IRQ,
         },
 };
@@ -212,7 +212,7 @@ static struct spi_board_info poodle_spi_devices[] = {
                 .bus_num        = 1,
                 .platform_data  = &poodle_ads7846_info,
                 .controller_data= &poodle_ads7846_chip,
-                .irq            = gpio_to_irq(POODLE_GPIO_TP_INT),
+                .irq            = PXA_GPIO_TO_IRQ(POODLE_GPIO_TP_INT),
         },
 };
 
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index f05f9486b0cb..adf058fa97ee 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -17,6 +17,7 @@
  * need be.
  */
 #include <linux/gpio.h>
+#include <linux/gpio-pxa.h>
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
@@ -208,6 +209,8 @@ static struct clk_lookup pxa25x_clkregs[] = {
         INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"),
         INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"),
         INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL),
+        INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL),
+        INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
 };
 
 static struct clk_lookup pxa25x_hwuart_clkreg =
@@ -287,7 +290,7 @@ static inline void pxa25x_init_pm(void) {}
 
 static int pxa25x_set_wake(struct irq_data *d, unsigned int on)
 {
-        int gpio = irq_to_gpio(d->irq);
+        int gpio = pxa_irq_to_gpio(d->irq);
         uint32_t mask = 0;
 
         if (gpio >= 0 && gpio < 85)
@@ -312,14 +315,12 @@ set_pwer:
 void __init pxa25x_init_irq(void)
 {
         pxa_init_irq(32, pxa25x_set_wake);
-        pxa_init_gpio(IRQ_GPIO_2_x, 2, 84, pxa25x_set_wake);
 }
 
 #ifdef CONFIG_CPU_PXA26x
 void __init pxa26x_init_irq(void)
 {
         pxa_init_irq(32, pxa25x_set_wake);
-        pxa_init_gpio(IRQ_GPIO_2_x, 2, 89, pxa25x_set_wake);
 }
 #endif
 
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index bc5a98ebaa72..180bd8675d4b 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -12,6 +12,7 @@
  * published by the Free Software Foundation.
  */
 #include <linux/gpio.h>
+#include <linux/gpio-pxa.h>
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
@@ -229,6 +230,8 @@ static struct clk_lookup pxa27x_clkregs[] = {
         INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"),
         INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"),
         INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL),
+        INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL),
+        INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
 };
 
 #ifdef CONFIG_PM
@@ -355,7 +358,7 @@ static inline void pxa27x_init_pm(void) {}
  */
 static int pxa27x_set_wake(struct irq_data *d, unsigned int on)
 {
-        int gpio = irq_to_gpio(d->irq);
+        int gpio = pxa_irq_to_gpio(d->irq);
         uint32_t mask;
 
         if (gpio >= 0 && gpio < 128)
@@ -386,7 +389,6 @@ static int pxa27x_set_wake(struct irq_data *d, unsigned int on)
 void __init pxa27x_init_irq(void)
 {
         pxa_init_irq(34, pxa27x_set_wake);
-        pxa_init_gpio(IRQ_GPIO_2_x, 2, 120, pxa27x_set_wake);
 }
 
 static struct map_desc pxa27x_io_desc[] __initdata = {
@@ -422,6 +424,7 @@ void __init pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
 }
 
 static struct platform_device *devices[] __initdata = {
+        &pxa_device_gpio,
         &pxa27x_device_udc,
         &pxa_device_pmu,
         &pxa_device_i2s,
diff --git a/arch/arm/mach-pxa/pxa300.c b/arch/arm/mach-pxa/pxa300.c
index 40bb16501d86..0388eda7878a 100644
--- a/arch/arm/mach-pxa/pxa300.c
+++ b/arch/arm/mach-pxa/pxa300.c
@@ -89,6 +89,7 @@ static DEFINE_PXA3_CKEN(gcu, PXA300_GCU, 0, 0);
 static struct clk_lookup common_clkregs[] = {
         INIT_CLKREG(&clk_common_nand, "pxa3xx-nand", NULL),
         INIT_CLKREG(&clk_gcu, "pxa3xx-gcu", NULL),
+        INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
 };
 
 static DEFINE_PXA3_CKEN(pxa310_mmc3, MMC3, 19500000, 0);
diff --git a/arch/arm/mach-pxa/pxa320.c b/arch/arm/mach-pxa/pxa320.c
index 8d614ecd8e99..d487e1ff4c9a 100644
--- a/arch/arm/mach-pxa/pxa320.c
+++ b/arch/arm/mach-pxa/pxa320.c
@@ -83,6 +83,7 @@ static DEFINE_PXA3_CKEN(gcu, PXA320_GCU, 0, 0);
 static struct clk_lookup pxa320_clkregs[] = {
         INIT_CLKREG(&clk_pxa320_nand, "pxa3xx-nand", NULL),
         INIT_CLKREG(&clk_gcu, "pxa3xx-gcu", NULL),
+        INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
 };
 
 static int __init pxa320_init(void)
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index 0737c59b88ae..f107c71c7589 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -25,7 +25,6 @@
 #include <asm/mach/map.h>
 #include <asm/suspend.h>
 #include <mach/hardware.h>
-#include <mach/gpio-pxa.h>
 #include <mach/pxa3xx-regs.h>
 #include <mach/reset.h>
 #include <mach/ohci.h>
@@ -56,6 +55,7 @@ static DEFINE_PXA3_CKEN(pxa3xx_pwm0, PWM0, 13000000, 0);
 static DEFINE_PXA3_CKEN(pxa3xx_pwm1, PWM1, 13000000, 0);
 static DEFINE_PXA3_CKEN(pxa3xx_mmc1, MMC1, 19500000, 0);
 static DEFINE_PXA3_CKEN(pxa3xx_mmc2, MMC2, 19500000, 0);
+static DEFINE_PXA3_CKEN(pxa3xx_gpio, GPIO, 13000000, 0);
 
 static DEFINE_CK(pxa3xx_lcd, LCD, &clk_pxa3xx_hsio_ops);
 static DEFINE_CK(pxa3xx_smemc, SMC, &clk_pxa3xx_smemc_ops);
@@ -67,6 +67,7 @@ static struct clk_lookup pxa3xx_clkregs[] = {
         INIT_CLKREG(&clk_pxa3xx_pout, NULL, "CLK_POUT"),
         /* Power I2C clock is always on */
         INIT_CLKREG(&clk_dummy, "pxa3xx-pwri2c.1", NULL),
+        INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
         INIT_CLKREG(&clk_pxa3xx_lcd, "pxa2xx-fb", NULL),
         INIT_CLKREG(&clk_pxa3xx_camera, NULL, "CAMCLK"),
         INIT_CLKREG(&clk_pxa3xx_ac97, NULL, "AC97CLK"),
@@ -88,6 +89,7 @@ static struct clk_lookup pxa3xx_clkregs[] = {
         INIT_CLKREG(&clk_pxa3xx_mmc1, "pxa2xx-mci.0", NULL),
         INIT_CLKREG(&clk_pxa3xx_mmc2, "pxa2xx-mci.1", NULL),
         INIT_CLKREG(&clk_pxa3xx_smemc, "pxa2xx-pcmcia", NULL),
+        INIT_CLKREG(&clk_pxa3xx_gpio, "pxa-gpio", NULL),
 };
 
 #ifdef CONFIG_PM
@@ -365,7 +367,8 @@ static struct irq_chip pxa_ext_wakeup_chip = {
         .irq_set_type   = pxa_set_ext_wakeup_type,
 };
 
-static void __init pxa_init_ext_wakeup_irq(set_wake_t fn)
+static void __init pxa_init_ext_wakeup_irq(int (*fn)(struct irq_data *,
+                                           unsigned int))
 {
         int irq;
 
@@ -388,7 +391,6 @@ void __init pxa3xx_init_irq(void)
 
         pxa_init_irq(56, pxa3xx_set_wake);
         pxa_init_ext_wakeup_irq(pxa3xx_set_wake);
-        pxa_init_gpio(IRQ_GPIO_2_x, 2, 127, NULL);
 }
 
 static struct map_desc pxa3xx_io_desc[] __initdata = {
@@ -417,6 +419,7 @@ void __init pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info)
 }
 
 static struct platform_device *devices[] __initdata = {
+        &pxa_device_gpio,
         &pxa27x_device_udc,
         &pxa_device_pmu,
         &pxa_device_i2s,
diff --git a/arch/arm/mach-pxa/pxa95x.c b/arch/arm/mach-pxa/pxa95x.c
index 51371b39d2a3..fccc644702e6 100644
--- a/arch/arm/mach-pxa/pxa95x.c
+++ b/arch/arm/mach-pxa/pxa95x.c
@@ -20,7 +20,6 @@
 #include <linux/syscore_ops.h>
 
 #include <mach/hardware.h>
-#include <mach/gpio-pxa.h>
 #include <mach/pxa3xx-regs.h>
 #include <mach/pxa930.h>
 #include <mach/reset.h>
@@ -212,11 +211,13 @@ static DEFINE_PXA3_CKEN(pxa95x_ssp3, SSP3, 13000000, 0);
 static DEFINE_PXA3_CKEN(pxa95x_ssp4, SSP4, 13000000, 0);
 static DEFINE_PXA3_CKEN(pxa95x_pwm0, PWM0, 13000000, 0);
 static DEFINE_PXA3_CKEN(pxa95x_pwm1, PWM1, 13000000, 0);
+static DEFINE_PXA3_CKEN(pxa95x_gpio, GPIO, 13000000, 0);
 
 static struct clk_lookup pxa95x_clkregs[] = {
         INIT_CLKREG(&clk_pxa95x_pout, NULL, "CLK_POUT"),
         /* Power I2C clock is always on */
         INIT_CLKREG(&clk_dummy, "pxa3xx-pwri2c.1", NULL),
+        INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
         INIT_CLKREG(&clk_pxa95x_lcd, "pxa2xx-fb", NULL),
         INIT_CLKREG(&clk_pxa95x_ffuart, "pxa2xx-uart.0", NULL),
         INIT_CLKREG(&clk_pxa95x_btuart, "pxa2xx-uart.1", NULL),
@@ -230,12 +231,12 @@ static struct clk_lookup pxa95x_clkregs[] = {
         INIT_CLKREG(&clk_pxa95x_ssp4, "pxa27x-ssp.3", NULL),
         INIT_CLKREG(&clk_pxa95x_pwm0, "pxa27x-pwm.0", NULL),
         INIT_CLKREG(&clk_pxa95x_pwm1, "pxa27x-pwm.1", NULL),
+        INIT_CLKREG(&clk_pxa95x_gpio, "pxa-gpio", NULL),
 };
 
 void __init pxa95x_init_irq(void)
 {
         pxa_init_irq(96, NULL);
-        pxa_init_gpio(IRQ_GPIO_2_x, 2, 127, NULL);
 }
 
 /*
@@ -248,6 +249,7 @@ void __init pxa95x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
 }
 
 static struct platform_device *devices[] __initdata = {
+        &pxa_device_gpio,
         &sa1100_device_rtc,
         &pxa_device_rtc,
         &pxa27x_device_ssp1,
diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c
index 4962b1676629..22818c7694a8 100644
--- a/arch/arm/mach-pxa/raumfeld.c
+++ b/arch/arm/mach-pxa/raumfeld.c
@@ -292,8 +292,8 @@ static struct resource smc91x_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         {
-                .start  = gpio_to_irq(GPIO_ETH_IRQ),
-                .end    = gpio_to_irq(GPIO_ETH_IRQ),
+                .start  = PXA_GPIO_TO_IRQ(GPIO_ETH_IRQ),
+                .end    = PXA_GPIO_TO_IRQ(GPIO_ETH_IRQ),
                 .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
         }
 };
@@ -672,7 +672,7 @@ static struct lis3lv02d_platform_data lis3_pdata = {
         .chip_select    = 1,                    \
         .controller_data = (void *) GPIO_ACCEL_CS,      \
         .platform_data  = &lis3_pdata,          \
-        .irq            = gpio_to_irq(GPIO_ACCEL_IRQ),  \
+        .irq            = PXA_GPIO_TO_IRQ(GPIO_ACCEL_IRQ),      \
 }
 
 #define SPI_DAC7512     \
@@ -956,7 +956,7 @@ static struct eeti_ts_platform_data eeti_ts_pdata = {
 static struct i2c_board_info raumfeld_controller_i2c_board_info __initdata = {
         .type   = "eeti_ts",
         .addr   = 0x0a,
-        .irq    = gpio_to_irq(GPIO_TOUCH_IRQ),
+        .irq    = PXA_GPIO_TO_IRQ(GPIO_TOUCH_IRQ),
         .platform_data = &eeti_ts_pdata,
 };
 
diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c
index 878707056e65..0fe354efb931 100644
--- a/arch/arm/mach-pxa/saar.c
+++ b/arch/arm/mach-pxa/saar.c
@@ -96,8 +96,8 @@ static struct resource smc91x_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO97)),
-                .end    = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO97)),
+                .start  = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO97)),
+                .end    = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO97)),
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
         }
 };
@@ -502,7 +502,7 @@ static struct i2c_board_info saar_i2c_info[] = {
                 .type           = "da9034",
                 .addr           = 0x34,
                 .platform_data  = &saar_da9034_info,
-                .irq            = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO83)),
+                .irq            = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO83)),
         },
 };
 
diff --git a/arch/arm/mach-pxa/saarb.c b/arch/arm/mach-pxa/saarb.c
index b6dbaca460c7..febc809ed5a6 100644
--- a/arch/arm/mach-pxa/saarb.c
+++ b/arch/arm/mach-pxa/saarb.c
@@ -92,7 +92,7 @@ static struct i2c_board_info saarb_i2c_info[] = {
                 .type           = "88PM860x",
                 .addr           = 0x34,
                 .platform_data  = &saarb_pm8607_info,
-                .irq            = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO83)),
+                .irq            = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO83)),
         },
 };
 
diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c
index 785880f67b60..8d5168d253a9 100644
--- a/arch/arm/mach-pxa/sharpsl_pm.c
+++ b/arch/arm/mach-pxa/sharpsl_pm.c
@@ -907,24 +907,24 @@ static int __devinit sharpsl_pm_probe(struct platform_device *pdev)
         gpio_direction_input(sharpsl_pm.machinfo->gpio_batlock);
 
         /* Register interrupt handlers */
-        if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, "AC Input Detect", sharpsl_ac_isr)) {
-                dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin));
+        if (request_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, "AC Input Detect", sharpsl_ac_isr)) {
+                dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_acin));
         }
 
-        if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Battery Cover", sharpsl_fatal_isr)) {
-                dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock));
+        if (request_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Battery Cover", sharpsl_fatal_isr)) {
+                dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batlock));
         }
 
         if (sharpsl_pm.machinfo->gpio_fatal) {
-                if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Fatal Battery", sharpsl_fatal_isr)) {
-                        dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal));
+                if (request_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Fatal Battery", sharpsl_fatal_isr)) {
+                        dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_fatal));
                 }
         }
 
         if (sharpsl_pm.machinfo->batfull_irq) {
                 /* Register interrupt handler. */
-                if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING, "CO", sharpsl_chrg_full_isr)) {
-                        dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull));
+                if (request_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING, "CO", sharpsl_chrg_full_isr)) {
+                        dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batfull));
                 }
         }
 
@@ -953,14 +953,14 @@ static int sharpsl_pm_remove(struct platform_device *pdev)
 
         led_trigger_unregister_simple(sharpsl_charge_led_trigger);
 
-        free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr);
-        free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr);
+        free_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr);
+        free_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr);
 
         if (sharpsl_pm.machinfo->gpio_fatal)
-                free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr);
+                free_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr);
 
         if (sharpsl_pm.machinfo->batfull_irq)
-                free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr);
+                free_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr);
 
         gpio_free(sharpsl_pm.machinfo->gpio_batlock);
         gpio_free(sharpsl_pm.machinfo->gpio_batfull);
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index a7f81a3fd132..abf355d0c92f 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -552,7 +552,7 @@ static struct spi_board_info spitz_spi_devices[] = {
                 .chip_select            = 0,
                 .platform_data          = &spitz_ads7846_info,
                 .controller_data        = &spitz_ads7846_chip,
-                .irq                    = gpio_to_irq(SPITZ_GPIO_TP_INT),
+                .irq                    = PXA_GPIO_TO_IRQ(SPITZ_GPIO_TP_INT),
         }, {
                 .modalias               = "corgi-lcd",
                 .max_speed_hz           = 50000,
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c
index 094279aefe9c..34cbdac51525 100644
--- a/arch/arm/mach-pxa/spitz_pm.c
+++ b/arch/arm/mach-pxa/spitz_pm.c
@@ -15,6 +15,7 @@
 #include <linux/kernel.h>
 #include <linux/delay.h>
 #include <linux/gpio.h>
+#include <linux/gpio-pxa.h>
 #include <linux/interrupt.h>
 #include <linux/platform_device.h>
 #include <linux/apm-emulation.h>
@@ -41,6 +42,7 @@ static int spitz_last_ac_status;
 static struct gpio spitz_charger_gpios[] = {
         { SPITZ_GPIO_KEY_INT,   GPIOF_IN, "Keyboard Interrupt" },
         { SPITZ_GPIO_SYNC,      GPIOF_IN, "Sync" },
+        { SPITZ_GPIO_AC_IN,     GPIOF_IN, "Charger Detection" },
         { SPITZ_GPIO_ADC_TEMP_ON, GPIOF_OUT_INIT_LOW, "ADC Temp On" },
         { SPITZ_GPIO_JK_B,        GPIOF_OUT_INIT_LOW, "JK B" },
         { SPITZ_GPIO_CHRG_ON,     GPIOF_OUT_INIT_LOW, "Charger On" },
@@ -169,14 +171,19 @@ static int spitz_should_wakeup(unsigned int resume_on_alarm)
 
 static unsigned long spitz_charger_wakeup(void)
 {
-        return (~GPLR0 & GPIO_bit(SPITZ_GPIO_KEY_INT)) | (GPLR0 & GPIO_bit(SPITZ_GPIO_SYNC));
+        unsigned long ret;
+        ret = (!gpio_get_value(SPITZ_GPIO_KEY_INT)
+                << GPIO_bit(SPITZ_GPIO_KEY_INT))
+                | (!gpio_get_value(SPITZ_GPIO_SYNC)
+                << GPIO_bit(SPITZ_GPIO_SYNC));
+        return ret;
 }
 
 unsigned long spitzpm_read_devdata(int type)
 {
         switch (type) {
         case SHARPSL_STATUS_ACIN:
-                return (((~GPLR(SPITZ_GPIO_AC_IN)) & GPIO_bit(SPITZ_GPIO_AC_IN)) != 0);
+                return !gpio_get_value(SPITZ_GPIO_AC_IN);
         case SHARPSL_STATUS_LOCK:
                 return gpio_get_value(sharpsl_pm.machinfo->gpio_batlock);
         case SHARPSL_STATUS_CHRGFULL:
diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c
index 80d7f23ad0fd..d8a2467de92e 100644
--- a/arch/arm/mach-pxa/stargate2.c
+++ b/arch/arm/mach-pxa/stargate2.c
@@ -376,7 +376,7 @@ static struct spi_board_info spi_board_info[] __initdata = {
                 .bus_num = 1,
                 .chip_select = 0,
                 .controller_data = &staccel_chip_info,
-                .irq = IRQ_GPIO(96),
+                .irq = PXA_GPIO_TO_IRQ(96),
         }, {
                 .modalias = "cc2420",
                 .max_speed_hz = 6500000,
@@ -546,7 +546,7 @@ static struct i2c_board_info __initdata imote2_pwr_i2c_board_info[] = {
                 .type = "da9030",
                 .addr = 0x49,
                 .platform_data = &imote2_da9030_pdata,
-                .irq = gpio_to_irq(1),
+                .irq = PXA_GPIO_TO_IRQ(1),
         },
 };
 
@@ -560,18 +560,18 @@ static struct i2c_board_info __initdata imote2_i2c_board_info[] = {
                 /* Through a nand gate - Also beware, on V2 sensor board the
                  * pull up resistors are missing.
                  */
-                .irq = IRQ_GPIO(99),
+                .irq = PXA_GPIO_TO_IRQ(99),
         }, { /* ITS400 Sensor board only */
                 .type = "tsl2561",
                 .addr = 0x49,
                 /* Through a nand gate - Also beware, on V2 sensor board the
                  * pull up resistors are missing.
                  */
-                .irq = IRQ_GPIO(99),
+                .irq = PXA_GPIO_TO_IRQ(99),
         }, { /* ITS400 Sensor board only */
                 .type = "tmp175",
                 .addr = 0x4A,
-                .irq = IRQ_GPIO(96),
+                .irq = PXA_GPIO_TO_IRQ(96),
         }, { /* IMB400 Multimedia board */
                 .type = "wm8940",
                 .addr = 0x1A,
@@ -661,8 +661,8 @@ static struct resource smc91x_resources[] = {
                 .flags = IORESOURCE_MEM,
         },
         [1] = {
-                .start = IRQ_GPIO(40),
-                .end = IRQ_GPIO(40),
+                .start = PXA_GPIO_TO_IRQ(40),
+                .end = PXA_GPIO_TO_IRQ(40),
                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
         }
 };
@@ -707,7 +707,7 @@ static int stargate2_mci_init(struct device *dev,
         }
         gpio_direction_input(SG2_GPIO_nSD_DETECT);
 
-        err = request_irq(IRQ_GPIO(SG2_GPIO_nSD_DETECT),
+        err = request_irq(PXA_GPIO_TO_IRQ(SG2_GPIO_nSD_DETECT),
                           stargate2_detect_int,
                           IRQ_TYPE_EDGE_BOTH,
                           "MMC card detect",
@@ -738,7 +738,7 @@ static void stargate2_mci_setpower(struct device *dev, unsigned int vdd)
 
 static void stargate2_mci_exit(struct device *dev, void *data)
 {
-        free_irq(IRQ_GPIO(SG2_GPIO_nSD_DETECT), data);
+        free_irq(PXA_GPIO_TO_IRQ(SG2_GPIO_nSD_DETECT), data);
         gpio_free(SG2_SD_POWER_ENABLE);
         gpio_free(SG2_GPIO_nSD_DETECT);
 }
@@ -913,7 +913,7 @@ static struct i2c_board_info __initdata stargate2_pwr_i2c_board_info[] = {
                 .type = "da9030",
                 .addr = 0x49,
                 .platform_data = &stargate2_da9030_pdata,
-                .irq = gpio_to_irq(1),
+                .irq = PXA_GPIO_TO_IRQ(1),
         },
 };
 
@@ -938,18 +938,18 @@ static struct i2c_board_info __initdata stargate2_i2c_board_info[] = {
                 /* Through a nand gate - Also beware, on V2 sensor board the
                  * pull up resistors are missing.
                  */
-                .irq = IRQ_GPIO(99),
+                .irq = PXA_GPIO_TO_IRQ(99),
         }, { /* ITS400 Sensor board only */
                 .type = "tsl2561",
                 .addr = 0x49,
                 /* Through a nand gate - Also beware, on V2 sensor board the
                  * pull up resistors are missing.
                  */
-                .irq = IRQ_GPIO(99),
+                .irq = PXA_GPIO_TO_IRQ(99),
         }, { /* ITS400 Sensor board only */
                 .type = "tmp175",
                 .addr = 0x4A,
-                .irq = IRQ_GPIO(96),
+                .irq = PXA_GPIO_TO_IRQ(96),
         },
 };
 
diff --git a/arch/arm/mach-pxa/tavorevb.c b/arch/arm/mach-pxa/tavorevb.c
index 4fa36a3e383c..9fb38e80e076 100644
--- a/arch/arm/mach-pxa/tavorevb.c
+++ b/arch/arm/mach-pxa/tavorevb.c
@@ -85,8 +85,8 @@ static struct resource smc91x_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO47)),
-                .end    = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO47)),
+                .start  = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO47)),
+                .end    = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO47)),
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
         }
 };
diff --git a/arch/arm/mach-pxa/tavorevb3.c b/arch/arm/mach-pxa/tavorevb3.c
index 8a22879f0bb0..f7d9305cfd77 100644
--- a/arch/arm/mach-pxa/tavorevb3.c
+++ b/arch/arm/mach-pxa/tavorevb3.c
@@ -101,7 +101,7 @@ static struct i2c_board_info evb3_i2c_info[] = {
                 .type           = "88PM860x",
                 .addr           = 0x34,
                 .platform_data  = &evb3_pm8607_info,
-                .irq            = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO83)),
+                .irq            = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO83)),
         },
 };
 
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index dfe40f8705aa..7ce5c436cc4e 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -404,8 +404,8 @@ static struct pda_power_pdata tosa_power_data = {
 static struct resource tosa_power_resource[] = {
         {
                 .name           = "ac",
-                .start          = gpio_to_irq(TOSA_GPIO_AC_IN),
-                .end            = gpio_to_irq(TOSA_GPIO_AC_IN),
+                .start          = PXA_GPIO_TO_IRQ(TOSA_GPIO_AC_IN),
+                .end            = PXA_GPIO_TO_IRQ(TOSA_GPIO_AC_IN),
                 .flags          = IORESOURCE_IRQ |
                                   IORESOURCE_IRQ_HIGHEDGE |
                                   IORESOURCE_IRQ_LOWEDGE,
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
index afe2b7495523..023d6ca789de 100644
--- a/arch/arm/mach-pxa/viper.c
+++ b/arch/arm/mach-pxa/viper.c
@@ -422,8 +422,8 @@ static struct resource smc91x_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = gpio_to_irq(VIPER_ETH_GPIO),
-                .end    = gpio_to_irq(VIPER_ETH_GPIO),
+                .start  = PXA_GPIO_TO_IRQ(VIPER_ETH_GPIO),
+                .end    = PXA_GPIO_TO_IRQ(VIPER_ETH_GPIO),
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
         },
         [2] = {
@@ -546,7 +546,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
         /* External UARTs */
         {
                 .mapbase        = VIPER_UARTA_PHYS,
-                .irq            = gpio_to_irq(VIPER_UARTA_GPIO),
+                .irq            = PXA_GPIO_TO_IRQ(VIPER_UARTA_GPIO),
                 .irqflags       = IRQF_TRIGGER_RISING,
                 .uartclk        = 1843200,
                 .regshift       = 1,
@@ -556,7 +556,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
         },
         {
                 .mapbase        = VIPER_UARTB_PHYS,
-                .irq            = gpio_to_irq(VIPER_UARTB_GPIO),
+                .irq            = PXA_GPIO_TO_IRQ(VIPER_UARTB_GPIO),
                 .irqflags       = IRQF_TRIGGER_RISING,
                 .uartclk        = 1843200,
                 .regshift       = 1,
@@ -596,8 +596,8 @@ static struct resource isp116x_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [2] = {
-                .start  = gpio_to_irq(VIPER_USB_GPIO),
-                .end    = gpio_to_irq(VIPER_USB_GPIO),
+                .start  = PXA_GPIO_TO_IRQ(VIPER_USB_GPIO),
+                .end    = PXA_GPIO_TO_IRQ(VIPER_USB_GPIO),
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
         },
 };
diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c
index fed5fb088714..1f5cfa96f6d6 100644
--- a/arch/arm/mach-pxa/vpac270.c
+++ b/arch/arm/mach-pxa/vpac270.c
@@ -395,8 +395,8 @@ static struct resource vpac270_dm9000_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [2] = {
-                .start  = IRQ_GPIO(GPIO114_VPAC270_ETH_IRQ),
-                .end    = IRQ_GPIO(GPIO114_VPAC270_ETH_IRQ),
+                .start  = PXA_GPIO_TO_IRQ(GPIO114_VPAC270_ETH_IRQ),
+                .end    = PXA_GPIO_TO_IRQ(GPIO114_VPAC270_ETH_IRQ),
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
         },
 };
@@ -433,7 +433,7 @@ static pxa2xx_audio_ops_t vpac270_ac97_pdata = {
 };
 
 static struct ucb1400_pdata vpac270_ucb1400_pdata = {
-        .irq            = IRQ_GPIO(GPIO113_VPAC270_TS_IRQ),
+        .irq            = PXA_GPIO_TO_IRQ(GPIO113_VPAC270_TS_IRQ),
 };
 
 static struct platform_device vpac270_ucb1400_device = {
@@ -610,8 +610,8 @@ static struct resource vpac270_ide_resources[] = {
                .flags   = IORESOURCE_DMA
         },
         [3] = { /* IDE IRQ pin */
-               .start   = gpio_to_irq(GPIO36_VPAC270_IDE_IRQ),
-               .end     = gpio_to_irq(GPIO36_VPAC270_IDE_IRQ),
+               .start   = PXA_GPIO_TO_IRQ(GPIO36_VPAC270_IDE_IRQ),
+               .end     = PXA_GPIO_TO_IRQ(GPIO36_VPAC270_IDE_IRQ),
                .flags   = IORESOURCE_IRQ
         }
 };
diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c
index d75f66ab8c34..b6476848b561 100644
--- a/arch/arm/mach-pxa/z2.c
+++ b/arch/arm/mach-pxa/z2.c
@@ -573,7 +573,7 @@ static struct spi_board_info spi_board_info[] __initdata = {
         .modalias               = "libertas_spi",
         .platform_data          = &z2_lbs_pdata,
         .controller_data        = &z2_lbs_chip_info,
-        .irq                    = gpio_to_irq(GPIO36_ZIPITZ2_WIFI_IRQ),
+        .irq                    = PXA_GPIO_TO_IRQ(GPIO36_ZIPITZ2_WIFI_IRQ),
         .max_speed_hz           = 13000000,
         .bus_num                = 1,
         .chip_select            = 0,
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
index 9db35a7fcfc0..a4dd1c347050 100644
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -233,7 +233,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
         /* FIXME: Shared IRQs on COM1-COM4 will not work properly on v1i1 hardware. */
         { /* COM1 */
                 .mapbase        = 0x10000000,
-                .irq            = gpio_to_irq(ZEUS_UARTA_GPIO),
+                .irq            = PXA_GPIO_TO_IRQ(ZEUS_UARTA_GPIO),
                 .irqflags       = IRQF_TRIGGER_RISING,
                 .uartclk        = 14745600,
                 .regshift       = 1,
@@ -242,7 +242,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
         },
         { /* COM2 */
                 .mapbase        = 0x10800000,
-                .irq            = gpio_to_irq(ZEUS_UARTB_GPIO),
+                .irq            = PXA_GPIO_TO_IRQ(ZEUS_UARTB_GPIO),
                 .irqflags       = IRQF_TRIGGER_RISING,
                 .uartclk        = 14745600,
                 .regshift       = 1,
@@ -251,7 +251,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
         },
         { /* COM3 */
                 .mapbase        = 0x11000000,
-                .irq            = gpio_to_irq(ZEUS_UARTC_GPIO),
+                .irq            = PXA_GPIO_TO_IRQ(ZEUS_UARTC_GPIO),
                 .irqflags       = IRQF_TRIGGER_RISING,
                 .uartclk        = 14745600,
                 .regshift       = 1,
@@ -260,7 +260,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
         },
         { /* COM4 */
                 .mapbase        = 0x11800000,
-                .irq            = gpio_to_irq(ZEUS_UARTD_GPIO),
+                .irq            = PXA_GPIO_TO_IRQ(ZEUS_UARTD_GPIO),
                 .irqflags       = IRQF_TRIGGER_RISING,
                 .uartclk        = 14745600,
                 .regshift       = 1,
@@ -321,8 +321,8 @@ static struct resource zeus_dm9k0_resource[] = {
                 .flags = IORESOURCE_MEM
         },
         [2] = {
-                .start = gpio_to_irq(ZEUS_ETH0_GPIO),
-                .end   = gpio_to_irq(ZEUS_ETH0_GPIO),
+                .start = PXA_GPIO_TO_IRQ(ZEUS_ETH0_GPIO),
+                .end   = PXA_GPIO_TO_IRQ(ZEUS_ETH0_GPIO),
                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
         },
 };
@@ -339,8 +339,8 @@ static struct resource zeus_dm9k1_resource[] = {
                 .flags = IORESOURCE_MEM,
         },
         [2] = {
-                .start = gpio_to_irq(ZEUS_ETH1_GPIO),
-                .end   = gpio_to_irq(ZEUS_ETH1_GPIO),
+                .start = PXA_GPIO_TO_IRQ(ZEUS_ETH1_GPIO),
+                .end   = PXA_GPIO_TO_IRQ(ZEUS_ETH1_GPIO),
                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
         },
 };
@@ -423,7 +423,7 @@ static struct spi_board_info zeus_spi_board_info[] = {
         [0] = {
                 .modalias       = "mcp2515",
                 .platform_data  = &zeus_mcp2515_pdata,
-                .irq            = gpio_to_irq(ZEUS_CAN_GPIO),
+                .irq            = PXA_GPIO_TO_IRQ(ZEUS_CAN_GPIO),
                 .max_speed_hz   = 1*1000*1000,
                 .bus_num        = 3,
                 .mode           = SPI_MODE_0,
@@ -753,7 +753,7 @@ static struct i2c_board_info __initdata zeus_i2c_devices[] = {
         {
                 I2C_BOARD_INFO("pca9535",       0x20),
                 .platform_data  = &zeus_pca953x_pdata[2],
-                .irq            = gpio_to_irq(ZEUS_EXTGPIO_GPIO),
+                .irq            = PXA_GPIO_TO_IRQ(ZEUS_EXTGPIO_GPIO),
         },
         { I2C_BOARD_INFO("lm75a",       0x48) },
         { I2C_BOARD_INFO("24c01",       0x50) },
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c
index 7678b1bf7903..98eec80623e3 100644
--- a/arch/arm/mach-pxa/zylonite.c
+++ b/arch/arm/mach-pxa/zylonite.c
@@ -408,8 +408,8 @@ static void __init zylonite_init(void)
          * Note: We depend that the bootloader set
          * the correct value to MSC register for SMC91x.
          */
-        smc91x_resources[1].start = gpio_to_irq(gpio_eth_irq);
-        smc91x_resources[1].end   = gpio_to_irq(gpio_eth_irq);
+        smc91x_resources[1].start = PXA_GPIO_TO_IRQ(gpio_eth_irq);
+        smc91x_resources[1].end   = PXA_GPIO_TO_IRQ(gpio_eth_irq);
         platform_device_register(&smc91x_device);
 
         pxa_set_ac97_info(NULL);
diff --git a/arch/arm/mach-pxa/zylonite_pxa300.c b/arch/arm/mach-pxa/zylonite_pxa300.c
index 93c64d8d7de9..86e59c043de2 100644
--- a/arch/arm/mach-pxa/zylonite_pxa300.c
+++ b/arch/arm/mach-pxa/zylonite_pxa300.c
@@ -231,12 +231,12 @@ static struct i2c_board_info zylonite_i2c_board_info[] = {
                 .type           = "pca9539",
                 .addr           = 0x74,
                 .platform_data  = &gpio_exp[0],
-                .irq            = IRQ_GPIO(18),
+                .irq            = PXA_GPIO_TO_IRQ(18),
         }, {
                 .type           = "pca9539",
                 .addr           = 0x75,
                 .platform_data  = &gpio_exp[1],
-                .irq            = IRQ_GPIO(19),
+                .irq            = PXA_GPIO_TO_IRQ(19),
         },
 };
 
diff --git a/arch/arm/mach-s5p64x0/Kconfig b/arch/arm/mach-s5p64x0/Kconfig
index dd8c85ef6dab..c87f6108eeb1 100644
--- a/arch/arm/mach-s5p64x0/Kconfig
+++ b/arch/arm/mach-s5p64x0/Kconfig
@@ -41,6 +41,11 @@ config S5P64X0_SETUP_SPI
         help
           Common setup code for SPI GPIO configurations
 
+config S5P64X0_SETUP_SDHCI_GPIO
+        bool
+        help
+          Common setup code for SDHCI gpio.
+
 # machine support
 
 config MACH_SMDK6440
@@ -50,12 +55,16 @@ config MACH_SMDK6440
         select S3C_DEV_I2C1
         select S3C_DEV_RTC
         select S3C_DEV_WDT
+        select S3C_DEV_HSMMC
+        select S3C_DEV_HSMMC1
+        select S3C_DEV_HSMMC2
         select SAMSUNG_DEV_ADC
         select SAMSUNG_DEV_BACKLIGHT
         select SAMSUNG_DEV_PWM
         select SAMSUNG_DEV_TS
         select S5P64X0_SETUP_FB_24BPP
         select S5P64X0_SETUP_I2C1
+        select S5P64X0_SETUP_SDHCI_GPIO
         help
           Machine support for the Samsung SMDK6440
 
@@ -66,13 +75,28 @@ config MACH_SMDK6450
         select S3C_DEV_I2C1
         select S3C_DEV_RTC
         select S3C_DEV_WDT
+        select S3C_DEV_HSMMC
+        select S3C_DEV_HSMMC1
+        select S3C_DEV_HSMMC2
         select SAMSUNG_DEV_ADC
         select SAMSUNG_DEV_BACKLIGHT
         select SAMSUNG_DEV_PWM
         select SAMSUNG_DEV_TS
         select S5P64X0_SETUP_FB_24BPP
         select S5P64X0_SETUP_I2C1
+        select S5P64X0_SETUP_SDHCI_GPIO
         help
           Machine support for the Samsung SMDK6450
 
+menu "Use 8-bit SDHCI bus width"
+
+config S5P64X0_SD_CH1_8BIT
+        bool "SDHCI Channel 1 (Slot 1)"
+        depends on MACH_SMDK6450 || MACH_SMDK6440
+        help
+          Support SDHCI Channel 1 8-bit bus.
+          If selected, Channel 2 is disabled.
+
+endmenu
+
 endif
diff --git a/arch/arm/mach-s5p64x0/Makefile b/arch/arm/mach-s5p64x0/Makefile
index e167ca136f5d..12bb951187a4 100644
--- a/arch/arm/mach-s5p64x0/Makefile
+++ b/arch/arm/mach-s5p64x0/Makefile
@@ -33,3 +33,4 @@ obj-y					+= setup-i2c0.o
 obj-$(CONFIG_S5P64X0_SETUP_I2C1)        += setup-i2c1.o
 obj-$(CONFIG_S5P64X0_SETUP_FB_24BPP)    += setup-fb-24bpp.o
 obj-$(CONFIG_S5P64X0_SETUP_SPI)         += setup-spi.o
+obj-$(CONFIG_S5P64X0_SETUP_SDHCI_GPIO)  += setup-sdhci-gpio.o
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6440.c b/arch/arm/mach-s5p64x0/clock-s5p6440.c
index 925d2daa60c7..ee1e8e7f5631 100644
--- a/arch/arm/mach-s5p64x0/clock-s5p6440.c
+++ b/arch/arm/mach-s5p64x0/clock-s5p6440.c
@@ -380,36 +380,6 @@ static struct clksrc_sources clkset_audio = {
 static struct clksrc_clk clksrcs[] = {
         {
                 .clk    = {
-                        .name           = "sclk_mmc",
-                        .devname        = "s3c-sdhci.0",
-                        .ctrlbit        = (1 << 24),
-                        .enable         = s5p64x0_sclk_ctrl,
-                },
-                .sources = &clkset_group1,
-                .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 18, .size = 2 },
-                .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 0, .size = 4 },
-        }, {
-                .clk    = {
-                        .name           = "sclk_mmc",
-                        .devname        = "s3c-sdhci.1",
-                        .ctrlbit        = (1 << 25),
-                        .enable         = s5p64x0_sclk_ctrl,
-                },
-                .sources = &clkset_group1,
-                .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 20, .size = 2 },
-                .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 4, .size = 4 },
-        }, {
-                .clk    = {
-                        .name           = "sclk_mmc",
-                        .devname        = "s3c-sdhci.2",
-                        .ctrlbit        = (1 << 26),
-                        .enable         = s5p64x0_sclk_ctrl,
-                },
-                .sources = &clkset_group1,
-                .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 22, .size = 2 },
-                .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 8, .size = 4 },
-        }, {
-                .clk    = {
                         .name           = "sclk_post",
                         .ctrlbit        = (1 << 10),
                         .enable         = s5p64x0_sclk_ctrl,
@@ -447,6 +417,42 @@ static struct clksrc_clk clksrcs[] = {
         },
 };
 
+static struct clksrc_clk clk_sclk_mmc0 = {
+        .clk    = {
+                .name           = "sclk_mmc",
+                .devname        = "s3c-sdhci.0",
+                .ctrlbit        = (1 << 24),
+                .enable         = s5p64x0_sclk_ctrl,
+        },
+        .sources = &clkset_group1,
+        .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 18, .size = 2 },
+        .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 0, .size = 4 },
+};
+
+static struct clksrc_clk clk_sclk_mmc1 = {
+        .clk    = {
+                .name           = "sclk_mmc",
+                .devname        = "s3c-sdhci.1",
+                .ctrlbit        = (1 << 25),
+                .enable         = s5p64x0_sclk_ctrl,
+        },
+        .sources = &clkset_group1,
+        .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 20, .size = 2 },
+        .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 4, .size = 4 },
+};
+
+static struct clksrc_clk clk_sclk_mmc2 = {
+        .clk    = {
+                .name           = "sclk_mmc",
+                .devname        = "s3c-sdhci.2",
+                .ctrlbit        = (1 << 26),
+                .enable         = s5p64x0_sclk_ctrl,
+        },
+        .sources = &clkset_group1,
+        .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 22, .size = 2 },
+        .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 8, .size = 4 },
+};
+
 static struct clksrc_clk clk_sclk_uclk = {
         .clk    = {
                 .name           = "uclk1",
@@ -504,6 +510,9 @@ static struct clksrc_clk *clksrc_cdev[] = {
         &clk_sclk_uclk,
         &clk_sclk_spi0,
         &clk_sclk_spi1,
+        &clk_sclk_mmc0,
+        &clk_sclk_mmc1,
+        &clk_sclk_mmc2
 };
 
 static struct clk_lookup s5p6440_clk_lookup[] = {
@@ -512,6 +521,9 @@ static struct clk_lookup s5p6440_clk_lookup[] = {
         CLKDEV_INIT(NULL, "spi_busclk0", &clk_p),
         CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk1", &clk_sclk_spi0.clk),
         CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk1", &clk_sclk_spi1.clk),
+        CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk),
+        CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk),
+        CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk),
 };
 
 void __init_or_cpufreq s5p6440_setup_clocks(void)
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6450.c b/arch/arm/mach-s5p64x0/clock-s5p6450.c
index c390a59f68ac..dae6a13f43bb 100644
--- a/arch/arm/mach-s5p64x0/clock-s5p6450.c
+++ b/arch/arm/mach-s5p64x0/clock-s5p6450.c
@@ -414,36 +414,6 @@ static struct clksrc_clk clk_sclk_audio0 = {
 static struct clksrc_clk clksrcs[] = {
         {
                 .clk    = {
-                        .name           = "sclk_mmc",
-                        .devname        = "s3c-sdhci.0",
-                        .ctrlbit        = (1 << 24),
-                        .enable         = s5p64x0_sclk_ctrl,
-                },
-                .sources = &clkset_group2,
-                .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 18, .size = 2 },
-                .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 0, .size = 4 },
-        }, {
-                .clk    = {
-                        .name           = "sclk_mmc",
-                        .devname        = "s3c-sdhci.1",
-                        .ctrlbit        = (1 << 25),
-                        .enable         = s5p64x0_sclk_ctrl,
-                },
-                .sources = &clkset_group2,
-                .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 20, .size = 2 },
-                .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 4, .size = 4 },
-        }, {
-                .clk    = {
-                        .name           = "sclk_mmc",
-                        .devname        = "s3c-sdhci.2",
-                        .ctrlbit        = (1 << 26),
-                        .enable         = s5p64x0_sclk_ctrl,
-                },
-                .sources = &clkset_group2,
-                .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 22, .size = 2 },
-                .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 8, .size = 4 },
-        }, {
-                .clk    = {
                         .name           = "sclk_fimc",
                         .ctrlbit        = (1 << 10),
                         .enable         = s5p64x0_sclk_ctrl,
@@ -508,6 +478,42 @@ static struct clksrc_clk clksrcs[] = {
         },
 };
 
+static struct clksrc_clk clk_sclk_mmc0 = {
+        .clk    = {
+                .name           = "sclk_mmc",
+                .devname        = "s3c-sdhci.0",
+                .ctrlbit        = (1 << 24),
+                .enable         = s5p64x0_sclk_ctrl,
+        },
+        .sources = &clkset_group2,
+        .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 18, .size = 2 },
+        .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 0, .size = 4 },
+};
+
+static struct clksrc_clk clk_sclk_mmc1 = {
+        .clk    = {
+                .name           = "sclk_mmc",
+                .devname        = "s3c-sdhci.1",
+                .ctrlbit        = (1 << 25),
+                .enable         = s5p64x0_sclk_ctrl,
+        },
+        .sources = &clkset_group2,
+        .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 20, .size = 2 },
+        .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 4, .size = 4 },
+};
+
+static struct clksrc_clk clk_sclk_mmc2 = {
+        .clk    = {
+                .name           = "sclk_mmc",
+                .devname        = "s3c-sdhci.2",
+                .ctrlbit        = (1 << 26),
+                .enable         = s5p64x0_sclk_ctrl,
+        },
+        .sources = &clkset_group2,
+        .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 22, .size = 2 },
+        .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 8, .size = 4 },
+};
+
 static struct clksrc_clk clk_sclk_uclk = {
         .clk    = {
                 .name           = "uclk1",
@@ -547,6 +553,9 @@ static struct clksrc_clk *clksrc_cdev[] = {
         &clk_sclk_uclk,
         &clk_sclk_spi0,
         &clk_sclk_spi1,
+        &clk_sclk_mmc0,
+        &clk_sclk_mmc1,
+        &clk_sclk_mmc2,
 };
 
 static struct clk_lookup s5p6450_clk_lookup[] = {
@@ -555,6 +564,9 @@ static struct clk_lookup s5p6450_clk_lookup[] = {
         CLKDEV_INIT(NULL, "spi_busclk0", &clk_p),
         CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk1", &clk_sclk_spi0.clk),
         CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk1", &clk_sclk_spi1.clk),
+        CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk),
+        CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk),
+        CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk),
 };
 
 /* Clock initialization code */
diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c
index 0d50e79fb9fc..52b89a376447 100644
--- a/arch/arm/mach-s5p64x0/common.c
+++ b/arch/arm/mach-s5p64x0/common.c
@@ -40,6 +40,7 @@
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/pm.h>
+#include <plat/sdhci.h>
 #include <plat/adc-core.h>
 #include <plat/fb-core.h>
 #include <plat/gpio-cfg.h>
@@ -181,6 +182,10 @@ void __init s5p6440_map_io(void)
         s3c_adc_setname("s3c64xx-adc");
         s3c_fb_setname("s5p64x0-fb");
 
+        s5p64x0_default_sdhci0();
+        s5p64x0_default_sdhci1();
+        s5p6440_default_sdhci2();
+
         iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc));
         init_consistent_dma_size(SZ_8M);
 }
@@ -191,6 +196,10 @@ void __init s5p6450_map_io(void)
         s3c_adc_setname("s3c64xx-adc");
         s3c_fb_setname("s5p64x0-fb");
 
+        s5p64x0_default_sdhci0();
+        s5p64x0_default_sdhci1();
+        s5p6450_default_sdhci2();
+
         iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc));
         init_consistent_dma_size(SZ_8M);
 }
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c
index 34d98a1dae57..a40e325d62c8 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6440.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c
@@ -24,6 +24,7 @@
 #include <linux/gpio.h>
 #include <linux/pwm_backlight.h>
 #include <linux/fb.h>
+#include <linux/mmc/host.h>
 
 #include <video/platform_lcd.h>
 
@@ -52,6 +53,7 @@
 #include <plat/backlight.h>
 #include <plat/fb.h>
 #include <plat/regs-fb.h>
+#include <plat/sdhci.h>
 
 #include "common.h"
 
@@ -163,6 +165,25 @@ static struct platform_device *smdk6440_devices[] __initdata = {
         &s5p6440_device_iis,
         &s3c_device_fb,
         &smdk6440_lcd_lte480wv,
+        &s3c_device_hsmmc0,
+        &s3c_device_hsmmc1,
+        &s3c_device_hsmmc2,
+};
+
+static struct s3c_sdhci_platdata smdk6440_hsmmc0_pdata __initdata = {
+        .cd_type        = S3C_SDHCI_CD_NONE,
+};
+
+static struct s3c_sdhci_platdata smdk6440_hsmmc1_pdata __initdata = {
+        .cd_type        = S3C_SDHCI_CD_INTERNAL,
+#if defined(CONFIG_S5P64X0_SD_CH1_8BIT)
+        .max_width      = 8,
+        .host_caps      = MMC_CAP_8_BIT_DATA,
+#endif
+};
+
+static struct s3c_sdhci_platdata smdk6440_hsmmc2_pdata __initdata = {
+        .cd_type        = S3C_SDHCI_CD_NONE,
 };
 
 static struct s3c2410_platform_i2c s5p6440_i2c0_data __initdata = {
@@ -236,6 +257,10 @@ static void __init smdk6440_machine_init(void)
         s5p6440_set_lcd_interface();
         s3c_fb_set_platdata(&smdk6440_lcd_pdata);
 
+        s3c_sdhci0_set_platdata(&smdk6440_hsmmc0_pdata);
+        s3c_sdhci1_set_platdata(&smdk6440_hsmmc1_pdata);
+        s3c_sdhci2_set_platdata(&smdk6440_hsmmc2_pdata);
+
         platform_add_devices(smdk6440_devices, ARRAY_SIZE(smdk6440_devices));
 }
 
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c
index 135cf5d84737..efb69e2f2afe 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6450.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c
@@ -24,6 +24,7 @@
 #include <linux/gpio.h>
 #include <linux/pwm_backlight.h>
 #include <linux/fb.h>
+#include <linux/mmc/host.h>
 
 #include <video/platform_lcd.h>
 
@@ -52,6 +53,7 @@
 #include <plat/backlight.h>
 #include <plat/fb.h>
 #include <plat/regs-fb.h>
+#include <plat/sdhci.h>
 
 #include "common.h"
 
@@ -181,10 +183,28 @@ static struct platform_device *smdk6450_devices[] __initdata = {
         &s5p6450_device_iis0,
         &s3c_device_fb,
         &smdk6450_lcd_lte480wv,
-
+        &s3c_device_hsmmc0,
+        &s3c_device_hsmmc1,
+        &s3c_device_hsmmc2,
         /* s5p6450_device_spi0 will be added */
 };
 
+static struct s3c_sdhci_platdata smdk6450_hsmmc0_pdata __initdata = {
+        .cd_type        = S3C_SDHCI_CD_NONE,
+};
+
+static struct s3c_sdhci_platdata smdk6450_hsmmc1_pdata __initdata = {
+        .cd_type        = S3C_SDHCI_CD_NONE,
+#if defined(CONFIG_S5P64X0_SD_CH1_8BIT)
+        .max_width      = 8,
+        .host_caps      = MMC_CAP_8_BIT_DATA,
+#endif
+};
+
+static struct s3c_sdhci_platdata smdk6450_hsmmc2_pdata __initdata = {
+        .cd_type        = S3C_SDHCI_CD_NONE,
+};
+
 static struct s3c2410_platform_i2c s5p6450_i2c0_data __initdata = {
         .flags          = 0,
         .slave_addr     = 0x10,
@@ -256,6 +276,10 @@ static void __init smdk6450_machine_init(void)
         s5p6450_set_lcd_interface();
         s3c_fb_set_platdata(&smdk6450_lcd_pdata);
 
+        s3c_sdhci0_set_platdata(&smdk6450_hsmmc0_pdata);
+        s3c_sdhci1_set_platdata(&smdk6450_hsmmc1_pdata);
+        s3c_sdhci2_set_platdata(&smdk6450_hsmmc2_pdata);
+
         platform_add_devices(smdk6450_devices, ARRAY_SIZE(smdk6450_devices));
 }
 
diff --git a/arch/arm/mach-s5p64x0/setup-sdhci-gpio.c b/arch/arm/mach-s5p64x0/setup-sdhci-gpio.c
new file mode 100644
index 000000000000..8410af0d12bf
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/setup-sdhci-gpio.c
@@ -0,0 +1,104 @@
+/* linux/arch/arm/mach-s5p64x0/setup-sdhci-gpio.c
+ *
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * S5P64X0 - Helper functions for setting up SDHCI device(s) GPIO (HSMMC)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+
+#include <mach/regs-gpio.h>
+#include <mach/regs-clock.h>
+
+#include <plat/gpio-cfg.h>
+#include <plat/sdhci.h>
+#include <plat/cpu.h>
+
+void s5p64x0_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
+{
+        struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
+
+        /* Set all the necessary GPG pins to special-function 2 */
+        if (soc_is_s5p6450())
+                s3c_gpio_cfgrange_nopull(S5P6450_GPG(0), 2 + width,
+                                         S3C_GPIO_SFN(2));
+        else
+                s3c_gpio_cfgrange_nopull(S5P6440_GPG(0), 2 + width,
+                                         S3C_GPIO_SFN(2));
+
+        /* Set GPG[6] pin to special-function 2 - MMC0 CDn */
+        if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
+                if (soc_is_s5p6450()) {
+                        s3c_gpio_setpull(S5P6450_GPG(6), S3C_GPIO_PULL_UP);
+                        s3c_gpio_cfgpin(S5P6450_GPG(6), S3C_GPIO_SFN(2));
+                } else {
+                        s3c_gpio_setpull(S5P6440_GPG(6), S3C_GPIO_PULL_UP);
+                        s3c_gpio_cfgpin(S5P6440_GPG(6), S3C_GPIO_SFN(2));
+                }
+        }
+}
+
+void s5p64x0_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
+{
+        struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
+
+        /* Set GPH[0:1] pins to special-function 2 - CLK and CMD */
+        if (soc_is_s5p6450())
+                s3c_gpio_cfgrange_nopull(S5P6450_GPH(0), 2, S3C_GPIO_SFN(2));
+        else
+                s3c_gpio_cfgrange_nopull(S5P6440_GPH(0), 2 , S3C_GPIO_SFN(2));
+
+        switch (width) {
+        case 8:
+                /* Set data pins GPH[6:9] special-function 2 */
+                if (soc_is_s5p6450())
+                        s3c_gpio_cfgrange_nopull(S5P6450_GPH(6), 4,
+                                                 S3C_GPIO_SFN(2));
+                else
+                        s3c_gpio_cfgrange_nopull(S5P6440_GPH(6), 4,
+                                                 S3C_GPIO_SFN(2));
+        case 4:
+                /* set data pins GPH[2:5] special-function 2 */
+                if (soc_is_s5p6450())
+                        s3c_gpio_cfgrange_nopull(S5P6450_GPH(2), 4,
+                                                 S3C_GPIO_SFN(2));
+                else
+                        s3c_gpio_cfgrange_nopull(S5P6440_GPH(2), 4,
+                                                 S3C_GPIO_SFN(2));
+        default:
+                break;
+        }
+
+        /* Set GPG[6] pin to special-funtion 3 : MMC1 CDn */
+        if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
+                if (soc_is_s5p6450()) {
+                        s3c_gpio_setpull(S5P6450_GPG(6), S3C_GPIO_PULL_UP);
+                        s3c_gpio_cfgpin(S5P6450_GPG(6), S3C_GPIO_SFN(3));
+                } else {
+                        s3c_gpio_setpull(S5P6440_GPG(6), S3C_GPIO_PULL_UP);
+                        s3c_gpio_cfgpin(S5P6440_GPG(6), S3C_GPIO_SFN(3));
+                }
+        }
+}
+
+void s5p6440_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)
+{
+        /* Set GPC[4:5] pins to special-function 3 - CLK and CMD */
+        s3c_gpio_cfgrange_nopull(S5P6440_GPC(4), 2, S3C_GPIO_SFN(3));
+
+        /* Set data pins GPH[6:9] pins to special-function 3 */
+        s3c_gpio_cfgrange_nopull(S5P6440_GPH(6), 4, S3C_GPIO_SFN(3));
+}
+
+void s5p6450_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)
+{
+        /* Set all the necessary GPG pins to special-function 3 */
+        s3c_gpio_cfgrange_nopull(S5P6450_GPG(7), 2 + width, S3C_GPIO_SFN(3));
+}
diff --git a/arch/arm/mach-sa1100/clock.c b/arch/arm/mach-sa1100/clock.c
index dab3c6347a8f..d6df9f6c9f7e 100644
--- a/arch/arm/mach-sa1100/clock.c
+++ b/arch/arm/mach-sa1100/clock.c
@@ -11,17 +11,39 @@
 #include <linux/clk.h>
 #include <linux/spinlock.h>
 #include <linux/mutex.h>
+#include <linux/io.h>
+#include <linux/clkdev.h>
 
 #include <mach/hardware.h>
 
-/*
- * Very simple clock implementation - we only have one clock to deal with.
- */
+struct clkops {
+        void                    (*enable)(struct clk *);
+        void                    (*disable)(struct clk *);
+        unsigned long           (*getrate)(struct clk *);
+};
+
 struct clk {
+        const struct clkops     *ops;
+        unsigned long           rate;
         unsigned int            enabled;
 };
 
-static void clk_gpio27_enable(void)
+#define INIT_CLKREG(_clk, _devname, _conname)           \
+        {                                               \
+                .clk            = _clk,                 \
+                .dev_id         = _devname,             \
+                .con_id         = _conname,             \
+        }
+
+#define DEFINE_CLK(_name, _ops, _rate)                  \
+struct clk clk_##_name = {                              \
+                .ops    = _ops,                         \
+                .rate   = _rate,                        \
+        }
+
+static DEFINE_SPINLOCK(clocks_lock);
+
+static void clk_gpio27_enable(struct clk *clk)
 {
         /*
          * First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
@@ -32,38 +54,22 @@ static void clk_gpio27_enable(void)
         TUCR = TUCR_3_6864MHz;
 }
 
-static void clk_gpio27_disable(void)
+static void clk_gpio27_disable(struct clk *clk)
 {
         TUCR = 0;
         GPDR &= ~GPIO_32_768kHz;
         GAFR &= ~GPIO_32_768kHz;
 }
 
-static struct clk clk_gpio27;
-
-static DEFINE_SPINLOCK(clocks_lock);
-
-struct clk *clk_get(struct device *dev, const char *id)
-{
-        const char *devname = dev_name(dev);
-
-        return strcmp(devname, "sa1111.0") ? ERR_PTR(-ENOENT) : &clk_gpio27;
-}
-EXPORT_SYMBOL(clk_get);
-
-void clk_put(struct clk *clk)
-{
-}
-EXPORT_SYMBOL(clk_put);
-
 int clk_enable(struct clk *clk)
 {
         unsigned long flags;
 
         spin_lock_irqsave(&clocks_lock, flags);
         if (clk->enabled++ == 0)
-                clk_gpio27_enable();
+                clk->ops->enable(clk);
         spin_unlock_irqrestore(&clocks_lock, flags);
+
         return 0;
 }
 EXPORT_SYMBOL(clk_enable);
@@ -76,13 +82,48 @@ void clk_disable(struct clk *clk)
 
         spin_lock_irqsave(&clocks_lock, flags);
         if (--clk->enabled == 0)
-                clk_gpio27_disable();
+                clk->ops->disable(clk);
         spin_unlock_irqrestore(&clocks_lock, flags);
 }
 EXPORT_SYMBOL(clk_disable);
 
 unsigned long clk_get_rate(struct clk *clk)
 {
-        return 3686400;
+        unsigned long rate;
+
+        rate = clk->rate;
+        if (clk->ops->getrate)
+                rate = clk->ops->getrate(clk);
+
+        return rate;
 }
 EXPORT_SYMBOL(clk_get_rate);
+
+const struct clkops clk_gpio27_ops = {
+        .enable         = clk_gpio27_enable,
+        .disable        = clk_gpio27_disable,
+};
+
+static void clk_dummy_enable(struct clk *clk) { }
+static void clk_dummy_disable(struct clk *clk) { }
+
+const struct clkops clk_dummy_ops = {
+        .enable         = clk_dummy_enable,
+        .disable        = clk_dummy_disable,
+};
+
+static DEFINE_CLK(gpio27, &clk_gpio27_ops, 3686400);
+static DEFINE_CLK(dummy, &clk_dummy_ops, 0);
+
+static struct clk_lookup sa11xx_clkregs[] = {
+        INIT_CLKREG(&clk_gpio27, "sa1111.0", NULL),
+        INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
+};
+
+static int __init sa11xx_clk_init(void)
+{
+        clkdev_add_table(sa11xx_clkregs, ARRAY_SIZE(sa11xx_clkregs));
+        return 0;
+}
+
+postcore_initcall(sa11xx_clk_init);
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index bb10ee2cb89f..480d2ea46b00 100644
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -345,9 +345,29 @@ void sa11x0_register_irda(struct irda_platform_data *irda)
         sa11x0_register_device(&sa11x0ir_device, irda);
 }
 
+static struct resource sa11x0rtc_resources[] = {
+        [0] = {
+                .start  = 0x90010000,
+                .end    = 0x900100ff,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_RTC1Hz,
+                .end    = IRQ_RTC1Hz,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                .start  = IRQ_RTCAlrm,
+                .end    = IRQ_RTCAlrm,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
 static struct platform_device sa11x0rtc_device = {
         .name           = "sa1100-rtc",
         .id             = -1,
+        .resource       = sa11x0rtc_resources,
+        .num_resources  = ARRAY_SIZE(sa11x0rtc_resources),
 };
 
 static struct platform_device *sa11x0_devices[] __initdata = {
diff --git a/arch/arm/plat-omap/include/plat/mmc.h b/arch/arm/plat-omap/include/plat/mmc.h
index 94cf70afb236..f75946c3293d 100644
--- a/arch/arm/plat-omap/include/plat/mmc.h
+++ b/arch/arm/plat-omap/include/plat/mmc.h
@@ -96,6 +96,7 @@ struct omap_mmc_platform_data {
                  */
                 u8  wires;      /* Used for the MMC driver on omap1 and 2420 */
                 u32 caps;       /* Used for the MMC driver on 2430 and later */
+                u32 pm_caps;    /* PM capabilities of the mmc */
 
                 /*
                  * nomux means "standard" muxing is wrong on this board, and
diff --git a/arch/arm/plat-omap/include/plat/usb.h b/arch/arm/plat-omap/include/plat/usb.h
index c616385f27bd..dc864b580da0 100644
--- a/arch/arm/plat-omap/include/plat/usb.h
+++ b/arch/arm/plat-omap/include/plat/usb.h
@@ -100,9 +100,6 @@ extern void usb_musb_init(struct omap_musb_board_data *board_data);
 
 extern void usbhs_init(const struct usbhs_omap_board_data *pdata);
 
-extern int omap_usbhs_enable(struct device *dev);
-extern void omap_usbhs_disable(struct device *dev);
-
 extern int omap4430_phy_power(struct device *dev, int ID, int on);
 extern int omap4430_phy_set_clk(struct device *dev, int on);
 extern int omap4430_phy_init(struct device *dev);
diff --git a/arch/arm/plat-pxa/include/plat/gpio-pxa.h b/arch/arm/plat-pxa/include/plat/gpio-pxa.h
deleted file mode 100644
index b6390beff323..000000000000
--- a/arch/arm/plat-pxa/include/plat/gpio-pxa.h
+++ /dev/null
@@ -1,44 +0,0 @@
-#ifndef __PLAT_PXA_GPIO_H
-#define __PLAT_PXA_GPIO_H
-
-struct irq_data;
-
-/*
- * We handle the GPIOs by banks, each bank covers up to 32 GPIOs with
- * one set of registers. The register offsets are organized below:
- *
- *           GPLR    GPDR    GPSR    GPCR    GRER    GFER    GEDR
- * BANK 0 - 0x0000  0x000C  0x0018  0x0024  0x0030  0x003C  0x0048
- * BANK 1 - 0x0004  0x0010  0x001C  0x0028  0x0034  0x0040  0x004C
- * BANK 2 - 0x0008  0x0014  0x0020  0x002C  0x0038  0x0044  0x0050
- *
- * BANK 3 - 0x0100  0x010C  0x0118  0x0124  0x0130  0x013C  0x0148
- * BANK 4 - 0x0104  0x0110  0x011C  0x0128  0x0134  0x0140  0x014C
- * BANK 5 - 0x0108  0x0114  0x0120  0x012C  0x0138  0x0144  0x0150
- *
- * NOTE:
- *   BANK 3 is only available on PXA27x and later processors.
- *   BANK 4 and 5 are only available on PXA935
- */
-
-#define GPIO_BANK(n)    (GPIO_REGS_VIRT + BANK_OFF(n))
-
-#define GPLR_OFFSET     0x00
-#define GPDR_OFFSET     0x0C
-#define GPSR_OFFSET     0x18
-#define GPCR_OFFSET     0x24
-#define GRER_OFFSET     0x30
-#define GFER_OFFSET     0x3C
-#define GEDR_OFFSET     0x48
-
-/* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85).
- * Those cases currently cause holes in the GPIO number space, the
- * actual number of the last GPIO is recorded by 'pxa_last_gpio'.
- */
-extern int pxa_last_gpio;
-
-typedef int (*set_wake_t)(struct irq_data *d, unsigned int on);
-
-extern void pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn);
-
-#endif /* __PLAT_PXA_GPIO_H */
diff --git a/arch/arm/plat-pxa/include/plat/gpio.h b/arch/arm/plat-pxa/include/plat/gpio.h
deleted file mode 100644
index 258f77210b02..000000000000
--- a/arch/arm/plat-pxa/include/plat/gpio.h
+++ /dev/null
@@ -1,30 +0,0 @@
-#ifndef __PLAT_GPIO_H
-#define __PLAT_GPIO_H
-
-#define __ARM_GPIOLIB_COMPLEX
-
-/* The individual machine provides register offsets and NR_BUILTIN_GPIO */
-#include <mach/gpio-pxa.h>
-
-static inline int gpio_get_value(unsigned gpio)
-{
-        if (__builtin_constant_p(gpio) && (gpio < NR_BUILTIN_GPIO))
-                return GPLR(gpio) & GPIO_bit(gpio);
-        else
-                return __gpio_get_value(gpio);
-}
-
-static inline void gpio_set_value(unsigned gpio, int value)
-{
-        if (__builtin_constant_p(gpio) && (gpio < NR_BUILTIN_GPIO)) {
-                if (value)
-                        GPSR(gpio) = GPIO_bit(gpio);
-                else
-                        GPCR(gpio) = GPIO_bit(gpio);
-        } else
-                __gpio_set_value(gpio, value);
-}
-
-#define gpio_cansleep           __gpio_cansleep
-
-#endif /* __PLAT_GPIO_H */
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index 83b1e31696d9..4214ea0ff8fe 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -123,6 +123,7 @@ extern struct platform_device exynos4_device_dwmci;
 extern struct platform_device exynos4_device_i2s0;
 extern struct platform_device exynos4_device_i2s1;
 extern struct platform_device exynos4_device_i2s2;
+extern struct platform_device exynos4_device_ohci;
 extern struct platform_device exynos4_device_pcm0;
 extern struct platform_device exynos4_device_pcm1;
 extern struct platform_device exynos4_device_pcm2;
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h
index dcff7dd1ae8a..656dc00d30ed 100644
--- a/arch/arm/plat-samsung/include/plat/sdhci.h
+++ b/arch/arm/plat-samsung/include/plat/sdhci.h
@@ -123,6 +123,10 @@ extern void exynos4_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
 extern void exynos4_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
 extern void exynos4_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
 extern void exynos4_setup_sdhci3_cfg_gpio(struct platform_device *, int w);
+extern void s5p64x0_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
+extern void s5p64x0_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
+extern void s5p6440_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
+extern void s5p6450_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
 
 /* S3C2416 SDHCI setup */
 
@@ -146,6 +150,7 @@ static inline void s3c2416_default_sdhci0(void) { }
 static inline void s3c2416_default_sdhci1(void) { }
 
 #endif /* CONFIG_S3C2416_SETUP_SDHCI */
+
 /* S3C64XX SDHCI setup */
 
 #ifdef CONFIG_S3C64XX_SETUP_SDHCI
@@ -201,6 +206,45 @@ static inline void s3c6400_default_sdhci2(void) { }
 
 #endif /* CONFIG_S3C64XX_SETUP_SDHCI */
 
+/* S5P64X0 SDHCI setup */
+
+#ifdef CONFIG_S5P64X0_SETUP_SDHCI
+static inline void s5p64x0_default_sdhci0(void)
+{
+#ifdef CONFIG_S3C_DEV_HSMMC
+        s3c_hsmmc0_def_platdata.cfg_gpio = s5p64x0_setup_sdhci0_cfg_gpio;
+#endif
+}
+
+static inline void s5p64x0_default_sdhci1(void)
+{
+#ifdef CONFIG_S3C_DEV_HSMMC1
+        s3c_hsmmc1_def_platdata.cfg_gpio = s5p64x0_setup_sdhci1_cfg_gpio;
+#endif
+}
+
+static inline void s5p6440_default_sdhci2(void)
+{
+#ifdef CONFIG_S3C_DEV_HSMMC2
+        s3c_hsmmc2_def_platdata.cfg_gpio = s5p6440_setup_sdhci2_cfg_gpio;
+#endif
+}
+
+static inline void s5p6450_default_sdhci2(void)
+{
+#ifdef CONFIG_S3C_DEV_HSMMC2
+        s3c_hsmmc2_def_platdata.cfg_gpio = s5p6450_setup_sdhci2_cfg_gpio;
+#endif
+}
+
+#else
+static inline void s5p64x0_default_sdhci0(void) { }
+static inline void s5p64x0_default_sdhci1(void) { }
+static inline void s5p6440_default_sdhci2(void) { }
+static inline void s5p6450_default_sdhci2(void) { }
+
+#endif /* CONFIG_S5P64X0_SETUP_SDHCI */
+
 /* S5PC100 SDHCI setup */
 
 #ifdef CONFIG_S5PC100_SETUP_SDHCI
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 5099681cf503..e3380137b05b 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -141,6 +141,12 @@ config GPIO_PL061
         help
           Say yes here to support the PrimeCell PL061 GPIO device
 
+config GPIO_PXA
+        bool "PXA GPIO support"
+        depends on ARCH_PXA || ARCH_MMP
+        help
+          Say yes here to support the PXA GPIO device
+
 config GPIO_XILINX
         bool "Xilinx GPIO support"
         depends on PPC_OF || MICROBLAZE
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 4e018d6a7639..8ef9e9abe970 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -40,7 +40,7 @@ obj-$(CONFIG_GPIO_PCA953X)	+= gpio-pca953x.o
 obj-$(CONFIG_GPIO_PCF857X)      += gpio-pcf857x.o
 obj-$(CONFIG_GPIO_PCH)          += gpio-pch.o
 obj-$(CONFIG_GPIO_PL061)        += gpio-pl061.o
-obj-$(CONFIG_PLAT_PXA)          += gpio-pxa.o
+obj-$(CONFIG_GPIO_PXA)          += gpio-pxa.o
 obj-$(CONFIG_GPIO_RDC321X)      += gpio-rdc321x.o
 obj-$(CONFIG_PLAT_SAMSUNG)      += gpio-samsung.o
 obj-$(CONFIG_ARCH_SA1100)       += gpio-sa1100.o
diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c
index ee137712f9db..b2d3ee1d183a 100644
--- a/drivers/gpio/gpio-pxa.c
+++ b/drivers/gpio/gpio-pxa.c
@@ -11,14 +11,46 @@
  *  it under the terms of the GNU General Public License version 2 as
  *  published by the Free Software Foundation.
  */
+#include <linux/clk.h>
+#include <linux/err.h>
 #include <linux/gpio.h>
+#include <linux/gpio-pxa.h>
 #include <linux/init.h>
 #include <linux/irq.h>
 #include <linux/io.h>
+#include <linux/platform_device.h>
 #include <linux/syscore_ops.h>
 #include <linux/slab.h>
 
-#include <mach/gpio-pxa.h>
+/*
+ * We handle the GPIOs by banks, each bank covers up to 32 GPIOs with
+ * one set of registers. The register offsets are organized below:
+ *
+ *           GPLR    GPDR    GPSR    GPCR    GRER    GFER    GEDR
+ * BANK 0 - 0x0000  0x000C  0x0018  0x0024  0x0030  0x003C  0x0048
+ * BANK 1 - 0x0004  0x0010  0x001C  0x0028  0x0034  0x0040  0x004C
+ * BANK 2 - 0x0008  0x0014  0x0020  0x002C  0x0038  0x0044  0x0050
+ *
+ * BANK 3 - 0x0100  0x010C  0x0118  0x0124  0x0130  0x013C  0x0148
+ * BANK 4 - 0x0104  0x0110  0x011C  0x0128  0x0134  0x0140  0x014C
+ * BANK 5 - 0x0108  0x0114  0x0120  0x012C  0x0138  0x0144  0x0150
+ *
+ * NOTE:
+ *   BANK 3 is only available on PXA27x and later processors.
+ *   BANK 4 and 5 are only available on PXA935
+ */
+
+#define GPLR_OFFSET     0x00
+#define GPDR_OFFSET     0x0C
+#define GPSR_OFFSET     0x18
+#define GPCR_OFFSET     0x24
+#define GRER_OFFSET     0x30
+#define GFER_OFFSET     0x3C
+#define GEDR_OFFSET     0x48
+#define GAFR_OFFSET     0x54
+#define ED_MASK_OFFSET  0x9C    /* GPIO edge detection for AP side */
+
+#define BANK_OFF(n)     (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
 
 int pxa_last_gpio;
 
@@ -39,8 +71,20 @@ struct pxa_gpio_chip {
 #endif
 };
 
+enum {
+        PXA25X_GPIO = 0,
+        PXA26X_GPIO,
+        PXA27X_GPIO,
+        PXA3XX_GPIO,
+        PXA93X_GPIO,
+        MMP_GPIO = 0x10,
+        MMP2_GPIO,
+};
+
 static DEFINE_SPINLOCK(gpio_lock);
 static struct pxa_gpio_chip *pxa_gpio_chips;
+static int gpio_type;
+static void __iomem *gpio_reg_base;
 
 #define for_each_gpio_chip(i, c)                        \
         for (i = 0, c = &pxa_gpio_chips[0]; i <= pxa_last_gpio; i += 32, c++)
@@ -55,6 +99,122 @@ static inline struct pxa_gpio_chip *gpio_to_pxachip(unsigned gpio)
         return &pxa_gpio_chips[gpio_to_bank(gpio)];
 }
 
+static inline int gpio_is_pxa_type(int type)
+{
+        return (type & MMP_GPIO) == 0;
+}
+
+static inline int gpio_is_mmp_type(int type)
+{
+        return (type & MMP_GPIO) != 0;
+}
+
+/* GPIO86/87/88/89 on PXA26x have their direction bits in PXA_GPDR(2 inverted,
+ * as well as their Alternate Function value being '1' for GPIO in GAFRx.
+ */
+static inline int __gpio_is_inverted(int gpio)
+{
+        if ((gpio_type == PXA26X_GPIO) && (gpio > 85))
+                return 1;
+        return 0;
+}
+
+/*
+ * On PXA25x and PXA27x, GAFRx and GPDRx together decide the alternate
+ * function of a GPIO, and GPDRx cannot be altered once configured. It
+ * is attributed as "occupied" here (I know this terminology isn't
+ * accurate, you are welcome to propose a better one :-)
+ */
+static inline int __gpio_is_occupied(unsigned gpio)
+{
+        struct pxa_gpio_chip *pxachip;
+        void __iomem *base;
+        unsigned long gafr = 0, gpdr = 0;
+        int ret, af = 0, dir = 0;
+
+        pxachip = gpio_to_pxachip(gpio);
+        base = gpio_chip_base(&pxachip->chip);
+        gpdr = readl_relaxed(base + GPDR_OFFSET);
+
+        switch (gpio_type) {
+        case PXA25X_GPIO:
+        case PXA26X_GPIO:
+        case PXA27X_GPIO:
+                gafr = readl_relaxed(base + GAFR_OFFSET);
+                af = (gafr >> ((gpio & 0xf) * 2)) & 0x3;
+                dir = gpdr & GPIO_bit(gpio);
+
+                if (__gpio_is_inverted(gpio))
+                        ret = (af != 1) || (dir == 0);
+                else
+                        ret = (af != 0) || (dir != 0);
+                break;
+        default:
+                ret = gpdr & GPIO_bit(gpio);
+                break;
+        }
+        return ret;
+}
+
+#ifdef CONFIG_ARCH_PXA
+static inline int __pxa_gpio_to_irq(int gpio)
+{
+        if (gpio_is_pxa_type(gpio_type))
+                return PXA_GPIO_TO_IRQ(gpio);
+        return -1;
+}
+
+static inline int __pxa_irq_to_gpio(int irq)
+{
+        if (gpio_is_pxa_type(gpio_type))
+                return irq - PXA_GPIO_TO_IRQ(0);
+        return -1;
+}
+#else
+static inline int __pxa_gpio_to_irq(int gpio) { return -1; }
+static inline int __pxa_irq_to_gpio(int irq) { return -1; }
+#endif
+
+#ifdef CONFIG_ARCH_MMP
+static inline int __mmp_gpio_to_irq(int gpio)
+{
+        if (gpio_is_mmp_type(gpio_type))
+                return MMP_GPIO_TO_IRQ(gpio);
+        return -1;
+}
+
+static inline int __mmp_irq_to_gpio(int irq)
+{
+        if (gpio_is_mmp_type(gpio_type))
+                return irq - MMP_GPIO_TO_IRQ(0);
+        return -1;
+}
+#else
+static inline int __mmp_gpio_to_irq(int gpio) { return -1; }
+static inline int __mmp_irq_to_gpio(int irq) { return -1; }
+#endif
+
+static int pxa_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
+{
+        int gpio, ret;
+
+        gpio = chip->base + offset;
+        ret = __pxa_gpio_to_irq(gpio);
+        if (ret >= 0)
+                return ret;
+        return __mmp_gpio_to_irq(gpio);
+}
+
+int pxa_irq_to_gpio(int irq)
+{
+        int ret;
+
+        ret = __pxa_irq_to_gpio(irq);
+        if (ret >= 0)
+                return ret;
+        return __mmp_irq_to_gpio(irq);
+}
+
 static int pxa_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
 {
         void __iomem *base = gpio_chip_base(chip);
@@ -63,12 +223,12 @@ static int pxa_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
 
         spin_lock_irqsave(&gpio_lock, flags);
 
-        value = __raw_readl(base + GPDR_OFFSET);
+        value = readl_relaxed(base + GPDR_OFFSET);
         if (__gpio_is_inverted(chip->base + offset))
                 value |= mask;
         else
                 value &= ~mask;
-        __raw_writel(value, base + GPDR_OFFSET);
+        writel_relaxed(value, base + GPDR_OFFSET);
 
         spin_unlock_irqrestore(&gpio_lock, flags);
         return 0;
@@ -81,16 +241,16 @@ static int pxa_gpio_direction_output(struct gpio_chip *chip,
         uint32_t tmp, mask = 1 << offset;
         unsigned long flags;
 
-        __raw_writel(mask, base + (value ? GPSR_OFFSET : GPCR_OFFSET));
+        writel_relaxed(mask, base + (value ? GPSR_OFFSET : GPCR_OFFSET));
 
         spin_lock_irqsave(&gpio_lock, flags);
 
-        tmp = __raw_readl(base + GPDR_OFFSET);
+        tmp = readl_relaxed(base + GPDR_OFFSET);
         if (__gpio_is_inverted(chip->base + offset))
                 tmp &= ~mask;
         else
                 tmp |= mask;
-        __raw_writel(tmp, base + GPDR_OFFSET);
+        writel_relaxed(tmp, base + GPDR_OFFSET);
 
         spin_unlock_irqrestore(&gpio_lock, flags);
         return 0;
@@ -98,16 +258,16 @@ static int pxa_gpio_direction_output(struct gpio_chip *chip,
 
 static int pxa_gpio_get(struct gpio_chip *chip, unsigned offset)
 {
-        return __raw_readl(gpio_chip_base(chip) + GPLR_OFFSET) & (1 << offset);
+        return readl_relaxed(gpio_chip_base(chip) + GPLR_OFFSET) & (1 << offset);
 }
 
 static void pxa_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
 {
-        __raw_writel(1 << offset, gpio_chip_base(chip) +
+        writel_relaxed(1 << offset, gpio_chip_base(chip) +
                                 (value ? GPSR_OFFSET : GPCR_OFFSET));
 }
 
-static int __init pxa_init_gpio_chip(int gpio_end)
+static int __devinit pxa_init_gpio_chip(int gpio_end)
 {
         int i, gpio, nbanks = gpio_to_bank(gpio_end) + 1;
         struct pxa_gpio_chip *chips;
@@ -122,7 +282,7 @@ static int __init pxa_init_gpio_chip(int gpio_end)
                 struct gpio_chip *c = &chips[i].chip;
 
                 sprintf(chips[i].label, "gpio-%d", i);
-                chips[i].regbase = GPIO_BANK(i);
+                chips[i].regbase = gpio_reg_base + BANK_OFF(i);
 
                 c->base  = gpio;
                 c->label = chips[i].label;
@@ -131,6 +291,7 @@ static int __init pxa_init_gpio_chip(int gpio_end)
                 c->direction_output = pxa_gpio_direction_output;
                 c->get = pxa_gpio_get;
                 c->set = pxa_gpio_set;
+                c->to_irq = pxa_gpio_to_irq;
 
                 /* number of GPIOs on last bank may be less than 32 */
                 c->ngpio = (gpio + 31 > gpio_end) ? (gpio_end - gpio + 1) : 32;
@@ -147,18 +308,18 @@ static inline void update_edge_detect(struct pxa_gpio_chip *c)
 {
         uint32_t grer, gfer;
 
-        grer = __raw_readl(c->regbase + GRER_OFFSET) & ~c->irq_mask;
-        gfer = __raw_readl(c->regbase + GFER_OFFSET) & ~c->irq_mask;
+        grer = readl_relaxed(c->regbase + GRER_OFFSET) & ~c->irq_mask;
+        gfer = readl_relaxed(c->regbase + GFER_OFFSET) & ~c->irq_mask;
         grer |= c->irq_edge_rise & c->irq_mask;
         gfer |= c->irq_edge_fall & c->irq_mask;
-        __raw_writel(grer, c->regbase + GRER_OFFSET);
-        __raw_writel(gfer, c->regbase + GFER_OFFSET);
+        writel_relaxed(grer, c->regbase + GRER_OFFSET);
+        writel_relaxed(gfer, c->regbase + GFER_OFFSET);
 }
 
 static int pxa_gpio_irq_type(struct irq_data *d, unsigned int type)
 {
         struct pxa_gpio_chip *c;
-        int gpio = irq_to_gpio(d->irq);
+        int gpio = pxa_irq_to_gpio(d->irq);
         unsigned long gpdr, mask = GPIO_bit(gpio);
 
         c = gpio_to_pxachip(gpio);
@@ -176,12 +337,12 @@ static int pxa_gpio_irq_type(struct irq_data *d, unsigned int type)
                 type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;
         }
 
-        gpdr = __raw_readl(c->regbase + GPDR_OFFSET);
+        gpdr = readl_relaxed(c->regbase + GPDR_OFFSET);
 
         if (__gpio_is_inverted(gpio))
-                __raw_writel(gpdr | mask,  c->regbase + GPDR_OFFSET);
+                writel_relaxed(gpdr | mask,  c->regbase + GPDR_OFFSET);
         else
-                __raw_writel(gpdr & ~mask, c->regbase + GPDR_OFFSET);
+                writel_relaxed(gpdr & ~mask, c->regbase + GPDR_OFFSET);
 
         if (type & IRQ_TYPE_EDGE_RISING)
                 c->irq_edge_rise |= mask;
@@ -212,9 +373,9 @@ static void pxa_gpio_demux_handler(unsigned int irq, struct irq_desc *desc)
                 for_each_gpio_chip(gpio, c) {
                         gpio_base = c->chip.base;
 
-                        gedr = __raw_readl(c->regbase + GEDR_OFFSET);
+                        gedr = readl_relaxed(c->regbase + GEDR_OFFSET);
                         gedr = gedr & c->irq_mask;
-                        __raw_writel(gedr, c->regbase + GEDR_OFFSET);
+                        writel_relaxed(gedr, c->regbase + GEDR_OFFSET);
 
                         n = find_first_bit(&gedr, BITS_PER_LONG);
                         while (n < BITS_PER_LONG) {
@@ -229,29 +390,29 @@ static void pxa_gpio_demux_handler(unsigned int irq, struct irq_desc *desc)
 
 static void pxa_ack_muxed_gpio(struct irq_data *d)
 {
-        int gpio = irq_to_gpio(d->irq);
+        int gpio = pxa_irq_to_gpio(d->irq);
         struct pxa_gpio_chip *c = gpio_to_pxachip(gpio);
 
-        __raw_writel(GPIO_bit(gpio), c->regbase + GEDR_OFFSET);
+        writel_relaxed(GPIO_bit(gpio), c->regbase + GEDR_OFFSET);
 }
 
 static void pxa_mask_muxed_gpio(struct irq_data *d)
 {
-        int gpio = irq_to_gpio(d->irq);
+        int gpio = pxa_irq_to_gpio(d->irq);
         struct pxa_gpio_chip *c = gpio_to_pxachip(gpio);
         uint32_t grer, gfer;
 
         c->irq_mask &= ~GPIO_bit(gpio);
 
-        grer = __raw_readl(c->regbase + GRER_OFFSET) & ~GPIO_bit(gpio);
-        gfer = __raw_readl(c->regbase + GFER_OFFSET) & ~GPIO_bit(gpio);
-        __raw_writel(grer, c->regbase + GRER_OFFSET);
-        __raw_writel(gfer, c->regbase + GFER_OFFSET);
+        grer = readl_relaxed(c->regbase + GRER_OFFSET) & ~GPIO_bit(gpio);
+        gfer = readl_relaxed(c->regbase + GFER_OFFSET) & ~GPIO_bit(gpio);
+        writel_relaxed(grer, c->regbase + GRER_OFFSET);
+        writel_relaxed(gfer, c->regbase + GFER_OFFSET);
 }
 
 static void pxa_unmask_muxed_gpio(struct irq_data *d)
 {
-        int gpio = irq_to_gpio(d->irq);
+        int gpio = pxa_irq_to_gpio(d->irq);
         struct pxa_gpio_chip *c = gpio_to_pxachip(gpio);
 
         c->irq_mask |= GPIO_bit(gpio);
@@ -266,34 +427,143 @@ static struct irq_chip pxa_muxed_gpio_chip = {
         .irq_set_type   = pxa_gpio_irq_type,
 };
 
-void __init pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn)
+static int pxa_gpio_nums(void)
 {
-        struct pxa_gpio_chip *c;
-        int gpio, irq;
+        int count = 0;
+
+#ifdef CONFIG_ARCH_PXA
+        if (cpu_is_pxa25x()) {
+#ifdef CONFIG_CPU_PXA26x
+                count = 89;
+                gpio_type = PXA26X_GPIO;
+#elif defined(CONFIG_PXA25x)
+                count = 84;
+                gpio_type = PXA26X_GPIO;
+#endif /* CONFIG_CPU_PXA26x */
+        } else if (cpu_is_pxa27x()) {
+                count = 120;
+                gpio_type = PXA27X_GPIO;
+        } else if (cpu_is_pxa93x() || cpu_is_pxa95x()) {
+                count = 191;
+                gpio_type = PXA93X_GPIO;
+        } else if (cpu_is_pxa3xx()) {
+                count = 127;
+                gpio_type = PXA3XX_GPIO;
+        }
+#endif /* CONFIG_ARCH_PXA */
+
+#ifdef CONFIG_ARCH_MMP
+        if (cpu_is_pxa168() || cpu_is_pxa910()) {
+                count = 127;
+                gpio_type = MMP_GPIO;
+        } else if (cpu_is_mmp2()) {
+                count = 191;
+                gpio_type = MMP2_GPIO;
+        }
+#endif /* CONFIG_ARCH_MMP */
+        return count;
+}
 
-        pxa_last_gpio = end;
+static int __devinit pxa_gpio_probe(struct platform_device *pdev)
+{
+        struct pxa_gpio_chip *c;
+        struct resource *res;
+        struct clk *clk;
+        int gpio, irq, ret;
+        int irq0 = 0, irq1 = 0, irq_mux, gpio_offset = 0;
+
+        pxa_last_gpio = pxa_gpio_nums();
+        if (!pxa_last_gpio)
+                return -EINVAL;
+
+        irq0 = platform_get_irq_byname(pdev, "gpio0");
+        irq1 = platform_get_irq_byname(pdev, "gpio1");
+        irq_mux = platform_get_irq_byname(pdev, "gpio_mux");
+        if ((irq0 > 0 && irq1 <= 0) || (irq0 <= 0 && irq1 > 0)
+                || (irq_mux <= 0))
+                return -EINVAL;
+        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (!res)
+                return -EINVAL;
+        gpio_reg_base = ioremap(res->start, resource_size(res));
+        if (!gpio_reg_base)
+                return -EINVAL;
+
+        if (irq0 > 0)
+                gpio_offset = 2;
+
+        clk = clk_get(&pdev->dev, NULL);
+        if (IS_ERR(clk)) {
+                dev_err(&pdev->dev, "Error %ld to get gpio clock\n",
+                        PTR_ERR(clk));
+                iounmap(gpio_reg_base);
+                return PTR_ERR(clk);
+        }
+        ret = clk_prepare(clk);
+        if (ret) {
+                clk_put(clk);
+                iounmap(gpio_reg_base);
+                return ret;
+        }
+        ret = clk_enable(clk);
+        if (ret) {
+                clk_unprepare(clk);
+                clk_put(clk);
+                iounmap(gpio_reg_base);
+                return ret;
+        }
 
         /* Initialize GPIO chips */
-        pxa_init_gpio_chip(end);
+        pxa_init_gpio_chip(pxa_last_gpio);
 
         /* clear all GPIO edge detects */
         for_each_gpio_chip(gpio, c) {
-                __raw_writel(0, c->regbase + GFER_OFFSET);
-                __raw_writel(0, c->regbase + GRER_OFFSET);
-                __raw_writel(~0,c->regbase + GEDR_OFFSET);
+                writel_relaxed(0, c->regbase + GFER_OFFSET);
+                writel_relaxed(0, c->regbase + GRER_OFFSET);
+                writel_relaxed(~0,c->regbase + GEDR_OFFSET);
+                /* unmask GPIO edge detect for AP side */
+                if (gpio_is_mmp_type(gpio_type))
+                        writel_relaxed(~0, c->regbase + ED_MASK_OFFSET);
         }
 
-        for (irq  = gpio_to_irq(start); irq <= gpio_to_irq(end); irq++) {
+#ifdef CONFIG_ARCH_PXA
+        irq = gpio_to_irq(0);
+        irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip,
+                                 handle_edge_irq);
+        set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
+        irq_set_chained_handler(IRQ_GPIO0, pxa_gpio_demux_handler);
+
+        irq = gpio_to_irq(1);
+        irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip,
+                                 handle_edge_irq);
+        set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
+        irq_set_chained_handler(IRQ_GPIO1, pxa_gpio_demux_handler);
+#endif
+
+        for (irq  = gpio_to_irq(gpio_offset);
+                irq <= gpio_to_irq(pxa_last_gpio); irq++) {
                 irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip,
                                          handle_edge_irq);
                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
         }
 
-        /* Install handler for GPIO>=2 edge detect interrupts */
-        irq_set_chained_handler(mux_irq, pxa_gpio_demux_handler);
-        pxa_muxed_gpio_chip.irq_set_wake = fn;
+        irq_set_chained_handler(irq_mux, pxa_gpio_demux_handler);
+        return 0;
 }
 
+static struct platform_driver pxa_gpio_driver = {
+        .probe          = pxa_gpio_probe,
+        .driver         = {
+                .name   = "pxa-gpio",
+        },
+};
+
+static int __init pxa_gpio_init(void)
+{
+        return platform_driver_register(&pxa_gpio_driver);
+}
+postcore_initcall(pxa_gpio_init);
+
 #ifdef CONFIG_PM
 static int pxa_gpio_suspend(void)
 {
@@ -301,13 +571,13 @@ static int pxa_gpio_suspend(void)
         int gpio;
 
         for_each_gpio_chip(gpio, c) {
-                c->saved_gplr = __raw_readl(c->regbase + GPLR_OFFSET);
-                c->saved_gpdr = __raw_readl(c->regbase + GPDR_OFFSET);
-                c->saved_grer = __raw_readl(c->regbase + GRER_OFFSET);
-                c->saved_gfer = __raw_readl(c->regbase + GFER_OFFSET);
+                c->saved_gplr = readl_relaxed(c->regbase + GPLR_OFFSET);
+                c->saved_gpdr = readl_relaxed(c->regbase + GPDR_OFFSET);
+                c->saved_grer = readl_relaxed(c->regbase + GRER_OFFSET);
+                c->saved_gfer = readl_relaxed(c->regbase + GFER_OFFSET);
 
                 /* Clear GPIO transition detect bits */
-                __raw_writel(0xffffffff, c->regbase + GEDR_OFFSET);
+                writel_relaxed(0xffffffff, c->regbase + GEDR_OFFSET);
         }
         return 0;
 }
@@ -319,12 +589,12 @@ static void pxa_gpio_resume(void)
 
         for_each_gpio_chip(gpio, c) {
                 /* restore level with set/clear */
-                __raw_writel( c->saved_gplr, c->regbase + GPSR_OFFSET);
-                __raw_writel(~c->saved_gplr, c->regbase + GPCR_OFFSET);
+                writel_relaxed( c->saved_gplr, c->regbase + GPSR_OFFSET);
+                writel_relaxed(~c->saved_gplr, c->regbase + GPCR_OFFSET);
 
-                __raw_writel(c->saved_grer, c->regbase + GRER_OFFSET);
-                __raw_writel(c->saved_gfer, c->regbase + GFER_OFFSET);
-                __raw_writel(c->saved_gpdr, c->regbase + GPDR_OFFSET);
+                writel_relaxed(c->saved_grer, c->regbase + GRER_OFFSET);
+                writel_relaxed(c->saved_gfer, c->regbase + GFER_OFFSET);
+                writel_relaxed(c->saved_gpdr, c->regbase + GPDR_OFFSET);
         }
 }
 #else
@@ -336,3 +606,10 @@ struct syscore_ops pxa_gpio_syscore_ops = {
         .suspend        = pxa_gpio_suspend,
         .resume         = pxa_gpio_resume,
 };
+
+static int __init pxa_gpio_sysinit(void)
+{
+        register_syscore_ops(&pxa_gpio_syscore_ops);
+        return 0;
+}
+postcore_initcall(pxa_gpio_sysinit);
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
index 46b6500c5478..6381604696d3 100644
--- a/drivers/i2c/busses/i2c-tegra.c
+++ b/drivers/i2c/busses/i2c-tegra.c
@@ -558,7 +558,7 @@ static const struct i2c_algorithm tegra_i2c_algo = {
         .functionality  = tegra_i2c_func,
 };
 
-static int tegra_i2c_probe(struct platform_device *pdev)
+static int __devinit tegra_i2c_probe(struct platform_device *pdev)
 {
         struct tegra_i2c_dev *i2c_dev;
         struct tegra_i2c_platform_data *pdata = pdev->dev.platform_data;
@@ -636,7 +636,10 @@ static int tegra_i2c_probe(struct platform_device *pdev)
                         i2c_dev->bus_clk_rate = be32_to_cpup(prop);
         }
 
-        if (pdev->id == 3)
+        if (pdev->dev.of_node)
+                i2c_dev->is_dvc = of_device_is_compatible(pdev->dev.of_node,
+                                                "nvidia,tegra20-i2c-dvc");
+        else if (pdev->id == 3)
                 i2c_dev->is_dvc = 1;
         init_completion(&i2c_dev->msg_complete);
 
@@ -690,7 +693,7 @@ err_iounmap:
         return ret;
 }
 
-static int tegra_i2c_remove(struct platform_device *pdev)
+static int __devexit tegra_i2c_remove(struct platform_device *pdev)
 {
         struct tegra_i2c_dev *i2c_dev = platform_get_drvdata(pdev);
         i2c_del_adapter(&i2c_dev->adapter);
@@ -742,6 +745,7 @@ static int tegra_i2c_resume(struct platform_device *pdev)
 /* Match table for of_platform binding */
 static const struct of_device_id tegra_i2c_of_match[] __devinitconst = {
         { .compatible = "nvidia,tegra20-i2c", },
+        { .compatible = "nvidia,tegra20-i2c-dvc", },
         {},
 };
 MODULE_DEVICE_TABLE(of, tegra_i2c_of_match);
diff --git a/drivers/input/touchscreen/zylonite-wm97xx.c b/drivers/input/touchscreen/zylonite-wm97xx.c
index f6328c0cded6..0a707bbbbea6 100644
--- a/drivers/input/touchscreen/zylonite-wm97xx.c
+++ b/drivers/input/touchscreen/zylonite-wm97xx.c
@@ -22,6 +22,7 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/delay.h>
+#include <linux/gpio.h>
 #include <linux/irq.h>
 #include <linux/interrupt.h>
 #include <linux/io.h>
@@ -192,8 +193,8 @@ static int zylonite_wm97xx_probe(struct platform_device *pdev)
         else
                 gpio_touch_irq = mfp_to_gpio(MFP_PIN_GPIO26);
 
-        wm->pen_irq = IRQ_GPIO(gpio_touch_irq);
-        irq_set_irq_type(IRQ_GPIO(gpio_touch_irq), IRQ_TYPE_EDGE_BOTH);
+        wm->pen_irq = gpio_to_irq(gpio_touch_irq);
+        irq_set_irq_type(wm->pen_irq, IRQ_TYPE_EDGE_BOTH);
 
         wm97xx_config_gpio(wm, WM97XX_GPIO_13, WM97XX_GPIO_IN,
                            WM97XX_GPIO_POL_HIGH,
diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c
index 86e14583a082..3f565ef3e149 100644
--- a/drivers/mfd/omap-usb-host.c
+++ b/drivers/mfd/omap-usb-host.c
@@ -27,8 +27,9 @@
 #include <linux/spinlock.h>
 #include <linux/gpio.h>
 #include <plat/usb.h>
+#include <linux/pm_runtime.h>
 
-#define USBHS_DRIVER_NAME       "usbhs-omap"
+#define USBHS_DRIVER_NAME       "usbhs_omap"
 #define OMAP_EHCI_DEVICE        "ehci-omap"
 #define OMAP_OHCI_DEVICE        "ohci-omap3"
 
@@ -147,9 +148,6 @@
 
 
 struct usbhs_hcd_omap {
-        struct clk                      *usbhost_ick;
-        struct clk                      *usbhost_hs_fck;
-        struct clk                      *usbhost_fs_fck;
         struct clk                      *xclk60mhsp1_ck;
         struct clk                      *xclk60mhsp2_ck;
         struct clk                      *utmi_p1_fck;
@@ -159,8 +157,7 @@ struct usbhs_hcd_omap {
         struct clk                      *usbhost_p2_fck;
         struct clk                      *usbtll_p2_fck;
         struct clk                      *init_60m_fclk;
-        struct clk                      *usbtll_fck;
-        struct clk                      *usbtll_ick;
+        struct clk                      *ehci_logic_fck;
 
         void __iomem                    *uhh_base;
         void __iomem                    *tll_base;
@@ -169,7 +166,6 @@ struct usbhs_hcd_omap {
 
         u32                             usbhs_rev;
         spinlock_t                      lock;
-        int                             count;
 };
 /*-------------------------------------------------------------------------*/
 
@@ -319,269 +315,6 @@ err_end:
         return ret;
 }
 
-/**
- * usbhs_omap_probe - initialize TI-based HCDs
- *
- * Allocates basic resources for this USB host controller.
- */
-static int __devinit usbhs_omap_probe(struct platform_device *pdev)
-{
-        struct device                   *dev =  &pdev->dev;
-        struct usbhs_omap_platform_data *pdata = dev->platform_data;
-        struct usbhs_hcd_omap           *omap;
-        struct resource                 *res;
-        int                             ret = 0;
-        int                             i;
-
-        if (!pdata) {
-                dev_err(dev, "Missing platform data\n");
-                ret = -ENOMEM;
-                goto end_probe;
-        }
-
-        omap = kzalloc(sizeof(*omap), GFP_KERNEL);
-        if (!omap) {
-                dev_err(dev, "Memory allocation failed\n");
-                ret = -ENOMEM;
-                goto end_probe;
-        }
-
-        spin_lock_init(&omap->lock);
-
-        for (i = 0; i < OMAP3_HS_USB_PORTS; i++)
-                omap->platdata.port_mode[i] = pdata->port_mode[i];
-
-        omap->platdata.ehci_data = pdata->ehci_data;
-        omap->platdata.ohci_data = pdata->ohci_data;
-
-        omap->usbhost_ick = clk_get(dev, "usbhost_ick");
-        if (IS_ERR(omap->usbhost_ick)) {
-                ret =  PTR_ERR(omap->usbhost_ick);
-                dev_err(dev, "usbhost_ick failed error:%d\n", ret);
-                goto err_end;
-        }
-
-        omap->usbhost_hs_fck = clk_get(dev, "hs_fck");
-        if (IS_ERR(omap->usbhost_hs_fck)) {
-                ret = PTR_ERR(omap->usbhost_hs_fck);
-                dev_err(dev, "usbhost_hs_fck failed error:%d\n", ret);
-                goto err_usbhost_ick;
-        }
-
-        omap->usbhost_fs_fck = clk_get(dev, "fs_fck");
-        if (IS_ERR(omap->usbhost_fs_fck)) {
-                ret = PTR_ERR(omap->usbhost_fs_fck);
-                dev_err(dev, "usbhost_fs_fck failed error:%d\n", ret);
-                goto err_usbhost_hs_fck;
-        }
-
-        omap->usbtll_fck = clk_get(dev, "usbtll_fck");
-        if (IS_ERR(omap->usbtll_fck)) {
-                ret = PTR_ERR(omap->usbtll_fck);
-                dev_err(dev, "usbtll_fck failed error:%d\n", ret);
-                goto err_usbhost_fs_fck;
-        }
-
-        omap->usbtll_ick = clk_get(dev, "usbtll_ick");
-        if (IS_ERR(omap->usbtll_ick)) {
-                ret = PTR_ERR(omap->usbtll_ick);
-                dev_err(dev, "usbtll_ick failed error:%d\n", ret);
-                goto err_usbtll_fck;
-        }
-
-        omap->utmi_p1_fck = clk_get(dev, "utmi_p1_gfclk");
-        if (IS_ERR(omap->utmi_p1_fck)) {
-                ret = PTR_ERR(omap->utmi_p1_fck);
-                dev_err(dev, "utmi_p1_gfclk failed error:%d\n", ret);
-                goto err_usbtll_ick;
-        }
-
-        omap->xclk60mhsp1_ck = clk_get(dev, "xclk60mhsp1_ck");
-        if (IS_ERR(omap->xclk60mhsp1_ck)) {
-                ret = PTR_ERR(omap->xclk60mhsp1_ck);
-                dev_err(dev, "xclk60mhsp1_ck failed error:%d\n", ret);
-                goto err_utmi_p1_fck;
-        }
-
-        omap->utmi_p2_fck = clk_get(dev, "utmi_p2_gfclk");
-        if (IS_ERR(omap->utmi_p2_fck)) {
-                ret = PTR_ERR(omap->utmi_p2_fck);
-                dev_err(dev, "utmi_p2_gfclk failed error:%d\n", ret);
-                goto err_xclk60mhsp1_ck;
-        }
-
-        omap->xclk60mhsp2_ck = clk_get(dev, "xclk60mhsp2_ck");
-        if (IS_ERR(omap->xclk60mhsp2_ck)) {
-                ret = PTR_ERR(omap->xclk60mhsp2_ck);
-                dev_err(dev, "xclk60mhsp2_ck failed error:%d\n", ret);
-                goto err_utmi_p2_fck;
-        }
-
-        omap->usbhost_p1_fck = clk_get(dev, "usb_host_hs_utmi_p1_clk");
-        if (IS_ERR(omap->usbhost_p1_fck)) {
-                ret = PTR_ERR(omap->usbhost_p1_fck);
-                dev_err(dev, "usbhost_p1_fck failed error:%d\n", ret);
-                goto err_xclk60mhsp2_ck;
-        }
-
-        omap->usbtll_p1_fck = clk_get(dev, "usb_tll_hs_usb_ch0_clk");
-        if (IS_ERR(omap->usbtll_p1_fck)) {
-                ret = PTR_ERR(omap->usbtll_p1_fck);
-                dev_err(dev, "usbtll_p1_fck failed error:%d\n", ret);
-                goto err_usbhost_p1_fck;
-        }
-
-        omap->usbhost_p2_fck = clk_get(dev, "usb_host_hs_utmi_p2_clk");
-        if (IS_ERR(omap->usbhost_p2_fck)) {
-                ret = PTR_ERR(omap->usbhost_p2_fck);
-                dev_err(dev, "usbhost_p2_fck failed error:%d\n", ret);
-                goto err_usbtll_p1_fck;
-        }
-
-        omap->usbtll_p2_fck = clk_get(dev, "usb_tll_hs_usb_ch1_clk");
-        if (IS_ERR(omap->usbtll_p2_fck)) {
-                ret = PTR_ERR(omap->usbtll_p2_fck);
-                dev_err(dev, "usbtll_p2_fck failed error:%d\n", ret);
-                goto err_usbhost_p2_fck;
-        }
-
-        omap->init_60m_fclk = clk_get(dev, "init_60m_fclk");
-        if (IS_ERR(omap->init_60m_fclk)) {
-                ret = PTR_ERR(omap->init_60m_fclk);
-                dev_err(dev, "init_60m_fclk failed error:%d\n", ret);
-                goto err_usbtll_p2_fck;
-        }
-
-        res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "uhh");
-        if (!res) {
-                dev_err(dev, "UHH EHCI get resource failed\n");
-                ret = -ENODEV;
-                goto err_init_60m_fclk;
-        }
-
-        omap->uhh_base = ioremap(res->start, resource_size(res));
-        if (!omap->uhh_base) {
-                dev_err(dev, "UHH ioremap failed\n");
-                ret = -ENOMEM;
-                goto err_init_60m_fclk;
-        }
-
-        res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "tll");
-        if (!res) {
-                dev_err(dev, "UHH EHCI get resource failed\n");
-                ret = -ENODEV;
-                goto err_tll;
-        }
-
-        omap->tll_base = ioremap(res->start, resource_size(res));
-        if (!omap->tll_base) {
-                dev_err(dev, "TLL ioremap failed\n");
-                ret = -ENOMEM;
-                goto err_tll;
-        }
-
-        platform_set_drvdata(pdev, omap);
-
-        ret = omap_usbhs_alloc_children(pdev);
-        if (ret) {
-                dev_err(dev, "omap_usbhs_alloc_children failed\n");
-                goto err_alloc;
-        }
-
-        goto end_probe;
-
-err_alloc:
-        iounmap(omap->tll_base);
-
-err_tll:
-        iounmap(omap->uhh_base);
-
-err_init_60m_fclk:
-        clk_put(omap->init_60m_fclk);
-
-err_usbtll_p2_fck:
-        clk_put(omap->usbtll_p2_fck);
-
-err_usbhost_p2_fck:
-        clk_put(omap->usbhost_p2_fck);
-
-err_usbtll_p1_fck:
-        clk_put(omap->usbtll_p1_fck);
-
-err_usbhost_p1_fck:
-        clk_put(omap->usbhost_p1_fck);
-
-err_xclk60mhsp2_ck:
-        clk_put(omap->xclk60mhsp2_ck);
-
-err_utmi_p2_fck:
-        clk_put(omap->utmi_p2_fck);
-
-err_xclk60mhsp1_ck:
-        clk_put(omap->xclk60mhsp1_ck);
-
-err_utmi_p1_fck:
-        clk_put(omap->utmi_p1_fck);
-
-err_usbtll_ick:
-        clk_put(omap->usbtll_ick);
-
-err_usbtll_fck:
-        clk_put(omap->usbtll_fck);
-
-err_usbhost_fs_fck:
-        clk_put(omap->usbhost_fs_fck);
-
-err_usbhost_hs_fck:
-        clk_put(omap->usbhost_hs_fck);
-
-err_usbhost_ick:
-        clk_put(omap->usbhost_ick);
-
-err_end:
-        kfree(omap);
-
-end_probe:
-        return ret;
-}
-
-/**
- * usbhs_omap_remove - shutdown processing for UHH & TLL HCDs
- * @pdev: USB Host Controller being removed
- *
- * Reverses the effect of usbhs_omap_probe().
- */
-static int __devexit usbhs_omap_remove(struct platform_device *pdev)
-{
-        struct usbhs_hcd_omap *omap = platform_get_drvdata(pdev);
-
-        if (omap->count != 0) {
-                dev_err(&pdev->dev,
-                        "Either EHCI or OHCI is still using usbhs core\n");
-                return -EBUSY;
-        }
-
-        iounmap(omap->tll_base);
-        iounmap(omap->uhh_base);
-        clk_put(omap->init_60m_fclk);
-        clk_put(omap->usbtll_p2_fck);
-        clk_put(omap->usbhost_p2_fck);
-        clk_put(omap->usbtll_p1_fck);
-        clk_put(omap->usbhost_p1_fck);
-        clk_put(omap->xclk60mhsp2_ck);
-        clk_put(omap->utmi_p2_fck);
-        clk_put(omap->xclk60mhsp1_ck);
-        clk_put(omap->utmi_p1_fck);
-        clk_put(omap->usbtll_ick);
-        clk_put(omap->usbtll_fck);
-        clk_put(omap->usbhost_fs_fck);
-        clk_put(omap->usbhost_hs_fck);
-        clk_put(omap->usbhost_ick);
-        kfree(omap);
-
-        return 0;
-}
-
 static bool is_ohci_port(enum usbhs_omap_port_mode pmode)
 {
         switch (pmode) {
@@ -689,30 +422,85 @@ static void usbhs_omap_tll_init(struct device *dev, u8 tll_channel_count)
         }
 }
 
-static int usbhs_enable(struct device *dev)
+static int usbhs_runtime_resume(struct device *dev)
 {
         struct usbhs_hcd_omap           *omap = dev_get_drvdata(dev);
         struct usbhs_omap_platform_data *pdata = &omap->platdata;
-        unsigned long                   flags = 0;
-        int                             ret = 0;
-        unsigned long                   timeout;
-        unsigned                        reg;
+        unsigned long                   flags;
+
+        dev_dbg(dev, "usbhs_runtime_resume\n");
 
-        dev_dbg(dev, "starting TI HSUSB Controller\n");
         if (!pdata) {
                 dev_dbg(dev, "missing platform_data\n");
                 return  -ENODEV;
         }
 
         spin_lock_irqsave(&omap->lock, flags);
-        if (omap->count > 0)
-                goto end_count;
 
-        clk_enable(omap->usbhost_ick);
-        clk_enable(omap->usbhost_hs_fck);
-        clk_enable(omap->usbhost_fs_fck);
-        clk_enable(omap->usbtll_fck);
-        clk_enable(omap->usbtll_ick);
+        if (omap->ehci_logic_fck && !IS_ERR(omap->ehci_logic_fck))
+                clk_enable(omap->ehci_logic_fck);
+
+        if (is_ehci_tll_mode(pdata->port_mode[0])) {
+                clk_enable(omap->usbhost_p1_fck);
+                clk_enable(omap->usbtll_p1_fck);
+        }
+        if (is_ehci_tll_mode(pdata->port_mode[1])) {
+                clk_enable(omap->usbhost_p2_fck);
+                clk_enable(omap->usbtll_p2_fck);
+        }
+        clk_enable(omap->utmi_p1_fck);
+        clk_enable(omap->utmi_p2_fck);
+
+        spin_unlock_irqrestore(&omap->lock, flags);
+
+        return 0;
+}
+
+static int usbhs_runtime_suspend(struct device *dev)
+{
+        struct usbhs_hcd_omap           *omap = dev_get_drvdata(dev);
+        struct usbhs_omap_platform_data *pdata = &omap->platdata;
+        unsigned long                   flags;
+
+        dev_dbg(dev, "usbhs_runtime_suspend\n");
+
+        if (!pdata) {
+                dev_dbg(dev, "missing platform_data\n");
+                return  -ENODEV;
+        }
+
+        spin_lock_irqsave(&omap->lock, flags);
+
+        if (is_ehci_tll_mode(pdata->port_mode[0])) {
+                clk_disable(omap->usbhost_p1_fck);
+                clk_disable(omap->usbtll_p1_fck);
+        }
+        if (is_ehci_tll_mode(pdata->port_mode[1])) {
+                clk_disable(omap->usbhost_p2_fck);
+                clk_disable(omap->usbtll_p2_fck);
+        }
+        clk_disable(omap->utmi_p2_fck);
+        clk_disable(omap->utmi_p1_fck);
+
+        if (omap->ehci_logic_fck && !IS_ERR(omap->ehci_logic_fck))
+                clk_disable(omap->ehci_logic_fck);
+
+        spin_unlock_irqrestore(&omap->lock, flags);
+
+        return 0;
+}
+
+static void omap_usbhs_init(struct device *dev)
+{
+        struct usbhs_hcd_omap           *omap = dev_get_drvdata(dev);
+        struct usbhs_omap_platform_data *pdata = &omap->platdata;
+        unsigned long                   flags;
+        unsigned                        reg;
+
+        dev_dbg(dev, "starting TI HSUSB Controller\n");
+
+        pm_runtime_get_sync(dev);
+        spin_lock_irqsave(&omap->lock, flags);
 
         if (pdata->ehci_data->phy_reset) {
                 if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[0])) {
@@ -736,50 +524,6 @@ static int usbhs_enable(struct device *dev)
         omap->usbhs_rev = usbhs_read(omap->uhh_base, OMAP_UHH_REVISION);
         dev_dbg(dev, "OMAP UHH_REVISION 0x%x\n", omap->usbhs_rev);
 
-        /* perform TLL soft reset, and wait until reset is complete */
-        usbhs_write(omap->tll_base, OMAP_USBTLL_SYSCONFIG,
-                        OMAP_USBTLL_SYSCONFIG_SOFTRESET);
-
-        /* Wait for TLL reset to complete */
-        timeout = jiffies + msecs_to_jiffies(1000);
-        while (!(usbhs_read(omap->tll_base, OMAP_USBTLL_SYSSTATUS)
-                        & OMAP_USBTLL_SYSSTATUS_RESETDONE)) {
-                cpu_relax();
-
-                if (time_after(jiffies, timeout)) {
-                        dev_dbg(dev, "operation timed out\n");
-                        ret = -EINVAL;
-                        goto err_tll;
-                }
-        }
-
-        dev_dbg(dev, "TLL RESET DONE\n");
-
-        /* (1<<3) = no idle mode only for initial debugging */
-        usbhs_write(omap->tll_base, OMAP_USBTLL_SYSCONFIG,
-                        OMAP_USBTLL_SYSCONFIG_ENAWAKEUP |
-                        OMAP_USBTLL_SYSCONFIG_SIDLEMODE |
-                        OMAP_USBTLL_SYSCONFIG_AUTOIDLE);
-
-        /* Put UHH in NoIdle/NoStandby mode */
-        reg = usbhs_read(omap->uhh_base, OMAP_UHH_SYSCONFIG);
-        if (is_omap_usbhs_rev1(omap)) {
-                reg |= (OMAP_UHH_SYSCONFIG_ENAWAKEUP
-                                | OMAP_UHH_SYSCONFIG_SIDLEMODE
-                                | OMAP_UHH_SYSCONFIG_CACTIVITY
-                                | OMAP_UHH_SYSCONFIG_MIDLEMODE);
-                reg &= ~OMAP_UHH_SYSCONFIG_AUTOIDLE;
-
-
-        } else if (is_omap_usbhs_rev2(omap)) {
-                reg &= ~OMAP4_UHH_SYSCONFIG_IDLEMODE_CLEAR;
-                reg |= OMAP4_UHH_SYSCONFIG_NOIDLE;
-                reg &= ~OMAP4_UHH_SYSCONFIG_STDBYMODE_CLEAR;
-                reg |= OMAP4_UHH_SYSCONFIG_NOSTDBY;
-        }
-
-        usbhs_write(omap->uhh_base, OMAP_UHH_SYSCONFIG, reg);
-
         reg = usbhs_read(omap->uhh_base, OMAP_UHH_HOSTCONFIG);
         /* setup ULPI bypass and burst configurations */
         reg |= (OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN
@@ -825,49 +569,6 @@ static int usbhs_enable(struct device *dev)
                 reg &= ~OMAP4_P1_MODE_CLEAR;
                 reg &= ~OMAP4_P2_MODE_CLEAR;
 
-                if (is_ehci_phy_mode(pdata->port_mode[0])) {
-                        ret = clk_set_parent(omap->utmi_p1_fck,
-                                                omap->xclk60mhsp1_ck);
-                        if (ret != 0) {
-                                dev_err(dev, "xclk60mhsp1_ck set parent"
-                                "failed error:%d\n", ret);
-                                goto err_tll;
-                        }
-                } else if (is_ehci_tll_mode(pdata->port_mode[0])) {
-                        ret = clk_set_parent(omap->utmi_p1_fck,
-                                                omap->init_60m_fclk);
-                        if (ret != 0) {
-                                dev_err(dev, "init_60m_fclk set parent"
-                                "failed error:%d\n", ret);
-                                goto err_tll;
-                        }
-                        clk_enable(omap->usbhost_p1_fck);
-                        clk_enable(omap->usbtll_p1_fck);
-                }
-
-                if (is_ehci_phy_mode(pdata->port_mode[1])) {
-                        ret = clk_set_parent(omap->utmi_p2_fck,
-                                                omap->xclk60mhsp2_ck);
-                        if (ret != 0) {
-                                dev_err(dev, "xclk60mhsp1_ck set parent"
-                                        "failed error:%d\n", ret);
-                                goto err_tll;
-                        }
-                } else if (is_ehci_tll_mode(pdata->port_mode[1])) {
-                        ret = clk_set_parent(omap->utmi_p2_fck,
-                                                omap->init_60m_fclk);
-                        if (ret != 0) {
-                                dev_err(dev, "init_60m_fclk set parent"
-                                "failed error:%d\n", ret);
-                                goto err_tll;
-                        }
-                        clk_enable(omap->usbhost_p2_fck);
-                        clk_enable(omap->usbtll_p2_fck);
-                }
-
-                clk_enable(omap->utmi_p1_fck);
-                clk_enable(omap->utmi_p2_fck);
-
                 if (is_ehci_tll_mode(pdata->port_mode[0]) ||
                         (is_ohci_port(pdata->port_mode[0])))
                         reg |= OMAP4_P1_MODE_TLL;
@@ -913,12 +614,15 @@ static int usbhs_enable(struct device *dev)
                                 (pdata->ehci_data->reset_gpio_port[1], 1);
         }
 
-end_count:
-        omap->count++;
         spin_unlock_irqrestore(&omap->lock, flags);
-        return 0;
+        pm_runtime_put_sync(dev);
+}
+
+static void omap_usbhs_deinit(struct device *dev)
+{
+        struct usbhs_hcd_omap           *omap = dev_get_drvdata(dev);
+        struct usbhs_omap_platform_data *pdata = &omap->platdata;
 
-err_tll:
         if (pdata->ehci_data->phy_reset) {
                 if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[0]))
                         gpio_free(pdata->ehci_data->reset_gpio_port[0]);
@@ -926,123 +630,272 @@ err_tll:
                 if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[1]))
                         gpio_free(pdata->ehci_data->reset_gpio_port[1]);
         }
-
-        clk_disable(omap->usbtll_ick);
-        clk_disable(omap->usbtll_fck);
-        clk_disable(omap->usbhost_fs_fck);
-        clk_disable(omap->usbhost_hs_fck);
-        clk_disable(omap->usbhost_ick);
-        spin_unlock_irqrestore(&omap->lock, flags);
-        return ret;
 }
 
-static void usbhs_disable(struct device *dev)
+
+/**
+ * usbhs_omap_probe - initialize TI-based HCDs
+ *
+ * Allocates basic resources for this USB host controller.
+ */
+static int __devinit usbhs_omap_probe(struct platform_device *pdev)
 {
-        struct usbhs_hcd_omap           *omap = dev_get_drvdata(dev);
-        struct usbhs_omap_platform_data *pdata = &omap->platdata;
-        unsigned long                   flags = 0;
-        unsigned long                   timeout;
+        struct device                   *dev =  &pdev->dev;
+        struct usbhs_omap_platform_data *pdata = dev->platform_data;
+        struct usbhs_hcd_omap           *omap;
+        struct resource                 *res;
+        int                             ret = 0;
+        int                             i;
 
-        dev_dbg(dev, "stopping TI HSUSB Controller\n");
+        if (!pdata) {
+                dev_err(dev, "Missing platform data\n");
+                ret = -ENOMEM;
+                goto end_probe;
+        }
 
-        spin_lock_irqsave(&omap->lock, flags);
+        omap = kzalloc(sizeof(*omap), GFP_KERNEL);
+        if (!omap) {
+                dev_err(dev, "Memory allocation failed\n");
+                ret = -ENOMEM;
+                goto end_probe;
+        }
 
-        if (omap->count == 0)
-                goto end_disble;
+        spin_lock_init(&omap->lock);
 
-        omap->count--;
+        for (i = 0; i < OMAP3_HS_USB_PORTS; i++)
+                omap->platdata.port_mode[i] = pdata->port_mode[i];
+
+        omap->platdata.ehci_data = pdata->ehci_data;
+        omap->platdata.ohci_data = pdata->ohci_data;
 
-        if (omap->count != 0)
-                goto end_disble;
+        pm_runtime_enable(dev);
 
-        /* Reset OMAP modules for insmod/rmmod to work */
-        usbhs_write(omap->uhh_base, OMAP_UHH_SYSCONFIG,
-                        is_omap_usbhs_rev2(omap) ?
-                        OMAP4_UHH_SYSCONFIG_SOFTRESET :
-                        OMAP_UHH_SYSCONFIG_SOFTRESET);
 
-        timeout = jiffies + msecs_to_jiffies(100);
-        while (!(usbhs_read(omap->uhh_base, OMAP_UHH_SYSSTATUS)
-                                & (1 << 0))) {
-                cpu_relax();
+        for (i = 0; i < OMAP3_HS_USB_PORTS; i++)
+                if (is_ehci_phy_mode(i) || is_ehci_tll_mode(i) ||
+                        is_ehci_hsic_mode(i)) {
+                        omap->ehci_logic_fck = clk_get(dev, "ehci_logic_fck");
+                        if (IS_ERR(omap->ehci_logic_fck)) {
+                                ret = PTR_ERR(omap->ehci_logic_fck);
+                                dev_warn(dev, "ehci_logic_fck failed:%d\n",
+                                         ret);
+                        }
+                        break;
+                }
 
-                if (time_after(jiffies, timeout))
-                        dev_dbg(dev, "operation timed out\n");
+        omap->utmi_p1_fck = clk_get(dev, "utmi_p1_gfclk");
+        if (IS_ERR(omap->utmi_p1_fck)) {
+                ret = PTR_ERR(omap->utmi_p1_fck);
+                dev_err(dev, "utmi_p1_gfclk failed error:%d\n", ret);
+                goto err_end;
         }
 
-        while (!(usbhs_read(omap->uhh_base, OMAP_UHH_SYSSTATUS)
-                                & (1 << 1))) {
-                cpu_relax();
+        omap->xclk60mhsp1_ck = clk_get(dev, "xclk60mhsp1_ck");
+        if (IS_ERR(omap->xclk60mhsp1_ck)) {
+                ret = PTR_ERR(omap->xclk60mhsp1_ck);
+                dev_err(dev, "xclk60mhsp1_ck failed error:%d\n", ret);
+                goto err_utmi_p1_fck;
+        }
 
-                if (time_after(jiffies, timeout))
-                        dev_dbg(dev, "operation timed out\n");
+        omap->utmi_p2_fck = clk_get(dev, "utmi_p2_gfclk");
+        if (IS_ERR(omap->utmi_p2_fck)) {
+                ret = PTR_ERR(omap->utmi_p2_fck);
+                dev_err(dev, "utmi_p2_gfclk failed error:%d\n", ret);
+                goto err_xclk60mhsp1_ck;
         }
 
-        while (!(usbhs_read(omap->uhh_base, OMAP_UHH_SYSSTATUS)
-                                & (1 << 2))) {
-                cpu_relax();
+        omap->xclk60mhsp2_ck = clk_get(dev, "xclk60mhsp2_ck");
+        if (IS_ERR(omap->xclk60mhsp2_ck)) {
+                ret = PTR_ERR(omap->xclk60mhsp2_ck);
+                dev_err(dev, "xclk60mhsp2_ck failed error:%d\n", ret);
+                goto err_utmi_p2_fck;
+        }
 
-                if (time_after(jiffies, timeout))
-                        dev_dbg(dev, "operation timed out\n");
+        omap->usbhost_p1_fck = clk_get(dev, "usb_host_hs_utmi_p1_clk");
+        if (IS_ERR(omap->usbhost_p1_fck)) {
+                ret = PTR_ERR(omap->usbhost_p1_fck);
+                dev_err(dev, "usbhost_p1_fck failed error:%d\n", ret);
+                goto err_xclk60mhsp2_ck;
         }
 
-        usbhs_write(omap->tll_base, OMAP_USBTLL_SYSCONFIG, (1 << 1));
+        omap->usbtll_p1_fck = clk_get(dev, "usb_tll_hs_usb_ch0_clk");
+        if (IS_ERR(omap->usbtll_p1_fck)) {
+                ret = PTR_ERR(omap->usbtll_p1_fck);
+                dev_err(dev, "usbtll_p1_fck failed error:%d\n", ret);
+                goto err_usbhost_p1_fck;
+        }
 
-        while (!(usbhs_read(omap->tll_base, OMAP_USBTLL_SYSSTATUS)
-                                & (1 << 0))) {
-                cpu_relax();
+        omap->usbhost_p2_fck = clk_get(dev, "usb_host_hs_utmi_p2_clk");
+        if (IS_ERR(omap->usbhost_p2_fck)) {
+                ret = PTR_ERR(omap->usbhost_p2_fck);
+                dev_err(dev, "usbhost_p2_fck failed error:%d\n", ret);
+                goto err_usbtll_p1_fck;
+        }
 
-                if (time_after(jiffies, timeout))
-                        dev_dbg(dev, "operation timed out\n");
+        omap->usbtll_p2_fck = clk_get(dev, "usb_tll_hs_usb_ch1_clk");
+        if (IS_ERR(omap->usbtll_p2_fck)) {
+                ret = PTR_ERR(omap->usbtll_p2_fck);
+                dev_err(dev, "usbtll_p2_fck failed error:%d\n", ret);
+                goto err_usbhost_p2_fck;
         }
 
-        if (is_omap_usbhs_rev2(omap)) {
-                if (is_ehci_tll_mode(pdata->port_mode[0]))
-                        clk_disable(omap->usbtll_p1_fck);
-                if (is_ehci_tll_mode(pdata->port_mode[1]))
-                        clk_disable(omap->usbtll_p2_fck);
-                clk_disable(omap->utmi_p2_fck);
-                clk_disable(omap->utmi_p1_fck);
+        omap->init_60m_fclk = clk_get(dev, "init_60m_fclk");
+        if (IS_ERR(omap->init_60m_fclk)) {
+                ret = PTR_ERR(omap->init_60m_fclk);
+                dev_err(dev, "init_60m_fclk failed error:%d\n", ret);
+                goto err_usbtll_p2_fck;
         }
 
-        clk_disable(omap->usbtll_ick);
-        clk_disable(omap->usbtll_fck);
-        clk_disable(omap->usbhost_fs_fck);
-        clk_disable(omap->usbhost_hs_fck);
-        clk_disable(omap->usbhost_ick);
+        if (is_ehci_phy_mode(pdata->port_mode[0])) {
+                /* for OMAP3 , the clk set paretn fails */
+                ret = clk_set_parent(omap->utmi_p1_fck,
+                                        omap->xclk60mhsp1_ck);
+                if (ret != 0)
+                        dev_err(dev, "xclk60mhsp1_ck set parent"
+                                "failed error:%d\n", ret);
+        } else if (is_ehci_tll_mode(pdata->port_mode[0])) {
+                ret = clk_set_parent(omap->utmi_p1_fck,
+                                        omap->init_60m_fclk);
+                if (ret != 0)
+                        dev_err(dev, "init_60m_fclk set parent"
+                                "failed error:%d\n", ret);
+        }
 
-        /* The gpio_free migh sleep; so unlock the spinlock */
-        spin_unlock_irqrestore(&omap->lock, flags);
+        if (is_ehci_phy_mode(pdata->port_mode[1])) {
+                ret = clk_set_parent(omap->utmi_p2_fck,
+                                        omap->xclk60mhsp2_ck);
+                if (ret != 0)
+                        dev_err(dev, "xclk60mhsp2_ck set parent"
+                                        "failed error:%d\n", ret);
+        } else if (is_ehci_tll_mode(pdata->port_mode[1])) {
+                ret = clk_set_parent(omap->utmi_p2_fck,
+                                                omap->init_60m_fclk);
+                if (ret != 0)
+                        dev_err(dev, "init_60m_fclk set parent"
+                                "failed error:%d\n", ret);
+        }
 
-        if (pdata->ehci_data->phy_reset) {
-                if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[0]))
-                        gpio_free(pdata->ehci_data->reset_gpio_port[0]);
+        res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "uhh");
+        if (!res) {
+                dev_err(dev, "UHH EHCI get resource failed\n");
+                ret = -ENODEV;
+                goto err_init_60m_fclk;
+        }
 
-                if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[1]))
-                        gpio_free(pdata->ehci_data->reset_gpio_port[1]);
+        omap->uhh_base = ioremap(res->start, resource_size(res));
+        if (!omap->uhh_base) {
+                dev_err(dev, "UHH ioremap failed\n");
+                ret = -ENOMEM;
+                goto err_init_60m_fclk;
         }
-        return;
 
-end_disble:
-        spin_unlock_irqrestore(&omap->lock, flags);
-}
+        res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "tll");
+        if (!res) {
+                dev_err(dev, "UHH EHCI get resource failed\n");
+                ret = -ENODEV;
+                goto err_tll;
+        }
 
-int omap_usbhs_enable(struct device *dev)
-{
-        return  usbhs_enable(dev->parent);
+        omap->tll_base = ioremap(res->start, resource_size(res));
+        if (!omap->tll_base) {
+                dev_err(dev, "TLL ioremap failed\n");
+                ret = -ENOMEM;
+                goto err_tll;
+        }
+
+        platform_set_drvdata(pdev, omap);
+
+        ret = omap_usbhs_alloc_children(pdev);
+        if (ret) {
+                dev_err(dev, "omap_usbhs_alloc_children failed\n");
+                goto err_alloc;
+        }
+
+        omap_usbhs_init(dev);
+
+        goto end_probe;
+
+err_alloc:
+        iounmap(omap->tll_base);
+
+err_tll:
+        iounmap(omap->uhh_base);
+
+err_init_60m_fclk:
+        clk_put(omap->init_60m_fclk);
+
+err_usbtll_p2_fck:
+        clk_put(omap->usbtll_p2_fck);
+
+err_usbhost_p2_fck:
+        clk_put(omap->usbhost_p2_fck);
+
+err_usbtll_p1_fck:
+        clk_put(omap->usbtll_p1_fck);
+
+err_usbhost_p1_fck:
+        clk_put(omap->usbhost_p1_fck);
+
+err_xclk60mhsp2_ck:
+        clk_put(omap->xclk60mhsp2_ck);
+
+err_utmi_p2_fck:
+        clk_put(omap->utmi_p2_fck);
+
+err_xclk60mhsp1_ck:
+        clk_put(omap->xclk60mhsp1_ck);
+
+err_utmi_p1_fck:
+        clk_put(omap->utmi_p1_fck);
+
+err_end:
+        clk_put(omap->ehci_logic_fck);
+        pm_runtime_disable(dev);
+        kfree(omap);
+
+end_probe:
+        return ret;
 }
-EXPORT_SYMBOL_GPL(omap_usbhs_enable);
 
-void omap_usbhs_disable(struct device *dev)
+/**
+ * usbhs_omap_remove - shutdown processing for UHH & TLL HCDs
+ * @pdev: USB Host Controller being removed
+ *
+ * Reverses the effect of usbhs_omap_probe().
+ */
+static int __devexit usbhs_omap_remove(struct platform_device *pdev)
 {
-        usbhs_disable(dev->parent);
+        struct usbhs_hcd_omap *omap = platform_get_drvdata(pdev);
+
+        omap_usbhs_deinit(&pdev->dev);
+        iounmap(omap->tll_base);
+        iounmap(omap->uhh_base);
+        clk_put(omap->init_60m_fclk);
+        clk_put(omap->usbtll_p2_fck);
+        clk_put(omap->usbhost_p2_fck);
+        clk_put(omap->usbtll_p1_fck);
+        clk_put(omap->usbhost_p1_fck);
+        clk_put(omap->xclk60mhsp2_ck);
+        clk_put(omap->utmi_p2_fck);
+        clk_put(omap->xclk60mhsp1_ck);
+        clk_put(omap->utmi_p1_fck);
+        clk_put(omap->ehci_logic_fck);
+        pm_runtime_disable(&pdev->dev);
+        kfree(omap);
+
+        return 0;
 }
-EXPORT_SYMBOL_GPL(omap_usbhs_disable);
+
+static const struct dev_pm_ops usbhsomap_dev_pm_ops = {
+        .runtime_suspend        = usbhs_runtime_suspend,
+        .runtime_resume         = usbhs_runtime_resume,
+};
 
 static struct platform_driver usbhs_omap_driver = {
         .driver = {
                 .name           = (char *)usbhs_driver_name,
                 .owner          = THIS_MODULE,
+                .pm             = &usbhsomap_dev_pm_ops,
         },
         .remove         = __exit_p(usbhs_omap_remove),
 };
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index d5fe43d53c51..d1fb561e089d 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -1991,6 +1991,8 @@ static int __init omap_hsmmc_probe(struct platform_device *pdev)
         if (mmc_slot(host).nonremovable)
                 mmc->caps |= MMC_CAP_NONREMOVABLE;
 
+        mmc->pm_caps = mmc_slot(host).pm_caps;
+
         omap_hsmmc_conf_bus_power(host);
 
         /* Select DMA lines */
@@ -2179,13 +2181,7 @@ static int omap_hsmmc_suspend(struct device *dev)
                 cancel_work_sync(&host->mmc_carddetect_work);
                 ret = mmc_suspend_host(host->mmc);
 
-                if (ret == 0) {
-                        omap_hsmmc_disable_irq(host);
-                        OMAP_HSMMC_WRITE(host->base, HCTL,
-                                OMAP_HSMMC_READ(host->base, HCTL) & ~SDBP);
-                        if (host->got_dbclk)
-                                clk_disable(host->dbclk);
-                } else {
+                if (ret) {
                         host->suspended = 0;
                         if (host->pdata->resume) {
                                 ret = host->pdata->resume(&pdev->dev,
@@ -2194,9 +2190,20 @@ static int omap_hsmmc_suspend(struct device *dev)
                                         dev_dbg(mmc_dev(host->mmc),
                                                 "Unmask interrupt failed\n");
                         }
+                        goto err;
                 }
-                pm_runtime_put_sync(host->dev);
+
+                if (!(host->mmc->pm_flags & MMC_PM_KEEP_POWER)) {
+                        omap_hsmmc_disable_irq(host);
+                        OMAP_HSMMC_WRITE(host->base, HCTL,
+                                OMAP_HSMMC_READ(host->base, HCTL) & ~SDBP);
+                }
+                if (host->got_dbclk)
+                        clk_disable(host->dbclk);
+
         }
+err:
+        pm_runtime_put_sync(host->dev);
         return ret;
 }
 
@@ -2216,7 +2223,8 @@ static int omap_hsmmc_resume(struct device *dev)
                 if (host->got_dbclk)
                         clk_enable(host->dbclk);
 
-                omap_hsmmc_conf_bus_power(host);
+                if (!(host->mmc->pm_flags & MMC_PM_KEEP_POWER))
+                        omap_hsmmc_conf_bus_power(host);
 
                 if (host->pdata->resume) {
                         ret = host->pdata->resume(&pdev->dev, host->slot_id);
diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile
index cd6d69a6a7d2..08d5f0388877 100644
--- a/drivers/net/ethernet/Makefile
+++ b/drivers/net/ethernet/Makefile
@@ -10,7 +10,7 @@ obj-$(CONFIG_NET_VENDOR_ALTEON) += alteon/
 obj-$(CONFIG_NET_VENDOR_AMD) += amd/
 obj-$(CONFIG_NET_VENDOR_APPLE) += apple/
 obj-$(CONFIG_NET_VENDOR_ATHEROS) += atheros/
-obj-$(CONFIG_NET_ATMEL) += cadence/
+obj-$(CONFIG_NET_CADENCE) += cadence/
 obj-$(CONFIG_NET_BFIN) += adi/
 obj-$(CONFIG_NET_VENDOR_BROADCOM) += broadcom/
 obj-$(CONFIG_NET_VENDOR_BROCADE) += brocade/
diff --git a/drivers/net/ethernet/cadence/Kconfig b/drivers/net/ethernet/cadence/Kconfig
index b48378a41e49..db931916da08 100644
--- a/drivers/net/ethernet/cadence/Kconfig
+++ b/drivers/net/ethernet/cadence/Kconfig
@@ -5,8 +5,8 @@
 config HAVE_NET_MACB
         bool
 
-config NET_ATMEL
-        bool "Atmel devices"
+config NET_CADENCE
+        bool "Cadence devices"
         default y
         depends on HAVE_NET_MACB || (ARM && ARCH_AT91RM9200)
         ---help---
@@ -21,7 +21,7 @@ config NET_ATMEL
           the remaining Atmel network card questions. If you say Y, you will be
           asked for your specific card in the following questions.
 
-if NET_ATMEL
+if NET_CADENCE
 
 config ARM_AT91_ETHER
         tristate "AT91RM9200 Ethernet support"
@@ -33,14 +33,16 @@ config ARM_AT91_ETHER
           ethernet support, then you should always answer Y to this.
 
 config MACB
-        tristate "Atmel MACB support"
+        tristate "Cadence MACB/GEM support"
         depends on HAVE_NET_MACB
         select PHYLIB
         ---help---
-          The Atmel MACB ethernet interface is found on many AT32 and AT91
-          parts. Say Y to include support for the MACB chip.
+          The Cadence MACB ethernet interface is found on many Atmel AT32 and
+          AT91 parts.  This driver also supports the Cadence GEM (Gigabit
+          Ethernet MAC found in some ARM SoC devices).  Note: the Gigabit mode
+          is not yet supported.  Say Y to include support for the MACB/GEM chip.
 
           To compile this driver as a module, choose M here: the module
           will be called macb.
 
-endif # NET_ATMEL
+endif # NET_CADENCE
diff --git a/drivers/net/ethernet/cadence/at91_ether.c b/drivers/net/ethernet/cadence/at91_ether.c
index dfeb46cb3f74..1a5b6efa0120 100644
--- a/drivers/net/ethernet/cadence/at91_ether.c
+++ b/drivers/net/ethernet/cadence/at91_ether.c
@@ -256,8 +256,7 @@ static void enable_phyirq(struct net_device *dev)
         unsigned int dsintr, irq_number;
         int status;
 
-        irq_number = lp->board_data.phy_irq_pin;
-        if (!irq_number) {
+        if (!gpio_is_valid(lp->board_data.phy_irq_pin)) {
                 /*
                  * PHY doesn't have an IRQ pin (RTL8201, DP83847, AC101L),
                  * or board does not have it connected.
@@ -266,6 +265,7 @@ static void enable_phyirq(struct net_device *dev)
                 return;
         }
 
+        irq_number = lp->board_data.phy_irq_pin;
         status = request_irq(irq_number, at91ether_phy_interrupt, 0, dev->name, dev);
         if (status) {
                 printk(KERN_ERR "at91_ether: PHY IRQ %d request failed - status %d!\n", irq_number, status);
@@ -320,8 +320,7 @@ static void disable_phyirq(struct net_device *dev)
         unsigned int dsintr;
         unsigned int irq_number;
 
-        irq_number = lp->board_data.phy_irq_pin;
-        if (!irq_number) {
+        if (!gpio_is_valid(lp->board_data.phy_irq_pin)) {
                 del_timer_sync(&lp->check_timer);
                 return;
         }
@@ -366,6 +365,7 @@ static void disable_phyirq(struct net_device *dev)
         disable_mdi();
         spin_unlock_irq(&lp->lock);
 
+        irq_number = lp->board_data.phy_irq_pin;
         free_irq(irq_number, dev);                      /* Free interrupt handler */
 }
 
@@ -1078,7 +1078,7 @@ static int __init at91ether_setup(unsigned long phy_type, unsigned short phy_add
         netif_carrier_off(dev);         /* will be enabled in open() */
 
         /* If board has no PHY IRQ, use a timer to poll the PHY */
-        if (!lp->board_data.phy_irq_pin) {
+        if (!gpio_is_valid(lp->board_data.phy_irq_pin)) {
                 init_timer(&lp->check_timer);
                 lp->check_timer.data = (unsigned long)dev;
                 lp->check_timer.function = at91ether_check_link;
@@ -1170,7 +1170,8 @@ static int __devexit at91ether_remove(struct platform_device *pdev)
         struct net_device *dev = platform_get_drvdata(pdev);
         struct at91_private *lp = netdev_priv(dev);
 
-        if (lp->board_data.phy_irq_pin >= 32)
+        if (gpio_is_valid(lp->board_data.phy_irq_pin) &&
+            lp->board_data.phy_irq_pin >= 32)
                 gpio_free(lp->board_data.phy_irq_pin);
 
         unregister_netdev(dev);
@@ -1189,11 +1190,12 @@ static int at91ether_suspend(struct platform_device *pdev, pm_message_t mesg)
 {
         struct net_device *net_dev = platform_get_drvdata(pdev);
         struct at91_private *lp = netdev_priv(net_dev);
-        int phy_irq = lp->board_data.phy_irq_pin;
 
         if (netif_running(net_dev)) {
-                if (phy_irq)
+                if (gpio_is_valid(lp->board_data.phy_irq_pin)) {
+                        int phy_irq = lp->board_data.phy_irq_pin;
                         disable_irq(phy_irq);
+                }
 
                 netif_stop_queue(net_dev);
                 netif_device_detach(net_dev);
@@ -1207,7 +1209,6 @@ static int at91ether_resume(struct platform_device *pdev)
 {
         struct net_device *net_dev = platform_get_drvdata(pdev);
         struct at91_private *lp = netdev_priv(net_dev);
-        int phy_irq = lp->board_data.phy_irq_pin;
 
         if (netif_running(net_dev)) {
                 clk_enable(lp->ether_clk);
@@ -1215,8 +1216,10 @@ static int at91ether_resume(struct platform_device *pdev)
                 netif_device_attach(net_dev);
                 netif_start_queue(net_dev);
 
-                if (phy_irq)
+                if (gpio_is_valid(lp->board_data.phy_irq_pin)) {
+                        int phy_irq = lp->board_data.phy_irq_pin;
                         enable_irq(phy_irq);
+                }
         }
         return 0;
 }
diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c
index aa1d597091a8..f3d5c65d99cf 100644
--- a/drivers/net/ethernet/cadence/macb.c
+++ b/drivers/net/ethernet/cadence/macb.c
@@ -1,5 +1,5 @@
 /*
- * Atmel MACB Ethernet Controller driver
+ * Cadence MACB/GEM Ethernet Controller driver
  *
  * Copyright (C) 2004-2006 Atmel Corporation
  *
@@ -23,6 +23,9 @@
 #include <linux/platform_data/macb.h>
 #include <linux/platform_device.h>
 #include <linux/phy.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/of_net.h>
 
 #include "macb.h"
 
@@ -59,9 +62,9 @@ static void __macb_set_hwaddr(struct macb *bp)
         u16 top;
 
         bottom = cpu_to_le32(*((u32 *)bp->dev->dev_addr));
-        macb_writel(bp, SA1B, bottom);
+        macb_or_gem_writel(bp, SA1B, bottom);
         top = cpu_to_le16(*((u16 *)(bp->dev->dev_addr + 4)));
-        macb_writel(bp, SA1T, top);
+        macb_or_gem_writel(bp, SA1T, top);
 }
 
 static void __init macb_get_hwaddr(struct macb *bp)
@@ -70,8 +73,8 @@ static void __init macb_get_hwaddr(struct macb *bp)
         u16 top;
         u8 addr[6];
 
-        bottom = macb_readl(bp, SA1B);
-        top = macb_readl(bp, SA1T);
+        bottom = macb_or_gem_readl(bp, SA1B);
+        top = macb_or_gem_readl(bp, SA1T);
 
         addr[0] = bottom & 0xff;
         addr[1] = (bottom >> 8) & 0xff;
@@ -191,7 +194,6 @@ static int macb_mii_probe(struct net_device *dev)
 {
         struct macb *bp = netdev_priv(dev);
         struct phy_device *phydev;
-        struct macb_platform_data *pdata;
         int ret;
 
         phydev = phy_find_first(bp->mii_bus);
@@ -200,14 +202,11 @@ static int macb_mii_probe(struct net_device *dev)
                 return -1;
         }
 
-        pdata = bp->pdev->dev.platform_data;
         /* TODO : add pin_irq */
 
         /* attach the mac to the phy */
         ret = phy_connect_direct(dev, phydev, &macb_handle_link_change, 0,
-                                 pdata && pdata->is_rmii ?
-                                 PHY_INTERFACE_MODE_RMII :
-                                 PHY_INTERFACE_MODE_MII);
+                                 bp->phy_interface);
         if (ret) {
                 netdev_err(dev, "Could not attach to PHY\n");
                 return ret;
@@ -285,8 +284,8 @@ err_out:
 static void macb_update_stats(struct macb *bp)
 {
         u32 __iomem *reg = bp->regs + MACB_PFR;
-        u32 *p = &bp->hw_stats.rx_pause_frames;
-        u32 *end = &bp->hw_stats.tx_pause_frames + 1;
+        u32 *p = &bp->hw_stats.macb.rx_pause_frames;
+        u32 *end = &bp->hw_stats.macb.tx_pause_frames + 1;
 
         WARN_ON((unsigned long)(end - p - 1) != (MACB_TPF - MACB_PFR) / 4);
 
@@ -580,7 +579,10 @@ static irqreturn_t macb_interrupt(int irq, void *dev_id)
 
                 if (status & MACB_BIT(ISR_ROVR)) {
                         /* We missed at least one packet */
-                        bp->hw_stats.rx_overruns++;
+                        if (macb_is_gem(bp))
+                                bp->hw_stats.gem.rx_overruns++;
+                        else
+                                bp->hw_stats.macb.rx_overruns++;
                 }
 
                 if (status & MACB_BIT(HRESP)) {
@@ -790,6 +792,84 @@ static void macb_reset_hw(struct macb *bp)
         macb_readl(bp, ISR);
 }
 
+static u32 gem_mdc_clk_div(struct macb *bp)
+{
+        u32 config;
+        unsigned long pclk_hz = clk_get_rate(bp->pclk);
+
+        if (pclk_hz <= 20000000)
+                config = GEM_BF(CLK, GEM_CLK_DIV8);
+        else if (pclk_hz <= 40000000)
+                config = GEM_BF(CLK, GEM_CLK_DIV16);
+        else if (pclk_hz <= 80000000)
+                config = GEM_BF(CLK, GEM_CLK_DIV32);
+        else if (pclk_hz <= 120000000)
+                config = GEM_BF(CLK, GEM_CLK_DIV48);
+        else if (pclk_hz <= 160000000)
+                config = GEM_BF(CLK, GEM_CLK_DIV64);
+        else
+                config = GEM_BF(CLK, GEM_CLK_DIV96);
+
+        return config;
+}
+
+static u32 macb_mdc_clk_div(struct macb *bp)
+{
+        u32 config;
+        unsigned long pclk_hz;
+
+        if (macb_is_gem(bp))
+                return gem_mdc_clk_div(bp);
+
+        pclk_hz = clk_get_rate(bp->pclk);
+        if (pclk_hz <= 20000000)
+                config = MACB_BF(CLK, MACB_CLK_DIV8);
+        else if (pclk_hz <= 40000000)
+                config = MACB_BF(CLK, MACB_CLK_DIV16);
+        else if (pclk_hz <= 80000000)
+                config = MACB_BF(CLK, MACB_CLK_DIV32);
+        else
+                config = MACB_BF(CLK, MACB_CLK_DIV64);
+
+        return config;
+}
+
+/*
+ * Get the DMA bus width field of the network configuration register that we
+ * should program.  We find the width from decoding the design configuration
+ * register to find the maximum supported data bus width.
+ */
+static u32 macb_dbw(struct macb *bp)
+{
+        if (!macb_is_gem(bp))
+                return 0;
+
+        switch (GEM_BFEXT(DBWDEF, gem_readl(bp, DCFG1))) {
+        case 4:
+                return GEM_BF(DBW, GEM_DBW128);
+        case 2:
+                return GEM_BF(DBW, GEM_DBW64);
+        case 1:
+        default:
+                return GEM_BF(DBW, GEM_DBW32);
+        }
+}
+
+/*
+ * Configure the receive DMA engine to use the correct receive buffer size.
+ * This is a configurable parameter for GEM.
+ */
+static void macb_configure_dma(struct macb *bp)
+{
+        u32 dmacfg;
+
+        if (macb_is_gem(bp)) {
+                dmacfg = gem_readl(bp, DMACFG) & ~GEM_BF(RXBS, -1L);
+                dmacfg |= GEM_BF(RXBS, RX_BUFFER_SIZE / 64);
+                gem_writel(bp, DMACFG, dmacfg);
+        }
+}
+
 static void macb_init_hw(struct macb *bp)
 {
         u32 config;
@@ -797,7 +877,7 @@ static void macb_init_hw(struct macb *bp)
         macb_reset_hw(bp);
         __macb_set_hwaddr(bp);
 
-        config = macb_readl(bp, NCFGR) & MACB_BF(CLK, -1L);
+        config = macb_mdc_clk_div(bp);
         config |= MACB_BIT(PAE);                /* PAuse Enable */
         config |= MACB_BIT(DRFCS);              /* Discard Rx FCS */
         config |= MACB_BIT(BIG);                /* Receive oversized frames */
@@ -805,8 +885,11 @@ static void macb_init_hw(struct macb *bp)
                 config |= MACB_BIT(CAF);        /* Copy All Frames */
         if (!(bp->dev->flags & IFF_BROADCAST))
                 config |= MACB_BIT(NBC);        /* No BroadCast */
+        config |= macb_dbw(bp);
         macb_writel(bp, NCFGR, config);
 
+        macb_configure_dma(bp);
+
         /* Initialize TX and RX buffers */
         macb_writel(bp, RBQP, bp->rx_ring_dma);
         macb_writel(bp, TBQP, bp->tx_ring_dma);
@@ -902,8 +985,8 @@ static void macb_sethashtable(struct net_device *dev)
                 mc_filter[bitnr >> 5] |= 1 << (bitnr & 31);
         }
 
-        macb_writel(bp, HRB, mc_filter[0]);
-        macb_writel(bp, HRT, mc_filter[1]);
+        macb_or_gem_writel(bp, HRB, mc_filter[0]);
+        macb_or_gem_writel(bp, HRT, mc_filter[1]);
 }
 
 /*
@@ -925,8 +1008,8 @@ static void macb_set_rx_mode(struct net_device *dev)
 
         if (dev->flags & IFF_ALLMULTI) {
                 /* Enable all multicast mode */
-                macb_writel(bp, HRB, -1);
-                macb_writel(bp, HRT, -1);
+                macb_or_gem_writel(bp, HRB, -1);
+                macb_or_gem_writel(bp, HRT, -1);
                 cfg |= MACB_BIT(NCFGR_MTI);
         } else if (!netdev_mc_empty(dev)) {
                 /* Enable specific multicasts */
@@ -934,8 +1017,8 @@ static void macb_set_rx_mode(struct net_device *dev)
                 cfg |= MACB_BIT(NCFGR_MTI);
         } else if (dev->flags & (~IFF_ALLMULTI)) {
                 /* Disable all multicast mode */
-                macb_writel(bp, HRB, 0);
-                macb_writel(bp, HRT, 0);
+                macb_or_gem_writel(bp, HRB, 0);
+                macb_or_gem_writel(bp, HRT, 0);
                 cfg &= ~MACB_BIT(NCFGR_MTI);
         }
 
@@ -997,11 +1080,62 @@ static int macb_close(struct net_device *dev)
         return 0;
 }
 
+static void gem_update_stats(struct macb *bp)
+{
+        u32 __iomem *reg = bp->regs + GEM_OTX;
+        u32 *p = &bp->hw_stats.gem.tx_octets_31_0;
+        u32 *end = &bp->hw_stats.gem.rx_udp_checksum_errors + 1;
+
+        for (; p < end; p++, reg++)
+                *p += __raw_readl(reg);
+}
+
+static struct net_device_stats *gem_get_stats(struct macb *bp)
+{
+        struct gem_stats *hwstat = &bp->hw_stats.gem;
+        struct net_device_stats *nstat = &bp->stats;
+
+        gem_update_stats(bp);
+
+        nstat->rx_errors = (hwstat->rx_frame_check_sequence_errors +
+                            hwstat->rx_alignment_errors +
+                            hwstat->rx_resource_errors +
+                            hwstat->rx_overruns +
+                            hwstat->rx_oversize_frames +
+                            hwstat->rx_jabbers +
+                            hwstat->rx_undersized_frames +
+                            hwstat->rx_length_field_frame_errors);
+        nstat->tx_errors = (hwstat->tx_late_collisions +
+                            hwstat->tx_excessive_collisions +
+                            hwstat->tx_underrun +
+                            hwstat->tx_carrier_sense_errors);
+        nstat->multicast = hwstat->rx_multicast_frames;
+        nstat->collisions = (hwstat->tx_single_collision_frames +
+                             hwstat->tx_multiple_collision_frames +
+                             hwstat->tx_excessive_collisions);
+        nstat->rx_length_errors = (hwstat->rx_oversize_frames +
+                                   hwstat->rx_jabbers +
+                                   hwstat->rx_undersized_frames +
+                                   hwstat->rx_length_field_frame_errors);
+        nstat->rx_over_errors = hwstat->rx_resource_errors;
+        nstat->rx_crc_errors = hwstat->rx_frame_check_sequence_errors;
+        nstat->rx_frame_errors = hwstat->rx_alignment_errors;
+        nstat->rx_fifo_errors = hwstat->rx_overruns;
+        nstat->tx_aborted_errors = hwstat->tx_excessive_collisions;
+        nstat->tx_carrier_errors = hwstat->tx_carrier_sense_errors;
+        nstat->tx_fifo_errors = hwstat->tx_underrun;
+
+        return nstat;
+}
+
 static struct net_device_stats *macb_get_stats(struct net_device *dev)
 {
         struct macb *bp = netdev_priv(dev);
         struct net_device_stats *nstat = &bp->stats;
-        struct macb_stats *hwstat = &bp->hw_stats;
+        struct macb_stats *hwstat = &bp->hw_stats.macb;
+
+        if (macb_is_gem(bp))
+                return gem_get_stats(bp);
 
         /* read stats from hardware */
         macb_update_stats(bp);
@@ -1109,6 +1243,52 @@ static const struct net_device_ops macb_netdev_ops = {
 #endif
 };
 
+#if defined(CONFIG_OF)
+static const struct of_device_id macb_dt_ids[] = {
+        { .compatible = "cdns,at32ap7000-macb" },
+        { .compatible = "cdns,at91sam9260-macb" },
+        { .compatible = "cdns,macb" },
+        { .compatible = "cdns,pc302-gem" },
+        { .compatible = "cdns,gem" },
+        { /* sentinel */ }
+};
+
+MODULE_DEVICE_TABLE(of, macb_dt_ids);
+
+static int __devinit macb_get_phy_mode_dt(struct platform_device *pdev)
+{
+        struct device_node *np = pdev->dev.of_node;
+
+        if (np)
+                return of_get_phy_mode(np);
+
+        return -ENODEV;
+}
+
+static int __devinit macb_get_hwaddr_dt(struct macb *bp)
+{
+        struct device_node *np = bp->pdev->dev.of_node;
+        if (np) {
+                const char *mac = of_get_mac_address(np);
+                if (mac) {
+                        memcpy(bp->dev->dev_addr, mac, ETH_ALEN);
+                        return 0;
+                }
+        }
+
+        return -ENODEV;
+}
+#else
+static int __devinit macb_get_phy_mode_dt(struct platform_device *pdev)
+{
+        return -ENODEV;
+}
+static int __devinit macb_get_hwaddr_dt(struct macb *bp)
+{
+        return -ENODEV;
+}
+#endif
+
 static int __init macb_probe(struct platform_device *pdev)
 {
         struct macb_platform_data *pdata;
@@ -1116,7 +1296,6 @@ static int __init macb_probe(struct platform_device *pdev)
         struct net_device *dev;
         struct macb *bp;
         struct phy_device *phydev;
-        unsigned long pclk_hz;
         u32 config;
         int err = -ENXIO;
 
@@ -1180,31 +1359,37 @@ static int __init macb_probe(struct platform_device *pdev)
         dev->base_addr = regs->start;
 
         /* Set MII management clock divider */
-        pclk_hz = clk_get_rate(bp->pclk);
-        if (pclk_hz <= 20000000)
-                config = MACB_BF(CLK, MACB_CLK_DIV8);
-        else if (pclk_hz <= 40000000)
-                config = MACB_BF(CLK, MACB_CLK_DIV16);
-        else if (pclk_hz <= 80000000)
-                config = MACB_BF(CLK, MACB_CLK_DIV32);
-        else
-                config = MACB_BF(CLK, MACB_CLK_DIV64);
+        config = macb_mdc_clk_div(bp);
+        config |= macb_dbw(bp);
         macb_writel(bp, NCFGR, config);
 
-        macb_get_hwaddr(bp);
-        pdata = pdev->dev.platform_data;
+        err = macb_get_hwaddr_dt(bp);
+        if (err < 0)
+                macb_get_hwaddr(bp);
+
+        err = macb_get_phy_mode_dt(pdev);
+        if (err < 0) {
+                pdata = pdev->dev.platform_data;
+                if (pdata && pdata->is_rmii)
+                        bp->phy_interface = PHY_INTERFACE_MODE_RMII;
+                else
+                        bp->phy_interface = PHY_INTERFACE_MODE_MII;
+        } else {
+                bp->phy_interface = err;
+        }
 
-        if (pdata && pdata->is_rmii)
+        if (bp->phy_interface == PHY_INTERFACE_MODE_RMII)
 #if defined(CONFIG_ARCH_AT91)
-                macb_writel(bp, USRIO, (MACB_BIT(RMII) | MACB_BIT(CLKEN)) );
+                macb_or_gem_writel(bp, USRIO, (MACB_BIT(RMII) |
+                                               MACB_BIT(CLKEN)));
 #else
-                macb_writel(bp, USRIO, 0);
+                macb_or_gem_writel(bp, USRIO, 0);
 #endif
         else
 #if defined(CONFIG_ARCH_AT91)
-                macb_writel(bp, USRIO, MACB_BIT(CLKEN));
+                macb_or_gem_writel(bp, USRIO, MACB_BIT(CLKEN));
 #else
-                macb_writel(bp, USRIO, MACB_BIT(MII));
+                macb_or_gem_writel(bp, USRIO, MACB_BIT(MII));
 #endif
 
         bp->tx_pending = DEF_TX_RING_PENDING;
@@ -1221,8 +1406,9 @@ static int __init macb_probe(struct platform_device *pdev)
 
         platform_set_drvdata(pdev, dev);
 
-        netdev_info(dev, "Atmel MACB at 0x%08lx irq %d (%pM)\n",
-                dev->base_addr, dev->irq, dev->dev_addr);
+        netdev_info(dev, "Cadence %s at 0x%08lx irq %d (%pM)\n",
+                    macb_is_gem(bp) ? "GEM" : "MACB", dev->base_addr,
+                    dev->irq, dev->dev_addr);
 
         phydev = bp->phy_dev;
         netdev_info(dev, "attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
@@ -1315,6 +1501,7 @@ static struct platform_driver macb_driver = {
         .driver         = {
                 .name           = "macb",
                 .owner  = THIS_MODULE,
+                .of_match_table = of_match_ptr(macb_dt_ids),
         },
 };
 
@@ -1332,6 +1519,6 @@ module_init(macb_init);
 module_exit(macb_exit);
 
 MODULE_LICENSE("GPL");
-MODULE_DESCRIPTION("Atmel MACB Ethernet driver");
+MODULE_DESCRIPTION("Cadence MACB/GEM Ethernet driver");
 MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
 MODULE_ALIAS("platform:macb");
diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h
index d3212f6db703..335e288f5314 100644
--- a/drivers/net/ethernet/cadence/macb.h
+++ b/drivers/net/ethernet/cadence/macb.h
@@ -59,6 +59,24 @@
 #define MACB_TPQ                                0x00bc
 #define MACB_USRIO                              0x00c0
 #define MACB_WOL                                0x00c4
+#define MACB_MID                                0x00fc
+
+/* GEM register offsets. */
+#define GEM_NCFGR                               0x0004
+#define GEM_USRIO                               0x000c
+#define GEM_DMACFG                              0x0010
+#define GEM_HRB                                 0x0080
+#define GEM_HRT                                 0x0084
+#define GEM_SA1B                                0x0088
+#define GEM_SA1T                                0x008C
+#define GEM_OTX                                 0x0100
+#define GEM_DCFG1                               0x0280
+#define GEM_DCFG2                               0x0284
+#define GEM_DCFG3                               0x0288
+#define GEM_DCFG4                               0x028c
+#define GEM_DCFG5                               0x0290
+#define GEM_DCFG6                               0x0294
+#define GEM_DCFG7                               0x0298
 
 /* Bitfields in NCR */
 #define MACB_LB_OFFSET                          0
@@ -126,6 +144,21 @@
 #define MACB_IRXFCS_OFFSET                      19
 #define MACB_IRXFCS_SIZE                        1
 
+/* GEM specific NCFGR bitfields. */
+#define GEM_CLK_OFFSET                          18
+#define GEM_CLK_SIZE                            3
+#define GEM_DBW_OFFSET                          21
+#define GEM_DBW_SIZE                            2
+
+/* Constants for data bus width. */
+#define GEM_DBW32                               0
+#define GEM_DBW64                               1
+#define GEM_DBW128                              2
+
+/* Bitfields in DMACFG. */
+#define GEM_RXBS_OFFSET                         16
+#define GEM_RXBS_SIZE                           8
+
 /* Bitfields in NSR */
 #define MACB_NSR_LINK_OFFSET                    0
 #define MACB_NSR_LINK_SIZE                      1
@@ -228,12 +261,30 @@
 #define MACB_WOL_MTI_OFFSET                     19
 #define MACB_WOL_MTI_SIZE                       1
 
+/* Bitfields in MID */
+#define MACB_IDNUM_OFFSET                       16
+#define MACB_IDNUM_SIZE                         16
+#define MACB_REV_OFFSET                         0
+#define MACB_REV_SIZE                           16
+
+/* Bitfields in DCFG1. */
+#define GEM_DBWDEF_OFFSET                       25
+#define GEM_DBWDEF_SIZE                         3
+
 /* Constants for CLK */
 #define MACB_CLK_DIV8                           0
 #define MACB_CLK_DIV16                          1
 #define MACB_CLK_DIV32                          2
 #define MACB_CLK_DIV64                          3
 
+/* GEM specific constants for CLK. */
+#define GEM_CLK_DIV8                            0
+#define GEM_CLK_DIV16                           1
+#define GEM_CLK_DIV32                           2
+#define GEM_CLK_DIV48                           3
+#define GEM_CLK_DIV64                           4
+#define GEM_CLK_DIV96                           5
+
 /* Constants for MAN register */
 #define MACB_MAN_SOF                            1
 #define MACB_MAN_WRITE                          1
@@ -254,11 +305,52 @@
                     << MACB_##name##_OFFSET))           \
          | MACB_BF(name,value))
 
+#define GEM_BIT(name)                                   \
+        (1 << GEM_##name##_OFFSET)
+#define GEM_BF(name, value)                             \
+        (((value) & ((1 << GEM_##name##_SIZE) - 1))     \
+         << GEM_##name##_OFFSET)
+#define GEM_BFEXT(name, value)\
+        (((value) >> GEM_##name##_OFFSET)               \
+         & ((1 << GEM_##name##_SIZE) - 1))
+#define GEM_BFINS(name, value, old)                     \
+        (((old) & ~(((1 << GEM_##name##_SIZE) - 1)      \
+                    << GEM_##name##_OFFSET))            \
+         | GEM_BF(name, value))
+
 /* Register access macros */
 #define macb_readl(port,reg)                            \
         __raw_readl((port)->regs + MACB_##reg)
 #define macb_writel(port,reg,value)                     \
         __raw_writel((value), (port)->regs + MACB_##reg)
+#define gem_readl(port, reg)                            \
+        __raw_readl((port)->regs + GEM_##reg)
+#define gem_writel(port, reg, value)                    \
+        __raw_writel((value), (port)->regs + GEM_##reg)
+
+/*
+ * Conditional GEM/MACB macros.  These perform the operation to the correct
+ * register dependent on whether the device is a GEM or a MACB.  For registers
+ * and bitfields that are common across both devices, use macb_{read,write}l
+ * to avoid the cost of the conditional.
+ */
+#define macb_or_gem_writel(__bp, __reg, __value) \
+        ({ \
+                if (macb_is_gem((__bp))) \
+                        gem_writel((__bp), __reg, __value); \
+                else \
+                        macb_writel((__bp), __reg, __value); \
+        })
+
+#define macb_or_gem_readl(__bp, __reg) \
+        ({ \
+                u32 __v; \
+                if (macb_is_gem((__bp))) \
+                        __v = gem_readl((__bp), __reg); \
+                else \
+                        __v = macb_readl((__bp), __reg); \
+                __v; \
+        })
 
 struct dma_desc {
         u32     addr;
@@ -358,6 +450,54 @@ struct macb_stats {
         u32     tx_pause_frames;
 };
 
+struct gem_stats {
+        u32     tx_octets_31_0;
+        u32     tx_octets_47_32;
+        u32     tx_frames;
+        u32     tx_broadcast_frames;
+        u32     tx_multicast_frames;
+        u32     tx_pause_frames;
+        u32     tx_64_byte_frames;
+        u32     tx_65_127_byte_frames;
+        u32     tx_128_255_byte_frames;
+        u32     tx_256_511_byte_frames;
+        u32     tx_512_1023_byte_frames;
+        u32     tx_1024_1518_byte_frames;
+        u32     tx_greater_than_1518_byte_frames;
+        u32     tx_underrun;
+        u32     tx_single_collision_frames;
+        u32     tx_multiple_collision_frames;
+        u32     tx_excessive_collisions;
+        u32     tx_late_collisions;
+        u32     tx_deferred_frames;
+        u32     tx_carrier_sense_errors;
+        u32     rx_octets_31_0;
+        u32     rx_octets_47_32;
+        u32     rx_frames;
+        u32     rx_broadcast_frames;
+        u32     rx_multicast_frames;
+        u32     rx_pause_frames;
+        u32     rx_64_byte_frames;
+        u32     rx_65_127_byte_frames;
+        u32     rx_128_255_byte_frames;
+        u32     rx_256_511_byte_frames;
+        u32     rx_512_1023_byte_frames;
+        u32     rx_1024_1518_byte_frames;
+        u32     rx_greater_than_1518_byte_frames;
+        u32     rx_undersized_frames;
+        u32     rx_oversize_frames;
+        u32     rx_jabbers;
+        u32     rx_frame_check_sequence_errors;
+        u32     rx_length_field_frame_errors;
+        u32     rx_symbol_errors;
+        u32     rx_alignment_errors;
+        u32     rx_resource_errors;
+        u32     rx_overruns;
+        u32     rx_ip_header_checksum_errors;
+        u32     rx_tcp_checksum_errors;
+        u32     rx_udp_checksum_errors;
+};
+
 struct macb {
         void __iomem            *regs;
 
@@ -376,7 +516,10 @@ struct macb {
         struct net_device       *dev;
         struct napi_struct      napi;
         struct net_device_stats stats;
-        struct macb_stats       hw_stats;
+        union {
+                struct macb_stats       macb;
+                struct gem_stats        gem;
+        }                       hw_stats;
 
         dma_addr_t              rx_ring_dma;
         dma_addr_t              tx_ring_dma;
@@ -389,6 +532,13 @@ struct macb {
         unsigned int            link;
         unsigned int            speed;
         unsigned int            duplex;
+
+        phy_interface_t         phy_interface;
 };
 
+static inline bool macb_is_gem(struct macb *bp)
+{
+        return MACB_BFEXT(IDNUM, macb_readl(bp, MID)) == 0x2;
+}
+
 #endif /* _MACB_H */
diff --git a/drivers/pcmcia/pxa2xx_cm_x255.c b/drivers/pcmcia/pxa2xx_cm_x255.c
index 0b4f946cf13a..31ab6ddf52c9 100644
--- a/drivers/pcmcia/pxa2xx_cm_x255.c
+++ b/drivers/pcmcia/pxa2xx_cm_x255.c
@@ -16,8 +16,6 @@
 #include <linux/gpio.h>
 #include <linux/export.h>
 
-#include <asm/mach-types.h>
-
 #include "soc_common.h"
 
 #define GPIO_PCMCIA_SKTSEL      (54)
@@ -27,15 +25,15 @@
 #define GPIO_PCMCIA_S1_RDYINT   (8)
 #define GPIO_PCMCIA_RESET       (9)
 
-#define PCMCIA_S0_CD_VALID      IRQ_GPIO(GPIO_PCMCIA_S0_CD_VALID)
-#define PCMCIA_S1_CD_VALID      IRQ_GPIO(GPIO_PCMCIA_S1_CD_VALID)
-#define PCMCIA_S0_RDYINT        IRQ_GPIO(GPIO_PCMCIA_S0_RDYINT)
-#define PCMCIA_S1_RDYINT        IRQ_GPIO(GPIO_PCMCIA_S1_RDYINT)
+#define PCMCIA_S0_CD_VALID      gpio_to_irq(GPIO_PCMCIA_S0_CD_VALID)
+#define PCMCIA_S1_CD_VALID      gpio_to_irq(GPIO_PCMCIA_S1_CD_VALID)
+#define PCMCIA_S0_RDYINT        gpio_to_irq(GPIO_PCMCIA_S0_RDYINT)
+#define PCMCIA_S1_RDYINT        gpio_to_irq(GPIO_PCMCIA_S1_RDYINT)
 
 
 static struct pcmcia_irqs irqs[] = {
-        { 0, PCMCIA_S0_CD_VALID, "PCMCIA0 CD" },
-        { 1, PCMCIA_S1_CD_VALID, "PCMCIA1 CD" },
+        { .sock = 0, .str = "PCMCIA0 CD" },
+        { .sock = 1, .str = "PCMCIA1 CD" },
 };
 
 static int cmx255_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
@@ -46,6 +44,8 @@ static int cmx255_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
         gpio_direction_output(GPIO_PCMCIA_RESET, 0);
 
         skt->socket.pci_irq = skt->nr == 0 ? PCMCIA_S0_RDYINT : PCMCIA_S1_RDYINT;
+        irqs[0].irq = PCMCIA_S0_CD_VALID;
+        irqs[1].irq = PCMCIA_S1_CD_VALID;
         ret = soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs));
         if (!ret)
                 gpio_free(GPIO_PCMCIA_RESET);
diff --git a/drivers/pcmcia/pxa2xx_cm_x270.c b/drivers/pcmcia/pxa2xx_cm_x270.c
index 923f315926ef..3dc7621a0767 100644
--- a/drivers/pcmcia/pxa2xx_cm_x270.c
+++ b/drivers/pcmcia/pxa2xx_cm_x270.c
@@ -16,20 +16,18 @@
 #include <linux/gpio.h>
 #include <linux/export.h>
 
-#include <asm/mach-types.h>
-
 #include "soc_common.h"
 
 #define GPIO_PCMCIA_S0_CD_VALID (84)
 #define GPIO_PCMCIA_S0_RDYINT   (82)
 #define GPIO_PCMCIA_RESET       (53)
 
-#define PCMCIA_S0_CD_VALID      IRQ_GPIO(GPIO_PCMCIA_S0_CD_VALID)
-#define PCMCIA_S0_RDYINT        IRQ_GPIO(GPIO_PCMCIA_S0_RDYINT)
+#define PCMCIA_S0_CD_VALID      gpio_to_irq(GPIO_PCMCIA_S0_CD_VALID)
+#define PCMCIA_S0_RDYINT        gpio_to_irq(GPIO_PCMCIA_S0_RDYINT)
 
 
 static struct pcmcia_irqs irqs[] = {
-        { 0, PCMCIA_S0_CD_VALID, "PCMCIA0 CD" },
+        { .sock = 0, .str = "PCMCIA0 CD" },
 };
 
 static int cmx270_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
@@ -40,6 +38,7 @@ static int cmx270_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
         gpio_direction_output(GPIO_PCMCIA_RESET, 0);
 
         skt->socket.pci_irq = PCMCIA_S0_RDYINT;
+        irqs[0].irq = PCMCIA_S0_CD_VALID;
         ret = soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs));
         if (!ret)
                 gpio_free(GPIO_PCMCIA_RESET);
diff --git a/drivers/pcmcia/pxa2xx_e740.c b/drivers/pcmcia/pxa2xx_e740.c
index 8bfbd4dca131..17cd2ce7428f 100644
--- a/drivers/pcmcia/pxa2xx_e740.c
+++ b/drivers/pcmcia/pxa2xx_e740.c
@@ -26,20 +26,23 @@
 static struct pcmcia_irqs cd_irqs[] = {
         {
                 .sock = 0,
-                .irq  = IRQ_GPIO(GPIO_E740_PCMCIA_CD0),
                 .str  = "CF card detect"
         },
         {
                 .sock = 1,
-                .irq  = IRQ_GPIO(GPIO_E740_PCMCIA_CD1),
                 .str  = "Wifi switch"
         },
 };
 
 static int e740_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
 {
-        skt->socket.pci_irq = skt->nr == 0 ? IRQ_GPIO(GPIO_E740_PCMCIA_RDY0) :
-                                IRQ_GPIO(GPIO_E740_PCMCIA_RDY1);
+        if (skt->nr == 0)
+                skt->socket.pci_irq = gpio_to_irq(GPIO_E740_PCMCIA_RDY0);
+        else
+                skt->socket.pci_irq = gpio_to_irq(GPIO_E740_PCMCIA_RDY1);
+
+        cd_irqs[0].irq = gpio_to_irq(GPIO_E740_PCMCIA_CD0);
+        cd_irqs[1].irq = gpio_to_irq(GPIO_E740_PCMCIA_CD1);
 
         return soc_pcmcia_request_irqs(skt, &cd_irqs[skt->nr], 1);
 }
diff --git a/drivers/pcmcia/pxa2xx_palmld.c b/drivers/pcmcia/pxa2xx_palmld.c
index d589ad1dcd4c..6a8e011a8c13 100644
--- a/drivers/pcmcia/pxa2xx_palmld.c
+++ b/drivers/pcmcia/pxa2xx_palmld.c
@@ -33,7 +33,7 @@ static int palmld_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
         ret = gpio_request_array(palmld_pcmcia_gpios,
                                 ARRAY_SIZE(palmld_pcmcia_gpios));
 
-        skt->socket.pci_irq = IRQ_GPIO(GPIO_NR_PALMLD_PCMCIA_READY);
+        skt->socket.pci_irq = gpio_to_irq(GPIO_NR_PALMLD_PCMCIA_READY);
 
         return ret;
 }
diff --git a/drivers/pcmcia/pxa2xx_palmtc.c b/drivers/pcmcia/pxa2xx_palmtc.c
index 9c6a04b2f71b..9e38de769ba3 100644
--- a/drivers/pcmcia/pxa2xx_palmtc.c
+++ b/drivers/pcmcia/pxa2xx_palmtc.c
@@ -37,7 +37,7 @@ static int palmtc_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
         ret = gpio_request_array(palmtc_pcmcia_gpios,
                                 ARRAY_SIZE(palmtc_pcmcia_gpios));
 
-        skt->socket.pci_irq = IRQ_GPIO(GPIO_NR_PALMTC_PCMCIA_READY);
+        skt->socket.pci_irq = gpio_to_irq(GPIO_NR_PALMTC_PCMCIA_READY);
 
         return ret;
 }
diff --git a/drivers/pcmcia/pxa2xx_stargate2.c b/drivers/pcmcia/pxa2xx_stargate2.c
index 939622251dfb..6c2366b74a35 100644
--- a/drivers/pcmcia/pxa2xx_stargate2.c
+++ b/drivers/pcmcia/pxa2xx_stargate2.c
@@ -34,7 +34,7 @@
 #define SG2_S0_GPIO_READY       81
 
 static struct pcmcia_irqs irqs[] = {
-        { 0, IRQ_GPIO(SG2_S0_GPIO_DETECT), "PCMCIA0 CD" },
+        {.sock = 0, .str = "PCMCIA0 CD" },
 };
 
 static struct gpio sg2_pcmcia_gpios[] = {
@@ -44,7 +44,9 @@ static struct gpio sg2_pcmcia_gpios[] = {
 
 static int sg2_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
 {
-        skt->socket.pci_irq = IRQ_GPIO(SG2_S0_GPIO_READY);
+        skt->socket.pci_irq = gpio_to_irq(SG2_S0_GPIO_READY);
+        irqs[0].irq = gpio_to_irq(SG2_S0_GPIO_DETECT);
+
         return soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs));
 }
 
diff --git a/drivers/pcmcia/pxa2xx_trizeps4.c b/drivers/pcmcia/pxa2xx_trizeps4.c
index 57ddb969d888..7c33f898135a 100644
--- a/drivers/pcmcia/pxa2xx_trizeps4.c
+++ b/drivers/pcmcia/pxa2xx_trizeps4.c
@@ -30,7 +30,7 @@
 extern void board_pcmcia_power(int power);
 
 static struct pcmcia_irqs irqs[] = {
-        { 0, IRQ_GPIO(GPIO_PCD), "cs0_cd" }
+        { .sock = 0, .str = "cs0_cd" }
         /* on other baseboards we can have more inputs */
 };
 
@@ -53,7 +53,8 @@ static int trizeps_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
                         gpio_free(GPIO_PRDY);
                         return -EINVAL;
                 }
-                skt->socket.pci_irq = IRQ_GPIO(GPIO_PRDY);
+                skt->socket.pci_irq = gpio_to_irq(GPIO_PRDY);
+                irqs[0].irq = gpio_to_irq(GPIO_PCD);
                 break;
         default:
                 break;
diff --git a/drivers/pcmcia/pxa2xx_vpac270.c b/drivers/pcmcia/pxa2xx_vpac270.c
index 66ab92cf3105..61b17d235dbe 100644
--- a/drivers/pcmcia/pxa2xx_vpac270.c
+++ b/drivers/pcmcia/pxa2xx_vpac270.c
@@ -38,12 +38,10 @@ static struct gpio vpac270_cf_gpios[] = {
 static struct pcmcia_irqs cd_irqs[] = {
         {
                 .sock = 0,
-                .irq  = IRQ_GPIO(GPIO84_VPAC270_PCMCIA_CD),
                 .str  = "PCMCIA CD"
         },
         {
                 .sock = 1,
-                .irq  = IRQ_GPIO(GPIO17_VPAC270_CF_CD),
                 .str  = "CF CD"
         },
 };
@@ -57,6 +55,7 @@ static int vpac270_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
                                 ARRAY_SIZE(vpac270_pcmcia_gpios));
 
                 skt->socket.pci_irq = gpio_to_irq(GPIO35_VPAC270_PCMCIA_RDY);
+                cd_irqs[0].irq = gpio_to_irq(GPIO84_VPAC270_PCMCIA_CD);
 
                 if (!ret)
                         ret = soc_pcmcia_request_irqs(skt, &cd_irqs[0], 1);
@@ -65,6 +64,7 @@ static int vpac270_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
                                 ARRAY_SIZE(vpac270_cf_gpios));
 
                 skt->socket.pci_irq = gpio_to_irq(GPIO12_VPAC270_CF_RDY);
+                cd_irqs[1].irq = gpio_to_irq(GPIO17_VPAC270_CF_CD);
 
                 if (!ret)
                         ret = soc_pcmcia_request_irqs(skt, &cd_irqs[1], 1);
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 53eb4e55b289..877cf6fdcf24 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -774,7 +774,7 @@ config RTC_DRV_EP93XX
 
 config RTC_DRV_SA1100
         tristate "SA11x0/PXA2xx"
-        depends on ARCH_SA1100 || ARCH_PXA
+        depends on ARCH_SA1100 || ARCH_PXA || ARCH_MMP
         help
           If you say Y here you will get access to the real time clock
           built into your SA11x0 or PXA2xx CPU.
diff --git a/drivers/rtc/rtc-sa1100.c b/drivers/rtc/rtc-sa1100.c
index 0b40bb88a884..fc1ffe97fca1 100644
--- a/drivers/rtc/rtc-sa1100.c
+++ b/drivers/rtc/rtc-sa1100.c
@@ -27,35 +27,42 @@
 #include <linux/init.h>
 #include <linux/fs.h>
 #include <linux/interrupt.h>
-#include <linux/string.h>
 #include <linux/pm.h>
-#include <linux/bitops.h>
+#include <linux/slab.h>
+#include <linux/clk.h>
+#include <linux/io.h>
 
 #include <mach/hardware.h>
 #include <asm/irq.h>
 
-#ifdef CONFIG_ARCH_PXA
-#include <mach/regs-rtc.h>
-#include <mach/regs-ost.h>
-#endif
-
 #define RTC_DEF_DIVIDER         (32768 - 1)
 #define RTC_DEF_TRIM            0
-
-static const unsigned long RTC_FREQ = 1024;
-static struct rtc_time rtc_alarm;
-static DEFINE_SPINLOCK(sa1100_rtc_lock);
-
-static inline int rtc_periodic_alarm(struct rtc_time *tm)
-{
-        return  (tm->tm_year == -1) ||
-                ((unsigned)tm->tm_mon >= 12) ||
-                ((unsigned)(tm->tm_mday - 1) >= 31) ||
-                ((unsigned)tm->tm_hour > 23) ||
-                ((unsigned)tm->tm_min > 59) ||
-                ((unsigned)tm->tm_sec > 59);
-}
-
+#define RTC_FREQ                1024
+
+#define RCNR            0x00    /* RTC Count Register */
+#define RTAR            0x04    /* RTC Alarm Register */
+#define RTSR            0x08    /* RTC Status Register */
+#define RTTR            0x0c    /* RTC Timer Trim Register */
+
+#define RTSR_HZE        (1 << 3)        /* HZ interrupt enable */
+#define RTSR_ALE        (1 << 2)        /* RTC alarm interrupt enable */
+#define RTSR_HZ         (1 << 1)        /* HZ rising-edge detected */
+#define RTSR_AL         (1 << 0)        /* RTC alarm detected */
+
+#define rtc_readl(sa1100_rtc, reg)      \
+        readl_relaxed((sa1100_rtc)->base + (reg))
+#define rtc_writel(sa1100_rtc, reg, value)      \
+        writel_relaxed((value), (sa1100_rtc)->base + (reg))
+
+struct sa1100_rtc {
+        struct resource         *ress;
+        void __iomem            *base;
+        struct clk              *clk;
+        int                     irq_1Hz;
+        int                     irq_Alrm;
+        struct rtc_device       *rtc;
+        spinlock_t              lock;           /* Protects this structure */
+};
 /*
  * Calculate the next alarm time given the requested alarm time mask
  * and the current time.
@@ -83,46 +90,26 @@ static void rtc_next_alarm_time(struct rtc_time *next, struct rtc_time *now,
         }
 }
 
-static int rtc_update_alarm(struct rtc_time *alrm)
-{
-        struct rtc_time alarm_tm, now_tm;
-        unsigned long now, time;
-        int ret;
-
-        do {
-                now = RCNR;
-                rtc_time_to_tm(now, &now_tm);
-                rtc_next_alarm_time(&alarm_tm, &now_tm, alrm);
-                ret = rtc_tm_to_time(&alarm_tm, &time);
-                if (ret != 0)
-                        break;
-
-                RTSR = RTSR & (RTSR_HZE|RTSR_ALE|RTSR_AL);
-                RTAR = time;
-        } while (now != RCNR);
-
-        return ret;
-}
-
 static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
 {
         struct platform_device *pdev = to_platform_device(dev_id);
-        struct rtc_device *rtc = platform_get_drvdata(pdev);
+        struct sa1100_rtc *sa1100_rtc = platform_get_drvdata(pdev);
         unsigned int rtsr;
         unsigned long events = 0;
 
-        spin_lock(&sa1100_rtc_lock);
+        spin_lock(&sa1100_rtc->lock);
 
-        rtsr = RTSR;
         /* clear interrupt sources */
-        RTSR = 0;
+        rtsr = rtc_readl(sa1100_rtc, RTSR);
+        rtc_writel(sa1100_rtc, RTSR, 0);
+
         /* Fix for a nasty initialization problem the in SA11xx RTSR register.
          * See also the comments in sa1100_rtc_probe(). */
         if (rtsr & (RTSR_ALE | RTSR_HZE)) {
                 /* This is the original code, before there was the if test
                  * above. This code does not clear interrupts that were not
                  * enabled. */
-                RTSR = (RTSR_AL | RTSR_HZ) & (rtsr >> 2);
+                rtc_writel(sa1100_rtc, RTSR, (RTSR_AL | RTSR_HZ) & (rtsr >> 2));
         } else {
                 /* For some reason, it is possible to enter this routine
                  * without interruptions enabled, it has been tested with
@@ -131,13 +118,13 @@ static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
                  * This situation leads to an infinite "loop" of interrupt
                  * routine calling and as a result the processor seems to
                  * lock on its first call to open(). */
-                RTSR = RTSR_AL | RTSR_HZ;
+                rtc_writel(sa1100_rtc, RTSR, (RTSR_AL | RTSR_HZ));
         }
 
         /* clear alarm interrupt if it has occurred */
         if (rtsr & RTSR_AL)
                 rtsr &= ~RTSR_ALE;
-        RTSR = rtsr & (RTSR_ALE | RTSR_HZE);
+        rtc_writel(sa1100_rtc, RTSR, rtsr & (RTSR_ALE | RTSR_HZE));
 
         /* update irq data & counter */
         if (rtsr & RTSR_AL)
@@ -145,91 +132,100 @@ static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
         if (rtsr & RTSR_HZ)
                 events |= RTC_UF | RTC_IRQF;
 
-        rtc_update_irq(rtc, 1, events);
+        rtc_update_irq(sa1100_rtc->rtc, 1, events);
 
-        if (rtsr & RTSR_AL && rtc_periodic_alarm(&rtc_alarm))
-                rtc_update_alarm(&rtc_alarm);
-
-        spin_unlock(&sa1100_rtc_lock);
+        spin_unlock(&sa1100_rtc->lock);
 
         return IRQ_HANDLED;
 }
 
 static int sa1100_rtc_open(struct device *dev)
 {
+        struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
         int ret;
-        struct platform_device *plat_dev = to_platform_device(dev);
-        struct rtc_device *rtc = platform_get_drvdata(plat_dev);
 
-        ret = request_irq(IRQ_RTC1Hz, sa1100_rtc_interrupt, IRQF_DISABLED,
-                "rtc 1Hz", dev);
+        ret = request_irq(sa1100_rtc->irq_1Hz, sa1100_rtc_interrupt,
+                                IRQF_DISABLED, "rtc 1Hz", dev);
         if (ret) {
-                dev_err(dev, "IRQ %d already in use.\n", IRQ_RTC1Hz);
+                dev_err(dev, "IRQ %d already in use.\n", sa1100_rtc->irq_1Hz);
                 goto fail_ui;
         }
-        ret = request_irq(IRQ_RTCAlrm, sa1100_rtc_interrupt, IRQF_DISABLED,
-                "rtc Alrm", dev);
+        ret = request_irq(sa1100_rtc->irq_Alrm, sa1100_rtc_interrupt,
+                                IRQF_DISABLED, "rtc Alrm", dev);
         if (ret) {
-                dev_err(dev, "IRQ %d already in use.\n", IRQ_RTCAlrm);
+                dev_err(dev, "IRQ %d already in use.\n", sa1100_rtc->irq_Alrm);
                 goto fail_ai;
         }
-        rtc->max_user_freq = RTC_FREQ;
-        rtc_irq_set_freq(rtc, NULL, RTC_FREQ);
+        sa1100_rtc->rtc->max_user_freq = RTC_FREQ;
+        rtc_irq_set_freq(sa1100_rtc->rtc, NULL, RTC_FREQ);
 
         return 0;
 
  fail_ai:
-        free_irq(IRQ_RTC1Hz, dev);
+        free_irq(sa1100_rtc->irq_1Hz, dev);
  fail_ui:
         return ret;
 }
 
 static void sa1100_rtc_release(struct device *dev)
 {
-        spin_lock_irq(&sa1100_rtc_lock);
-        RTSR = 0;
-        OIER &= ~OIER_E1;
-        OSSR = OSSR_M1;
-        spin_unlock_irq(&sa1100_rtc_lock);
-
-        free_irq(IRQ_RTCAlrm, dev);
-        free_irq(IRQ_RTC1Hz, dev);
+        struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
+
+        spin_lock_irq(&sa1100_rtc->lock);
+        rtc_writel(sa1100_rtc, RTSR, 0);
+        spin_unlock_irq(&sa1100_rtc->lock);
+
+        free_irq(sa1100_rtc->irq_Alrm, dev);
+        free_irq(sa1100_rtc->irq_1Hz, dev);
 }
 
 static int sa1100_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
 {
-        spin_lock_irq(&sa1100_rtc_lock);
+        struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
+        unsigned int rtsr;
+
+        spin_lock_irq(&sa1100_rtc->lock);
+
+        rtsr = rtc_readl(sa1100_rtc, RTSR);
         if (enabled)
-                RTSR |= RTSR_ALE;
+                rtsr |= RTSR_ALE;
         else
-                RTSR &= ~RTSR_ALE;
-        spin_unlock_irq(&sa1100_rtc_lock);
+                rtsr &= ~RTSR_ALE;
+        rtc_writel(sa1100_rtc, RTSR, rtsr);
+
+        spin_unlock_irq(&sa1100_rtc->lock);
         return 0;
 }
 
 static int sa1100_rtc_read_time(struct device *dev, struct rtc_time *tm)
 {
-        rtc_time_to_tm(RCNR, tm);
+        struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
+
+        rtc_time_to_tm(rtc_readl(sa1100_rtc, RCNR), tm);
         return 0;
 }
 
 static int sa1100_rtc_set_time(struct device *dev, struct rtc_time *tm)
 {
+        struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
         unsigned long time;
         int ret;
 
         ret = rtc_tm_to_time(tm, &time);
         if (ret == 0)
-                RCNR = time;
+                rtc_writel(sa1100_rtc, RCNR, time);
         return ret;
 }
 
 static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 {
-        u32     rtsr;
+        struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
+        unsigned long time;
+        unsigned int rtsr;
 
-        memcpy(&alrm->time, &rtc_alarm, sizeof(struct rtc_time));
-        rtsr = RTSR;
+        time = rtc_readl(sa1100_rtc, RCNR);
+        rtc_time_to_tm(time, &alrm->time);
+        rtsr = rtc_readl(sa1100_rtc, RTSR);
         alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0;
         alrm->pending = (rtsr & RTSR_AL) ? 1 : 0;
         return 0;
@@ -237,26 +233,39 @@ static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 
 static int sa1100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 {
-        int ret;
+        struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
+        struct rtc_time now_tm, alarm_tm;
+        unsigned long time, alarm;
+        unsigned int rtsr;
 
-        spin_lock_irq(&sa1100_rtc_lock);
-        ret = rtc_update_alarm(&alrm->time);
-        if (ret == 0) {
-                if (alrm->enabled)
-                        RTSR |= RTSR_ALE;
-                else
-                        RTSR &= ~RTSR_ALE;
-        }
-        spin_unlock_irq(&sa1100_rtc_lock);
+        spin_lock_irq(&sa1100_rtc->lock);
 
-        return ret;
+        time = rtc_readl(sa1100_rtc, RCNR);
+        rtc_time_to_tm(time, &now_tm);
+        rtc_next_alarm_time(&alarm_tm, &now_tm, &alrm->time);
+        rtc_tm_to_time(&alarm_tm, &alarm);
+        rtc_writel(sa1100_rtc, RTAR, alarm);
+
+        rtsr = rtc_readl(sa1100_rtc, RTSR);
+        if (alrm->enabled)
+                rtsr |= RTSR_ALE;
+        else
+                rtsr &= ~RTSR_ALE;
+        rtc_writel(sa1100_rtc, RTSR, rtsr);
+
+        spin_unlock_irq(&sa1100_rtc->lock);
+
+        return 0;
 }
 
 static int sa1100_rtc_proc(struct device *dev, struct seq_file *seq)
 {
-        seq_printf(seq, "trim/divider\t\t: 0x%08x\n", (u32) RTTR);
-        seq_printf(seq, "RTSR\t\t\t: 0x%08x\n", (u32)RTSR);
+        struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
 
+        seq_printf(seq, "trim/divider\t\t: 0x%08x\n",
+                        rtc_readl(sa1100_rtc, RTTR));
+        seq_printf(seq, "RTSR\t\t\t: 0x%08x\n",
+                        rtc_readl(sa1100_rtc, RTSR));
         return 0;
 }
 
@@ -273,7 +282,51 @@ static const struct rtc_class_ops sa1100_rtc_ops = {
 
 static int sa1100_rtc_probe(struct platform_device *pdev)
 {
-        struct rtc_device *rtc;
+        struct sa1100_rtc *sa1100_rtc;
+        unsigned int rttr;
+        int ret;
+
+        sa1100_rtc = kzalloc(sizeof(struct sa1100_rtc), GFP_KERNEL);
+        if (!sa1100_rtc)
+                return -ENOMEM;
+
+        spin_lock_init(&sa1100_rtc->lock);
+        platform_set_drvdata(pdev, sa1100_rtc);
+
+        ret = -ENXIO;
+        sa1100_rtc->ress = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (!sa1100_rtc->ress) {
+                dev_err(&pdev->dev, "No I/O memory resource defined\n");
+                goto err_ress;
+        }
+
+        sa1100_rtc->irq_1Hz = platform_get_irq(pdev, 0);
+        if (sa1100_rtc->irq_1Hz < 0) {
+                dev_err(&pdev->dev, "No 1Hz IRQ resource defined\n");
+                goto err_ress;
+        }
+        sa1100_rtc->irq_Alrm = platform_get_irq(pdev, 1);
+        if (sa1100_rtc->irq_Alrm < 0) {
+                dev_err(&pdev->dev, "No alarm IRQ resource defined\n");
+                goto err_ress;
+        }
+
+        ret = -ENOMEM;
+        sa1100_rtc->base = ioremap(sa1100_rtc->ress->start,
+                                resource_size(sa1100_rtc->ress));
+        if (!sa1100_rtc->base) {
+                dev_err(&pdev->dev, "Unable to map pxa RTC I/O memory\n");
+                goto err_map;
+        }
+
+        sa1100_rtc->clk = clk_get(&pdev->dev, NULL);
+        if (IS_ERR(sa1100_rtc->clk)) {
+                dev_err(&pdev->dev, "failed to find rtc clock source\n");
+                ret = PTR_ERR(sa1100_rtc->clk);
+                goto err_clk;
+        }
+        clk_prepare(sa1100_rtc->clk);
+        clk_enable(sa1100_rtc->clk);
 
         /*
          * According to the manual we should be able to let RTTR be zero
@@ -282,24 +335,24 @@ static int sa1100_rtc_probe(struct platform_device *pdev)
          * If the clock divider is uninitialized then reset it to the
          * default value to get the 1Hz clock.
          */
-        if (RTTR == 0) {
-                RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16);
-                dev_warn(&pdev->dev, "warning: "
-                        "initializing default clock divider/trim value\n");
+        if (rtc_readl(sa1100_rtc, RTTR) == 0) {
+                rttr = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16);
+                rtc_writel(sa1100_rtc, RTTR, rttr);
+                dev_warn(&pdev->dev, "warning: initializing default clock"
+                         " divider/trim value\n");
                 /* The current RTC value probably doesn't make sense either */
-                RCNR = 0;
+                rtc_writel(sa1100_rtc, RCNR, 0);
         }
 
         device_init_wakeup(&pdev->dev, 1);
 
-        rtc = rtc_device_register(pdev->name, &pdev->dev, &sa1100_rtc_ops,
-                THIS_MODULE);
-
-        if (IS_ERR(rtc))
-                return PTR_ERR(rtc);
-
-        platform_set_drvdata(pdev, rtc);
-
+        sa1100_rtc->rtc = rtc_device_register(pdev->name, &pdev->dev,
+                                                &sa1100_rtc_ops, THIS_MODULE);
+        if (IS_ERR(sa1100_rtc->rtc)) {
+                dev_err(&pdev->dev, "Failed to register RTC device -> %d\n",
+                        ret);
+                goto err_rtc_reg;
+        }
         /* Fix for a nasty initialization problem the in SA11xx RTSR register.
          * See also the comments in sa1100_rtc_interrupt().
          *
@@ -322,33 +375,46 @@ static int sa1100_rtc_probe(struct platform_device *pdev)
          *
          * Notice that clearing bit 1 and 0 is accomplished by writting ONES to
          * the corresponding bits in RTSR. */
-        RTSR = RTSR_AL | RTSR_HZ;
+        rtc_writel(sa1100_rtc, RTSR, (RTSR_AL | RTSR_HZ));
 
         return 0;
+
+err_rtc_reg:
+err_clk:
+        iounmap(sa1100_rtc->base);
+err_ress:
+err_map:
+        kfree(sa1100_rtc);
+        return ret;
 }
 
 static int sa1100_rtc_remove(struct platform_device *pdev)
 {
-        struct rtc_device *rtc = platform_get_drvdata(pdev);
-
-        if (rtc)
-                rtc_device_unregister(rtc);
+        struct sa1100_rtc *sa1100_rtc = platform_get_drvdata(pdev);
 
+        rtc_device_unregister(sa1100_rtc->rtc);
+        clk_disable(sa1100_rtc->clk);
+        clk_unprepare(sa1100_rtc->clk);
+        iounmap(sa1100_rtc->base);
         return 0;
 }
 
 #ifdef CONFIG_PM
 static int sa1100_rtc_suspend(struct device *dev)
 {
+        struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
+
         if (device_may_wakeup(dev))
-                enable_irq_wake(IRQ_RTCAlrm);
+                enable_irq_wake(sa1100_rtc->irq_Alrm);
         return 0;
 }
 
 static int sa1100_rtc_resume(struct device *dev)
 {
+        struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
+
         if (device_may_wakeup(dev))
-                disable_irq_wake(IRQ_RTCAlrm);
+                disable_irq_wake(sa1100_rtc->irq_Alrm);
         return 0;
 }
 
diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
index 791f11bed606..75823a1abeb6 100644
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -48,6 +48,7 @@ config USB_ARCH_HAS_OHCI
         default y if ARCH_DAVINCI_DA8XX
         default y if ARCH_CNS3XXX
         default y if PLAT_SPEAR
+        default y if ARCH_EXYNOS
         # PPC:
         default y if STB03xxx
         default y if PPC_MPC52xx
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index a52769b5c904..4c0c9734251d 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -380,6 +380,12 @@ config USB_OHCI_SH
           Enables support for the on-chip OHCI controller on the SuperH.
           If you use the PCI OHCI controller, this option is not necessary.
 
+config USB_OHCI_EXYNOS
+        boolean "OHCI support for Samsung EXYNOS SoC Series"
+        depends on USB_OHCI_HCD && ARCH_EXYNOS
+        help
+         Enable support for the Samsung Exynos SOC's on-chip OHCI controller.
+
 config USB_CNS3XXX_OHCI
         bool "Cavium CNS3XXX OHCI Module"
         depends on USB_OHCI_HCD && ARCH_CNS3XXX
diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
index e33baf9052cb..bba9850f32f0 100644
--- a/drivers/usb/host/ehci-omap.c
+++ b/drivers/usb/host/ehci-omap.c
@@ -41,6 +41,7 @@
 #include <linux/usb/ulpi.h>
 #include <plat/usb.h>
 #include <linux/regulator/consumer.h>
+#include <linux/pm_runtime.h>
 
 /* EHCI Register Set */
 #define EHCI_INSNREG04                                  (0xA0)
@@ -190,11 +191,8 @@ static int ehci_hcd_omap_probe(struct platform_device *pdev)
                 }
         }
 
-        ret = omap_usbhs_enable(dev);
-        if (ret) {
-                dev_err(dev, "failed to start usbhs with err %d\n", ret);
-                goto err_enable;
-        }
+        pm_runtime_enable(dev);
+        pm_runtime_get_sync(dev);
 
         /*
          * An undocumented "feature" in the OMAP3 EHCI controller,
@@ -242,11 +240,8 @@ static int ehci_hcd_omap_probe(struct platform_device *pdev)
         return 0;
 
 err_add_hcd:
-        omap_usbhs_disable(dev);
-
-err_enable:
         disable_put_regulator(pdata);
-        usb_put_hcd(hcd);
+        pm_runtime_put_sync(dev);
 
 err_io:
         iounmap(regs);
@@ -268,10 +263,12 @@ static int ehci_hcd_omap_remove(struct platform_device *pdev)
         struct usb_hcd *hcd     = dev_get_drvdata(dev);
 
         usb_remove_hcd(hcd);
-        omap_usbhs_disable(dev);
         disable_put_regulator(dev->platform_data);
         iounmap(hcd->regs);
         usb_put_hcd(hcd);
+        pm_runtime_put_sync(dev);
+        pm_runtime_disable(dev);
+
         return 0;
 }
 
diff --git a/drivers/usb/host/ohci-exynos.c b/drivers/usb/host/ohci-exynos.c
new file mode 100644
index 000000000000..55aa35aa3d7b
--- /dev/null
+++ b/drivers/usb/host/ohci-exynos.c
@@ -0,0 +1,274 @@
+/*
+ * SAMSUNG EXYNOS USB HOST OHCI Controller
+ *
+ * Copyright (C) 2011 Samsung Electronics Co.Ltd
+ * Author: Jingoo Han <jg1.han@samsung.com>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ */
+
+#include <linux/clk.h>
+#include <linux/platform_device.h>
+#include <mach/ohci.h>
+#include <plat/usb-phy.h>
+
+struct exynos_ohci_hcd {
+        struct device *dev;
+        struct usb_hcd *hcd;
+        struct clk *clk;
+};
+
+static int ohci_exynos_start(struct usb_hcd *hcd)
+{
+        struct ohci_hcd *ohci = hcd_to_ohci(hcd);
+        int ret;
+
+        ohci_dbg(ohci, "ohci_exynos_start, ohci:%p", ohci);
+
+        ret = ohci_init(ohci);
+        if (ret < 0)
+                return ret;
+
+        ret = ohci_run(ohci);
+        if (ret < 0) {
+                err("can't start %s", hcd->self.bus_name);
+                ohci_stop(hcd);
+                return ret;
+        }
+
+        return 0;
+}
+
+static const struct hc_driver exynos_ohci_hc_driver = {
+        .description            = hcd_name,
+        .product_desc           = "EXYNOS OHCI Host Controller",
+        .hcd_priv_size          = sizeof(struct ohci_hcd),
+
+        .irq                    = ohci_irq,
+        .flags                  = HCD_MEMORY|HCD_USB11,
+
+        .start                  = ohci_exynos_start,
+        .stop                   = ohci_stop,
+        .shutdown               = ohci_shutdown,
+
+        .get_frame_number       = ohci_get_frame,
+
+        .urb_enqueue            = ohci_urb_enqueue,
+        .urb_dequeue            = ohci_urb_dequeue,
+        .endpoint_disable       = ohci_endpoint_disable,
+
+        .hub_status_data        = ohci_hub_status_data,
+        .hub_control            = ohci_hub_control,
+#ifdef  CONFIG_PM
+        .bus_suspend            = ohci_bus_suspend,
+        .bus_resume             = ohci_bus_resume,
+#endif
+        .start_port_reset       = ohci_start_port_reset,
+};
+
+static int __devinit exynos_ohci_probe(struct platform_device *pdev)
+{
+        struct exynos4_ohci_platdata *pdata;
+        struct exynos_ohci_hcd *exynos_ohci;
+        struct usb_hcd *hcd;
+        struct ohci_hcd *ohci;
+        struct resource *res;
+        int irq;
+        int err;
+
+        pdata = pdev->dev.platform_data;
+        if (!pdata) {
+                dev_err(&pdev->dev, "No platform data defined\n");
+                return -EINVAL;
+        }
+
+        exynos_ohci = kzalloc(sizeof(struct exynos_ohci_hcd), GFP_KERNEL);
+        if (!exynos_ohci)
+                return -ENOMEM;
+
+        exynos_ohci->dev = &pdev->dev;
+
+        hcd = usb_create_hcd(&exynos_ohci_hc_driver, &pdev->dev,
+                                        dev_name(&pdev->dev));
+        if (!hcd) {
+                dev_err(&pdev->dev, "Unable to create HCD\n");
+                err = -ENOMEM;
+                goto fail_hcd;
+        }
+
+        exynos_ohci->hcd = hcd;
+        exynos_ohci->clk = clk_get(&pdev->dev, "usbhost");
+
+        if (IS_ERR(exynos_ohci->clk)) {
+                dev_err(&pdev->dev, "Failed to get usbhost clock\n");
+                err = PTR_ERR(exynos_ohci->clk);
+                goto fail_clk;
+        }
+
+        err = clk_enable(exynos_ohci->clk);
+        if (err)
+                goto fail_clken;
+
+        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (!res) {
+                dev_err(&pdev->dev, "Failed to get I/O memory\n");
+                err = -ENXIO;
+                goto fail_io;
+        }
+
+        hcd->rsrc_start = res->start;
+        hcd->rsrc_len = resource_size(res);
+        hcd->regs = ioremap(res->start, resource_size(res));
+        if (!hcd->regs) {
+                dev_err(&pdev->dev, "Failed to remap I/O memory\n");
+                err = -ENOMEM;
+                goto fail_io;
+        }
+
+        irq = platform_get_irq(pdev, 0);
+        if (!irq) {
+                dev_err(&pdev->dev, "Failed to get IRQ\n");
+                err = -ENODEV;
+                goto fail;
+        }
+
+        if (pdata->phy_init)
+                pdata->phy_init(pdev, S5P_USB_PHY_HOST);
+
+        ohci = hcd_to_ohci(hcd);
+        ohci_hcd_init(ohci);
+
+        err = usb_add_hcd(hcd, irq, IRQF_SHARED);
+        if (err) {
+                dev_err(&pdev->dev, "Failed to add USB HCD\n");
+                goto fail;
+        }
+
+        platform_set_drvdata(pdev, exynos_ohci);
+
+        return 0;
+
+fail:
+        iounmap(hcd->regs);
+fail_io:
+        clk_disable(exynos_ohci->clk);
+fail_clken:
+        clk_put(exynos_ohci->clk);
+fail_clk:
+        usb_put_hcd(hcd);
+fail_hcd:
+        kfree(exynos_ohci);
+        return err;
+}
+
+static int __devexit exynos_ohci_remove(struct platform_device *pdev)
+{
+        struct exynos4_ohci_platdata *pdata = pdev->dev.platform_data;
+        struct exynos_ohci_hcd *exynos_ohci = platform_get_drvdata(pdev);
+        struct usb_hcd *hcd = exynos_ohci->hcd;
+
+        usb_remove_hcd(hcd);
+
+        if (pdata && pdata->phy_exit)
+                pdata->phy_exit(pdev, S5P_USB_PHY_HOST);
+
+        iounmap(hcd->regs);
+
+        clk_disable(exynos_ohci->clk);
+        clk_put(exynos_ohci->clk);
+
+        usb_put_hcd(hcd);
+        kfree(exynos_ohci);
+
+        return 0;
+}
+
+static void exynos_ohci_shutdown(struct platform_device *pdev)
+{
+        struct exynos_ohci_hcd *exynos_ohci = platform_get_drvdata(pdev);
+        struct usb_hcd *hcd = exynos_ohci->hcd;
+
+        if (hcd->driver->shutdown)
+                hcd->driver->shutdown(hcd);
+}
+
+#ifdef CONFIG_PM
+static int exynos_ohci_suspend(struct device *dev)
+{
+        struct exynos_ohci_hcd *exynos_ohci = dev_get_drvdata(dev);
+        struct usb_hcd *hcd = exynos_ohci->hcd;
+        struct ohci_hcd *ohci = hcd_to_ohci(hcd);
+        struct platform_device *pdev = to_platform_device(dev);
+        struct exynos4_ohci_platdata *pdata = pdev->dev.platform_data;
+        unsigned long flags;
+        int rc = 0;
+
+        /*
+         * Root hub was already suspended. Disable irq emission and
+         * mark HW unaccessible, bail out if RH has been resumed. Use
+         * the spinlock to properly synchronize with possible pending
+         * RH suspend or resume activity.
+         *
+         * This is still racy as hcd->state is manipulated outside of
+         * any locks =P But that will be a different fix.
+         */
+        spin_lock_irqsave(&ohci->lock, flags);
+        if (hcd->state != HC_STATE_SUSPENDED && hcd->state != HC_STATE_HALT) {
+                rc = -EINVAL;
+                goto fail;
+        }
+
+        clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
+
+        if (pdata && pdata->phy_exit)
+                pdata->phy_exit(pdev, S5P_USB_PHY_HOST);
+fail:
+        spin_unlock_irqrestore(&ohci->lock, flags);
+
+        return rc;
+}
+
+static int exynos_ohci_resume(struct device *dev)
+{
+        struct exynos_ohci_hcd *exynos_ohci = dev_get_drvdata(dev);
+        struct usb_hcd *hcd = exynos_ohci->hcd;
+        struct platform_device *pdev = to_platform_device(dev);
+        struct exynos4_ohci_platdata *pdata = pdev->dev.platform_data;
+
+        if (pdata && pdata->phy_init)
+                pdata->phy_init(pdev, S5P_USB_PHY_HOST);
+
+        /* Mark hardware accessible again as we are out of D3 state by now */
+        set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
+
+        ohci_finish_controller_resume(hcd);
+
+        return 0;
+}
+#else
+#define exynos_ohci_suspend     NULL
+#define exynos_ohci_resume      NULL
+#endif
+
+static const struct dev_pm_ops exynos_ohci_pm_ops = {
+        .suspend        = exynos_ohci_suspend,
+        .resume         = exynos_ohci_resume,
+};
+
+static struct platform_driver exynos_ohci_driver = {
+        .probe          = exynos_ohci_probe,
+        .remove         = __devexit_p(exynos_ohci_remove),
+        .shutdown       = exynos_ohci_shutdown,
+        .driver = {
+                .name   = "exynos-ohci",
+                .owner  = THIS_MODULE,
+                .pm     = &exynos_ohci_pm_ops,
+        }
+};
+
+MODULE_ALIAS("platform:exynos-ohci");
+MODULE_AUTHOR("Jingoo Han <jg1.han@samsung.com>");
diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c
index 4fa5d8c4d239..5f5a63241436 100644
--- a/drivers/usb/host/ohci-hcd.c
+++ b/drivers/usb/host/ohci-hcd.c
@@ -1005,6 +1005,11 @@ MODULE_LICENSE ("GPL");
 #define PLATFORM_DRIVER         ohci_hcd_s3c2410_driver
 #endif
 
+#ifdef CONFIG_USB_OHCI_EXYNOS
+#include "ohci-exynos.c"
+#define PLATFORM_DRIVER         exynos_ohci_driver
+#endif
+
 #ifdef CONFIG_USB_OHCI_HCD_OMAP1
 #include "ohci-omap.c"
 #define OMAP1_PLATFORM_DRIVER   ohci_hcd_omap_driver
diff --git a/drivers/usb/host/ohci-omap3.c b/drivers/usb/host/ohci-omap3.c
index 516ebc4d6cc2..1b8133b6e451 100644
--- a/drivers/usb/host/ohci-omap3.c
+++ b/drivers/usb/host/ohci-omap3.c
@@ -31,6 +31,7 @@
 
 #include <linux/platform_device.h>
 #include <plat/usb.h>
+#include <linux/pm_runtime.h>
 
 /*-------------------------------------------------------------------------*/
 
@@ -134,7 +135,7 @@ static int __devinit ohci_hcd_omap3_probe(struct platform_device *pdev)
         int                     irq;
 
         if (usb_disabled())
-                goto err_end;
+                return -ENODEV;
 
         if (!dev->parent) {
                 dev_err(dev, "Missing parent device\n");
@@ -172,11 +173,8 @@ static int __devinit ohci_hcd_omap3_probe(struct platform_device *pdev)
         hcd->rsrc_len = resource_size(res);
         hcd->regs =  regs;
 
-        ret = omap_usbhs_enable(dev);
-        if (ret) {
-                dev_dbg(dev, "failed to start ohci\n");
-                goto err_end;
-        }
+        pm_runtime_enable(dev);
+        pm_runtime_get_sync(dev);
 
         ohci_hcd_init(hcd_to_ohci(hcd));
 
@@ -189,9 +187,7 @@ static int __devinit ohci_hcd_omap3_probe(struct platform_device *pdev)
         return 0;
 
 err_add_hcd:
-        omap_usbhs_disable(dev);
-
-err_end:
+        pm_runtime_put_sync(dev);
         usb_put_hcd(hcd);
 
 err_io:
@@ -220,9 +216,9 @@ static int __devexit ohci_hcd_omap3_remove(struct platform_device *pdev)
 
         iounmap(hcd->regs);
         usb_remove_hcd(hcd);
-        omap_usbhs_disable(dev);
+        pm_runtime_put_sync(dev);
+        pm_runtime_disable(dev);
         usb_put_hcd(hcd);
-
         return 0;
 }
 
diff --git a/include/linux/gpio-pxa.h b/include/linux/gpio-pxa.h
new file mode 100644
index 000000000000..05071ee34c3f
--- /dev/null
+++ b/include/linux/gpio-pxa.h
@@ -0,0 +1,16 @@
+#ifndef __GPIO_PXA_H
+#define __GPIO_PXA_H
+
+#define GPIO_bit(x)     (1 << ((x) & 0x1f))
+
+#define gpio_to_bank(gpio)      ((gpio) >> 5)
+
+/* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85).
+ * Those cases currently cause holes in the GPIO number space, the
+ * actual number of the last GPIO is recorded by 'pxa_last_gpio'.
+ */
+extern int pxa_last_gpio;
+
+extern int pxa_irq_to_gpio(int irq);
+
+#endif /* __GPIO_PXA_H */
diff --git a/include/sound/saif.h b/include/sound/saif.h
index d0e0de7984ec..f22f3e16edf4 100644
--- a/include/sound/saif.h
+++ b/include/sound/saif.h
@@ -10,7 +10,7 @@
 #define __SOUND_SAIF_H__
 
 struct mxs_saif_platform_data {
-        int (*init) (void);
-        int (*get_master_id) (unsigned int saif_id);
+        bool master_mode;       /* if true use master mode */
+        int master_id;          /* id of the master if in slave mode */
 };
 #endif
diff --git a/sound/soc/mxs/mxs-saif.c b/sound/soc/mxs/mxs-saif.c
index 76dc74d24fc2..1ef697fe1731 100644
--- a/sound/soc/mxs/mxs-saif.c
+++ b/sound/soc/mxs/mxs-saif.c
@@ -625,13 +625,6 @@ static int mxs_saif_probe(struct platform_device *pdev)
         if (pdev->id >= ARRAY_SIZE(mxs_saif))
                 return -EINVAL;
 
-        pdata = pdev->dev.platform_data;
-        if (pdata && pdata->init) {
-                ret = pdata->init();
-                if (ret)
-                        return ret;
-        }
-
         saif = kzalloc(sizeof(*saif), GFP_KERNEL);
         if (!saif)
                 return -ENOMEM;
@@ -639,12 +632,17 @@ static int mxs_saif_probe(struct platform_device *pdev)
         mxs_saif[pdev->id] = saif;
         saif->id = pdev->id;
 
-        saif->master_id = saif->id;
-        if (pdata && pdata->get_master_id) {
-                saif->master_id = pdata->get_master_id(saif->id);
+        pdata = pdev->dev.platform_data;
+        if (pdata && !pdata->master_mode) {
+                saif->master_id = pdata->master_id;
                 if (saif->master_id < 0 ||
-                        saif->master_id >= ARRAY_SIZE(mxs_saif))
+                        saif->master_id >= ARRAY_SIZE(mxs_saif) ||
+                        saif->master_id == saif->id) {
+                        dev_err(&pdev->dev, "get wrong master id\n");
                         return -EINVAL;
+                }
+        } else {
+                saif->master_id = saif->id;
         }
 
         saif->clk = clk_get(&pdev->dev, NULL);