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authorArnd Bergmann <arnd@arndb.de>2012-07-03 15:54:55 -0400
committerArnd Bergmann <arnd@arndb.de>2012-07-03 15:54:55 -0400
commit1fe406186482305bfb77967c59a64367d3fd8088 (patch)
treea6fce030006bd2e761d2f3fe94fd8ba5c33663e5
parentdf7cb455850351aa2793ffb41f6a2dcaefd83d9b (diff)
parent472fd5401561f94698f4c8f9dbbbfbf76ab55626 (diff)
Merge tag 'omap-cleanup-for-v3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup
From Tony Lindgren <tony@atomide.com> Here is some more omap clean-up. The biggest changes are hwmod, clock, and System Control Module cleanup, and the removal of the last instance of omap_read/write usage for omap2+ with the removal of unused USB OHCI Full Speed driver support. The removed OHCI is only currently used for omap1 as the actively used omap2+ boards have either MUSB or another instance of OHCI+EHCI that's more usable. * tag 'omap-cleanup-for-v3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: hwmod: remove prm_clkdm, cm_clkdm; allow hwmods to have no clockdomain ARM: OMAP3: Move McBSP fck clock alias to hwmod data ARM: OMAP2: Move McBSP fck clock alias to hwmod data for OMAP2430 ARM: OMAP2: Move McBSP fck clock alias to hwmod data for OMAP2420 ARM: OMAP: dsp: interface to control module functions ARM: OMAP2+: control: new APIs to configure boot address and mode ARM: OMAP2+: CLEANUP: Remove ARCH_OMAPx ifdef from struct dpll_data ARM: OMAP2+: hwmod: use init-time function pointer for _init_clkdm ARM: OMAP2+: hwmod: use init-time function pointer for hardreset ARM: OMAP2+: hwmod: use init-time function pointer for wait_target_ready ARM: OMAP4: hwmod: drop extra cpu_is check from _wait_target_disable() ARM: OMAP2+: hwmod: use init-time function ptrs for enable/disable module ARM: OMAP4: hwmod: rename _enable_module to _omap4_enable_module() ARM: OMAP: Make FS USB omap1 only ARM: OMAP2: Remove legacy USB FS support ARM: OMAP3: There is no FS USB controller on omap3 ARM: OMAP: dma: Clear status registers on enable/disable irq Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-rw-r--r--arch/arm/mach-omap1/board-ams-delta.c2
-rw-r--r--arch/arm/mach-omap1/board-generic.c4
-rw-r--r--arch/arm/mach-omap1/board-h2.c2
-rw-r--r--arch/arm/mach-omap1/board-h3.c2
-rw-r--r--arch/arm/mach-omap1/board-htcherald.c2
-rw-r--r--arch/arm/mach-omap1/board-innovator.c2
-rw-r--r--arch/arm/mach-omap1/board-nokia770.c2
-rw-r--r--arch/arm/mach-omap1/board-osk.c2
-rw-r--r--arch/arm/mach-omap1/board-palmte.c2
-rw-r--r--arch/arm/mach-omap1/board-palmtt.c2
-rw-r--r--arch/arm/mach-omap1/board-palmz71.c2
-rw-r--r--arch/arm/mach-omap1/board-sx1.c2
-rw-r--r--arch/arm/mach-omap1/board-voiceblue.c3
-rw-r--r--arch/arm/mach-omap1/clock_data.c3
-rw-r--r--arch/arm/mach-omap1/include/mach/usb.h165
-rw-r--r--arch/arm/mach-omap1/usb.c116
-rw-r--r--arch/arm/mach-omap2/Kconfig3
-rw-r--r--arch/arm/mach-omap2/Makefile4
-rw-r--r--arch/arm/mach-omap2/board-2430sdp.c11
-rw-r--r--arch/arm/mach-omap2/board-apollon.c18
-rw-r--r--arch/arm/mach-omap2/board-h4.c13
-rw-r--r--arch/arm/mach-omap2/clock2420_data.c4
-rw-r--r--arch/arm/mach-omap2/clock2430_data.c10
-rw-r--r--arch/arm/mach-omap2/clock3xxx_data.c10
-rw-r--r--arch/arm/mach-omap2/clockdomain.h2
-rw-r--r--arch/arm/mach-omap2/clockdomains2420_data.c2
-rw-r--r--arch/arm/mach-omap2/clockdomains2430_data.c2
-rw-r--r--arch/arm/mach-omap2/clockdomains3xxx_data.c2
-rw-r--r--arch/arm/mach-omap2/clockdomains44xx_data.c2
-rw-r--r--arch/arm/mach-omap2/clockdomains_common_data.c24
-rw-r--r--arch/arm/mach-omap2/control.c43
-rw-r--r--arch/arm/mach-omap2/control.h2
-rw-r--r--arch/arm/mach-omap2/dsp.c4
-rw-r--r--arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h1
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c427
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2420_data.c10
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2430_data.c16
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c23
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c4
-rw-r--r--arch/arm/mach-omap2/usb-fs.c359
-rw-r--r--arch/arm/plat-omap/Makefile2
-rw-r--r--arch/arm/plat-omap/dma.c59
-rw-r--r--arch/arm/plat-omap/include/plat/board.h38
-rw-r--r--arch/arm/plat-omap/include/plat/clock.h2
-rw-r--r--arch/arm/plat-omap/include/plat/dsp.h3
-rw-r--r--arch/arm/plat-omap/include/plat/omap_hwmod.h2
-rw-r--r--arch/arm/plat-omap/include/plat/usb.h196
-rw-r--r--arch/arm/plat-omap/usb.c145
-rw-r--r--drivers/usb/gadget/Kconfig2
-rw-r--r--drivers/usb/gadget/omap_udc.c3
-rw-r--r--drivers/usb/host/Kconfig2
-rw-r--r--drivers/usb/host/ohci-omap.c7
-rw-r--r--drivers/usb/otg/isp1301_omap.c2
53 files changed, 747 insertions, 1025 deletions
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index f2f8a5847018..c53469802c03 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -37,12 +37,12 @@
37#include <plat/board-ams-delta.h> 37#include <plat/board-ams-delta.h>
38#include <plat/keypad.h> 38#include <plat/keypad.h>
39#include <plat/mux.h> 39#include <plat/mux.h>
40#include <plat/usb.h>
41#include <plat/board.h> 40#include <plat/board.h>
42 41
43#include <mach/hardware.h> 42#include <mach/hardware.h>
44#include <mach/ams-delta-fiq.h> 43#include <mach/ams-delta-fiq.h>
45#include <mach/camera.h> 44#include <mach/camera.h>
45#include <mach/usb.h>
46 46
47#include "iomap.h" 47#include "iomap.h"
48#include "common.h" 48#include "common.h"
diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c
index e75e2d55a2d7..6ec385e2b98e 100644
--- a/arch/arm/mach-omap1/board-generic.c
+++ b/arch/arm/mach-omap1/board-generic.c
@@ -23,8 +23,10 @@
23#include <asm/mach/map.h> 23#include <asm/mach/map.h>
24 24
25#include <plat/mux.h> 25#include <plat/mux.h>
26#include <plat/usb.h>
27#include <plat/board.h> 26#include <plat/board.h>
27
28#include <mach/usb.h>
29
28#include "common.h" 30#include "common.h"
29 31
30/* assume no Mini-AB port */ 32/* assume no Mini-AB port */
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
index a28e989a63f4..44a4ab195fbc 100644
--- a/arch/arm/mach-omap1/board-h2.c
+++ b/arch/arm/mach-omap1/board-h2.c
@@ -40,11 +40,11 @@
40#include <plat/dma.h> 40#include <plat/dma.h>
41#include <plat/tc.h> 41#include <plat/tc.h>
42#include <plat/irda.h> 42#include <plat/irda.h>
43#include <plat/usb.h>
44#include <plat/keypad.h> 43#include <plat/keypad.h>
45#include <plat/flash.h> 44#include <plat/flash.h>
46 45
47#include <mach/hardware.h> 46#include <mach/hardware.h>
47#include <mach/usb.h>
48 48
49#include "common.h" 49#include "common.h"
50#include "board-h2.h" 50#include "board-h2.h"
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c
index 108a8640fc6f..86cb5a04a404 100644
--- a/arch/arm/mach-omap1/board-h3.c
+++ b/arch/arm/mach-omap1/board-h3.c
@@ -40,13 +40,13 @@
40 40
41#include <plat/mux.h> 41#include <plat/mux.h>
42#include <plat/tc.h> 42#include <plat/tc.h>
43#include <plat/usb.h>
44#include <plat/keypad.h> 43#include <plat/keypad.h>
45#include <plat/dma.h> 44#include <plat/dma.h>
46#include <plat/flash.h> 45#include <plat/flash.h>
47 46
48#include <mach/hardware.h> 47#include <mach/hardware.h>
49#include <mach/irqs.h> 48#include <mach/irqs.h>
49#include <mach/usb.h>
50 50
51#include "common.h" 51#include "common.h"
52#include "board-h3.h" 52#include "board-h3.h"
diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c
index 118a9d4a4c54..b3f6e943e661 100644
--- a/arch/arm/mach-omap1/board-htcherald.c
+++ b/arch/arm/mach-omap1/board-htcherald.c
@@ -44,10 +44,10 @@
44#include <plat/omap7xx.h> 44#include <plat/omap7xx.h>
45#include <plat/board.h> 45#include <plat/board.h>
46#include <plat/keypad.h> 46#include <plat/keypad.h>
47#include <plat/usb.h>
48#include <plat/mmc.h> 47#include <plat/mmc.h>
49 48
50#include <mach/irqs.h> 49#include <mach/irqs.h>
50#include <mach/usb.h>
51 51
52#include "common.h" 52#include "common.h"
53 53
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index 7970223a559d..f21c2966daad 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -35,11 +35,11 @@
35#include <plat/flash.h> 35#include <plat/flash.h>
36#include <plat/fpga.h> 36#include <plat/fpga.h>
37#include <plat/tc.h> 37#include <plat/tc.h>
38#include <plat/usb.h>
39#include <plat/keypad.h> 38#include <plat/keypad.h>
40#include <plat/mmc.h> 39#include <plat/mmc.h>
41 40
42#include <mach/hardware.h> 41#include <mach/hardware.h>
42#include <mach/usb.h>
43 43
44#include "iomap.h" 44#include "iomap.h"
45#include "common.h" 45#include "common.h"
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c
index 7212ae97f44a..4007a372481b 100644
--- a/arch/arm/mach-omap1/board-nokia770.c
+++ b/arch/arm/mach-omap1/board-nokia770.c
@@ -26,7 +26,6 @@
26#include <asm/mach/map.h> 26#include <asm/mach/map.h>
27 27
28#include <plat/mux.h> 28#include <plat/mux.h>
29#include <plat/usb.h>
30#include <plat/board.h> 29#include <plat/board.h>
31#include <plat/keypad.h> 30#include <plat/keypad.h>
32#include <plat/lcd_mipid.h> 31#include <plat/lcd_mipid.h>
@@ -34,6 +33,7 @@
34#include <plat/clock.h> 33#include <plat/clock.h>
35 34
36#include <mach/hardware.h> 35#include <mach/hardware.h>
36#include <mach/usb.h>
37 37
38#include "common.h" 38#include "common.h"
39 39
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index da8d872d3d1c..8784705edb60 100644
--- a/arch/arm/mach-omap1/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -45,11 +45,11 @@
45#include <asm/mach/map.h> 45#include <asm/mach/map.h>
46 46
47#include <plat/flash.h> 47#include <plat/flash.h>
48#include <plat/usb.h>
49#include <plat/mux.h> 48#include <plat/mux.h>
50#include <plat/tc.h> 49#include <plat/tc.h>
51 50
52#include <mach/hardware.h> 51#include <mach/hardware.h>
52#include <mach/usb.h>
53 53
54#include "common.h" 54#include "common.h"
55 55
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c
index 949b62a73693..26bcb9defcdc 100644
--- a/arch/arm/mach-omap1/board-palmte.c
+++ b/arch/arm/mach-omap1/board-palmte.c
@@ -35,7 +35,6 @@
35 35
36#include <plat/flash.h> 36#include <plat/flash.h>
37#include <plat/mux.h> 37#include <plat/mux.h>
38#include <plat/usb.h>
39#include <plat/tc.h> 38#include <plat/tc.h>
40#include <plat/dma.h> 39#include <plat/dma.h>
41#include <plat/board.h> 40#include <plat/board.h>
@@ -43,6 +42,7 @@
43#include <plat/keypad.h> 42#include <plat/keypad.h>
44 43
45#include <mach/hardware.h> 44#include <mach/hardware.h>
45#include <mach/usb.h>
46 46
47#include "common.h" 47#include "common.h"
48 48
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c
index 7f1e1cf2bf46..4d099446dfa8 100644
--- a/arch/arm/mach-omap1/board-palmtt.c
+++ b/arch/arm/mach-omap1/board-palmtt.c
@@ -35,7 +35,6 @@
35#include <plat/led.h> 35#include <plat/led.h>
36#include <plat/flash.h> 36#include <plat/flash.h>
37#include <plat/mux.h> 37#include <plat/mux.h>
38#include <plat/usb.h>
39#include <plat/dma.h> 38#include <plat/dma.h>
40#include <plat/tc.h> 39#include <plat/tc.h>
41#include <plat/board.h> 40#include <plat/board.h>
@@ -43,6 +42,7 @@
43#include <plat/keypad.h> 42#include <plat/keypad.h>
44 43
45#include <mach/hardware.h> 44#include <mach/hardware.h>
45#include <mach/usb.h>
46 46
47#include "common.h" 47#include "common.h"
48 48
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c
index 3c71c6bace2c..cc71a26723ef 100644
--- a/arch/arm/mach-omap1/board-palmz71.c
+++ b/arch/arm/mach-omap1/board-palmz71.c
@@ -37,7 +37,6 @@
37 37
38#include <plat/flash.h> 38#include <plat/flash.h>
39#include <plat/mux.h> 39#include <plat/mux.h>
40#include <plat/usb.h>
41#include <plat/dma.h> 40#include <plat/dma.h>
42#include <plat/tc.h> 41#include <plat/tc.h>
43#include <plat/board.h> 42#include <plat/board.h>
@@ -45,6 +44,7 @@
45#include <plat/keypad.h> 44#include <plat/keypad.h>
46 45
47#include <mach/hardware.h> 46#include <mach/hardware.h>
47#include <mach/usb.h>
48 48
49#include "common.h" 49#include "common.h"
50 50
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c
index 3b7b82b13684..8c665bd16ac2 100644
--- a/arch/arm/mach-omap1/board-sx1.c
+++ b/arch/arm/mach-omap1/board-sx1.c
@@ -37,13 +37,13 @@
37#include <plat/mux.h> 37#include <plat/mux.h>
38#include <plat/dma.h> 38#include <plat/dma.h>
39#include <plat/irda.h> 39#include <plat/irda.h>
40#include <plat/usb.h>
41#include <plat/tc.h> 40#include <plat/tc.h>
42#include <plat/board.h> 41#include <plat/board.h>
43#include <plat/keypad.h> 42#include <plat/keypad.h>
44#include <plat/board-sx1.h> 43#include <plat/board-sx1.h>
45 44
46#include <mach/hardware.h> 45#include <mach/hardware.h>
46#include <mach/usb.h>
47 47
48#include "common.h" 48#include "common.h"
49 49
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c
index afd67f0ec495..3497769eb353 100644
--- a/arch/arm/mach-omap1/board-voiceblue.c
+++ b/arch/arm/mach-omap1/board-voiceblue.c
@@ -35,9 +35,10 @@
35#include <plat/flash.h> 35#include <plat/flash.h>
36#include <plat/mux.h> 36#include <plat/mux.h>
37#include <plat/tc.h> 37#include <plat/tc.h>
38#include <plat/usb.h> 38#include <plat/board.h>
39 39
40#include <mach/hardware.h> 40#include <mach/hardware.h>
41#include <mach/usb.h>
41 42
42#include "common.h" 43#include "common.h"
43 44
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c
index c6ce93f71d08..c007d80dfb62 100644
--- a/arch/arm/mach-omap1/clock_data.c
+++ b/arch/arm/mach-omap1/clock_data.c
@@ -25,10 +25,11 @@
25#include <plat/clock.h> 25#include <plat/clock.h>
26#include <plat/cpu.h> 26#include <plat/cpu.h>
27#include <plat/clkdev_omap.h> 27#include <plat/clkdev_omap.h>
28#include <plat/board.h>
28#include <plat/sram.h> /* for omap_sram_reprogram_clock() */ 29#include <plat/sram.h> /* for omap_sram_reprogram_clock() */
29#include <plat/usb.h> /* for OTG_BASE */
30 30
31#include <mach/hardware.h> 31#include <mach/hardware.h>
32#include <mach/usb.h> /* for OTG_BASE */
32 33
33#include "iomap.h" 34#include "iomap.h"
34#include "clock.h" 35#include "clock.h"
diff --git a/arch/arm/mach-omap1/include/mach/usb.h b/arch/arm/mach-omap1/include/mach/usb.h
new file mode 100644
index 000000000000..753cd5ce6949
--- /dev/null
+++ b/arch/arm/mach-omap1/include/mach/usb.h
@@ -0,0 +1,165 @@
1/*
2 * FIXME correct answer depends on hmc_mode,
3 * as does (on omap1) any nonzero value for config->otg port number
4 */
5#ifdef CONFIG_USB_GADGET_OMAP
6#define is_usb0_device(config) 1
7#else
8#define is_usb0_device(config) 0
9#endif
10
11struct omap_usb_config {
12 /* Configure drivers according to the connectors on your board:
13 * - "A" connector (rectagular)
14 * ... for host/OHCI use, set "register_host".
15 * - "B" connector (squarish) or "Mini-B"
16 * ... for device/gadget use, set "register_dev".
17 * - "Mini-AB" connector (very similar to Mini-B)
18 * ... for OTG use as device OR host, initialize "otg"
19 */
20 unsigned register_host:1;
21 unsigned register_dev:1;
22 u8 otg; /* port number, 1-based: usb1 == 2 */
23
24 u8 hmc_mode;
25
26 /* implicitly true if otg: host supports remote wakeup? */
27 u8 rwc;
28
29 /* signaling pins used to talk to transceiver on usbN:
30 * 0 == usbN unused
31 * 2 == usb0-only, using internal transceiver
32 * 3 == 3 wire bidirectional
33 * 4 == 4 wire bidirectional
34 * 6 == 6 wire unidirectional (or TLL)
35 */
36 u8 pins[3];
37
38 struct platform_device *udc_device;
39 struct platform_device *ohci_device;
40 struct platform_device *otg_device;
41
42 u32 (*usb0_init)(unsigned nwires, unsigned is_device);
43 u32 (*usb1_init)(unsigned nwires);
44 u32 (*usb2_init)(unsigned nwires, unsigned alt_pingroup);
45
46 int (*ocpi_enable)(void);
47};
48
49void omap_otg_init(struct omap_usb_config *config);
50
51#if defined(CONFIG_USB) || defined(CONFIG_USB_MODULE)
52void omap1_usb_init(struct omap_usb_config *pdata);
53#else
54static inline void omap1_usb_init(struct omap_usb_config *pdata)
55{
56}
57#endif
58
59#define OMAP1_OTG_BASE 0xfffb0400
60#define OMAP1_UDC_BASE 0xfffb4000
61#define OMAP1_OHCI_BASE 0xfffba000
62
63#define OMAP2_OHCI_BASE 0x4805e000
64#define OMAP2_UDC_BASE 0x4805e200
65#define OMAP2_OTG_BASE 0x4805e300
66#define OTG_BASE OMAP1_OTG_BASE
67#define UDC_BASE OMAP1_UDC_BASE
68#define OMAP_OHCI_BASE OMAP1_OHCI_BASE
69
70/*
71 * OTG and transceiver registers, for OMAPs starting with ARM926
72 */
73#define OTG_REV (OTG_BASE + 0x00)
74#define OTG_SYSCON_1 (OTG_BASE + 0x04)
75# define USB2_TRX_MODE(w) (((w)>>24)&0x07)
76# define USB1_TRX_MODE(w) (((w)>>20)&0x07)
77# define USB0_TRX_MODE(w) (((w)>>16)&0x07)
78# define OTG_IDLE_EN (1 << 15)
79# define HST_IDLE_EN (1 << 14)
80# define DEV_IDLE_EN (1 << 13)
81# define OTG_RESET_DONE (1 << 2)
82# define OTG_SOFT_RESET (1 << 1)
83#define OTG_SYSCON_2 (OTG_BASE + 0x08)
84# define OTG_EN (1 << 31)
85# define USBX_SYNCHRO (1 << 30)
86# define OTG_MST16 (1 << 29)
87# define SRP_GPDATA (1 << 28)
88# define SRP_GPDVBUS (1 << 27)
89# define SRP_GPUVBUS(w) (((w)>>24)&0x07)
90# define A_WAIT_VRISE(w) (((w)>>20)&0x07)
91# define B_ASE_BRST(w) (((w)>>16)&0x07)
92# define SRP_DPW (1 << 14)
93# define SRP_DATA (1 << 13)
94# define SRP_VBUS (1 << 12)
95# define OTG_PADEN (1 << 10)
96# define HMC_PADEN (1 << 9)
97# define UHOST_EN (1 << 8)
98# define HMC_TLLSPEED (1 << 7)
99# define HMC_TLLATTACH (1 << 6)
100# define OTG_HMC(w) (((w)>>0)&0x3f)
101#define OTG_CTRL (OTG_BASE + 0x0c)
102# define OTG_USB2_EN (1 << 29)
103# define OTG_USB2_DP (1 << 28)
104# define OTG_USB2_DM (1 << 27)
105# define OTG_USB1_EN (1 << 26)
106# define OTG_USB1_DP (1 << 25)
107# define OTG_USB1_DM (1 << 24)
108# define OTG_USB0_EN (1 << 23)
109# define OTG_USB0_DP (1 << 22)
110# define OTG_USB0_DM (1 << 21)
111# define OTG_ASESSVLD (1 << 20)
112# define OTG_BSESSEND (1 << 19)
113# define OTG_BSESSVLD (1 << 18)
114# define OTG_VBUSVLD (1 << 17)
115# define OTG_ID (1 << 16)
116# define OTG_DRIVER_SEL (1 << 15)
117# define OTG_A_SETB_HNPEN (1 << 12)
118# define OTG_A_BUSREQ (1 << 11)
119# define OTG_B_HNPEN (1 << 9)
120# define OTG_B_BUSREQ (1 << 8)
121# define OTG_BUSDROP (1 << 7)
122# define OTG_PULLDOWN (1 << 5)
123# define OTG_PULLUP (1 << 4)
124# define OTG_DRV_VBUS (1 << 3)
125# define OTG_PD_VBUS (1 << 2)
126# define OTG_PU_VBUS (1 << 1)
127# define OTG_PU_ID (1 << 0)
128#define OTG_IRQ_EN (OTG_BASE + 0x10) /* 16-bit */
129# define DRIVER_SWITCH (1 << 15)
130# define A_VBUS_ERR (1 << 13)
131# define A_REQ_TMROUT (1 << 12)
132# define A_SRP_DETECT (1 << 11)
133# define B_HNP_FAIL (1 << 10)
134# define B_SRP_TMROUT (1 << 9)
135# define B_SRP_DONE (1 << 8)
136# define B_SRP_STARTED (1 << 7)
137# define OPRT_CHG (1 << 0)
138#define OTG_IRQ_SRC (OTG_BASE + 0x14) /* 16-bit */
139 // same bits as in IRQ_EN
140#define OTG_OUTCTRL (OTG_BASE + 0x18) /* 16-bit */
141# define OTGVPD (1 << 14)
142# define OTGVPU (1 << 13)
143# define OTGPUID (1 << 12)
144# define USB2VDR (1 << 10)
145# define USB2PDEN (1 << 9)
146# define USB2PUEN (1 << 8)
147# define USB1VDR (1 << 6)
148# define USB1PDEN (1 << 5)
149# define USB1PUEN (1 << 4)
150# define USB0VDR (1 << 2)
151# define USB0PDEN (1 << 1)
152# define USB0PUEN (1 << 0)
153#define OTG_TEST (OTG_BASE + 0x20) /* 16-bit */
154#define OTG_VENDOR_CODE (OTG_BASE + 0xfc) /* 16-bit */
155
156/*-------------------------------------------------------------------------*/
157
158/* OMAP1 */
159#define USB_TRANSCEIVER_CTRL (0xfffe1000 + 0x0064)
160# define CONF_USB2_UNI_R (1 << 8)
161# define CONF_USB1_UNI_R (1 << 7)
162# define CONF_USB_PORT0_R(x) (((x)>>4)&0x7)
163# define CONF_USB0_ISOLATE_R (1 << 3)
164# define CONF_USB_PWRDN_DM_R (1 << 2)
165# define CONF_USB_PWRDN_DP_R (1 << 1)
diff --git a/arch/arm/mach-omap1/usb.c b/arch/arm/mach-omap1/usb.c
index e61afd922766..65f88176fba8 100644
--- a/arch/arm/mach-omap1/usb.c
+++ b/arch/arm/mach-omap1/usb.c
@@ -27,7 +27,8 @@
27#include <asm/irq.h> 27#include <asm/irq.h>
28 28
29#include <plat/mux.h> 29#include <plat/mux.h>
30#include <plat/usb.h> 30
31#include <mach/usb.h>
31 32
32#include "common.h" 33#include "common.h"
33 34
@@ -55,6 +56,119 @@
55#define INT_USB_IRQ_HGEN INT_USB_HHC_1 56#define INT_USB_IRQ_HGEN INT_USB_HHC_1
56#define INT_USB_IRQ_OTG IH2_BASE + 8 57#define INT_USB_IRQ_OTG IH2_BASE + 8
57 58
59#ifdef CONFIG_ARCH_OMAP_OTG
60
61void __init
62omap_otg_init(struct omap_usb_config *config)
63{
64 u32 syscon;
65 int alt_pingroup = 0;
66
67 /* NOTE: no bus or clock setup (yet?) */
68
69 syscon = omap_readl(OTG_SYSCON_1) & 0xffff;
70 if (!(syscon & OTG_RESET_DONE))
71 pr_debug("USB resets not complete?\n");
72
73 //omap_writew(0, OTG_IRQ_EN);
74
75 /* pin muxing and transceiver pinouts */
76 if (config->pins[0] > 2) /* alt pingroup 2 */
77 alt_pingroup = 1;
78 syscon |= config->usb0_init(config->pins[0], is_usb0_device(config));
79 syscon |= config->usb1_init(config->pins[1]);
80 syscon |= config->usb2_init(config->pins[2], alt_pingroup);
81 pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
82 omap_writel(syscon, OTG_SYSCON_1);
83
84 syscon = config->hmc_mode;
85 syscon |= USBX_SYNCHRO | (4 << 16) /* B_ASE0_BRST */;
86#ifdef CONFIG_USB_OTG
87 if (config->otg)
88 syscon |= OTG_EN;
89#endif
90 if (cpu_class_is_omap1())
91 pr_debug("USB_TRANSCEIVER_CTRL = %03x\n",
92 omap_readl(USB_TRANSCEIVER_CTRL));
93 pr_debug("OTG_SYSCON_2 = %08x\n", omap_readl(OTG_SYSCON_2));
94 omap_writel(syscon, OTG_SYSCON_2);
95
96 printk("USB: hmc %d", config->hmc_mode);
97 if (!alt_pingroup)
98 printk(", usb2 alt %d wires", config->pins[2]);
99 else if (config->pins[0])
100 printk(", usb0 %d wires%s", config->pins[0],
101 is_usb0_device(config) ? " (dev)" : "");
102 if (config->pins[1])
103 printk(", usb1 %d wires", config->pins[1]);
104 if (!alt_pingroup && config->pins[2])
105 printk(", usb2 %d wires", config->pins[2]);
106 if (config->otg)
107 printk(", Mini-AB on usb%d", config->otg - 1);
108 printk("\n");
109
110 if (cpu_class_is_omap1()) {
111 u16 w;
112
113 /* leave USB clocks/controllers off until needed */
114 w = omap_readw(ULPD_SOFT_REQ);
115 w &= ~SOFT_USB_CLK_REQ;
116 omap_writew(w, ULPD_SOFT_REQ);
117
118 w = omap_readw(ULPD_CLOCK_CTRL);
119 w &= ~USB_MCLK_EN;
120 w |= DIS_USB_PVCI_CLK;
121 omap_writew(w, ULPD_CLOCK_CTRL);
122 }
123 syscon = omap_readl(OTG_SYSCON_1);
124 syscon |= HST_IDLE_EN|DEV_IDLE_EN|OTG_IDLE_EN;
125
126#ifdef CONFIG_USB_GADGET_OMAP
127 if (config->otg || config->register_dev) {
128 struct platform_device *udc_device = config->udc_device;
129 int status;
130
131 syscon &= ~DEV_IDLE_EN;
132 udc_device->dev.platform_data = config;
133 status = platform_device_register(udc_device);
134 if (status)
135 pr_debug("can't register UDC device, %d\n", status);
136 }
137#endif
138
139#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
140 if (config->otg || config->register_host) {
141 struct platform_device *ohci_device = config->ohci_device;
142 int status;
143
144 syscon &= ~HST_IDLE_EN;
145 ohci_device->dev.platform_data = config;
146 status = platform_device_register(ohci_device);
147 if (status)
148 pr_debug("can't register OHCI device, %d\n", status);
149 }
150#endif
151
152#ifdef CONFIG_USB_OTG
153 if (config->otg) {
154 struct platform_device *otg_device = config->otg_device;
155 int status;
156
157 syscon &= ~OTG_IDLE_EN;
158 otg_device->dev.platform_data = config;
159 status = platform_device_register(otg_device);
160 if (status)
161 pr_debug("can't register OTG device, %d\n", status);
162 }
163#endif
164 pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
165 omap_writel(syscon, OTG_SYSCON_1);
166}
167
168#else
169void omap_otg_init(struct omap_usb_config *config) {}
170#endif
171
58#ifdef CONFIG_USB_GADGET_OMAP 172#ifdef CONFIG_USB_GADGET_OMAP
59 173
60static struct resource udc_resources[] = { 174static struct resource udc_resources[] = {
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 4cf5142f22cc..042f157a8f94 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -64,19 +64,16 @@ config SOC_OMAP2420
64 depends on ARCH_OMAP2 64 depends on ARCH_OMAP2
65 default y 65 default y
66 select OMAP_DM_TIMER 66 select OMAP_DM_TIMER
67 select ARCH_OMAP_OTG
68 67
69config SOC_OMAP2430 68config SOC_OMAP2430
70 bool "OMAP2430 support" 69 bool "OMAP2430 support"
71 depends on ARCH_OMAP2 70 depends on ARCH_OMAP2
72 default y 71 default y
73 select ARCH_OMAP_OTG
74 72
75config SOC_OMAP3430 73config SOC_OMAP3430
76 bool "OMAP3430 support" 74 bool "OMAP3430 support"
77 depends on ARCH_OMAP3 75 depends on ARCH_OMAP3
78 default y 76 default y
79 select ARCH_OMAP_OTG
80 77
81config SOC_TI81XX 78config SOC_TI81XX
82 bool "TI81XX support" 79 bool "TI81XX support"
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index fa742f3c2629..9ba1c406a465 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -116,7 +116,6 @@ obj-$(CONFIG_ARCH_OMAP4) += powerdomains44xx_data.o
116 116
117# PRCM clockdomain control 117# PRCM clockdomain control
118clockdomain-common += clockdomain.o 118clockdomain-common += clockdomain.o
119clockdomain-common += clockdomains_common_data.o
120obj-$(CONFIG_ARCH_OMAP2) += $(clockdomain-common) 119obj-$(CONFIG_ARCH_OMAP2) += $(clockdomain-common)
121obj-$(CONFIG_ARCH_OMAP2) += clockdomain2xxx_3xxx.o 120obj-$(CONFIG_ARCH_OMAP2) += clockdomain2xxx_3xxx.o
122obj-$(CONFIG_ARCH_OMAP2) += clockdomains2xxx_3xxx_data.o 121obj-$(CONFIG_ARCH_OMAP2) += clockdomains2xxx_3xxx_data.o
@@ -244,9 +243,6 @@ obj-y += $(omap-flash-y) $(omap-flash-m)
244omap-hsmmc-$(CONFIG_MMC_OMAP_HS) := hsmmc.o 243omap-hsmmc-$(CONFIG_MMC_OMAP_HS) := hsmmc.o
245obj-y += $(omap-hsmmc-m) $(omap-hsmmc-y) 244obj-y += $(omap-hsmmc-m) $(omap-hsmmc-y)
246 245
247
248usbfs-$(CONFIG_ARCH_OMAP_OTG) := usb-fs.o
249obj-y += $(usbfs-m) $(usbfs-y)
250obj-y += usb-musb.o 246obj-y += usb-musb.o
251obj-y += omap_phy_internal.o 247obj-y += omap_phy_internal.o
252 248
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index 99ca6bad5c30..6523aeabf9f2 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -254,16 +254,6 @@ static struct omap2_hsmmc_info mmc[] __initdata = {
254 {} /* Terminator */ 254 {} /* Terminator */
255}; 255};
256 256
257static struct omap_usb_config sdp2430_usb_config __initdata = {
258 .otg = 1,
259#ifdef CONFIG_USB_GADGET_OMAP
260 .hmc_mode = 0x0,
261#elif defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
262 .hmc_mode = 0x1,
263#endif
264 .pins[0] = 3,
265};
266
267#ifdef CONFIG_OMAP_MUX 257#ifdef CONFIG_OMAP_MUX
268static struct omap_board_mux board_mux[] __initdata = { 258static struct omap_board_mux board_mux[] __initdata = {
269 { .reg_offset = OMAP_MUX_TERMINATOR }, 259 { .reg_offset = OMAP_MUX_TERMINATOR },
@@ -280,7 +270,6 @@ static void __init omap_2430sdp_init(void)
280 omap_serial_init(); 270 omap_serial_init();
281 omap_sdrc_init(NULL, NULL); 271 omap_sdrc_init(NULL, NULL);
282 omap_hsmmc_init(mmc); 272 omap_hsmmc_init(mmc);
283 omap2_usbfs_init(&sdp2430_usb_config);
284 273
285 omap_mux_init_signal("usb0hs_stp", OMAP_PULL_ENA | OMAP_PULL_UP); 274 omap_mux_init_signal("usb0hs_stp", OMAP_PULL_ENA | OMAP_PULL_UP);
286 usb_musb_init(NULL); 275 usb_musb_init(NULL);
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index 502c31e123be..519bcd3079e8 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -35,7 +35,6 @@
35#include <asm/mach/flash.h> 35#include <asm/mach/flash.h>
36 36
37#include <plat/led.h> 37#include <plat/led.h>
38#include <plat/usb.h>
39#include <plat/board.h> 38#include <plat/board.h>
40#include "common.h" 39#include "common.h"
41#include <plat/gpmc.h> 40#include <plat/gpmc.h>
@@ -253,13 +252,6 @@ out:
253 clk_put(gpmc_fck); 252 clk_put(gpmc_fck);
254} 253}
255 254
256static struct omap_usb_config apollon_usb_config __initdata = {
257 .register_dev = 1,
258 .hmc_mode = 0x14, /* 0:dev 1:host1 2:disable */
259
260 .pins[0] = 6,
261};
262
263static struct panel_generic_dpi_data apollon_panel_data = { 255static struct panel_generic_dpi_data apollon_panel_data = {
264 .name = "apollon", 256 .name = "apollon",
265}; 257};
@@ -297,15 +289,6 @@ static void __init apollon_led_init(void)
297 gpio_request_array(apollon_gpio_leds, ARRAY_SIZE(apollon_gpio_leds)); 289 gpio_request_array(apollon_gpio_leds, ARRAY_SIZE(apollon_gpio_leds));
298} 290}
299 291
300static void __init apollon_usb_init(void)
301{
302 /* USB device */
303 /* DEVICE_SUSPEND */
304 omap_mux_init_signal("mcbsp2_clkx.gpio_12", 0);
305 gpio_request_one(12, GPIOF_OUT_INIT_LOW, "USB suspend");
306 omap2_usbfs_init(&apollon_usb_config);
307}
308
309#ifdef CONFIG_OMAP_MUX 292#ifdef CONFIG_OMAP_MUX
310static struct omap_board_mux board_mux[] __initdata = { 293static struct omap_board_mux board_mux[] __initdata = {
311 { .reg_offset = OMAP_MUX_TERMINATOR }, 294 { .reg_offset = OMAP_MUX_TERMINATOR },
@@ -321,7 +304,6 @@ static void __init omap_apollon_init(void)
321 apollon_init_smc91x(); 304 apollon_init_smc91x();
322 apollon_led_init(); 305 apollon_led_init();
323 apollon_flash_init(); 306 apollon_flash_init();
324 apollon_usb_init();
325 307
326 /* REVISIT: where's the correct place */ 308 /* REVISIT: where's the correct place */
327 omap_mux_init_signal("sys_nirq", OMAP_PULL_ENA | OMAP_PULL_UP); 309 omap_mux_init_signal("sys_nirq", OMAP_PULL_ENA | OMAP_PULL_UP);
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 876becf8205a..ace20482e3e1 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -32,7 +32,6 @@
32#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
33#include <asm/mach/map.h> 33#include <asm/mach/map.h>
34 34
35#include <plat/usb.h>
36#include <plat/board.h> 35#include <plat/board.h>
37#include "common.h" 36#include "common.h"
38#include <plat/menelaus.h> 37#include <plat/menelaus.h>
@@ -329,17 +328,6 @@ static void __init h4_init_flash(void)
329 h4_flash_resource.end = base + SZ_64M - 1; 328 h4_flash_resource.end = base + SZ_64M - 1;
330} 329}
331 330
332static struct omap_usb_config h4_usb_config __initdata = {
333 /* S1.10 OFF -- usb "download port"
334 * usb0 switched to Mini-B port and isp1105 transceiver;
335 * S2.POS3 = ON, S2.POS4 = OFF ... to enable battery charging
336 */
337 .register_dev = 1,
338 .pins[0] = 3,
339/* .hmc_mode = 0x14,*/ /* 0:dev 1:host 2:disable */
340 .hmc_mode = 0x00, /* 0:dev|otg 1:disable 2:disable */
341};
342
343static struct at24_platform_data m24c01 = { 331static struct at24_platform_data m24c01 = {
344 .byte_len = SZ_1K / 8, 332 .byte_len = SZ_1K / 8,
345 .page_size = 16, 333 .page_size = 16,
@@ -381,7 +369,6 @@ static void __init omap_h4_init(void)
381 ARRAY_SIZE(h4_i2c_board_info)); 369 ARRAY_SIZE(h4_i2c_board_info));
382 370
383 platform_add_devices(h4_devices, ARRAY_SIZE(h4_devices)); 371 platform_add_devices(h4_devices, ARRAY_SIZE(h4_devices));
384 omap2_usbfs_init(&h4_usb_config);
385 omap_serial_init(); 372 omap_serial_init();
386 omap_sdrc_init(NULL, NULL); 373 omap_sdrc_init(NULL, NULL);
387 h4_init_flash(); 374 h4_init_flash();
diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c
index bace9308a4db..7e39015357b1 100644
--- a/arch/arm/mach-omap2/clock2420_data.c
+++ b/arch/arm/mach-omap2/clock2420_data.c
@@ -1774,8 +1774,6 @@ static struct omap_clk omap2420_clks[] = {
1774 CLK(NULL, "osc_ck", &osc_ck, CK_242X), 1774 CLK(NULL, "osc_ck", &osc_ck, CK_242X),
1775 CLK(NULL, "sys_ck", &sys_ck, CK_242X), 1775 CLK(NULL, "sys_ck", &sys_ck, CK_242X),
1776 CLK(NULL, "alt_ck", &alt_ck, CK_242X), 1776 CLK(NULL, "alt_ck", &alt_ck, CK_242X),
1777 CLK("omap-mcbsp.1", "pad_fck", &mcbsp_clks, CK_242X),
1778 CLK("omap-mcbsp.2", "pad_fck", &mcbsp_clks, CK_242X),
1779 CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_242X), 1777 CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_242X),
1780 /* internal analog sources */ 1778 /* internal analog sources */
1781 CLK(NULL, "dpll_ck", &dpll_ck, CK_242X), 1779 CLK(NULL, "dpll_ck", &dpll_ck, CK_242X),
@@ -1784,8 +1782,6 @@ static struct omap_clk omap2420_clks[] = {
1784 /* internal prcm root sources */ 1782 /* internal prcm root sources */
1785 CLK(NULL, "func_54m_ck", &func_54m_ck, CK_242X), 1783 CLK(NULL, "func_54m_ck", &func_54m_ck, CK_242X),
1786 CLK(NULL, "core_ck", &core_ck, CK_242X), 1784 CLK(NULL, "core_ck", &core_ck, CK_242X),
1787 CLK("omap-mcbsp.1", "prcm_fck", &func_96m_ck, CK_242X),
1788 CLK("omap-mcbsp.2", "prcm_fck", &func_96m_ck, CK_242X),
1789 CLK(NULL, "func_96m_ck", &func_96m_ck, CK_242X), 1785 CLK(NULL, "func_96m_ck", &func_96m_ck, CK_242X),
1790 CLK(NULL, "func_48m_ck", &func_48m_ck, CK_242X), 1786 CLK(NULL, "func_48m_ck", &func_48m_ck, CK_242X),
1791 CLK(NULL, "func_12m_ck", &func_12m_ck, CK_242X), 1787 CLK(NULL, "func_12m_ck", &func_12m_ck, CK_242X),
diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c
index 3b4d09a50399..90a08c3b12ac 100644
--- a/arch/arm/mach-omap2/clock2430_data.c
+++ b/arch/arm/mach-omap2/clock2430_data.c
@@ -1858,11 +1858,6 @@ static struct omap_clk omap2430_clks[] = {
1858 CLK(NULL, "osc_ck", &osc_ck, CK_243X), 1858 CLK(NULL, "osc_ck", &osc_ck, CK_243X),
1859 CLK(NULL, "sys_ck", &sys_ck, CK_243X), 1859 CLK(NULL, "sys_ck", &sys_ck, CK_243X),
1860 CLK(NULL, "alt_ck", &alt_ck, CK_243X), 1860 CLK(NULL, "alt_ck", &alt_ck, CK_243X),
1861 CLK("omap-mcbsp.1", "pad_fck", &mcbsp_clks, CK_243X),
1862 CLK("omap-mcbsp.2", "pad_fck", &mcbsp_clks, CK_243X),
1863 CLK("omap-mcbsp.3", "pad_fck", &mcbsp_clks, CK_243X),
1864 CLK("omap-mcbsp.4", "pad_fck", &mcbsp_clks, CK_243X),
1865 CLK("omap-mcbsp.5", "pad_fck", &mcbsp_clks, CK_243X),
1866 CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_243X), 1861 CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_243X),
1867 /* internal analog sources */ 1862 /* internal analog sources */
1868 CLK(NULL, "dpll_ck", &dpll_ck, CK_243X), 1863 CLK(NULL, "dpll_ck", &dpll_ck, CK_243X),
@@ -1871,11 +1866,6 @@ static struct omap_clk omap2430_clks[] = {
1871 /* internal prcm root sources */ 1866 /* internal prcm root sources */
1872 CLK(NULL, "func_54m_ck", &func_54m_ck, CK_243X), 1867 CLK(NULL, "func_54m_ck", &func_54m_ck, CK_243X),
1873 CLK(NULL, "core_ck", &core_ck, CK_243X), 1868 CLK(NULL, "core_ck", &core_ck, CK_243X),
1874 CLK("omap-mcbsp.1", "prcm_fck", &func_96m_ck, CK_243X),
1875 CLK("omap-mcbsp.2", "prcm_fck", &func_96m_ck, CK_243X),
1876 CLK("omap-mcbsp.3", "prcm_fck", &func_96m_ck, CK_243X),
1877 CLK("omap-mcbsp.4", "prcm_fck", &func_96m_ck, CK_243X),
1878 CLK("omap-mcbsp.5", "prcm_fck", &func_96m_ck, CK_243X),
1879 CLK(NULL, "func_96m_ck", &func_96m_ck, CK_243X), 1869 CLK(NULL, "func_96m_ck", &func_96m_ck, CK_243X),
1880 CLK(NULL, "func_48m_ck", &func_48m_ck, CK_243X), 1870 CLK(NULL, "func_48m_ck", &func_48m_ck, CK_243X),
1881 CLK(NULL, "func_12m_ck", &func_12m_ck, CK_243X), 1871 CLK(NULL, "func_12m_ck", &func_12m_ck, CK_243X),
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index 1efdec236ae8..ff422bee804a 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3236,11 +3236,6 @@ static struct omap_clk omap3xxx_clks[] = {
3236 CLK(NULL, "osc_sys_ck", &osc_sys_ck, CK_3XXX), 3236 CLK(NULL, "osc_sys_ck", &osc_sys_ck, CK_3XXX),
3237 CLK(NULL, "sys_ck", &sys_ck, CK_3XXX), 3237 CLK(NULL, "sys_ck", &sys_ck, CK_3XXX),
3238 CLK(NULL, "sys_altclk", &sys_altclk, CK_3XXX), 3238 CLK(NULL, "sys_altclk", &sys_altclk, CK_3XXX),
3239 CLK("omap-mcbsp.1", "pad_fck", &mcbsp_clks, CK_3XXX),
3240 CLK("omap-mcbsp.2", "pad_fck", &mcbsp_clks, CK_3XXX),
3241 CLK("omap-mcbsp.3", "pad_fck", &mcbsp_clks, CK_3XXX),
3242 CLK("omap-mcbsp.4", "pad_fck", &mcbsp_clks, CK_3XXX),
3243 CLK("omap-mcbsp.5", "pad_fck", &mcbsp_clks, CK_3XXX),
3244 CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_3XXX), 3239 CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_3XXX),
3245 CLK(NULL, "sys_clkout1", &sys_clkout1, CK_3XXX), 3240 CLK(NULL, "sys_clkout1", &sys_clkout1, CK_3XXX),
3246 CLK(NULL, "dpll1_ck", &dpll1_ck, CK_3XXX), 3241 CLK(NULL, "dpll1_ck", &dpll1_ck, CK_3XXX),
@@ -3307,8 +3302,6 @@ static struct omap_clk omap3xxx_clks[] = {
3307 CLK(NULL, "ts_fck", &ts_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3302 CLK(NULL, "ts_fck", &ts_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3308 CLK(NULL, "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3303 CLK(NULL, "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3309 CLK("usbhs_omap", "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3304 CLK("usbhs_omap", "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3310 CLK("omap-mcbsp.1", "prcm_fck", &core_96m_fck, CK_3XXX),
3311 CLK("omap-mcbsp.5", "prcm_fck", &core_96m_fck, CK_3XXX),
3312 CLK(NULL, "core_96m_fck", &core_96m_fck, CK_3XXX), 3305 CLK(NULL, "core_96m_fck", &core_96m_fck, CK_3XXX),
3313 CLK(NULL, "mmchs3_fck", &mmchs3_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3306 CLK(NULL, "mmchs3_fck", &mmchs3_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3314 CLK(NULL, "mmchs2_fck", &mmchs2_fck, CK_3XXX), 3307 CLK(NULL, "mmchs2_fck", &mmchs2_fck, CK_3XXX),
@@ -3413,9 +3406,6 @@ static struct omap_clk omap3xxx_clks[] = {
3413 CLK(NULL, "omap_32ksync_ick", &omap_32ksync_ick, CK_3XXX), 3406 CLK(NULL, "omap_32ksync_ick", &omap_32ksync_ick, CK_3XXX),
3414 CLK(NULL, "gpt12_ick", &gpt12_ick, CK_3XXX), 3407 CLK(NULL, "gpt12_ick", &gpt12_ick, CK_3XXX),
3415 CLK(NULL, "gpt1_ick", &gpt1_ick, CK_3XXX), 3408 CLK(NULL, "gpt1_ick", &gpt1_ick, CK_3XXX),
3416 CLK("omap-mcbsp.2", "prcm_fck", &per_96m_fck, CK_3XXX),
3417 CLK("omap-mcbsp.3", "prcm_fck", &per_96m_fck, CK_3XXX),
3418 CLK("omap-mcbsp.4", "prcm_fck", &per_96m_fck, CK_3XXX),
3419 CLK(NULL, "per_96m_fck", &per_96m_fck, CK_3XXX), 3409 CLK(NULL, "per_96m_fck", &per_96m_fck, CK_3XXX),
3420 CLK(NULL, "per_48m_fck", &per_48m_fck, CK_3XXX), 3410 CLK(NULL, "per_48m_fck", &per_48m_fck, CK_3XXX),
3421 CLK(NULL, "uart3_fck", &uart3_fck, CK_3XXX), 3411 CLK(NULL, "uart3_fck", &uart3_fck, CK_3XXX),
diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h
index f7b58609bad8..349dcbb6fecb 100644
--- a/arch/arm/mach-omap2/clockdomain.h
+++ b/arch/arm/mach-omap2/clockdomain.h
@@ -206,7 +206,5 @@ extern struct clkdm_ops omap4_clkdm_operations;
206extern struct clkdm_dep gfx_24xx_wkdeps[]; 206extern struct clkdm_dep gfx_24xx_wkdeps[];
207extern struct clkdm_dep dsp_24xx_wkdeps[]; 207extern struct clkdm_dep dsp_24xx_wkdeps[];
208extern struct clockdomain wkup_common_clkdm; 208extern struct clockdomain wkup_common_clkdm;
209extern struct clockdomain prm_common_clkdm;
210extern struct clockdomain cm_common_clkdm;
211 209
212#endif 210#endif
diff --git a/arch/arm/mach-omap2/clockdomains2420_data.c b/arch/arm/mach-omap2/clockdomains2420_data.c
index 0ab8e46d5b2b..5c741852fac0 100644
--- a/arch/arm/mach-omap2/clockdomains2420_data.c
+++ b/arch/arm/mach-omap2/clockdomains2420_data.c
@@ -131,8 +131,6 @@ static struct clockdomain dss_2420_clkdm = {
131 131
132static struct clockdomain *clockdomains_omap242x[] __initdata = { 132static struct clockdomain *clockdomains_omap242x[] __initdata = {
133 &wkup_common_clkdm, 133 &wkup_common_clkdm,
134 &cm_common_clkdm,
135 &prm_common_clkdm,
136 &mpu_2420_clkdm, 134 &mpu_2420_clkdm,
137 &iva1_2420_clkdm, 135 &iva1_2420_clkdm,
138 &dsp_2420_clkdm, 136 &dsp_2420_clkdm,
diff --git a/arch/arm/mach-omap2/clockdomains2430_data.c b/arch/arm/mach-omap2/clockdomains2430_data.c
index 3645ed044890..f09617555e15 100644
--- a/arch/arm/mach-omap2/clockdomains2430_data.c
+++ b/arch/arm/mach-omap2/clockdomains2430_data.c
@@ -157,8 +157,6 @@ static struct clockdomain dss_2430_clkdm = {
157 157
158static struct clockdomain *clockdomains_omap243x[] __initdata = { 158static struct clockdomain *clockdomains_omap243x[] __initdata = {
159 &wkup_common_clkdm, 159 &wkup_common_clkdm,
160 &cm_common_clkdm,
161 &prm_common_clkdm,
162 &mpu_2430_clkdm, 160 &mpu_2430_clkdm,
163 &mdm_clkdm, 161 &mdm_clkdm,
164 &dsp_2430_clkdm, 162 &dsp_2430_clkdm,
diff --git a/arch/arm/mach-omap2/clockdomains3xxx_data.c b/arch/arm/mach-omap2/clockdomains3xxx_data.c
index 6038adb97710..2cdc17c9d2fa 100644
--- a/arch/arm/mach-omap2/clockdomains3xxx_data.c
+++ b/arch/arm/mach-omap2/clockdomains3xxx_data.c
@@ -347,8 +347,6 @@ static struct clkdm_autodep clkdm_autodeps[] = {
347 347
348static struct clockdomain *clockdomains_omap3430_common[] __initdata = { 348static struct clockdomain *clockdomains_omap3430_common[] __initdata = {
349 &wkup_common_clkdm, 349 &wkup_common_clkdm,
350 &cm_common_clkdm,
351 &prm_common_clkdm,
352 &mpu_3xxx_clkdm, 350 &mpu_3xxx_clkdm,
353 &neon_clkdm, 351 &neon_clkdm,
354 &iva2_clkdm, 352 &iva2_clkdm,
diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c
index c53425847493..bd7ed13515cc 100644
--- a/arch/arm/mach-omap2/clockdomains44xx_data.c
+++ b/arch/arm/mach-omap2/clockdomains44xx_data.c
@@ -430,8 +430,6 @@ static struct clockdomain *clockdomains_omap44xx[] __initdata = {
430 &l4_wkup_44xx_clkdm, 430 &l4_wkup_44xx_clkdm,
431 &emu_sys_44xx_clkdm, 431 &emu_sys_44xx_clkdm,
432 &l3_dma_44xx_clkdm, 432 &l3_dma_44xx_clkdm,
433 &prm_common_clkdm,
434 &cm_common_clkdm,
435 NULL 433 NULL
436}; 434};
437 435
diff --git a/arch/arm/mach-omap2/clockdomains_common_data.c b/arch/arm/mach-omap2/clockdomains_common_data.c
deleted file mode 100644
index 615b1f04967d..000000000000
--- a/arch/arm/mach-omap2/clockdomains_common_data.c
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * OMAP2+-common clockdomain data
3 *
4 * Copyright (C) 2008-2012 Texas Instruments, Inc.
5 * Copyright (C) 2008-2010 Nokia Corporation
6 *
7 * Paul Walmsley, Jouni Högander
8 */
9
10#include <linux/kernel.h>
11#include <linux/io.h>
12
13#include "clockdomain.h"
14
15/* These are implicit clockdomains - they are never defined as such in TRM */
16struct clockdomain prm_common_clkdm = {
17 .name = "prm_clkdm",
18 .pwrdm = { .name = "wkup_pwrdm" },
19};
20
21struct clockdomain cm_common_clkdm = {
22 .name = "cm_clkdm",
23 .pwrdm = { .name = "core_pwrdm" },
24};
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index 08e674bb0417..3223b81e7532 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -241,6 +241,49 @@ void omap3_ctrl_write_boot_mode(u8 bootmode)
241 241
242#endif 242#endif
243 243
244/**
245 * omap_ctrl_write_dsp_boot_addr - set boot address for a remote processor
246 * @bootaddr: physical address of the boot loader
247 *
248 * Set boot address for the boot loader of a supported processor
249 * when a power ON sequence occurs.
250 */
251void omap_ctrl_write_dsp_boot_addr(u32 bootaddr)
252{
253 u32 offset = cpu_is_omap243x() ? OMAP243X_CONTROL_IVA2_BOOTADDR :
254 cpu_is_omap34xx() ? OMAP343X_CONTROL_IVA2_BOOTADDR :
255 cpu_is_omap44xx() ? OMAP4_CTRL_MODULE_CORE_DSP_BOOTADDR :
256 0;
257
258 if (!offset) {
259 pr_err("%s: unsupported omap type\n", __func__);
260 return;
261 }
262
263 omap_ctrl_writel(bootaddr, offset);
264}
265
266/**
267 * omap_ctrl_write_dsp_boot_mode - set boot mode for a remote processor
268 * @bootmode: 8-bit value to pass to some boot code
269 *
270 * Sets boot mode for the boot loader of a supported processor
271 * when a power ON sequence occurs.
272 */
273void omap_ctrl_write_dsp_boot_mode(u8 bootmode)
274{
275 u32 offset = cpu_is_omap243x() ? OMAP243X_CONTROL_IVA2_BOOTMOD :
276 cpu_is_omap34xx() ? OMAP343X_CONTROL_IVA2_BOOTMOD :
277 0;
278
279 if (!offset) {
280 pr_err("%s: unsupported omap type\n", __func__);
281 return;
282 }
283
284 omap_ctrl_writel(bootmode, offset);
285}
286
244#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM) 287#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM)
245/* 288/*
246 * Clears the scratchpad contents in case of cold boot- 289 * Clears the scratchpad contents in case of cold boot-
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h
index a406fd045ce1..fcc98f822d9d 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/control.h
@@ -397,6 +397,8 @@ extern u32 omap3_arm_context[128];
397extern void omap3_control_save_context(void); 397extern void omap3_control_save_context(void);
398extern void omap3_control_restore_context(void); 398extern void omap3_control_restore_context(void);
399extern void omap3_ctrl_write_boot_mode(u8 bootmode); 399extern void omap3_ctrl_write_boot_mode(u8 bootmode);
400extern void omap_ctrl_write_dsp_boot_addr(u32 bootaddr);
401extern void omap_ctrl_write_dsp_boot_mode(u8 bootmode);
400extern void omap3630_ctrl_disable_rta(void); 402extern void omap3630_ctrl_disable_rta(void);
401extern int omap3_ctrl_save_padconf(void); 403extern int omap3_ctrl_save_padconf(void);
402#else 404#else
diff --git a/arch/arm/mach-omap2/dsp.c b/arch/arm/mach-omap2/dsp.c
index 88ffa1e645cd..a636ebc16b39 100644
--- a/arch/arm/mach-omap2/dsp.c
+++ b/arch/arm/mach-omap2/dsp.c
@@ -23,6 +23,7 @@
23 23
24#include <asm/memblock.h> 24#include <asm/memblock.h>
25 25
26#include "control.h"
26#include "cm2xxx_3xxx.h" 27#include "cm2xxx_3xxx.h"
27#include "prm2xxx_3xxx.h" 28#include "prm2xxx_3xxx.h"
28#ifdef CONFIG_BRIDGE_DVFS 29#ifdef CONFIG_BRIDGE_DVFS
@@ -46,6 +47,9 @@ static struct omap_dsp_platform_data omap_dsp_pdata __initdata = {
46 .dsp_cm_read = omap2_cm_read_mod_reg, 47 .dsp_cm_read = omap2_cm_read_mod_reg,
47 .dsp_cm_write = omap2_cm_write_mod_reg, 48 .dsp_cm_write = omap2_cm_write_mod_reg,
48 .dsp_cm_rmw_bits = omap2_cm_rmw_mod_reg_bits, 49 .dsp_cm_rmw_bits = omap2_cm_rmw_mod_reg_bits,
50
51 .set_bootaddr = omap_ctrl_write_dsp_boot_addr,
52 .set_bootmode = omap_ctrl_write_dsp_boot_mode,
49}; 53};
50 54
51static phys_addr_t omap_dsp_phys_mempool_base; 55static phys_addr_t omap_dsp_phys_mempool_base;
diff --git a/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h b/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h
index 2f7ac70a20d8..01970824e0e5 100644
--- a/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h
+++ b/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h
@@ -42,6 +42,7 @@
42#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_OPP_DPLL_1 0x0268 42#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_OPP_DPLL_1 0x0268
43#define OMAP4_CTRL_MODULE_CORE_STATUS 0x02c4 43#define OMAP4_CTRL_MODULE_CORE_STATUS 0x02c4
44#define OMAP4_CTRL_MODULE_CORE_DEV_CONF 0x0300 44#define OMAP4_CTRL_MODULE_CORE_DEV_CONF 0x0300
45#define OMAP4_CTRL_MODULE_CORE_DSP_BOOTADDR 0x0304
45#define OMAP4_CTRL_MODULE_CORE_LDOVBB_IVA_VOLTAGE_CTRL 0x0314 46#define OMAP4_CTRL_MODULE_CORE_LDOVBB_IVA_VOLTAGE_CTRL 0x0314
46#define OMAP4_CTRL_MODULE_CORE_LDOVBB_MPU_VOLTAGE_CTRL 0x0318 47#define OMAP4_CTRL_MODULE_CORE_LDOVBB_MPU_VOLTAGE_CTRL 0x0318
47#define OMAP4_CTRL_MODULE_CORE_LDOSRAM_IVA_VOLTAGE_CTRL 0x0320 48#define OMAP4_CTRL_MODULE_CORE_LDOSRAM_IVA_VOLTAGE_CTRL 0x0320
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 773193670ea2..f97f0624bca0 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -166,6 +166,31 @@
166 */ 166 */
167#define LINKS_PER_OCP_IF 2 167#define LINKS_PER_OCP_IF 2
168 168
169/**
170 * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
171 * @enable_module: function to enable a module (via MODULEMODE)
172 * @disable_module: function to disable a module (via MODULEMODE)
173 *
174 * XXX Eventually this functionality will be hidden inside the PRM/CM
175 * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
176 * conditionals in this code.
177 */
178struct omap_hwmod_soc_ops {
179 void (*enable_module)(struct omap_hwmod *oh);
180 int (*disable_module)(struct omap_hwmod *oh);
181 int (*wait_target_ready)(struct omap_hwmod *oh);
182 int (*assert_hardreset)(struct omap_hwmod *oh,
183 struct omap_hwmod_rst_info *ohri);
184 int (*deassert_hardreset)(struct omap_hwmod *oh,
185 struct omap_hwmod_rst_info *ohri);
186 int (*is_hardreset_asserted)(struct omap_hwmod *oh,
187 struct omap_hwmod_rst_info *ohri);
188 int (*init_clkdm)(struct omap_hwmod *oh);
189};
190
191/* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
192static struct omap_hwmod_soc_ops soc_ops;
193
169/* omap_hwmod_list contains all registered struct omap_hwmods */ 194/* omap_hwmod_list contains all registered struct omap_hwmods */
170static LIST_HEAD(omap_hwmod_list); 195static LIST_HEAD(omap_hwmod_list);
171 196
@@ -186,6 +211,9 @@ static struct omap_hwmod_link *linkspace;
186 */ 211 */
187static unsigned short free_ls, max_ls, ls_supp; 212static unsigned short free_ls, max_ls, ls_supp;
188 213
214/* inited: set to true once the hwmod code is initialized */
215static bool inited;
216
189/* Private functions */ 217/* Private functions */
190 218
191/** 219/**
@@ -771,23 +799,19 @@ static void _disable_optional_clocks(struct omap_hwmod *oh)
771} 799}
772 800
773/** 801/**
774 * _enable_module - enable CLKCTRL modulemode on OMAP4 802 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
775 * @oh: struct omap_hwmod * 803 * @oh: struct omap_hwmod *
776 * 804 *
777 * Enables the PRCM module mode related to the hwmod @oh. 805 * Enables the PRCM module mode related to the hwmod @oh.
778 * No return value. 806 * No return value.
779 */ 807 */
780static void _enable_module(struct omap_hwmod *oh) 808static void _omap4_enable_module(struct omap_hwmod *oh)
781{ 809{
782 /* The module mode does not exist prior OMAP4 */
783 if (cpu_is_omap24xx() || cpu_is_omap34xx())
784 return;
785
786 if (!oh->clkdm || !oh->prcm.omap4.modulemode) 810 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
787 return; 811 return;
788 812
789 pr_debug("omap_hwmod: %s: _enable_module: %d\n", 813 pr_debug("omap_hwmod: %s: %s: %d\n",
790 oh->name, oh->prcm.omap4.modulemode); 814 oh->name, __func__, oh->prcm.omap4.modulemode);
791 815
792 omap4_cminst_module_enable(oh->prcm.omap4.modulemode, 816 omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
793 oh->clkdm->prcm_partition, 817 oh->clkdm->prcm_partition,
@@ -807,10 +831,7 @@ static void _enable_module(struct omap_hwmod *oh)
807 */ 831 */
808static int _omap4_wait_target_disable(struct omap_hwmod *oh) 832static int _omap4_wait_target_disable(struct omap_hwmod *oh)
809{ 833{
810 if (!cpu_is_omap44xx()) 834 if (!oh || !oh->clkdm)
811 return 0;
812
813 if (!oh)
814 return -EINVAL; 835 return -EINVAL;
815 836
816 if (oh->_int_flags & _HWMOD_NO_MPU_PORT) 837 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
@@ -1285,24 +1306,20 @@ static struct omap_hwmod *_lookup(const char *name)
1285 1306
1286 return oh; 1307 return oh;
1287} 1308}
1309
1288/** 1310/**
1289 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod 1311 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1290 * @oh: struct omap_hwmod * 1312 * @oh: struct omap_hwmod *
1291 * 1313 *
1292 * Convert a clockdomain name stored in a struct omap_hwmod into a 1314 * Convert a clockdomain name stored in a struct omap_hwmod into a
1293 * clockdomain pointer, and save it into the struct omap_hwmod. 1315 * clockdomain pointer, and save it into the struct omap_hwmod.
1294 * return -EINVAL if clkdm_name does not exist or if the lookup failed. 1316 * Return -EINVAL if the clkdm_name lookup failed.
1295 */ 1317 */
1296static int _init_clkdm(struct omap_hwmod *oh) 1318static int _init_clkdm(struct omap_hwmod *oh)
1297{ 1319{
1298 if (cpu_is_omap24xx() || cpu_is_omap34xx()) 1320 if (!oh->clkdm_name)
1299 return 0; 1321 return 0;
1300 1322
1301 if (!oh->clkdm_name) {
1302 pr_warning("omap_hwmod: %s: no clkdm_name\n", oh->name);
1303 return -EINVAL;
1304 }
1305
1306 oh->clkdm = clkdm_lookup(oh->clkdm_name); 1323 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1307 if (!oh->clkdm) { 1324 if (!oh->clkdm) {
1308 pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n", 1325 pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
@@ -1338,7 +1355,8 @@ static int _init_clocks(struct omap_hwmod *oh, void *data)
1338 ret |= _init_main_clk(oh); 1355 ret |= _init_main_clk(oh);
1339 ret |= _init_interface_clks(oh); 1356 ret |= _init_interface_clks(oh);
1340 ret |= _init_opt_clks(oh); 1357 ret |= _init_opt_clks(oh);
1341 ret |= _init_clkdm(oh); 1358 if (soc_ops.init_clkdm)
1359 ret |= soc_ops.init_clkdm(oh);
1342 1360
1343 if (!ret) 1361 if (!ret)
1344 oh->_state = _HWMOD_STATE_CLKS_INITED; 1362 oh->_state = _HWMOD_STATE_CLKS_INITED;
@@ -1349,53 +1367,6 @@ static int _init_clocks(struct omap_hwmod *oh, void *data)
1349} 1367}
1350 1368
1351/** 1369/**
1352 * _wait_target_ready - wait for a module to leave slave idle
1353 * @oh: struct omap_hwmod *
1354 *
1355 * Wait for a module @oh to leave slave idle. Returns 0 if the module
1356 * does not have an IDLEST bit or if the module successfully leaves
1357 * slave idle; otherwise, pass along the return value of the
1358 * appropriate *_cm*_wait_module_ready() function.
1359 */
1360static int _wait_target_ready(struct omap_hwmod *oh)
1361{
1362 struct omap_hwmod_ocp_if *os;
1363 int ret;
1364
1365 if (!oh)
1366 return -EINVAL;
1367
1368 if (oh->flags & HWMOD_NO_IDLEST)
1369 return 0;
1370
1371 os = _find_mpu_rt_port(oh);
1372 if (!os)
1373 return 0;
1374
1375 /* XXX check module SIDLEMODE */
1376
1377 /* XXX check clock enable states */
1378
1379 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1380 ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
1381 oh->prcm.omap2.idlest_reg_id,
1382 oh->prcm.omap2.idlest_idle_bit);
1383 } else if (cpu_is_omap44xx()) {
1384 if (!oh->clkdm)
1385 return -EINVAL;
1386
1387 ret = omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
1388 oh->clkdm->cm_inst,
1389 oh->clkdm->clkdm_offs,
1390 oh->prcm.omap4.clkctrl_offs);
1391 } else {
1392 BUG();
1393 };
1394
1395 return ret;
1396}
1397
1398/**
1399 * _lookup_hardreset - fill register bit info for this hwmod/reset line 1370 * _lookup_hardreset - fill register bit info for this hwmod/reset line
1400 * @oh: struct omap_hwmod * 1371 * @oh: struct omap_hwmod *
1401 * @name: name of the reset line in the context of this hwmod 1372 * @name: name of the reset line in the context of this hwmod
@@ -1431,32 +1402,31 @@ static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1431 * @oh: struct omap_hwmod * 1402 * @oh: struct omap_hwmod *
1432 * @name: name of the reset line to lookup and assert 1403 * @name: name of the reset line to lookup and assert
1433 * 1404 *
1434 * Some IP like dsp, ipu or iva contain processor that require 1405 * Some IP like dsp, ipu or iva contain processor that require an HW
1435 * an HW reset line to be assert / deassert in order to enable fully 1406 * reset line to be assert / deassert in order to enable fully the IP.
1436 * the IP. 1407 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1408 * asserting the hardreset line on the currently-booted SoC, or passes
1409 * along the return value from _lookup_hardreset() or the SoC's
1410 * assert_hardreset code.
1437 */ 1411 */
1438static int _assert_hardreset(struct omap_hwmod *oh, const char *name) 1412static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1439{ 1413{
1440 struct omap_hwmod_rst_info ohri; 1414 struct omap_hwmod_rst_info ohri;
1441 u8 ret; 1415 u8 ret = -EINVAL;
1442 1416
1443 if (!oh) 1417 if (!oh)
1444 return -EINVAL; 1418 return -EINVAL;
1445 1419
1420 if (!soc_ops.assert_hardreset)
1421 return -ENOSYS;
1422
1446 ret = _lookup_hardreset(oh, name, &ohri); 1423 ret = _lookup_hardreset(oh, name, &ohri);
1447 if (IS_ERR_VALUE(ret)) 1424 if (IS_ERR_VALUE(ret))
1448 return ret; 1425 return ret;
1449 1426
1450 if (cpu_is_omap24xx() || cpu_is_omap34xx()) 1427 ret = soc_ops.assert_hardreset(oh, &ohri);
1451 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs, 1428
1452 ohri.rst_shift); 1429 return ret;
1453 else if (cpu_is_omap44xx())
1454 return omap4_prminst_assert_hardreset(ohri.rst_shift,
1455 oh->clkdm->pwrdm.ptr->prcm_partition,
1456 oh->clkdm->pwrdm.ptr->prcm_offs,
1457 oh->prcm.omap4.rstctrl_offs);
1458 else
1459 return -EINVAL;
1460} 1430}
1461 1431
1462/** 1432/**
@@ -1465,38 +1435,29 @@ static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1465 * @oh: struct omap_hwmod * 1435 * @oh: struct omap_hwmod *
1466 * @name: name of the reset line to look up and deassert 1436 * @name: name of the reset line to look up and deassert
1467 * 1437 *
1468 * Some IP like dsp, ipu or iva contain processor that require 1438 * Some IP like dsp, ipu or iva contain processor that require an HW
1469 * an HW reset line to be assert / deassert in order to enable fully 1439 * reset line to be assert / deassert in order to enable fully the IP.
1470 * the IP. 1440 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1441 * deasserting the hardreset line on the currently-booted SoC, or passes
1442 * along the return value from _lookup_hardreset() or the SoC's
1443 * deassert_hardreset code.
1471 */ 1444 */
1472static int _deassert_hardreset(struct omap_hwmod *oh, const char *name) 1445static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1473{ 1446{
1474 struct omap_hwmod_rst_info ohri; 1447 struct omap_hwmod_rst_info ohri;
1475 int ret; 1448 int ret = -EINVAL;
1476 1449
1477 if (!oh) 1450 if (!oh)
1478 return -EINVAL; 1451 return -EINVAL;
1479 1452
1453 if (!soc_ops.deassert_hardreset)
1454 return -ENOSYS;
1455
1480 ret = _lookup_hardreset(oh, name, &ohri); 1456 ret = _lookup_hardreset(oh, name, &ohri);
1481 if (IS_ERR_VALUE(ret)) 1457 if (IS_ERR_VALUE(ret))
1482 return ret; 1458 return ret;
1483 1459
1484 if (cpu_is_omap24xx() || cpu_is_omap34xx()) { 1460 ret = soc_ops.deassert_hardreset(oh, &ohri);
1485 ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
1486 ohri.rst_shift,
1487 ohri.st_shift);
1488 } else if (cpu_is_omap44xx()) {
1489 if (ohri.st_shift)
1490 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
1491 oh->name, name);
1492 ret = omap4_prminst_deassert_hardreset(ohri.rst_shift,
1493 oh->clkdm->pwrdm.ptr->prcm_partition,
1494 oh->clkdm->pwrdm.ptr->prcm_offs,
1495 oh->prcm.omap4.rstctrl_offs);
1496 } else {
1497 return -EINVAL;
1498 }
1499
1500 if (ret == -EBUSY) 1461 if (ret == -EBUSY)
1501 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name); 1462 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1502 1463
@@ -1509,31 +1470,28 @@ static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1509 * @oh: struct omap_hwmod * 1470 * @oh: struct omap_hwmod *
1510 * @name: name of the reset line to look up and read 1471 * @name: name of the reset line to look up and read
1511 * 1472 *
1512 * Return the state of the reset line. 1473 * Return the state of the reset line. Returns -EINVAL if @oh is
1474 * null, -ENOSYS if we have no way of reading the hardreset line
1475 * status on the currently-booted SoC, or passes along the return
1476 * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
1477 * code.
1513 */ 1478 */
1514static int _read_hardreset(struct omap_hwmod *oh, const char *name) 1479static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1515{ 1480{
1516 struct omap_hwmod_rst_info ohri; 1481 struct omap_hwmod_rst_info ohri;
1517 u8 ret; 1482 u8 ret = -EINVAL;
1518 1483
1519 if (!oh) 1484 if (!oh)
1520 return -EINVAL; 1485 return -EINVAL;
1521 1486
1487 if (!soc_ops.is_hardreset_asserted)
1488 return -ENOSYS;
1489
1522 ret = _lookup_hardreset(oh, name, &ohri); 1490 ret = _lookup_hardreset(oh, name, &ohri);
1523 if (IS_ERR_VALUE(ret)) 1491 if (IS_ERR_VALUE(ret))
1524 return ret; 1492 return ret;
1525 1493
1526 if (cpu_is_omap24xx() || cpu_is_omap34xx()) { 1494 return soc_ops.is_hardreset_asserted(oh, &ohri);
1527 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
1528 ohri.st_shift);
1529 } else if (cpu_is_omap44xx()) {
1530 return omap4_prminst_is_hardreset_asserted(ohri.rst_shift,
1531 oh->clkdm->pwrdm.ptr->prcm_partition,
1532 oh->clkdm->pwrdm.ptr->prcm_offs,
1533 oh->prcm.omap4.rstctrl_offs);
1534 } else {
1535 return -EINVAL;
1536 }
1537} 1495}
1538 1496
1539/** 1497/**
@@ -1571,10 +1529,6 @@ static int _omap4_disable_module(struct omap_hwmod *oh)
1571{ 1529{
1572 int v; 1530 int v;
1573 1531
1574 /* The module mode does not exist prior OMAP4 */
1575 if (!cpu_is_omap44xx())
1576 return -EINVAL;
1577
1578 if (!oh->clkdm || !oh->prcm.omap4.modulemode) 1532 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1579 return -EINVAL; 1533 return -EINVAL;
1580 1534
@@ -1814,9 +1768,11 @@ static int _enable(struct omap_hwmod *oh)
1814 } 1768 }
1815 1769
1816 _enable_clocks(oh); 1770 _enable_clocks(oh);
1817 _enable_module(oh); 1771 if (soc_ops.enable_module)
1772 soc_ops.enable_module(oh);
1818 1773
1819 r = _wait_target_ready(oh); 1774 r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
1775 -EINVAL;
1820 if (!r) { 1776 if (!r) {
1821 /* 1777 /*
1822 * Set the clockdomain to HW_AUTO only if the target is ready, 1778 * Set the clockdomain to HW_AUTO only if the target is ready,
@@ -1870,7 +1826,8 @@ static int _idle(struct omap_hwmod *oh)
1870 _idle_sysc(oh); 1826 _idle_sysc(oh);
1871 _del_initiator_dep(oh, mpu_oh); 1827 _del_initiator_dep(oh, mpu_oh);
1872 1828
1873 _omap4_disable_module(oh); 1829 if (soc_ops.disable_module)
1830 soc_ops.disable_module(oh);
1874 1831
1875 /* 1832 /*
1876 * The module must be in idle mode before disabling any parents 1833 * The module must be in idle mode before disabling any parents
@@ -1975,7 +1932,8 @@ static int _shutdown(struct omap_hwmod *oh)
1975 if (oh->_state == _HWMOD_STATE_ENABLED) { 1932 if (oh->_state == _HWMOD_STATE_ENABLED) {
1976 _del_initiator_dep(oh, mpu_oh); 1933 _del_initiator_dep(oh, mpu_oh);
1977 /* XXX what about the other system initiators here? dma, dsp */ 1934 /* XXX what about the other system initiators here? dma, dsp */
1978 _omap4_disable_module(oh); 1935 if (soc_ops.disable_module)
1936 soc_ops.disable_module(oh);
1979 _disable_clocks(oh); 1937 _disable_clocks(oh);
1980 if (oh->clkdm) 1938 if (oh->clkdm)
1981 clkdm_hwmod_disable(oh->clkdm, oh); 1939 clkdm_hwmod_disable(oh->clkdm, oh);
@@ -2431,6 +2389,194 @@ static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
2431 return 0; 2389 return 0;
2432} 2390}
2433 2391
2392/* Static functions intended only for use in soc_ops field function pointers */
2393
2394/**
2395 * _omap2_wait_target_ready - wait for a module to leave slave idle
2396 * @oh: struct omap_hwmod *
2397 *
2398 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2399 * does not have an IDLEST bit or if the module successfully leaves
2400 * slave idle; otherwise, pass along the return value of the
2401 * appropriate *_cm*_wait_module_ready() function.
2402 */
2403static int _omap2_wait_target_ready(struct omap_hwmod *oh)
2404{
2405 if (!oh)
2406 return -EINVAL;
2407
2408 if (oh->flags & HWMOD_NO_IDLEST)
2409 return 0;
2410
2411 if (!_find_mpu_rt_port(oh))
2412 return 0;
2413
2414 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2415
2416 return omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
2417 oh->prcm.omap2.idlest_reg_id,
2418 oh->prcm.omap2.idlest_idle_bit);
2419}
2420
2421/**
2422 * _omap4_wait_target_ready - wait for a module to leave slave idle
2423 * @oh: struct omap_hwmod *
2424 *
2425 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2426 * does not have an IDLEST bit or if the module successfully leaves
2427 * slave idle; otherwise, pass along the return value of the
2428 * appropriate *_cm*_wait_module_ready() function.
2429 */
2430static int _omap4_wait_target_ready(struct omap_hwmod *oh)
2431{
2432 if (!oh || !oh->clkdm)
2433 return -EINVAL;
2434
2435 if (oh->flags & HWMOD_NO_IDLEST)
2436 return 0;
2437
2438 if (!_find_mpu_rt_port(oh))
2439 return 0;
2440
2441 /* XXX check module SIDLEMODE, hardreset status */
2442
2443 return omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
2444 oh->clkdm->cm_inst,
2445 oh->clkdm->clkdm_offs,
2446 oh->prcm.omap4.clkctrl_offs);
2447}
2448
2449/**
2450 * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2451 * @oh: struct omap_hwmod * to assert hardreset
2452 * @ohri: hardreset line data
2453 *
2454 * Call omap2_prm_assert_hardreset() with parameters extracted from
2455 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2456 * use as an soc_ops function pointer. Passes along the return value
2457 * from omap2_prm_assert_hardreset(). XXX This function is scheduled
2458 * for removal when the PRM code is moved into drivers/.
2459 */
2460static int _omap2_assert_hardreset(struct omap_hwmod *oh,
2461 struct omap_hwmod_rst_info *ohri)
2462{
2463 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
2464 ohri->rst_shift);
2465}
2466
2467/**
2468 * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2469 * @oh: struct omap_hwmod * to deassert hardreset
2470 * @ohri: hardreset line data
2471 *
2472 * Call omap2_prm_deassert_hardreset() with parameters extracted from
2473 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2474 * use as an soc_ops function pointer. Passes along the return value
2475 * from omap2_prm_deassert_hardreset(). XXX This function is
2476 * scheduled for removal when the PRM code is moved into drivers/.
2477 */
2478static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
2479 struct omap_hwmod_rst_info *ohri)
2480{
2481 return omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
2482 ohri->rst_shift,
2483 ohri->st_shift);
2484}
2485
2486/**
2487 * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
2488 * @oh: struct omap_hwmod * to test hardreset
2489 * @ohri: hardreset line data
2490 *
2491 * Call omap2_prm_is_hardreset_asserted() with parameters extracted
2492 * from the hwmod @oh and the hardreset line data @ohri. Only
2493 * intended for use as an soc_ops function pointer. Passes along the
2494 * return value from omap2_prm_is_hardreset_asserted(). XXX This
2495 * function is scheduled for removal when the PRM code is moved into
2496 * drivers/.
2497 */
2498static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
2499 struct omap_hwmod_rst_info *ohri)
2500{
2501 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
2502 ohri->st_shift);
2503}
2504
2505/**
2506 * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2507 * @oh: struct omap_hwmod * to assert hardreset
2508 * @ohri: hardreset line data
2509 *
2510 * Call omap4_prminst_assert_hardreset() with parameters extracted
2511 * from the hwmod @oh and the hardreset line data @ohri. Only
2512 * intended for use as an soc_ops function pointer. Passes along the
2513 * return value from omap4_prminst_assert_hardreset(). XXX This
2514 * function is scheduled for removal when the PRM code is moved into
2515 * drivers/.
2516 */
2517static int _omap4_assert_hardreset(struct omap_hwmod *oh,
2518 struct omap_hwmod_rst_info *ohri)
2519{
2520 if (!oh->clkdm)
2521 return -EINVAL;
2522
2523 return omap4_prminst_assert_hardreset(ohri->rst_shift,
2524 oh->clkdm->pwrdm.ptr->prcm_partition,
2525 oh->clkdm->pwrdm.ptr->prcm_offs,
2526 oh->prcm.omap4.rstctrl_offs);
2527}
2528
2529/**
2530 * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2531 * @oh: struct omap_hwmod * to deassert hardreset
2532 * @ohri: hardreset line data
2533 *
2534 * Call omap4_prminst_deassert_hardreset() with parameters extracted
2535 * from the hwmod @oh and the hardreset line data @ohri. Only
2536 * intended for use as an soc_ops function pointer. Passes along the
2537 * return value from omap4_prminst_deassert_hardreset(). XXX This
2538 * function is scheduled for removal when the PRM code is moved into
2539 * drivers/.
2540 */
2541static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
2542 struct omap_hwmod_rst_info *ohri)
2543{
2544 if (!oh->clkdm)
2545 return -EINVAL;
2546
2547 if (ohri->st_shift)
2548 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
2549 oh->name, ohri->name);
2550 return omap4_prminst_deassert_hardreset(ohri->rst_shift,
2551 oh->clkdm->pwrdm.ptr->prcm_partition,
2552 oh->clkdm->pwrdm.ptr->prcm_offs,
2553 oh->prcm.omap4.rstctrl_offs);
2554}
2555
2556/**
2557 * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
2558 * @oh: struct omap_hwmod * to test hardreset
2559 * @ohri: hardreset line data
2560 *
2561 * Call omap4_prminst_is_hardreset_asserted() with parameters
2562 * extracted from the hwmod @oh and the hardreset line data @ohri.
2563 * Only intended for use as an soc_ops function pointer. Passes along
2564 * the return value from omap4_prminst_is_hardreset_asserted(). XXX
2565 * This function is scheduled for removal when the PRM code is moved
2566 * into drivers/.
2567 */
2568static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
2569 struct omap_hwmod_rst_info *ohri)
2570{
2571 if (!oh->clkdm)
2572 return -EINVAL;
2573
2574 return omap4_prminst_is_hardreset_asserted(ohri->rst_shift,
2575 oh->clkdm->pwrdm.ptr->prcm_partition,
2576 oh->clkdm->pwrdm.ptr->prcm_offs,
2577 oh->prcm.omap4.rstctrl_offs);
2578}
2579
2434/* Public functions */ 2580/* Public functions */
2435 2581
2436u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs) 2582u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
@@ -2563,12 +2709,18 @@ int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
2563 * 2709 *
2564 * Intended to be called early in boot before the clock framework is 2710 * Intended to be called early in boot before the clock framework is
2565 * initialized. If @ois is not null, will register all omap_hwmods 2711 * initialized. If @ois is not null, will register all omap_hwmods
2566 * listed in @ois that are valid for this chip. Returns 0. 2712 * listed in @ois that are valid for this chip. Returns -EINVAL if
2713 * omap_hwmod_init() hasn't been called before calling this function,
2714 * -ENOMEM if the link memory area can't be allocated, or 0 upon
2715 * success.
2567 */ 2716 */
2568int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois) 2717int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
2569{ 2718{
2570 int r, i; 2719 int r, i;
2571 2720
2721 if (!inited)
2722 return -EINVAL;
2723
2572 if (!ois) 2724 if (!ois)
2573 return 0; 2725 return 0;
2574 2726
@@ -3401,3 +3553,32 @@ int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
3401 3553
3402 return 0; 3554 return 0;
3403} 3555}
3556
3557/**
3558 * omap_hwmod_init - initialize the hwmod code
3559 *
3560 * Sets up some function pointers needed by the hwmod code to operate on the
3561 * currently-booted SoC. Intended to be called once during kernel init
3562 * before any hwmods are registered. No return value.
3563 */
3564void __init omap_hwmod_init(void)
3565{
3566 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
3567 soc_ops.wait_target_ready = _omap2_wait_target_ready;
3568 soc_ops.assert_hardreset = _omap2_assert_hardreset;
3569 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
3570 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
3571 } else if (cpu_is_omap44xx()) {
3572 soc_ops.enable_module = _omap4_enable_module;
3573 soc_ops.disable_module = _omap4_disable_module;
3574 soc_ops.wait_target_ready = _omap4_wait_target_ready;
3575 soc_ops.assert_hardreset = _omap4_assert_hardreset;
3576 soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
3577 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
3578 soc_ops.init_clkdm = _init_clkdm;
3579 } else {
3580 WARN(1, "omap_hwmod: unknown SoC type\n");
3581 }
3582
3583 inited = true;
3584}
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index a7640d1b215e..50cfab61b0e2 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -192,6 +192,11 @@ static struct omap_hwmod_class omap2420_mcbsp_hwmod_class = {
192 .name = "mcbsp", 192 .name = "mcbsp",
193}; 193};
194 194
195static struct omap_hwmod_opt_clk mcbsp_opt_clks[] = {
196 { .role = "pad_fck", .clk = "mcbsp_clks" },
197 { .role = "prcm_fck", .clk = "func_96m_ck" },
198};
199
195/* mcbsp1 */ 200/* mcbsp1 */
196static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = { 201static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = {
197 { .name = "tx", .irq = 59 }, 202 { .name = "tx", .irq = 59 },
@@ -214,6 +219,8 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = {
214 .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT, 219 .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT,
215 }, 220 },
216 }, 221 },
222 .opt_clks = mcbsp_opt_clks,
223 .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks),
217}; 224};
218 225
219/* mcbsp2 */ 226/* mcbsp2 */
@@ -238,6 +245,8 @@ static struct omap_hwmod omap2420_mcbsp2_hwmod = {
238 .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT, 245 .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT,
239 }, 246 },
240 }, 247 },
248 .opt_clks = mcbsp_opt_clks,
249 .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks),
241}; 250};
242 251
243static struct omap_hwmod_class_sysconfig omap2420_msdi_sysc = { 252static struct omap_hwmod_class_sysconfig omap2420_msdi_sysc = {
@@ -585,5 +594,6 @@ static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = {
585 594
586int __init omap2420_hwmod_init(void) 595int __init omap2420_hwmod_init(void)
587{ 596{
597 omap_hwmod_init();
588 return omap_hwmod_register_links(omap2420_hwmod_ocp_ifs); 598 return omap_hwmod_register_links(omap2420_hwmod_ocp_ifs);
589} 599}
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index 4d7264981230..58b5bc196d32 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -296,6 +296,11 @@ static struct omap_hwmod_class omap2430_mcbsp_hwmod_class = {
296 .rev = MCBSP_CONFIG_TYPE2, 296 .rev = MCBSP_CONFIG_TYPE2,
297}; 297};
298 298
299static struct omap_hwmod_opt_clk mcbsp_opt_clks[] = {
300 { .role = "pad_fck", .clk = "mcbsp_clks" },
301 { .role = "prcm_fck", .clk = "func_96m_ck" },
302};
303
299/* mcbsp1 */ 304/* mcbsp1 */
300static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = { 305static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = {
301 { .name = "tx", .irq = 59 }, 306 { .name = "tx", .irq = 59 },
@@ -320,6 +325,8 @@ static struct omap_hwmod omap2430_mcbsp1_hwmod = {
320 .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT, 325 .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT,
321 }, 326 },
322 }, 327 },
328 .opt_clks = mcbsp_opt_clks,
329 .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks),
323}; 330};
324 331
325/* mcbsp2 */ 332/* mcbsp2 */
@@ -345,6 +352,8 @@ static struct omap_hwmod omap2430_mcbsp2_hwmod = {
345 .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT, 352 .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT,
346 }, 353 },
347 }, 354 },
355 .opt_clks = mcbsp_opt_clks,
356 .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks),
348}; 357};
349 358
350/* mcbsp3 */ 359/* mcbsp3 */
@@ -370,6 +379,8 @@ static struct omap_hwmod omap2430_mcbsp3_hwmod = {
370 .idlest_idle_bit = OMAP2430_ST_MCBSP3_SHIFT, 379 .idlest_idle_bit = OMAP2430_ST_MCBSP3_SHIFT,
371 }, 380 },
372 }, 381 },
382 .opt_clks = mcbsp_opt_clks,
383 .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks),
373}; 384};
374 385
375/* mcbsp4 */ 386/* mcbsp4 */
@@ -401,6 +412,8 @@ static struct omap_hwmod omap2430_mcbsp4_hwmod = {
401 .idlest_idle_bit = OMAP2430_ST_MCBSP4_SHIFT, 412 .idlest_idle_bit = OMAP2430_ST_MCBSP4_SHIFT,
402 }, 413 },
403 }, 414 },
415 .opt_clks = mcbsp_opt_clks,
416 .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks),
404}; 417};
405 418
406/* mcbsp5 */ 419/* mcbsp5 */
@@ -432,6 +445,8 @@ static struct omap_hwmod omap2430_mcbsp5_hwmod = {
432 .idlest_idle_bit = OMAP2430_ST_MCBSP5_SHIFT, 445 .idlest_idle_bit = OMAP2430_ST_MCBSP5_SHIFT,
433 }, 446 },
434 }, 447 },
448 .opt_clks = mcbsp_opt_clks,
449 .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks),
435}; 450};
436 451
437/* MMC/SD/SDIO common */ 452/* MMC/SD/SDIO common */
@@ -938,5 +953,6 @@ static struct omap_hwmod_ocp_if *omap2430_hwmod_ocp_ifs[] __initdata = {
938 953
939int __init omap2430_hwmod_init(void) 954int __init omap2430_hwmod_init(void)
940{ 955{
956 omap_hwmod_init();
941 return omap_hwmod_register_links(omap2430_hwmod_ocp_ifs); 957 return omap_hwmod_register_links(omap2430_hwmod_ocp_ifs);
942} 958}
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index b26d3c9bca16..8379b8d7244a 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -1074,6 +1074,17 @@ static struct omap_hwmod_class omap3xxx_mcbsp_hwmod_class = {
1074 .rev = MCBSP_CONFIG_TYPE3, 1074 .rev = MCBSP_CONFIG_TYPE3,
1075}; 1075};
1076 1076
1077/* McBSP functional clock mapping */
1078static struct omap_hwmod_opt_clk mcbsp15_opt_clks[] = {
1079 { .role = "pad_fck", .clk = "mcbsp_clks" },
1080 { .role = "prcm_fck", .clk = "core_96m_fck" },
1081};
1082
1083static struct omap_hwmod_opt_clk mcbsp234_opt_clks[] = {
1084 { .role = "pad_fck", .clk = "mcbsp_clks" },
1085 { .role = "prcm_fck", .clk = "per_96m_fck" },
1086};
1087
1077/* mcbsp1 */ 1088/* mcbsp1 */
1078static struct omap_hwmod_irq_info omap3xxx_mcbsp1_irqs[] = { 1089static struct omap_hwmod_irq_info omap3xxx_mcbsp1_irqs[] = {
1079 { .name = "common", .irq = 16 }, 1090 { .name = "common", .irq = 16 },
@@ -1097,6 +1108,8 @@ static struct omap_hwmod omap3xxx_mcbsp1_hwmod = {
1097 .idlest_idle_bit = OMAP3430_ST_MCBSP1_SHIFT, 1108 .idlest_idle_bit = OMAP3430_ST_MCBSP1_SHIFT,
1098 }, 1109 },
1099 }, 1110 },
1111 .opt_clks = mcbsp15_opt_clks,
1112 .opt_clks_cnt = ARRAY_SIZE(mcbsp15_opt_clks),
1100}; 1113};
1101 1114
1102/* mcbsp2 */ 1115/* mcbsp2 */
@@ -1126,6 +1139,8 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = {
1126 .idlest_idle_bit = OMAP3430_ST_MCBSP2_SHIFT, 1139 .idlest_idle_bit = OMAP3430_ST_MCBSP2_SHIFT,
1127 }, 1140 },
1128 }, 1141 },
1142 .opt_clks = mcbsp234_opt_clks,
1143 .opt_clks_cnt = ARRAY_SIZE(mcbsp234_opt_clks),
1129 .dev_attr = &omap34xx_mcbsp2_dev_attr, 1144 .dev_attr = &omap34xx_mcbsp2_dev_attr,
1130}; 1145};
1131 1146
@@ -1156,6 +1171,8 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = {
1156 .idlest_idle_bit = OMAP3430_ST_MCBSP3_SHIFT, 1171 .idlest_idle_bit = OMAP3430_ST_MCBSP3_SHIFT,
1157 }, 1172 },
1158 }, 1173 },
1174 .opt_clks = mcbsp234_opt_clks,
1175 .opt_clks_cnt = ARRAY_SIZE(mcbsp234_opt_clks),
1159 .dev_attr = &omap34xx_mcbsp3_dev_attr, 1176 .dev_attr = &omap34xx_mcbsp3_dev_attr,
1160}; 1177};
1161 1178
@@ -1188,6 +1205,8 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod = {
1188 .idlest_idle_bit = OMAP3430_ST_MCBSP4_SHIFT, 1205 .idlest_idle_bit = OMAP3430_ST_MCBSP4_SHIFT,
1189 }, 1206 },
1190 }, 1207 },
1208 .opt_clks = mcbsp234_opt_clks,
1209 .opt_clks_cnt = ARRAY_SIZE(mcbsp234_opt_clks),
1191}; 1210};
1192 1211
1193/* mcbsp5 */ 1212/* mcbsp5 */
@@ -1219,6 +1238,8 @@ static struct omap_hwmod omap3xxx_mcbsp5_hwmod = {
1219 .idlest_idle_bit = OMAP3430_ST_MCBSP5_SHIFT, 1238 .idlest_idle_bit = OMAP3430_ST_MCBSP5_SHIFT,
1220 }, 1239 },
1221 }, 1240 },
1241 .opt_clks = mcbsp15_opt_clks,
1242 .opt_clks_cnt = ARRAY_SIZE(mcbsp15_opt_clks),
1222}; 1243};
1223 1244
1224/* 'mcbsp sidetone' class */ 1245/* 'mcbsp sidetone' class */
@@ -3283,6 +3304,8 @@ int __init omap3xxx_hwmod_init(void)
3283 struct omap_hwmod_ocp_if **h = NULL; 3304 struct omap_hwmod_ocp_if **h = NULL;
3284 unsigned int rev; 3305 unsigned int rev;
3285 3306
3307 omap_hwmod_init();
3308
3286 /* Register hwmod links common to all OMAP3 */ 3309 /* Register hwmod links common to all OMAP3 */
3287 r = omap_hwmod_register_links(omap3xxx_hwmod_ocp_ifs); 3310 r = omap_hwmod_register_links(omap3xxx_hwmod_ocp_ifs);
3288 if (r < 0) 3311 if (r < 0)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index f30e861ce6d9..d055b4725679 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -2544,14 +2544,12 @@ static struct omap_hwmod omap44xx_prcm_mpu_hwmod = {
2544static struct omap_hwmod omap44xx_cm_core_aon_hwmod = { 2544static struct omap_hwmod omap44xx_cm_core_aon_hwmod = {
2545 .name = "cm_core_aon", 2545 .name = "cm_core_aon",
2546 .class = &omap44xx_prcm_hwmod_class, 2546 .class = &omap44xx_prcm_hwmod_class,
2547 .clkdm_name = "cm_clkdm",
2548}; 2547};
2549 2548
2550/* cm_core */ 2549/* cm_core */
2551static struct omap_hwmod omap44xx_cm_core_hwmod = { 2550static struct omap_hwmod omap44xx_cm_core_hwmod = {
2552 .name = "cm_core", 2551 .name = "cm_core",
2553 .class = &omap44xx_prcm_hwmod_class, 2552 .class = &omap44xx_prcm_hwmod_class,
2554 .clkdm_name = "cm_clkdm",
2555}; 2553};
2556 2554
2557/* prm */ 2555/* prm */
@@ -2568,7 +2566,6 @@ static struct omap_hwmod_rst_info omap44xx_prm_resets[] = {
2568static struct omap_hwmod omap44xx_prm_hwmod = { 2566static struct omap_hwmod omap44xx_prm_hwmod = {
2569 .name = "prm", 2567 .name = "prm",
2570 .class = &omap44xx_prcm_hwmod_class, 2568 .class = &omap44xx_prcm_hwmod_class,
2571 .clkdm_name = "prm_clkdm",
2572 .mpu_irqs = omap44xx_prm_irqs, 2569 .mpu_irqs = omap44xx_prm_irqs,
2573 .rst_lines = omap44xx_prm_resets, 2570 .rst_lines = omap44xx_prm_resets,
2574 .rst_lines_cnt = ARRAY_SIZE(omap44xx_prm_resets), 2571 .rst_lines_cnt = ARRAY_SIZE(omap44xx_prm_resets),
@@ -6148,6 +6145,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
6148 6145
6149int __init omap44xx_hwmod_init(void) 6146int __init omap44xx_hwmod_init(void)
6150{ 6147{
6148 omap_hwmod_init();
6151 return omap_hwmod_register_links(omap44xx_hwmod_ocp_ifs); 6149 return omap_hwmod_register_links(omap44xx_hwmod_ocp_ifs);
6152} 6150}
6153 6151
diff --git a/arch/arm/mach-omap2/usb-fs.c b/arch/arm/mach-omap2/usb-fs.c
deleted file mode 100644
index 1481078763b8..000000000000
--- a/arch/arm/mach-omap2/usb-fs.c
+++ /dev/null
@@ -1,359 +0,0 @@
1/*
2 * Platform level USB initialization for FS USB OTG controller on omap1 and 24xx
3 *
4 * Copyright (C) 2004 Texas Instruments, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#include <linux/module.h>
22#include <linux/kernel.h>
23#include <linux/types.h>
24#include <linux/errno.h>
25#include <linux/init.h>
26#include <linux/platform_device.h>
27#include <linux/clk.h>
28#include <linux/err.h>
29
30#include <asm/irq.h>
31
32#include <plat/usb.h>
33#include <plat/board.h>
34
35#include "control.h"
36#include "mux.h"
37
38#define INT_USB_IRQ_GEN INT_24XX_USB_IRQ_GEN
39#define INT_USB_IRQ_NISO INT_24XX_USB_IRQ_NISO
40#define INT_USB_IRQ_ISO INT_24XX_USB_IRQ_ISO
41#define INT_USB_IRQ_HGEN INT_24XX_USB_IRQ_HGEN
42#define INT_USB_IRQ_OTG INT_24XX_USB_IRQ_OTG
43
44#if defined(CONFIG_ARCH_OMAP2)
45
46#ifdef CONFIG_USB_GADGET_OMAP
47
48static struct resource udc_resources[] = {
49 /* order is significant! */
50 { /* registers */
51 .start = UDC_BASE,
52 .end = UDC_BASE + 0xff,
53 .flags = IORESOURCE_MEM,
54 }, { /* general IRQ */
55 .start = INT_USB_IRQ_GEN,
56 .flags = IORESOURCE_IRQ,
57 }, { /* PIO IRQ */
58 .start = INT_USB_IRQ_NISO,
59 .flags = IORESOURCE_IRQ,
60 }, { /* SOF IRQ */
61 .start = INT_USB_IRQ_ISO,
62 .flags = IORESOURCE_IRQ,
63 },
64};
65
66static u64 udc_dmamask = ~(u32)0;
67
68static struct platform_device udc_device = {
69 .name = "omap_udc",
70 .id = -1,
71 .dev = {
72 .dma_mask = &udc_dmamask,
73 .coherent_dma_mask = 0xffffffff,
74 },
75 .num_resources = ARRAY_SIZE(udc_resources),
76 .resource = udc_resources,
77};
78
79static inline void udc_device_init(struct omap_usb_config *pdata)
80{
81 pdata->udc_device = &udc_device;
82}
83
84#else
85
86static inline void udc_device_init(struct omap_usb_config *pdata)
87{
88}
89
90#endif
91
92#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
93
94/* The dmamask must be set for OHCI to work */
95static u64 ohci_dmamask = ~(u32)0;
96
97static struct resource ohci_resources[] = {
98 {
99 .start = OMAP_OHCI_BASE,
100 .end = OMAP_OHCI_BASE + 0xff,
101 .flags = IORESOURCE_MEM,
102 },
103 {
104 .start = INT_USB_IRQ_HGEN,
105 .flags = IORESOURCE_IRQ,
106 },
107};
108
109static struct platform_device ohci_device = {
110 .name = "ohci",
111 .id = -1,
112 .dev = {
113 .dma_mask = &ohci_dmamask,
114 .coherent_dma_mask = 0xffffffff,
115 },
116 .num_resources = ARRAY_SIZE(ohci_resources),
117 .resource = ohci_resources,
118};
119
120static inline void ohci_device_init(struct omap_usb_config *pdata)
121{
122 pdata->ohci_device = &ohci_device;
123}
124
125#else
126
127static inline void ohci_device_init(struct omap_usb_config *pdata)
128{
129}
130
131#endif
132
133#if defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG)
134
135static struct resource otg_resources[] = {
136 /* order is significant! */
137 {
138 .start = OTG_BASE,
139 .end = OTG_BASE + 0xff,
140 .flags = IORESOURCE_MEM,
141 }, {
142 .start = INT_USB_IRQ_OTG,
143 .flags = IORESOURCE_IRQ,
144 },
145};
146
147static struct platform_device otg_device = {
148 .name = "omap_otg",
149 .id = -1,
150 .num_resources = ARRAY_SIZE(otg_resources),
151 .resource = otg_resources,
152};
153
154static inline void otg_device_init(struct omap_usb_config *pdata)
155{
156 pdata->otg_device = &otg_device;
157}
158
159#else
160
161static inline void otg_device_init(struct omap_usb_config *pdata)
162{
163}
164
165#endif
166
167static void omap2_usb_devconf_clear(u8 port, u32 mask)
168{
169 u32 r;
170
171 r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
172 r &= ~USBTXWRMODEI(port, mask);
173 omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
174}
175
176static void omap2_usb_devconf_set(u8 port, u32 mask)
177{
178 u32 r;
179
180 r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
181 r |= USBTXWRMODEI(port, mask);
182 omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
183}
184
185static void omap2_usb2_disable_5pinbitll(void)
186{
187 u32 r;
188
189 r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
190 r &= ~(USBTXWRMODEI(2, USB_BIDIR_TLL) | USBT2TLL5PI);
191 omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
192}
193
194static void omap2_usb2_enable_5pinunitll(void)
195{
196 u32 r;
197
198 r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
199 r |= USBTXWRMODEI(2, USB_UNIDIR_TLL) | USBT2TLL5PI;
200 omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
201}
202
203static u32 __init omap2_usb0_init(unsigned nwires, unsigned is_device)
204{
205 u32 syscon1 = 0;
206
207 omap2_usb_devconf_clear(0, USB_BIDIR_TLL);
208
209 if (nwires == 0)
210 return 0;
211
212 if (is_device)
213 omap_mux_init_signal("usb0_puen", 0);
214
215 omap_mux_init_signal("usb0_dat", 0);
216 omap_mux_init_signal("usb0_txen", 0);
217 omap_mux_init_signal("usb0_se0", 0);
218 if (nwires != 3)
219 omap_mux_init_signal("usb0_rcv", 0);
220
221 switch (nwires) {
222 case 3:
223 syscon1 = 2;
224 omap2_usb_devconf_set(0, USB_BIDIR);
225 break;
226 case 4:
227 syscon1 = 1;
228 omap2_usb_devconf_set(0, USB_BIDIR);
229 break;
230 case 6:
231 syscon1 = 3;
232 omap_mux_init_signal("usb0_vp", 0);
233 omap_mux_init_signal("usb0_vm", 0);
234 omap2_usb_devconf_set(0, USB_UNIDIR);
235 break;
236 default:
237 printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
238 0, nwires);
239 }
240
241 return syscon1 << 16;
242}
243
244static u32 __init omap2_usb1_init(unsigned nwires)
245{
246 u32 syscon1 = 0;
247
248 omap2_usb_devconf_clear(1, USB_BIDIR_TLL);
249
250 if (nwires == 0)
251 return 0;
252
253 /* NOTE: board-specific code must set up pin muxing for usb1,
254 * since each signal could come out on either of two balls.
255 */
256
257 switch (nwires) {
258 case 2:
259 /* NOTE: board-specific code must override this setting if
260 * this TLL link is not using DP/DM
261 */
262 syscon1 = 1;
263 omap2_usb_devconf_set(1, USB_BIDIR_TLL);
264 break;
265 case 3:
266 syscon1 = 2;
267 omap2_usb_devconf_set(1, USB_BIDIR);
268 break;
269 case 4:
270 syscon1 = 1;
271 omap2_usb_devconf_set(1, USB_BIDIR);
272 break;
273 case 6:
274 default:
275 printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
276 1, nwires);
277 }
278
279 return syscon1 << 20;
280}
281
282static u32 __init omap2_usb2_init(unsigned nwires, unsigned alt_pingroup)
283{
284 u32 syscon1 = 0;
285
286 omap2_usb2_disable_5pinbitll();
287 alt_pingroup = 0;
288
289 /* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */
290 if (alt_pingroup || nwires == 0)
291 return 0;
292
293 omap_mux_init_signal("usb2_dat", 0);
294 omap_mux_init_signal("usb2_se0", 0);
295 if (nwires > 2)
296 omap_mux_init_signal("usb2_txen", 0);
297 if (nwires > 3)
298 omap_mux_init_signal("usb2_rcv", 0);
299
300 switch (nwires) {
301 case 2:
302 /* NOTE: board-specific code must override this setting if
303 * this TLL link is not using DP/DM
304 */
305 syscon1 = 1;
306 omap2_usb_devconf_set(2, USB_BIDIR_TLL);
307 break;
308 case 3:
309 syscon1 = 2;
310 omap2_usb_devconf_set(2, USB_BIDIR);
311 break;
312 case 4:
313 syscon1 = 1;
314 omap2_usb_devconf_set(2, USB_BIDIR);
315 break;
316 case 5:
317 /* NOTE: board-specific code must mux this setting depending
318 * on TLL link using DP/DM. Something must also
319 * set up OTG_SYSCON2.HMC_TLL{ATTACH,SPEED}
320 * 2420: hdq_sio.usb2_tllse0 or vlynq_rx0.usb2_tllse0
321 * 2430: hdq_sio.usb2_tllse0 or sdmmc2_dat0.usb2_tllse0
322 */
323
324 syscon1 = 3;
325 omap2_usb2_enable_5pinunitll();
326 break;
327 case 6:
328 default:
329 printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
330 2, nwires);
331 }
332
333 return syscon1 << 24;
334}
335
336void __init omap2_usbfs_init(struct omap_usb_config *pdata)
337{
338 struct clk *ick;
339
340 if (!cpu_is_omap24xx())
341 return;
342
343 ick = clk_get(NULL, "usb_l4_ick");
344 if (IS_ERR(ick))
345 return;
346
347 clk_enable(ick);
348 pdata->usb0_init = omap2_usb0_init;
349 pdata->usb1_init = omap2_usb1_init;
350 pdata->usb2_init = omap2_usb2_init;
351 udc_device_init(pdata);
352 ohci_device_init(pdata);
353 otg_device_init(pdata);
354 omap_otg_init(pdata);
355 clk_disable(ick);
356 clk_put(ick);
357}
358
359#endif
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
index ed8605f01155..6d87532871cd 100644
--- a/arch/arm/plat-omap/Makefile
+++ b/arch/arm/plat-omap/Makefile
@@ -4,7 +4,7 @@
4 4
5# Common support 5# Common support
6obj-y := common.o sram.o clock.o devices.o dma.o mux.o \ 6obj-y := common.o sram.o clock.o devices.o dma.o mux.o \
7 usb.o fb.o counter_32k.o 7 fb.o counter_32k.o
8obj-m := 8obj-m :=
9obj-n := 9obj-n :=
10obj- := 10obj- :=
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index cb16ade437cb..7fe626761e53 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -573,22 +573,25 @@ EXPORT_SYMBOL(omap_set_dma_dest_burst_mode);
573 573
574static inline void omap_enable_channel_irq(int lch) 574static inline void omap_enable_channel_irq(int lch)
575{ 575{
576 u32 status;
577
578 /* Clear CSR */ 576 /* Clear CSR */
579 if (cpu_class_is_omap1()) 577 if (cpu_class_is_omap1())
580 status = p->dma_read(CSR, lch); 578 p->dma_read(CSR, lch);
581 else if (cpu_class_is_omap2()) 579 else
582 p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch); 580 p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch);
583 581
584 /* Enable some nice interrupts. */ 582 /* Enable some nice interrupts. */
585 p->dma_write(dma_chan[lch].enabled_irqs, CICR, lch); 583 p->dma_write(dma_chan[lch].enabled_irqs, CICR, lch);
586} 584}
587 585
588static void omap_disable_channel_irq(int lch) 586static inline void omap_disable_channel_irq(int lch)
589{ 587{
590 if (cpu_class_is_omap2()) 588 /* disable channel interrupts */
591 p->dma_write(0, CICR, lch); 589 p->dma_write(0, CICR, lch);
590 /* Clear CSR */
591 if (cpu_class_is_omap1())
592 p->dma_read(CSR, lch);
593 else
594 p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch);
592} 595}
593 596
594void omap_enable_dma_irq(int lch, u16 bits) 597void omap_enable_dma_irq(int lch, u16 bits)
@@ -632,14 +635,14 @@ static inline void disable_lnk(int lch)
632 l = p->dma_read(CLNK_CTRL, lch); 635 l = p->dma_read(CLNK_CTRL, lch);
633 636
634 /* Disable interrupts */ 637 /* Disable interrupts */
638 omap_disable_channel_irq(lch);
639
635 if (cpu_class_is_omap1()) { 640 if (cpu_class_is_omap1()) {
636 p->dma_write(0, CICR, lch);
637 /* Set the STOP_LNK bit */ 641 /* Set the STOP_LNK bit */
638 l |= 1 << 14; 642 l |= 1 << 14;
639 } 643 }
640 644
641 if (cpu_class_is_omap2()) { 645 if (cpu_class_is_omap2()) {
642 omap_disable_channel_irq(lch);
643 /* Clear the ENABLE_LNK bit */ 646 /* Clear the ENABLE_LNK bit */
644 l &= ~(1 << 15); 647 l &= ~(1 << 15);
645 } 648 }
@@ -657,6 +660,9 @@ static inline void omap2_enable_irq_lch(int lch)
657 return; 660 return;
658 661
659 spin_lock_irqsave(&dma_chan_lock, flags); 662 spin_lock_irqsave(&dma_chan_lock, flags);
663 /* clear IRQ STATUS */
664 p->dma_write(1 << lch, IRQSTATUS_L0, lch);
665 /* Enable interrupt */
660 val = p->dma_read(IRQENABLE_L0, lch); 666 val = p->dma_read(IRQENABLE_L0, lch);
661 val |= 1 << lch; 667 val |= 1 << lch;
662 p->dma_write(val, IRQENABLE_L0, lch); 668 p->dma_write(val, IRQENABLE_L0, lch);
@@ -672,9 +678,12 @@ static inline void omap2_disable_irq_lch(int lch)
672 return; 678 return;
673 679
674 spin_lock_irqsave(&dma_chan_lock, flags); 680 spin_lock_irqsave(&dma_chan_lock, flags);
681 /* Disable interrupt */
675 val = p->dma_read(IRQENABLE_L0, lch); 682 val = p->dma_read(IRQENABLE_L0, lch);
676 val &= ~(1 << lch); 683 val &= ~(1 << lch);
677 p->dma_write(val, IRQENABLE_L0, lch); 684 p->dma_write(val, IRQENABLE_L0, lch);
685 /* clear IRQ STATUS */
686 p->dma_write(1 << lch, IRQSTATUS_L0, lch);
678 spin_unlock_irqrestore(&dma_chan_lock, flags); 687 spin_unlock_irqrestore(&dma_chan_lock, flags);
679} 688}
680 689
@@ -745,11 +754,8 @@ int omap_request_dma(int dev_id, const char *dev_name,
745 } 754 }
746 755
747 if (cpu_class_is_omap2()) { 756 if (cpu_class_is_omap2()) {
748 omap2_enable_irq_lch(free_ch);
749 omap_enable_channel_irq(free_ch); 757 omap_enable_channel_irq(free_ch);
750 /* Clear the CSR register and IRQ status register */ 758 omap2_enable_irq_lch(free_ch);
751 p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, free_ch);
752 p->dma_write(1 << free_ch, IRQSTATUS_L0, 0);
753 } 759 }
754 760
755 *dma_ch_out = free_ch; 761 *dma_ch_out = free_ch;
@@ -768,27 +774,19 @@ void omap_free_dma(int lch)
768 return; 774 return;
769 } 775 }
770 776
771 if (cpu_class_is_omap1()) { 777 /* Disable interrupt for logical channel */
772 /* Disable all DMA interrupts for the channel. */ 778 if (cpu_class_is_omap2())
773 p->dma_write(0, CICR, lch);
774 /* Make sure the DMA transfer is stopped. */
775 p->dma_write(0, CCR, lch);
776 }
777
778 if (cpu_class_is_omap2()) {
779 omap2_disable_irq_lch(lch); 779 omap2_disable_irq_lch(lch);
780 780
781 /* Clear the CSR register and IRQ status register */ 781 /* Disable all DMA interrupts for the channel. */
782 p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch); 782 omap_disable_channel_irq(lch);
783 p->dma_write(1 << lch, IRQSTATUS_L0, lch);
784 783
785 /* Disable all DMA interrupts for the channel. */ 784 /* Make sure the DMA transfer is stopped. */
786 p->dma_write(0, CICR, lch); 785 p->dma_write(0, CCR, lch);
787 786
788 /* Make sure the DMA transfer is stopped. */ 787 /* Clear registers */
789 p->dma_write(0, CCR, lch); 788 if (cpu_class_is_omap2())
790 omap_clear_dma(lch); 789 omap_clear_dma(lch);
791 }
792 790
793 spin_lock_irqsave(&dma_chan_lock, flags); 791 spin_lock_irqsave(&dma_chan_lock, flags);
794 dma_chan[lch].dev_id = -1; 792 dma_chan[lch].dev_id = -1;
@@ -943,8 +941,7 @@ void omap_stop_dma(int lch)
943 u32 l; 941 u32 l;
944 942
945 /* Disable all interrupts on the channel */ 943 /* Disable all interrupts on the channel */
946 if (cpu_class_is_omap1()) 944 omap_disable_channel_irq(lch);
947 p->dma_write(0, CICR, lch);
948 945
949 l = p->dma_read(CCR, lch); 946 l = p->dma_read(CCR, lch);
950 if (IS_DMA_ERRATA(DMA_ERRATA_i541) && 947 if (IS_DMA_ERRATA(DMA_ERRATA_i541) &&
diff --git a/arch/arm/plat-omap/include/plat/board.h b/arch/arm/plat-omap/include/plat/board.h
index 4814c5b65306..e62f20a5c0af 100644
--- a/arch/arm/plat-omap/include/plat/board.h
+++ b/arch/arm/plat-omap/include/plat/board.h
@@ -57,44 +57,6 @@ struct omap_camera_sensor_config {
57 int (*power_off)(void * data); 57 int (*power_off)(void * data);
58}; 58};
59 59
60struct omap_usb_config {
61 /* Configure drivers according to the connectors on your board:
62 * - "A" connector (rectagular)
63 * ... for host/OHCI use, set "register_host".
64 * - "B" connector (squarish) or "Mini-B"
65 * ... for device/gadget use, set "register_dev".
66 * - "Mini-AB" connector (very similar to Mini-B)
67 * ... for OTG use as device OR host, initialize "otg"
68 */
69 unsigned register_host:1;
70 unsigned register_dev:1;
71 u8 otg; /* port number, 1-based: usb1 == 2 */
72
73 u8 hmc_mode;
74
75 /* implicitly true if otg: host supports remote wakeup? */
76 u8 rwc;
77
78 /* signaling pins used to talk to transceiver on usbN:
79 * 0 == usbN unused
80 * 2 == usb0-only, using internal transceiver
81 * 3 == 3 wire bidirectional
82 * 4 == 4 wire bidirectional
83 * 6 == 6 wire unidirectional (or TLL)
84 */
85 u8 pins[3];
86
87 struct platform_device *udc_device;
88 struct platform_device *ohci_device;
89 struct platform_device *otg_device;
90
91 u32 (*usb0_init)(unsigned nwires, unsigned is_device);
92 u32 (*usb1_init)(unsigned nwires);
93 u32 (*usb2_init)(unsigned nwires, unsigned alt_pingroup);
94
95 int (*ocpi_enable)(void);
96};
97
98struct omap_lcd_config { 60struct omap_lcd_config {
99 char panel_name[16]; 61 char panel_name[16];
100 char ctrl_name[16]; 62 char ctrl_name[16];
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h
index d0ef57c1d71b..656b9862279e 100644
--- a/arch/arm/plat-omap/include/plat/clock.h
+++ b/arch/arm/plat-omap/include/plat/clock.h
@@ -156,7 +156,6 @@ struct dpll_data {
156 u8 min_divider; 156 u8 min_divider;
157 u16 max_divider; 157 u16 max_divider;
158 u8 modes; 158 u8 modes;
159#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
160 void __iomem *autoidle_reg; 159 void __iomem *autoidle_reg;
161 void __iomem *idlest_reg; 160 void __iomem *idlest_reg;
162 u32 autoidle_mask; 161 u32 autoidle_mask;
@@ -167,7 +166,6 @@ struct dpll_data {
167 u8 auto_recal_bit; 166 u8 auto_recal_bit;
168 u8 recal_en_bit; 167 u8 recal_en_bit;
169 u8 recal_st_bit; 168 u8 recal_st_bit;
170# endif
171 u8 flags; 169 u8 flags;
172}; 170};
173 171
diff --git a/arch/arm/plat-omap/include/plat/dsp.h b/arch/arm/plat-omap/include/plat/dsp.h
index 9c604b390f9f..5927709b1908 100644
--- a/arch/arm/plat-omap/include/plat/dsp.h
+++ b/arch/arm/plat-omap/include/plat/dsp.h
@@ -18,6 +18,9 @@ struct omap_dsp_platform_data {
18 u32 (*dsp_cm_read)(s16 , u16); 18 u32 (*dsp_cm_read)(s16 , u16);
19 u32 (*dsp_cm_rmw_bits)(u32, u32, s16, s16); 19 u32 (*dsp_cm_rmw_bits)(u32, u32, s16, s16);
20 20
21 void (*set_bootaddr)(u32);
22 void (*set_bootmode)(u8);
23
21 phys_addr_t phys_mempool_base; 24 phys_addr_t phys_mempool_base;
22 phys_addr_t phys_mempool_size; 25 phys_addr_t phys_mempool_size;
23}; 26};
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index c835b7194ff5..a8ecc53b3670 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -629,6 +629,8 @@ int omap_hwmod_no_setup_reset(struct omap_hwmod *oh);
629 629
630int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx); 630int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx);
631 631
632extern void __init omap_hwmod_init(void);
633
632/* 634/*
633 * Chip variant-specific hwmod init routines - XXX should be converted 635 * Chip variant-specific hwmod init routines - XXX should be converted
634 * to use initcalls once the initial boot ordering is straightened out 636 * to use initcalls once the initial boot ordering is straightened out
diff --git a/arch/arm/plat-omap/include/plat/usb.h b/arch/arm/plat-omap/include/plat/usb.h
index 762eeb0626c1..548a4c8d63df 100644
--- a/arch/arm/plat-omap/include/plat/usb.h
+++ b/arch/arm/plat-omap/include/plat/usb.h
@@ -44,6 +44,8 @@ struct usbhs_omap_board_data {
44 struct regulator *regulator[OMAP3_HS_USB_PORTS]; 44 struct regulator *regulator[OMAP3_HS_USB_PORTS];
45}; 45};
46 46
47#ifdef CONFIG_ARCH_OMAP2PLUS
48
47struct ehci_hcd_omap_platform_data { 49struct ehci_hcd_omap_platform_data {
48 enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS]; 50 enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS];
49 int reset_gpio_port[OMAP3_HS_USB_PORTS]; 51 int reset_gpio_port[OMAP3_HS_USB_PORTS];
@@ -64,26 +66,6 @@ struct usbhs_omap_platform_data {
64}; 66};
65/*-------------------------------------------------------------------------*/ 67/*-------------------------------------------------------------------------*/
66 68
67#define OMAP1_OTG_BASE 0xfffb0400
68#define OMAP1_UDC_BASE 0xfffb4000
69#define OMAP1_OHCI_BASE 0xfffba000
70
71#define OMAP2_OHCI_BASE 0x4805e000
72#define OMAP2_UDC_BASE 0x4805e200
73#define OMAP2_OTG_BASE 0x4805e300
74
75#ifdef CONFIG_ARCH_OMAP1
76
77#define OTG_BASE OMAP1_OTG_BASE
78#define UDC_BASE OMAP1_UDC_BASE
79#define OMAP_OHCI_BASE OMAP1_OHCI_BASE
80
81#else
82
83#define OTG_BASE OMAP2_OTG_BASE
84#define UDC_BASE OMAP2_UDC_BASE
85#define OMAP_OHCI_BASE OMAP2_OHCI_BASE
86
87struct omap_musb_board_data { 69struct omap_musb_board_data {
88 u8 interface_type; 70 u8 interface_type;
89 u8 mode; 71 u8 mode;
@@ -107,44 +89,6 @@ extern int omap4430_phy_init(struct device *dev);
107extern int omap4430_phy_exit(struct device *dev); 89extern int omap4430_phy_exit(struct device *dev);
108extern int omap4430_phy_suspend(struct device *dev, int suspend); 90extern int omap4430_phy_suspend(struct device *dev, int suspend);
109 91
110/*
111 * NOTE: Please update omap USB drivers to use ioremap + read/write
112 */
113
114#define OMAP2_L4_IO_OFFSET 0xb2000000
115#define OMAP2_L4_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L4_IO_OFFSET)
116
117static inline u8 omap_readb(u32 pa)
118{
119 return __raw_readb(OMAP2_L4_IO_ADDRESS(pa));
120}
121
122static inline u16 omap_readw(u32 pa)
123{
124 return __raw_readw(OMAP2_L4_IO_ADDRESS(pa));
125}
126
127static inline u32 omap_readl(u32 pa)
128{
129 return __raw_readl(OMAP2_L4_IO_ADDRESS(pa));
130}
131
132static inline void omap_writeb(u8 v, u32 pa)
133{
134 __raw_writeb(v, OMAP2_L4_IO_ADDRESS(pa));
135}
136
137
138static inline void omap_writew(u16 v, u32 pa)
139{
140 __raw_writew(v, OMAP2_L4_IO_ADDRESS(pa));
141}
142
143static inline void omap_writel(u32 v, u32 pa)
144{
145 __raw_writel(v, OMAP2_L4_IO_ADDRESS(pa));
146}
147
148#endif 92#endif
149 93
150extern void am35x_musb_reset(void); 94extern void am35x_musb_reset(void);
@@ -153,142 +97,6 @@ extern void am35x_musb_clear_irq(void);
153extern void am35x_set_mode(u8 musb_mode); 97extern void am35x_set_mode(u8 musb_mode);
154extern void ti81xx_musb_phy_power(u8 on); 98extern void ti81xx_musb_phy_power(u8 on);
155 99
156/*
157 * FIXME correct answer depends on hmc_mode,
158 * as does (on omap1) any nonzero value for config->otg port number
159 */
160#ifdef CONFIG_USB_GADGET_OMAP
161#define is_usb0_device(config) 1
162#else
163#define is_usb0_device(config) 0
164#endif
165
166void omap_otg_init(struct omap_usb_config *config);
167
168#if defined(CONFIG_USB) || defined(CONFIG_USB_MODULE)
169void omap1_usb_init(struct omap_usb_config *pdata);
170#else
171static inline void omap1_usb_init(struct omap_usb_config *pdata)
172{
173}
174#endif
175
176#if defined(CONFIG_ARCH_OMAP_OTG) || defined(CONFIG_ARCH_OMAP_OTG_MODULE)
177void omap2_usbfs_init(struct omap_usb_config *pdata);
178#else
179static inline void omap2_usbfs_init(struct omap_usb_config *pdata)
180{
181}
182#endif
183
184/*-------------------------------------------------------------------------*/
185
186/*
187 * OTG and transceiver registers, for OMAPs starting with ARM926
188 */
189#define OTG_REV (OTG_BASE + 0x00)
190#define OTG_SYSCON_1 (OTG_BASE + 0x04)
191# define USB2_TRX_MODE(w) (((w)>>24)&0x07)
192# define USB1_TRX_MODE(w) (((w)>>20)&0x07)
193# define USB0_TRX_MODE(w) (((w)>>16)&0x07)
194# define OTG_IDLE_EN (1 << 15)
195# define HST_IDLE_EN (1 << 14)
196# define DEV_IDLE_EN (1 << 13)
197# define OTG_RESET_DONE (1 << 2)
198# define OTG_SOFT_RESET (1 << 1)
199#define OTG_SYSCON_2 (OTG_BASE + 0x08)
200# define OTG_EN (1 << 31)
201# define USBX_SYNCHRO (1 << 30)
202# define OTG_MST16 (1 << 29)
203# define SRP_GPDATA (1 << 28)
204# define SRP_GPDVBUS (1 << 27)
205# define SRP_GPUVBUS(w) (((w)>>24)&0x07)
206# define A_WAIT_VRISE(w) (((w)>>20)&0x07)
207# define B_ASE_BRST(w) (((w)>>16)&0x07)
208# define SRP_DPW (1 << 14)
209# define SRP_DATA (1 << 13)
210# define SRP_VBUS (1 << 12)
211# define OTG_PADEN (1 << 10)
212# define HMC_PADEN (1 << 9)
213# define UHOST_EN (1 << 8)
214# define HMC_TLLSPEED (1 << 7)
215# define HMC_TLLATTACH (1 << 6)
216# define OTG_HMC(w) (((w)>>0)&0x3f)
217#define OTG_CTRL (OTG_BASE + 0x0c)
218# define OTG_USB2_EN (1 << 29)
219# define OTG_USB2_DP (1 << 28)
220# define OTG_USB2_DM (1 << 27)
221# define OTG_USB1_EN (1 << 26)
222# define OTG_USB1_DP (1 << 25)
223# define OTG_USB1_DM (1 << 24)
224# define OTG_USB0_EN (1 << 23)
225# define OTG_USB0_DP (1 << 22)
226# define OTG_USB0_DM (1 << 21)
227# define OTG_ASESSVLD (1 << 20)
228# define OTG_BSESSEND (1 << 19)
229# define OTG_BSESSVLD (1 << 18)
230# define OTG_VBUSVLD (1 << 17)
231# define OTG_ID (1 << 16)
232# define OTG_DRIVER_SEL (1 << 15)
233# define OTG_A_SETB_HNPEN (1 << 12)
234# define OTG_A_BUSREQ (1 << 11)
235# define OTG_B_HNPEN (1 << 9)
236# define OTG_B_BUSREQ (1 << 8)
237# define OTG_BUSDROP (1 << 7)
238# define OTG_PULLDOWN (1 << 5)
239# define OTG_PULLUP (1 << 4)
240# define OTG_DRV_VBUS (1 << 3)
241# define OTG_PD_VBUS (1 << 2)
242# define OTG_PU_VBUS (1 << 1)
243# define OTG_PU_ID (1 << 0)
244#define OTG_IRQ_EN (OTG_BASE + 0x10) /* 16-bit */
245# define DRIVER_SWITCH (1 << 15)
246# define A_VBUS_ERR (1 << 13)
247# define A_REQ_TMROUT (1 << 12)
248# define A_SRP_DETECT (1 << 11)
249# define B_HNP_FAIL (1 << 10)
250# define B_SRP_TMROUT (1 << 9)
251# define B_SRP_DONE (1 << 8)
252# define B_SRP_STARTED (1 << 7)
253# define OPRT_CHG (1 << 0)
254#define OTG_IRQ_SRC (OTG_BASE + 0x14) /* 16-bit */
255 // same bits as in IRQ_EN
256#define OTG_OUTCTRL (OTG_BASE + 0x18) /* 16-bit */
257# define OTGVPD (1 << 14)
258# define OTGVPU (1 << 13)
259# define OTGPUID (1 << 12)
260# define USB2VDR (1 << 10)
261# define USB2PDEN (1 << 9)
262# define USB2PUEN (1 << 8)
263# define USB1VDR (1 << 6)
264# define USB1PDEN (1 << 5)
265# define USB1PUEN (1 << 4)
266# define USB0VDR (1 << 2)
267# define USB0PDEN (1 << 1)
268# define USB0PUEN (1 << 0)
269#define OTG_TEST (OTG_BASE + 0x20) /* 16-bit */
270#define OTG_VENDOR_CODE (OTG_BASE + 0xfc) /* 16-bit */
271
272/*-------------------------------------------------------------------------*/
273
274/* OMAP1 */
275#define USB_TRANSCEIVER_CTRL (0xfffe1000 + 0x0064)
276# define CONF_USB2_UNI_R (1 << 8)
277# define CONF_USB1_UNI_R (1 << 7)
278# define CONF_USB_PORT0_R(x) (((x)>>4)&0x7)
279# define CONF_USB0_ISOLATE_R (1 << 3)
280# define CONF_USB_PWRDN_DM_R (1 << 2)
281# define CONF_USB_PWRDN_DP_R (1 << 1)
282
283/* OMAP2 */
284# define USB_UNIDIR 0x0
285# define USB_UNIDIR_TLL 0x1
286# define USB_BIDIR 0x2
287# define USB_BIDIR_TLL 0x3
288# define USBTXWRMODEI(port, x) ((x) << (22 - (port * 2)))
289# define USBT2TLL5PI (1 << 17)
290# define USB0PUENACTLOI (1 << 16)
291# define USBSTANDBYCTRL (1 << 15)
292/* AM35x */ 100/* AM35x */
293/* USB 2.0 PHY Control */ 101/* USB 2.0 PHY Control */
294#define CONF2_PHY_GPIOMODE (1 << 23) 102#define CONF2_PHY_GPIOMODE (1 << 23)
diff --git a/arch/arm/plat-omap/usb.c b/arch/arm/plat-omap/usb.c
deleted file mode 100644
index daa0327381b5..000000000000
--- a/arch/arm/plat-omap/usb.c
+++ /dev/null
@@ -1,145 +0,0 @@
1 /*
2 * arch/arm/plat-omap/usb.c -- platform level USB initialization
3 *
4 * Copyright (C) 2004 Texas Instruments, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#undef DEBUG
22
23#include <linux/module.h>
24#include <linux/kernel.h>
25#include <linux/init.h>
26#include <linux/platform_device.h>
27#include <linux/io.h>
28
29#include <plat/usb.h>
30#include <plat/board.h>
31
32#include <mach/hardware.h>
33
34#ifdef CONFIG_ARCH_OMAP_OTG
35
36void __init
37omap_otg_init(struct omap_usb_config *config)
38{
39 u32 syscon;
40 int alt_pingroup = 0;
41
42 /* NOTE: no bus or clock setup (yet?) */
43
44 syscon = omap_readl(OTG_SYSCON_1) & 0xffff;
45 if (!(syscon & OTG_RESET_DONE))
46 pr_debug("USB resets not complete?\n");
47
48 //omap_writew(0, OTG_IRQ_EN);
49
50 /* pin muxing and transceiver pinouts */
51 if (config->pins[0] > 2) /* alt pingroup 2 */
52 alt_pingroup = 1;
53 syscon |= config->usb0_init(config->pins[0], is_usb0_device(config));
54 syscon |= config->usb1_init(config->pins[1]);
55 syscon |= config->usb2_init(config->pins[2], alt_pingroup);
56 pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
57 omap_writel(syscon, OTG_SYSCON_1);
58
59 syscon = config->hmc_mode;
60 syscon |= USBX_SYNCHRO | (4 << 16) /* B_ASE0_BRST */;
61#ifdef CONFIG_USB_OTG
62 if (config->otg)
63 syscon |= OTG_EN;
64#endif
65 if (cpu_class_is_omap1())
66 pr_debug("USB_TRANSCEIVER_CTRL = %03x\n",
67 omap_readl(USB_TRANSCEIVER_CTRL));
68 pr_debug("OTG_SYSCON_2 = %08x\n", omap_readl(OTG_SYSCON_2));
69 omap_writel(syscon, OTG_SYSCON_2);
70
71 printk("USB: hmc %d", config->hmc_mode);
72 if (!alt_pingroup)
73 printk(", usb2 alt %d wires", config->pins[2]);
74 else if (config->pins[0])
75 printk(", usb0 %d wires%s", config->pins[0],
76 is_usb0_device(config) ? " (dev)" : "");
77 if (config->pins[1])
78 printk(", usb1 %d wires", config->pins[1]);
79 if (!alt_pingroup && config->pins[2])
80 printk(", usb2 %d wires", config->pins[2]);
81 if (config->otg)
82 printk(", Mini-AB on usb%d", config->otg - 1);
83 printk("\n");
84
85 if (cpu_class_is_omap1()) {
86 u16 w;
87
88 /* leave USB clocks/controllers off until needed */
89 w = omap_readw(ULPD_SOFT_REQ);
90 w &= ~SOFT_USB_CLK_REQ;
91 omap_writew(w, ULPD_SOFT_REQ);
92
93 w = omap_readw(ULPD_CLOCK_CTRL);
94 w &= ~USB_MCLK_EN;
95 w |= DIS_USB_PVCI_CLK;
96 omap_writew(w, ULPD_CLOCK_CTRL);
97 }
98 syscon = omap_readl(OTG_SYSCON_1);
99 syscon |= HST_IDLE_EN|DEV_IDLE_EN|OTG_IDLE_EN;
100
101#ifdef CONFIG_USB_GADGET_OMAP
102 if (config->otg || config->register_dev) {
103 struct platform_device *udc_device = config->udc_device;
104 int status;
105
106 syscon &= ~DEV_IDLE_EN;
107 udc_device->dev.platform_data = config;
108 status = platform_device_register(udc_device);
109 if (status)
110 pr_debug("can't register UDC device, %d\n", status);
111 }
112#endif
113
114#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
115 if (config->otg || config->register_host) {
116 struct platform_device *ohci_device = config->ohci_device;
117 int status;
118
119 syscon &= ~HST_IDLE_EN;
120 ohci_device->dev.platform_data = config;
121 status = platform_device_register(ohci_device);
122 if (status)
123 pr_debug("can't register OHCI device, %d\n", status);
124 }
125#endif
126
127#ifdef CONFIG_USB_OTG
128 if (config->otg) {
129 struct platform_device *otg_device = config->otg_device;
130 int status;
131
132 syscon &= ~OTG_IDLE_EN;
133 otg_device->dev.platform_data = config;
134 status = platform_device_register(otg_device);
135 if (status)
136 pr_debug("can't register OTG device, %d\n", status);
137 }
138#endif
139 pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
140 omap_writel(syscon, OTG_SYSCON_1);
141}
142
143#else
144void omap_otg_init(struct omap_usb_config *config) {}
145#endif
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index bddc8fd9a7be..271ca161d7ef 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -185,7 +185,7 @@ config USB_FUSB300
185 185
186config USB_OMAP 186config USB_OMAP
187 tristate "OMAP USB Device Controller" 187 tristate "OMAP USB Device Controller"
188 depends on ARCH_OMAP 188 depends on ARCH_OMAP1
189 select ISP1301_OMAP if MACH_OMAP_H2 || MACH_OMAP_H3 || MACH_OMAP_H4_OTG 189 select ISP1301_OMAP if MACH_OMAP_H2 || MACH_OMAP_H3 || MACH_OMAP_H4_OTG
190 select USB_OTG_UTILS if ARCH_OMAP 190 select USB_OTG_UTILS if ARCH_OMAP
191 help 191 help
diff --git a/drivers/usb/gadget/omap_udc.c b/drivers/usb/gadget/omap_udc.c
index a460e8c204f4..89cbd2b22ab0 100644
--- a/drivers/usb/gadget/omap_udc.c
+++ b/drivers/usb/gadget/omap_udc.c
@@ -44,7 +44,8 @@
44#include <asm/mach-types.h> 44#include <asm/mach-types.h>
45 45
46#include <plat/dma.h> 46#include <plat/dma.h>
47#include <plat/usb.h> 47
48#include <mach/usb.h>
48 49
49#include "omap_udc.h" 50#include "omap_udc.h"
50 51
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 83e58df29fe3..dcfaaa91a3fb 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -308,7 +308,7 @@ config USB_OHCI_HCD
308 308
309config USB_OHCI_HCD_OMAP1 309config USB_OHCI_HCD_OMAP1
310 bool "OHCI support for OMAP1/2 chips" 310 bool "OHCI support for OMAP1/2 chips"
311 depends on USB_OHCI_HCD && (ARCH_OMAP1 || ARCH_OMAP2) 311 depends on USB_OHCI_HCD && ARCH_OMAP1
312 default y 312 default y
313 ---help--- 313 ---help---
314 Enables support for the OHCI controller on OMAP1/2 chips. 314 Enables support for the OHCI controller on OMAP1/2 chips.
diff --git a/drivers/usb/host/ohci-omap.c b/drivers/usb/host/ohci-omap.c
index 9ce35d0d9d5d..b02c344e2cc9 100644
--- a/drivers/usb/host/ohci-omap.c
+++ b/drivers/usb/host/ohci-omap.c
@@ -20,14 +20,15 @@
20#include <linux/clk.h> 20#include <linux/clk.h>
21#include <linux/gpio.h> 21#include <linux/gpio.h>
22 22
23#include <mach/hardware.h>
24#include <asm/io.h> 23#include <asm/io.h>
25#include <asm/mach-types.h> 24#include <asm/mach-types.h>
26 25
27#include <plat/mux.h> 26#include <plat/mux.h>
28#include <mach/irqs.h>
29#include <plat/fpga.h> 27#include <plat/fpga.h>
30#include <plat/usb.h> 28
29#include <mach/hardware.h>
30#include <mach/irqs.h>
31#include <mach/usb.h>
31 32
32 33
33/* OMAP-1510 OHCI has its own MMU for DMA */ 34/* OMAP-1510 OHCI has its own MMU for DMA */
diff --git a/drivers/usb/otg/isp1301_omap.c b/drivers/usb/otg/isp1301_omap.c
index 70cf5d7bca48..e0558dfcfafc 100644
--- a/drivers/usb/otg/isp1301_omap.c
+++ b/drivers/usb/otg/isp1301_omap.c
@@ -36,9 +36,9 @@
36#include <asm/irq.h> 36#include <asm/irq.h>
37#include <asm/mach-types.h> 37#include <asm/mach-types.h>
38 38
39#include <plat/usb.h>
40#include <plat/mux.h> 39#include <plat/mux.h>
41 40
41#include <mach/usb.h>
42 42
43#ifndef DEBUG 43#ifndef DEBUG
44#undef VERBOSE 44#undef VERBOSE