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authorAlex Deucher <alexander.deucher@amd.com>2012-03-20 17:18:10 -0400
committerDave Airlie <airlied@redhat.com>2012-03-21 02:55:52 -0400
commit1bd47d2e16573496efd2fd0ec36f57031d478f87 (patch)
treefca64840969fdfb2ac2b85a4a3130f87f6de756d
parent14607d08366c3787f70b8e5a0a29adfb28e5f128 (diff)
drm/radeon/kms: add support for internal thermal sensor on SI
Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
-rw-r--r--drivers/gpu/drm/radeon/radeon.h1
-rw-r--r--drivers/gpu/drm/radeon/radeon_pm.c4
-rw-r--r--drivers/gpu/drm/radeon/si.c19
-rw-r--r--drivers/gpu/drm/radeon/sid.h8
4 files changed, 32 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index aaad93d7076b..c75ccc7f181f 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -241,6 +241,7 @@ extern int rv6xx_get_temp(struct radeon_device *rdev);
241extern int rv770_get_temp(struct radeon_device *rdev); 241extern int rv770_get_temp(struct radeon_device *rdev);
242extern int evergreen_get_temp(struct radeon_device *rdev); 242extern int evergreen_get_temp(struct radeon_device *rdev);
243extern int sumo_get_temp(struct radeon_device *rdev); 243extern int sumo_get_temp(struct radeon_device *rdev);
244extern int si_get_temp(struct radeon_device *rdev);
244extern void evergreen_tiling_fields(unsigned tiling_flags, unsigned *bankw, 245extern void evergreen_tiling_fields(unsigned tiling_flags, unsigned *bankw,
245 unsigned *bankh, unsigned *mtaspect, 246 unsigned *bankh, unsigned *mtaspect,
246 unsigned *tile_split); 247 unsigned *tile_split);
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c
index 3575129c1940..a6dbefca56dd 100644
--- a/drivers/gpu/drm/radeon/radeon_pm.c
+++ b/drivers/gpu/drm/radeon/radeon_pm.c
@@ -474,6 +474,9 @@ static ssize_t radeon_hwmon_show_temp(struct device *dev,
474 case THERMAL_TYPE_SUMO: 474 case THERMAL_TYPE_SUMO:
475 temp = sumo_get_temp(rdev); 475 temp = sumo_get_temp(rdev);
476 break; 476 break;
477 case THERMAL_TYPE_SI:
478 temp = si_get_temp(rdev);
479 break;
477 default: 480 default:
478 temp = 0; 481 temp = 0;
479 break; 482 break;
@@ -514,6 +517,7 @@ static int radeon_hwmon_init(struct radeon_device *rdev)
514 case THERMAL_TYPE_EVERGREEN: 517 case THERMAL_TYPE_EVERGREEN:
515 case THERMAL_TYPE_NI: 518 case THERMAL_TYPE_NI:
516 case THERMAL_TYPE_SUMO: 519 case THERMAL_TYPE_SUMO:
520 case THERMAL_TYPE_SI:
517 rdev->pm.int_hwmon_dev = hwmon_device_register(rdev->dev); 521 rdev->pm.int_hwmon_dev = hwmon_device_register(rdev->dev);
518 if (IS_ERR(rdev->pm.int_hwmon_dev)) { 522 if (IS_ERR(rdev->pm.int_hwmon_dev)) {
519 err = PTR_ERR(rdev->pm.int_hwmon_dev); 523 err = PTR_ERR(rdev->pm.int_hwmon_dev);
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
index 39c64df005cf..3e91429d7bd2 100644
--- a/drivers/gpu/drm/radeon/si.c
+++ b/drivers/gpu/drm/radeon/si.c
@@ -28,6 +28,25 @@
28#include "sid.h" 28#include "sid.h"
29#include "atom.h" 29#include "atom.h"
30 30
31/* get temperature in millidegrees */
32int si_get_temp(struct radeon_device *rdev)
33{
34 u32 temp;
35 int actual_temp = 0;
36
37 temp = (RREG32(CG_MULT_THERMAL_STATUS) & CTF_TEMP_MASK) >>
38 CTF_TEMP_SHIFT;
39
40 if (temp & 0x200)
41 actual_temp = 255;
42 else
43 actual_temp = temp & 0x1ff;
44
45 actual_temp = (actual_temp * 1000);
46
47 return actual_temp;
48}
49
31/* watermark setup */ 50/* watermark setup */
32static u32 dce6_line_buffer_adjust(struct radeon_device *rdev, 51static u32 dce6_line_buffer_adjust(struct radeon_device *rdev,
33 struct radeon_crtc *radeon_crtc, 52 struct radeon_crtc *radeon_crtc,
diff --git a/drivers/gpu/drm/radeon/sid.h b/drivers/gpu/drm/radeon/sid.h
index 962cc17a6076..f565a8fa7ead 100644
--- a/drivers/gpu/drm/radeon/sid.h
+++ b/drivers/gpu/drm/radeon/sid.h
@@ -24,6 +24,14 @@
24#ifndef SI_H 24#ifndef SI_H
25#define SI_H 25#define SI_H
26 26
27#define CG_MULT_THERMAL_STATUS 0x714
28#define ASIC_MAX_TEMP(x) ((x) << 0)
29#define ASIC_MAX_TEMP_MASK 0x000001ff
30#define ASIC_MAX_TEMP_SHIFT 0
31#define CTF_TEMP(x) ((x) << 9)
32#define CTF_TEMP_MASK 0x0003fe00
33#define CTF_TEMP_SHIFT 9
34
27#define MC_SHARED_CHMAP 0x2004 35#define MC_SHARED_CHMAP 0x2004
28#define NOOFCHAN_SHIFT 12 36#define NOOFCHAN_SHIFT 12
29#define NOOFCHAN_MASK 0x0000f000 37#define NOOFCHAN_MASK 0x0000f000