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authorSujith Manoharan <c_manoha@qca.qualcomm.com>2013-01-08 10:27:53 -0500
committerJohn W. Linville <linville@tuxdriver.com>2013-01-09 14:37:11 -0500
commit1a26cda8e0d954257ef2e4e732350232e1506a65 (patch)
treecfef415f66ef15365283dae1a7aca8ebe38e6199
parent2d7caefbafc4ca00cc87ec675c7981e07fa7f37b (diff)
ath9k_hw: Fix radio programming for AR9550
For AR9550, program the synth value based on the ref. clock. The logic for AR9550 is similar to AR9330, but keep the code separate since changes for AR9330 are required - which would be done later. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_phy.c31
1 files changed, 17 insertions, 14 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
index ce19c09fa8e8..0c4c5a6ffa16 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
@@ -68,7 +68,7 @@ static const int m2ThreshExt_off = 127;
68static int ar9003_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan) 68static int ar9003_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
69{ 69{
70 u16 bMode, fracMode = 0, aModeRefSel = 0; 70 u16 bMode, fracMode = 0, aModeRefSel = 0;
71 u32 freq, channelSel = 0, reg32 = 0; 71 u32 freq, chan_frac, div, channelSel = 0, reg32 = 0;
72 struct chan_centers centers; 72 struct chan_centers centers;
73 int loadSynthChannel; 73 int loadSynthChannel;
74 74
@@ -77,9 +77,6 @@ static int ar9003_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
77 77
78 if (freq < 4800) { /* 2 GHz, fractional mode */ 78 if (freq < 4800) { /* 2 GHz, fractional mode */
79 if (AR_SREV_9330(ah)) { 79 if (AR_SREV_9330(ah)) {
80 u32 chan_frac;
81 u32 div;
82
83 if (ah->is_clk_25mhz) 80 if (ah->is_clk_25mhz)
84 div = 75; 81 div = 75;
85 else 82 else
@@ -89,34 +86,40 @@ static int ar9003_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
89 chan_frac = (((freq * 4) % div) * 0x20000) / div; 86 chan_frac = (((freq * 4) % div) * 0x20000) / div;
90 channelSel = (channelSel << 17) | chan_frac; 87 channelSel = (channelSel << 17) | chan_frac;
91 } else if (AR_SREV_9485(ah) || AR_SREV_9565(ah)) { 88 } else if (AR_SREV_9485(ah) || AR_SREV_9565(ah)) {
92 u32 chan_frac;
93
94 /* 89 /*
95 * freq_ref = 40 / (refdiva >> amoderefsel); where refdiva=1 and amoderefsel=0 90 * freq_ref = 40 / (refdiva >> amoderefsel);
91 * where refdiva=1 and amoderefsel=0
96 * ndiv = ((chan_mhz * 4) / 3) / freq_ref; 92 * ndiv = ((chan_mhz * 4) / 3) / freq_ref;
97 * chansel = int(ndiv), chanfrac = (ndiv - chansel) * 0x20000 93 * chansel = int(ndiv), chanfrac = (ndiv - chansel) * 0x20000
98 */ 94 */
99 channelSel = (freq * 4) / 120; 95 channelSel = (freq * 4) / 120;
100 chan_frac = (((freq * 4) % 120) * 0x20000) / 120; 96 chan_frac = (((freq * 4) % 120) * 0x20000) / 120;
101 channelSel = (channelSel << 17) | chan_frac; 97 channelSel = (channelSel << 17) | chan_frac;
102 } else if (AR_SREV_9340(ah) || AR_SREV_9550(ah)) { 98 } else if (AR_SREV_9340(ah)) {
103 if (ah->is_clk_25mhz) { 99 if (ah->is_clk_25mhz) {
104 u32 chan_frac;
105
106 channelSel = (freq * 2) / 75; 100 channelSel = (freq * 2) / 75;
107 chan_frac = (((freq * 2) % 75) * 0x20000) / 75; 101 chan_frac = (((freq * 2) % 75) * 0x20000) / 75;
108 channelSel = (channelSel << 17) | chan_frac; 102 channelSel = (channelSel << 17) | chan_frac;
109 } else 103 } else {
110 channelSel = CHANSEL_2G(freq) >> 1; 104 channelSel = CHANSEL_2G(freq) >> 1;
111 } else 105 }
106 } else if (AR_SREV_9550(ah)) {
107 if (ah->is_clk_25mhz)
108 div = 75;
109 else
110 div = 120;
111
112 channelSel = (freq * 4) / div;
113 chan_frac = (((freq * 4) % div) * 0x20000) / div;
114 channelSel = (channelSel << 17) | chan_frac;
115 } else {
112 channelSel = CHANSEL_2G(freq); 116 channelSel = CHANSEL_2G(freq);
117 }
113 /* Set to 2G mode */ 118 /* Set to 2G mode */
114 bMode = 1; 119 bMode = 1;
115 } else { 120 } else {
116 if ((AR_SREV_9340(ah) || AR_SREV_9550(ah)) && 121 if ((AR_SREV_9340(ah) || AR_SREV_9550(ah)) &&
117 ah->is_clk_25mhz) { 122 ah->is_clk_25mhz) {
118 u32 chan_frac;
119
120 channelSel = freq / 75; 123 channelSel = freq / 75;
121 chan_frac = ((freq % 75) * 0x20000) / 75; 124 chan_frac = ((freq % 75) * 0x20000) / 75;
122 channelSel = (channelSel << 17) | chan_frac; 125 channelSel = (channelSel << 17) | chan_frac;