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authorAlex Deucher <alexander.deucher@amd.com>2013-01-14 11:04:39 -0500
committerAlex Deucher <alexander.deucher@amd.com>2013-01-15 09:06:38 -0500
commit19fc42ed9950d5fe17089c0a928121047c882092 (patch)
tree2cf4b53dcf43d870e6c1e9d3b7492381c1062005
parent7b4cf994e4c6ba48872bb25253cc393b7fb74c82 (diff)
drm/radeon: clear reset flags if engines are idle
Fixes a hard lock in the gpu reset code after the rework for DMA support (0ecebb9e0d14e9948e0b1529883a776758117d6f "drm/radeon: switch to a finer grained reset for evergreen") due to not bailing before the MC shutdown if the relevant engines are idle. Discussion: http://lists.freedesktop.org/archives/dri-devel/2013-January/032985.html Reported-by: Eldad Zack <eldad@fogrefinery.com> Tested-by: Eldad Zack <eldad@fogrefinery.com> Acked-by: Paul Menzel <paulepanter@users.sourceforge.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/radeon/evergreen.c6
-rw-r--r--drivers/gpu/drm/radeon/ni.c6
-rw-r--r--drivers/gpu/drm/radeon/r600.c6
-rw-r--r--drivers/gpu/drm/radeon/si.c6
4 files changed, 24 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 061fa0a28900..4d0e60adbc6d 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -2401,6 +2401,12 @@ static int evergreen_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask)
2401{ 2401{
2402 struct evergreen_mc_save save; 2402 struct evergreen_mc_save save;
2403 2403
2404 if (!(RREG32(GRBM_STATUS) & GUI_ACTIVE))
2405 reset_mask &= ~(RADEON_RESET_GFX | RADEON_RESET_COMPUTE);
2406
2407 if (RREG32(DMA_STATUS_REG) & DMA_IDLE)
2408 reset_mask &= ~RADEON_RESET_DMA;
2409
2404 if (reset_mask == 0) 2410 if (reset_mask == 0)
2405 return 0; 2411 return 0;
2406 2412
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
index 896f1cbc58a5..59acabb45c9b 100644
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -1409,6 +1409,12 @@ static int cayman_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask)
1409{ 1409{
1410 struct evergreen_mc_save save; 1410 struct evergreen_mc_save save;
1411 1411
1412 if (!(RREG32(GRBM_STATUS) & GUI_ACTIVE))
1413 reset_mask &= ~(RADEON_RESET_GFX | RADEON_RESET_COMPUTE);
1414
1415 if (RREG32(DMA_STATUS_REG) & DMA_IDLE)
1416 reset_mask &= ~RADEON_RESET_DMA;
1417
1412 if (reset_mask == 0) 1418 if (reset_mask == 0)
1413 return 0; 1419 return 0;
1414 1420
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 537e259b3837..3cb9d6089373 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -1378,6 +1378,12 @@ static int r600_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask)
1378{ 1378{
1379 struct rv515_mc_save save; 1379 struct rv515_mc_save save;
1380 1380
1381 if (!(RREG32(GRBM_STATUS) & GUI_ACTIVE))
1382 reset_mask &= ~(RADEON_RESET_GFX | RADEON_RESET_COMPUTE);
1383
1384 if (RREG32(DMA_STATUS_REG) & DMA_IDLE)
1385 reset_mask &= ~RADEON_RESET_DMA;
1386
1381 if (reset_mask == 0) 1387 if (reset_mask == 0)
1382 return 0; 1388 return 0;
1383 1389
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
index 3240a3d64f30..ae8b48205a6c 100644
--- a/drivers/gpu/drm/radeon/si.c
+++ b/drivers/gpu/drm/radeon/si.c
@@ -2215,6 +2215,12 @@ static int si_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask)
2215{ 2215{
2216 struct evergreen_mc_save save; 2216 struct evergreen_mc_save save;
2217 2217
2218 if (!(RREG32(GRBM_STATUS) & GUI_ACTIVE))
2219 reset_mask &= ~(RADEON_RESET_GFX | RADEON_RESET_COMPUTE);
2220
2221 if (RREG32(DMA_STATUS_REG) & DMA_IDLE)
2222 reset_mask &= ~RADEON_RESET_DMA;
2223
2218 if (reset_mask == 0) 2224 if (reset_mask == 0)
2219 return 0; 2225 return 0;
2220 2226