diff options
author | Lee Jones <lee.jones@linaro.org> | 2012-03-15 12:47:11 -0400 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2012-03-16 15:48:47 -0400 |
commit | 15daf691e8e0119e6c21d3ddf6b4754e66e37365 (patch) | |
tree | 7115fdaa43c0f1eeb4a5ef3ceae2ce4a7815a9ea | |
parent | f1949ea0d1f6034d38ce20089980b6b26d527c25 (diff) |
ARM: ux500: Enable PL022 SSP Controller in Device Tree
This SSP Controller supports a number of serial communication methods
and as such cannot be registered using of_register_spi_devices.
Instead we register it simply as a primecell device.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-rw-r--r-- | arch/arm/boot/dts/db8500.dtsi | 3 | ||||
-rw-r--r-- | arch/arm/mach-ux500/board-mop500.c | 6 |
2 files changed, 6 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/db8500.dtsi b/arch/arm/boot/dts/db8500.dtsi index ce3b56fb9132..a81cce0f755e 100644 --- a/arch/arm/boot/dts/db8500.dtsi +++ b/arch/arm/boot/dts/db8500.dtsi | |||
@@ -204,7 +204,10 @@ | |||
204 | #address-cells = <1>; | 204 | #address-cells = <1>; |
205 | #size-cells = <0>; | 205 | #size-cells = <0>; |
206 | status = "disabled"; | 206 | status = "disabled"; |
207 | |||
208 | // Add one of these for each child device | ||
207 | cs-gpios = <&gpio0 31 &gpio4 14 &gpio4 16 &gpio6 22 &gpio7 0>; | 209 | cs-gpios = <&gpio0 31 &gpio4 14 &gpio4 16 &gpio6 22 &gpio7 0>; |
210 | |||
208 | }; | 211 | }; |
209 | 212 | ||
210 | uart@80120000 { | 213 | uart@80120000 { |
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c index ea0242a095af..d0799d592218 100644 --- a/arch/arm/mach-ux500/board-mop500.c +++ b/arch/arm/mach-ux500/board-mop500.c | |||
@@ -443,7 +443,7 @@ static struct stedma40_chan_cfg ssp0_dma_cfg_tx = { | |||
443 | }; | 443 | }; |
444 | #endif | 444 | #endif |
445 | 445 | ||
446 | static struct pl022_ssp_controller ssp0_platform_data = { | 446 | static struct pl022_ssp_controller ssp0_plat = { |
447 | .bus_id = 0, | 447 | .bus_id = 0, |
448 | #ifdef CONFIG_STE_DMA40 | 448 | #ifdef CONFIG_STE_DMA40 |
449 | .enable_dma = 1, | 449 | .enable_dma = 1, |
@@ -461,7 +461,7 @@ static struct pl022_ssp_controller ssp0_platform_data = { | |||
461 | 461 | ||
462 | static void __init mop500_spi_init(struct device *parent) | 462 | static void __init mop500_spi_init(struct device *parent) |
463 | { | 463 | { |
464 | db8500_add_ssp0(parent, &ssp0_platform_data); | 464 | db8500_add_ssp0(parent, &ssp0_plat); |
465 | } | 465 | } |
466 | 466 | ||
467 | #ifdef CONFIG_STE_DMA40 | 467 | #ifdef CONFIG_STE_DMA40 |
@@ -749,6 +749,7 @@ struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = { | |||
749 | OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat), | 749 | OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat), |
750 | OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", &uart1_plat), | 750 | OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", &uart1_plat), |
751 | OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", &uart2_plat), | 751 | OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", &uart2_plat), |
752 | OF_DEV_AUXDATA("arm,pl022", 0x80002000, "ssp0", &ssp0_plat), | ||
752 | {}, | 753 | {}, |
753 | }; | 754 | }; |
754 | 755 | ||
@@ -804,7 +805,6 @@ static void __init u8500_init_machine(void) | |||
804 | hrefv60_sdi_init(parent); | 805 | hrefv60_sdi_init(parent); |
805 | } | 806 | } |
806 | mop500_i2c_init(parent); | 807 | mop500_i2c_init(parent); |
807 | mop500_spi_init(parent); | ||
808 | 808 | ||
809 | i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs); | 809 | i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs); |
810 | i2c_register_board_info(2, mop500_i2c2_devices, | 810 | i2c_register_board_info(2, mop500_i2c2_devices, |