drm/radeon/dpm: add infrastructure to support debugfs info

This lays the frameworks to report realtime power level
feedback.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2 files changed, 29 insertions, 13 deletions

diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 7e3fef4e6938..f51807f04f65 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -1667,6 +1667,7 @@ struct radeon_asic {
                 u32 (*get_sclk)(struct radeon_device *rdev, bool low);
                 u32 (*get_mclk)(struct radeon_device *rdev, bool low);
                 void (*print_power_state)(struct radeon_device *rdev, struct radeon_ps *ps);
+                void (*debugfs_print_current_performance_level)(struct radeon_device *rdev, struct seq_file *m);
         } dpm;
         /* pageflipping */
         struct {
@@ -2433,6 +2434,7 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v);
 #define radeon_dpm_get_sclk(rdev, l) rdev->asic->dpm.get_sclk((rdev), (l))
 #define radeon_dpm_get_mclk(rdev, l) rdev->asic->dpm.get_mclk((rdev), (l))
 #define radeon_dpm_print_power_state(rdev, ps) rdev->asic->dpm.print_power_state((rdev), (ps))
+#define radeon_dpm_debugfs_print_current_performance_level(rdev, m) rdev->asic->dpm.debugfs_print_current_performance_level((rdev), (m))
 
 /* Common functions */
 /* AGP */
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c
index 9737baeb711d..075f2fa56897 100644
--- a/drivers/gpu/drm/radeon/radeon_pm.c
+++ b/drivers/gpu/drm/radeon/radeon_pm.c
@@ -1062,6 +1062,11 @@ static int radeon_pm_init_dpm(struct radeon_device *rdev)
                 ret = device_create_file(rdev->dev, &dev_attr_power_method);
                 if (ret)
                         DRM_ERROR("failed to create device file for power method\n");
+
+                if (radeon_debugfs_pm_init(rdev)) {
+                        DRM_ERROR("Failed to register debugfs file for dpm!\n");
+                }
+
                 DRM_INFO("radeon: dpm initialized\n");
         }
 
@@ -1389,19 +1394,28 @@ static int radeon_debugfs_pm_info(struct seq_file *m, void *data)
         struct drm_device *dev = node->minor->dev;
         struct radeon_device *rdev = dev->dev_private;
 
-        seq_printf(m, "default engine clock: %u0 kHz\n", rdev->pm.default_sclk);
-        /* radeon_get_engine_clock is not reliable on APUs so just print the current clock */
-        if ((rdev->family >= CHIP_PALM) && (rdev->flags & RADEON_IS_IGP))
-                seq_printf(m, "current engine clock: %u0 kHz\n", rdev->pm.current_sclk);
-        else
-                seq_printf(m, "current engine clock: %u0 kHz\n", radeon_get_engine_clock(rdev));
-        seq_printf(m, "default memory clock: %u0 kHz\n", rdev->pm.default_mclk);
-        if (rdev->asic->pm.get_memory_clock)
-                seq_printf(m, "current memory clock: %u0 kHz\n", radeon_get_memory_clock(rdev));
-        if (rdev->pm.current_vddc)
-                seq_printf(m, "voltage: %u mV\n", rdev->pm.current_vddc);
-        if (rdev->asic->pm.get_pcie_lanes)
-                seq_printf(m, "PCIE lanes: %d\n", radeon_get_pcie_lanes(rdev));
+        if (rdev->pm.dpm_enabled) {
+                mutex_lock(&rdev->pm.mutex);
+                if (rdev->asic->dpm.debugfs_print_current_performance_level)
+                        radeon_dpm_debugfs_print_current_performance_level(rdev, m);
+                else
+                        seq_printf(m, "Unsupported\n");
+                mutex_unlock(&rdev->pm.mutex);
+        } else {
+                seq_printf(m, "default engine clock: %u0 kHz\n", rdev->pm.default_sclk);
+                /* radeon_get_engine_clock is not reliable on APUs so just print the current clock */
+                if ((rdev->family >= CHIP_PALM) && (rdev->flags & RADEON_IS_IGP))
+                        seq_printf(m, "current engine clock: %u0 kHz\n", rdev->pm.current_sclk);
+                else
+                        seq_printf(m, "current engine clock: %u0 kHz\n", radeon_get_engine_clock(rdev));
+                seq_printf(m, "default memory clock: %u0 kHz\n", rdev->pm.default_mclk);
+                if (rdev->asic->pm.get_memory_clock)
+                        seq_printf(m, "current memory clock: %u0 kHz\n", radeon_get_memory_clock(rdev));
+                if (rdev->pm.current_vddc)
+                        seq_printf(m, "voltage: %u mV\n", rdev->pm.current_vddc);
+                if (rdev->asic->pm.get_pcie_lanes)
+                        seq_printf(m, "PCIE lanes: %d\n", radeon_get_pcie_lanes(rdev));
+        }
 
         return 0;
 }