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authorViresh Kumar <viresh.kumar@st.com>2012-03-26 00:59:23 -0400
committerArnd Bergmann <arnd@arndb.de>2012-04-22 16:41:35 -0400
commit0b7ee71794b043de8a02d8887b69a57e4003106a (patch)
treefb4386d24146993d3c1400abbc6974c27c16722d
parentc5fa4fdcdbe5f52c3e36892cc81f9378339b00ce (diff)
SPEAr: Add PL080 DMA support for 3xx and 6xx
Both SPEAr3xx and SPEAr6xx families have one instance of ARM PL080 DMA controller. This patch adds in support for that. Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Diffstat
-rw-r--r--arch/arm/boot/dts/spear300-evb.dts4
-rw-r--r--arch/arm/boot/dts/spear310-evb.dts4
-rw-r--r--arch/arm/boot/dts/spear320-evb.dts4
-rw-r--r--arch/arm/boot/dts/spear3xx.dtsi8
-rw-r--r--arch/arm/boot/dts/spear600-evb.dts4
-rw-r--r--arch/arm/boot/dts/spear600.dtsi8
-rw-r--r--arch/arm/mach-spear3xx/clock.c2
-rw-r--r--arch/arm/mach-spear3xx/include/mach/generic.h2
-rw-r--r--arch/arm/mach-spear3xx/spear300.c193
-rw-r--r--arch/arm/mach-spear3xx/spear310.c192
-rw-r--r--arch/arm/mach-spear3xx/spear320.c192
-rw-r--r--arch/arm/mach-spear3xx/spear3xx.c19
-rw-r--r--arch/arm/mach-spear6xx/clock.c2
-rw-r--r--arch/arm/mach-spear6xx/spear6xx.c372
-rw-r--r--arch/arm/plat-spear/Makefile2
-rw-r--r--arch/arm/plat-spear/include/plat/pl080.h21
-rw-r--r--arch/arm/plat-spear/pl080.c79
17 files changed, 1104 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/spear300-evb.dts b/arch/arm/boot/dts/spear300-evb.dts
index f2ee991705a4..eaecc29b9d81 100644
--- a/arch/arm/boot/dts/spear300-evb.dts
+++ b/arch/arm/boot/dts/spear300-evb.dts
@@ -29,6 +29,10 @@
29 status = "okay"; 29 status = "okay";
30 }; 30 };
31 31
32 dma@fc400000 {
33 status = "okay";
34 };
35
32 fsmc: flash@94000000 { 36 fsmc: flash@94000000 {
33 status = "okay"; 37 status = "okay";
34 }; 38 };
diff --git a/arch/arm/boot/dts/spear310-evb.dts b/arch/arm/boot/dts/spear310-evb.dts
index ec19d7b9795a..c86af33f700e 100644
--- a/arch/arm/boot/dts/spear310-evb.dts
+++ b/arch/arm/boot/dts/spear310-evb.dts
@@ -25,6 +25,10 @@
25 }; 25 };
26 26
27 ahb { 27 ahb {
28 dma@fc400000 {
29 status = "okay";
30 };
31
28 fsmc: flash@44000000 { 32 fsmc: flash@44000000 {
29 status = "okay"; 33 status = "okay";
30 }; 34 };
diff --git a/arch/arm/boot/dts/spear320-evb.dts b/arch/arm/boot/dts/spear320-evb.dts
index 5681a974d9d5..d43de712e863 100644
--- a/arch/arm/boot/dts/spear320-evb.dts
+++ b/arch/arm/boot/dts/spear320-evb.dts
@@ -29,6 +29,10 @@
29 status = "okay"; 29 status = "okay";
30 }; 30 };
31 31
32 dma@fc400000 {
33 status = "okay";
34 };
35
32 fsmc: flash@4c000000 { 36 fsmc: flash@4c000000 {
33 status = "okay"; 37 status = "okay";
34 }; 38 };
diff --git a/arch/arm/boot/dts/spear3xx.dtsi b/arch/arm/boot/dts/spear3xx.dtsi
index 924a6f67ed05..0ae7c8e86311 100644
--- a/arch/arm/boot/dts/spear3xx.dtsi
+++ b/arch/arm/boot/dts/spear3xx.dtsi
@@ -40,6 +40,14 @@
40 #interrupt-cells = <1>; 40 #interrupt-cells = <1>;
41 }; 41 };
42 42
43 dma@fc400000 {
44 compatible = "arm,pl080", "arm,primecell";
45 reg = <0xfc400000 0x1000>;
46 interrupt-parent = <&vic>;
47 interrupts = <8>;
48 status = "disabled";
49 };
50
43 gmac: eth@e0800000 { 51 gmac: eth@e0800000 {
44 compatible = "st,spear600-gmac"; 52 compatible = "st,spear600-gmac";
45 reg = <0xe0800000 0x8000>; 53 reg = <0xe0800000 0x8000>;
diff --git a/arch/arm/boot/dts/spear600-evb.dts b/arch/arm/boot/dts/spear600-evb.dts
index 636292e18c90..790a7a8a5ccd 100644
--- a/arch/arm/boot/dts/spear600-evb.dts
+++ b/arch/arm/boot/dts/spear600-evb.dts
@@ -24,6 +24,10 @@
24 }; 24 };
25 25
26 ahb { 26 ahb {
27 dma@fc400000 {
28 status = "okay";
29 };
30
27 gmac: ethernet@e0800000 { 31 gmac: ethernet@e0800000 {
28 phy-mode = "gmii"; 32 phy-mode = "gmii";
29 status = "okay"; 33 status = "okay";
diff --git a/arch/arm/boot/dts/spear600.dtsi b/arch/arm/boot/dts/spear600.dtsi
index ebe0885a2b98..d777e3a6f178 100644
--- a/arch/arm/boot/dts/spear600.dtsi
+++ b/arch/arm/boot/dts/spear600.dtsi
@@ -45,6 +45,14 @@
45 #interrupt-cells = <1>; 45 #interrupt-cells = <1>;
46 }; 46 };
47 47
48 dma@fc400000 {
49 compatible = "arm,pl080", "arm,primecell";
50 reg = <0xfc400000 0x1000>;
51 interrupt-parent = <&vic1>;
52 interrupts = <10>;
53 status = "disabled";
54 };
55
48 gmac: ethernet@e0800000 { 56 gmac: ethernet@e0800000 {
49 compatible = "st,spear600-gmac"; 57 compatible = "st,spear600-gmac";
50 reg = <0xe0800000 0x8000>; 58 reg = <0xe0800000 0x8000>;
diff --git a/arch/arm/mach-spear3xx/clock.c b/arch/arm/mach-spear3xx/clock.c
index 9293c144b24a..eeafe38eab25 100644
--- a/arch/arm/mach-spear3xx/clock.c
+++ b/arch/arm/mach-spear3xx/clock.c
@@ -701,7 +701,7 @@ static struct clk_lookup spear_clk_lookups[] = {
701 /* clock derived from ahb clk */ 701 /* clock derived from ahb clk */
702 CLKDEV_INIT(NULL, "apb_clk", &apb_clk), 702 CLKDEV_INIT(NULL, "apb_clk", &apb_clk),
703 CLKDEV_INIT("d0180000.i2c", NULL, &i2c_clk), 703 CLKDEV_INIT("d0180000.i2c", NULL, &i2c_clk),
704 CLKDEV_INIT("dma", NULL, &dma_clk), 704 CLKDEV_INIT("fc400000.dma", NULL, &dma_clk),
705 CLKDEV_INIT("jpeg", NULL, &jpeg_clk), 705 CLKDEV_INIT("jpeg", NULL, &jpeg_clk),
706 CLKDEV_INIT("e0800000.eth", NULL, &gmac_clk), 706 CLKDEV_INIT("e0800000.eth", NULL, &gmac_clk),
707 CLKDEV_INIT("fc000000.flash", NULL, &smi_clk), 707 CLKDEV_INIT("fc000000.flash", NULL, &smi_clk),
diff --git a/arch/arm/mach-spear3xx/include/mach/generic.h b/arch/arm/mach-spear3xx/include/mach/generic.h
index 84ee2bbf1338..a7569584cbe8 100644
--- a/arch/arm/mach-spear3xx/include/mach/generic.h
+++ b/arch/arm/mach-spear3xx/include/mach/generic.h
@@ -14,6 +14,7 @@
14#ifndef __MACH_GENERIC_H 14#ifndef __MACH_GENERIC_H
15#define __MACH_GENERIC_H 15#define __MACH_GENERIC_H
16 16
17#include <linux/amba/pl08x.h>
17#include <linux/init.h> 18#include <linux/init.h>
18#include <linux/platform_device.h> 19#include <linux/platform_device.h>
19#include <linux/amba/bus.h> 20#include <linux/amba/bus.h>
@@ -33,6 +34,7 @@
33/* Add spear3xx family device structure declarations here */ 34/* Add spear3xx family device structure declarations here */
34extern struct sys_timer spear3xx_timer; 35extern struct sys_timer spear3xx_timer;
35extern struct pl022_ssp_controller pl022_plat_data; 36extern struct pl022_ssp_controller pl022_plat_data;
37extern struct pl08x_platform_data pl080_plat_data;
36 38
37/* Add spear3xx family function declarations here */ 39/* Add spear3xx family function declarations here */
38void __init spear_setup_timer(void); 40void __init spear_setup_timer(void);
diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c
index c876c6a2caad..f46fc2692ab6 100644
--- a/arch/arm/mach-spear3xx/spear300.c
+++ b/arch/arm/mach-spear3xx/spear300.c
@@ -13,6 +13,7 @@
13 13
14#define pr_fmt(fmt) "SPEAr300: " fmt 14#define pr_fmt(fmt) "SPEAr300: " fmt
15 15
16#include <linux/amba/pl08x.h>
16#include <linux/of_platform.h> 17#include <linux/of_platform.h>
17#include <asm/hardware/vic.h> 18#include <asm/hardware/vic.h>
18#include <asm/mach/arch.h> 19#include <asm/mach/arch.h>
@@ -440,10 +441,199 @@ static struct pmx_dev *spear300_evb_pmx_devs[] = {
440 &spear300_pmx_gpio1, 441 &spear300_pmx_gpio1,
441}; 442};
442 443
444/* DMAC platform data's slave info */
445struct pl08x_channel_data spear300_dma_info[] = {
446 {
447 .bus_id = "uart0_rx",
448 .min_signal = 2,
449 .max_signal = 2,
450 .muxval = 0,
451 .cctl = 0,
452 .periph_buses = PL08X_AHB1,
453 }, {
454 .bus_id = "uart0_tx",
455 .min_signal = 3,
456 .max_signal = 3,
457 .muxval = 0,
458 .cctl = 0,
459 .periph_buses = PL08X_AHB1,
460 }, {
461 .bus_id = "ssp0_rx",
462 .min_signal = 8,
463 .max_signal = 8,
464 .muxval = 0,
465 .cctl = 0,
466 .periph_buses = PL08X_AHB1,
467 }, {
468 .bus_id = "ssp0_tx",
469 .min_signal = 9,
470 .max_signal = 9,
471 .muxval = 0,
472 .cctl = 0,
473 .periph_buses = PL08X_AHB1,
474 }, {
475 .bus_id = "i2c_rx",
476 .min_signal = 10,
477 .max_signal = 10,
478 .muxval = 0,
479 .cctl = 0,
480 .periph_buses = PL08X_AHB1,
481 }, {
482 .bus_id = "i2c_tx",
483 .min_signal = 11,
484 .max_signal = 11,
485 .muxval = 0,
486 .cctl = 0,
487 .periph_buses = PL08X_AHB1,
488 }, {
489 .bus_id = "irda",
490 .min_signal = 12,
491 .max_signal = 12,
492 .muxval = 0,
493 .cctl = 0,
494 .periph_buses = PL08X_AHB1,
495 }, {
496 .bus_id = "adc",
497 .min_signal = 13,
498 .max_signal = 13,
499 .muxval = 0,
500 .cctl = 0,
501 .periph_buses = PL08X_AHB1,
502 }, {
503 .bus_id = "to_jpeg",
504 .min_signal = 14,
505 .max_signal = 14,
506 .muxval = 0,
507 .cctl = 0,
508 .periph_buses = PL08X_AHB1,
509 }, {
510 .bus_id = "from_jpeg",
511 .min_signal = 15,
512 .max_signal = 15,
513 .muxval = 0,
514 .cctl = 0,
515 .periph_buses = PL08X_AHB1,
516 }, {
517 .bus_id = "ras0_rx",
518 .min_signal = 0,
519 .max_signal = 0,
520 .muxval = 1,
521 .cctl = 0,
522 .periph_buses = PL08X_AHB1,
523 }, {
524 .bus_id = "ras0_tx",
525 .min_signal = 1,
526 .max_signal = 1,
527 .muxval = 1,
528 .cctl = 0,
529 .periph_buses = PL08X_AHB1,
530 }, {
531 .bus_id = "ras1_rx",
532 .min_signal = 2,
533 .max_signal = 2,
534 .muxval = 1,
535 .cctl = 0,
536 .periph_buses = PL08X_AHB1,
537 }, {
538 .bus_id = "ras1_tx",
539 .min_signal = 3,
540 .max_signal = 3,
541 .muxval = 1,
542 .cctl = 0,
543 .periph_buses = PL08X_AHB1,
544 }, {
545 .bus_id = "ras2_rx",
546 .min_signal = 4,
547 .max_signal = 4,
548 .muxval = 1,
549 .cctl = 0,
550 .periph_buses = PL08X_AHB1,
551 }, {
552 .bus_id = "ras2_tx",
553 .min_signal = 5,
554 .max_signal = 5,
555 .muxval = 1,
556 .cctl = 0,
557 .periph_buses = PL08X_AHB1,
558 }, {
559 .bus_id = "ras3_rx",
560 .min_signal = 6,
561 .max_signal = 6,
562 .muxval = 1,
563 .cctl = 0,
564 .periph_buses = PL08X_AHB1,
565 }, {
566 .bus_id = "ras3_tx",
567 .min_signal = 7,
568 .max_signal = 7,
569 .muxval = 1,
570 .cctl = 0,
571 .periph_buses = PL08X_AHB1,
572 }, {
573 .bus_id = "ras4_rx",
574 .min_signal = 8,
575 .max_signal = 8,
576 .muxval = 1,
577 .cctl = 0,
578 .periph_buses = PL08X_AHB1,
579 }, {
580 .bus_id = "ras4_tx",
581 .min_signal = 9,
582 .max_signal = 9,
583 .muxval = 1,
584 .cctl = 0,
585 .periph_buses = PL08X_AHB1,
586 }, {
587 .bus_id = "ras5_rx",
588 .min_signal = 10,
589 .max_signal = 10,
590 .muxval = 1,
591 .cctl = 0,
592 .periph_buses = PL08X_AHB1,
593 }, {
594 .bus_id = "ras5_tx",
595 .min_signal = 11,
596 .max_signal = 11,
597 .muxval = 1,
598 .cctl = 0,
599 .periph_buses = PL08X_AHB1,
600 }, {
601 .bus_id = "ras6_rx",
602 .min_signal = 12,
603 .max_signal = 12,
604 .muxval = 1,
605 .cctl = 0,
606 .periph_buses = PL08X_AHB1,
607 }, {
608 .bus_id = "ras6_tx",
609 .min_signal = 13,
610 .max_signal = 13,
611 .muxval = 1,
612 .cctl = 0,
613 .periph_buses = PL08X_AHB1,
614 }, {
615 .bus_id = "ras7_rx",
616 .min_signal = 14,
617 .max_signal = 14,
618 .muxval = 1,
619 .cctl = 0,
620 .periph_buses = PL08X_AHB1,
621 }, {
622 .bus_id = "ras7_tx",
623 .min_signal = 15,
624 .max_signal = 15,
625 .muxval = 1,
626 .cctl = 0,
627 .periph_buses = PL08X_AHB1,
628 },
629};
630
443/* Add SPEAr300 auxdata to pass platform data */ 631/* Add SPEAr300 auxdata to pass platform data */
444static struct of_dev_auxdata spear300_auxdata_lookup[] __initdata = { 632static struct of_dev_auxdata spear300_auxdata_lookup[] __initdata = {
445 OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL, 633 OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL,
446 &pl022_plat_data), 634 &pl022_plat_data),
635 OF_DEV_AUXDATA("arm,pl080", SPEAR3XX_ICM3_DMA_BASE, NULL,
636 &pl080_plat_data),
447 {} 637 {}
448}; 638};
449 639
@@ -451,6 +641,9 @@ static void __init spear300_dt_init(void)
451{ 641{
452 int ret = -EINVAL; 642 int ret = -EINVAL;
453 643
644 pl080_plat_data.slave_channels = spear300_dma_info;
645 pl080_plat_data.num_slave_channels = ARRAY_SIZE(spear300_dma_info);
646
454 of_platform_populate(NULL, of_default_bus_match_table, 647 of_platform_populate(NULL, of_default_bus_match_table,
455 spear300_auxdata_lookup, NULL); 648 spear300_auxdata_lookup, NULL);
456 649
diff --git a/arch/arm/mach-spear3xx/spear310.c b/arch/arm/mach-spear3xx/spear310.c
index 641fd4cf6bc7..063e7da0438a 100644
--- a/arch/arm/mach-spear3xx/spear310.c
+++ b/arch/arm/mach-spear3xx/spear310.c
@@ -284,6 +284,193 @@ static struct pmx_dev *spear310_evb_pmx_devs[] = {
284 &spear310_pmx_tdm0, 284 &spear310_pmx_tdm0,
285}; 285};
286 286
287/* DMAC platform data's slave info */
288struct pl08x_channel_data spear310_dma_info[] = {
289 {
290 .bus_id = "uart0_rx",
291 .min_signal = 2,
292 .max_signal = 2,
293 .muxval = 0,
294 .cctl = 0,
295 .periph_buses = PL08X_AHB1,
296 }, {
297 .bus_id = "uart0_tx",
298 .min_signal = 3,
299 .max_signal = 3,
300 .muxval = 0,
301 .cctl = 0,
302 .periph_buses = PL08X_AHB1,
303 }, {
304 .bus_id = "ssp0_rx",
305 .min_signal = 8,
306 .max_signal = 8,
307 .muxval = 0,
308 .cctl = 0,
309 .periph_buses = PL08X_AHB1,
310 }, {
311 .bus_id = "ssp0_tx",
312 .min_signal = 9,
313 .max_signal = 9,
314 .muxval = 0,
315 .cctl = 0,
316 .periph_buses = PL08X_AHB1,
317 }, {
318 .bus_id = "i2c_rx",
319 .min_signal = 10,
320 .max_signal = 10,
321 .muxval = 0,
322 .cctl = 0,
323 .periph_buses = PL08X_AHB1,
324 }, {
325 .bus_id = "i2c_tx",
326 .min_signal = 11,
327 .max_signal = 11,
328 .muxval = 0,
329 .cctl = 0,
330 .periph_buses = PL08X_AHB1,
331 }, {
332 .bus_id = "irda",
333 .min_signal = 12,
334 .max_signal = 12,
335 .muxval = 0,
336 .cctl = 0,
337 .periph_buses = PL08X_AHB1,
338 }, {
339 .bus_id = "adc",
340 .min_signal = 13,
341 .max_signal = 13,
342 .muxval = 0,
343 .cctl = 0,
344 .periph_buses = PL08X_AHB1,
345 }, {
346 .bus_id = "to_jpeg",
347 .min_signal = 14,
348 .max_signal = 14,
349 .muxval = 0,
350 .cctl = 0,
351 .periph_buses = PL08X_AHB1,
352 }, {
353 .bus_id = "from_jpeg",
354 .min_signal = 15,
355 .max_signal = 15,
356 .muxval = 0,
357 .cctl = 0,
358 .periph_buses = PL08X_AHB1,
359 }, {
360 .bus_id = "uart1_rx",
361 .min_signal = 0,
362 .max_signal = 0,
363 .muxval = 1,
364 .cctl = 0,
365 .periph_buses = PL08X_AHB1,
366 }, {
367 .bus_id = "uart1_tx",
368 .min_signal = 1,
369 .max_signal = 1,
370 .muxval = 1,
371 .cctl = 0,
372 .periph_buses = PL08X_AHB1,
373 }, {
374 .bus_id = "uart2_rx",
375 .min_signal = 2,
376 .max_signal = 2,
377 .muxval = 1,
378 .cctl = 0,
379 .periph_buses = PL08X_AHB1,
380 }, {
381 .bus_id = "uart2_tx",
382 .min_signal = 3,
383 .max_signal = 3,
384 .muxval = 1,
385 .cctl = 0,
386 .periph_buses = PL08X_AHB1,
387 }, {
388 .bus_id = "uart3_rx",
389 .min_signal = 4,
390 .max_signal = 4,
391 .muxval = 1,
392 .cctl = 0,
393 .periph_buses = PL08X_AHB1,
394 }, {
395 .bus_id = "uart3_tx",
396 .min_signal = 5,
397 .max_signal = 5,
398 .muxval = 1,
399 .cctl = 0,
400 .periph_buses = PL08X_AHB1,
401 }, {
402 .bus_id = "uart4_rx",
403 .min_signal = 6,
404 .max_signal = 6,
405 .muxval = 1,
406 .cctl = 0,
407 .periph_buses = PL08X_AHB1,
408 }, {
409 .bus_id = "uart4_tx",
410 .min_signal = 7,
411 .max_signal = 7,
412 .muxval = 1,
413 .cctl = 0,
414 .periph_buses = PL08X_AHB1,
415 }, {
416 .bus_id = "uart5_rx",
417 .min_signal = 8,
418 .max_signal = 8,
419 .muxval = 1,
420 .cctl = 0,
421 .periph_buses = PL08X_AHB1,
422 }, {
423 .bus_id = "uart5_tx",
424 .min_signal = 9,
425 .max_signal = 9,
426 .muxval = 1,
427 .cctl = 0,
428 .periph_buses = PL08X_AHB1,
429 }, {
430 .bus_id = "ras5_rx",
431 .min_signal = 10,
432 .max_signal = 10,
433 .muxval = 1,
434 .cctl = 0,
435 .periph_buses = PL08X_AHB1,
436 }, {
437 .bus_id = "ras5_tx",
438 .min_signal = 11,
439 .max_signal = 11,
440 .muxval = 1,
441 .cctl = 0,
442 .periph_buses = PL08X_AHB1,
443 }, {
444 .bus_id = "ras6_rx",
445 .min_signal = 12,
446 .max_signal = 12,
447 .muxval = 1,
448 .cctl = 0,
449 .periph_buses = PL08X_AHB1,
450 }, {
451 .bus_id = "ras6_tx",
452 .min_signal = 13,
453 .max_signal = 13,
454 .muxval = 1,
455 .cctl = 0,
456 .periph_buses = PL08X_AHB1,
457 }, {
458 .bus_id = "ras7_rx",
459 .min_signal = 14,
460 .max_signal = 14,
461 .muxval = 1,
462 .cctl = 0,
463 .periph_buses = PL08X_AHB1,
464 }, {
465 .bus_id = "ras7_tx",
466 .min_signal = 15,
467 .max_signal = 15,
468 .muxval = 1,
469 .cctl = 0,
470 .periph_buses = PL08X_AHB1,
471 },
472};
473
287/* uart devices plat data */ 474/* uart devices plat data */
288static struct amba_pl011_data spear310_uart_data[] = { 475static struct amba_pl011_data spear310_uart_data[] = {
289 { 476 {
@@ -313,6 +500,8 @@ static struct amba_pl011_data spear310_uart_data[] = {
313static struct of_dev_auxdata spear310_auxdata_lookup[] __initdata = { 500static struct of_dev_auxdata spear310_auxdata_lookup[] __initdata = {
314 OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL, 501 OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL,
315 &pl022_plat_data), 502 &pl022_plat_data),
503 OF_DEV_AUXDATA("arm,pl080", SPEAR3XX_ICM3_DMA_BASE, NULL,
504 &pl080_plat_data),
316 OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART1_BASE, NULL, 505 OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART1_BASE, NULL,
317 &spear310_uart_data[0]), 506 &spear310_uart_data[0]),
318 OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART2_BASE, NULL, 507 OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART2_BASE, NULL,
@@ -331,6 +520,9 @@ static void __init spear310_dt_init(void)
331 void __iomem *base; 520 void __iomem *base;
332 int ret = 0; 521 int ret = 0;
333 522
523 pl080_plat_data.slave_channels = spear310_dma_info;
524 pl080_plat_data.num_slave_channels = ARRAY_SIZE(spear310_dma_info);
525
334 of_platform_populate(NULL, of_default_bus_match_table, 526 of_platform_populate(NULL, of_default_bus_match_table,
335 spear310_auxdata_lookup, NULL); 527 spear310_auxdata_lookup, NULL);
336 528
diff --git a/arch/arm/mach-spear3xx/spear320.c b/arch/arm/mach-spear3xx/spear320.c
index 9c571d0f20c3..1e74031e1213 100644
--- a/arch/arm/mach-spear3xx/spear320.c
+++ b/arch/arm/mach-spear3xx/spear320.c
@@ -535,6 +535,193 @@ static struct pmx_dev *spear320_evb_pmx_devs[] = {
535 &spear320_pmx_mii1, 535 &spear320_pmx_mii1,
536}; 536};
537 537
538/* DMAC platform data's slave info */
539struct pl08x_channel_data spear320_dma_info[] = {
540 {
541 .bus_id = "uart0_rx",
542 .min_signal = 2,
543 .max_signal = 2,
544 .muxval = 0,
545 .cctl = 0,
546 .periph_buses = PL08X_AHB1,
547 }, {
548 .bus_id = "uart0_tx",
549 .min_signal = 3,
550 .max_signal = 3,
551 .muxval = 0,
552 .cctl = 0,
553 .periph_buses = PL08X_AHB1,
554 }, {
555 .bus_id = "ssp0_rx",
556 .min_signal = 8,
557 .max_signal = 8,
558 .muxval = 0,
559 .cctl = 0,
560 .periph_buses = PL08X_AHB1,
561 }, {
562 .bus_id = "ssp0_tx",
563 .min_signal = 9,
564 .max_signal = 9,
565 .muxval = 0,
566 .cctl = 0,
567 .periph_buses = PL08X_AHB1,
568 }, {
569 .bus_id = "i2c0_rx",
570 .min_signal = 10,
571 .max_signal = 10,
572 .muxval = 0,
573 .cctl = 0,
574 .periph_buses = PL08X_AHB1,
575 }, {
576 .bus_id = "i2c0_tx",
577 .min_signal = 11,
578 .max_signal = 11,
579 .muxval = 0,
580 .cctl = 0,
581 .periph_buses = PL08X_AHB1,
582 }, {
583 .bus_id = "irda",
584 .min_signal = 12,
585 .max_signal = 12,
586 .muxval = 0,
587 .cctl = 0,
588 .periph_buses = PL08X_AHB1,
589 }, {
590 .bus_id = "adc",
591 .min_signal = 13,
592 .max_signal = 13,
593 .muxval = 0,
594 .cctl = 0,
595 .periph_buses = PL08X_AHB1,
596 }, {
597 .bus_id = "to_jpeg",
598 .min_signal = 14,
599 .max_signal = 14,
600 .muxval = 0,
601 .cctl = 0,
602 .periph_buses = PL08X_AHB1,
603 }, {
604 .bus_id = "from_jpeg",
605 .min_signal = 15,
606 .max_signal = 15,
607 .muxval = 0,
608 .cctl = 0,
609 .periph_buses = PL08X_AHB1,
610 }, {
611 .bus_id = "ssp1_rx",
612 .min_signal = 0,
613 .max_signal = 0,
614 .muxval = 1,
615 .cctl = 0,
616 .periph_buses = PL08X_AHB2,
617 }, {
618 .bus_id = "ssp1_tx",
619 .min_signal = 1,
620 .max_signal = 1,
621 .muxval = 1,
622 .cctl = 0,
623 .periph_buses = PL08X_AHB2,
624 }, {
625 .bus_id = "ssp2_rx",
626 .min_signal = 2,
627 .max_signal = 2,
628 .muxval = 1,
629 .cctl = 0,
630 .periph_buses = PL08X_AHB2,
631 }, {
632 .bus_id = "ssp2_tx",
633 .min_signal = 3,
634 .max_signal = 3,
635 .muxval = 1,
636 .cctl = 0,
637 .periph_buses = PL08X_AHB2,
638 }, {
639 .bus_id = "uart1_rx",
640 .min_signal = 4,
641 .max_signal = 4,
642 .muxval = 1,
643 .cctl = 0,
644 .periph_buses = PL08X_AHB2,
645 }, {
646 .bus_id = "uart1_tx",
647 .min_signal = 5,
648 .max_signal = 5,
649 .muxval = 1,
650 .cctl = 0,
651 .periph_buses = PL08X_AHB2,
652 }, {
653 .bus_id = "uart2_rx",
654 .min_signal = 6,
655 .max_signal = 6,
656 .muxval = 1,
657 .cctl = 0,
658 .periph_buses = PL08X_AHB2,
659 }, {
660 .bus_id = "uart2_tx",
661 .min_signal = 7,
662 .max_signal = 7,
663 .muxval = 1,
664 .cctl = 0,
665 .periph_buses = PL08X_AHB2,
666 }, {
667 .bus_id = "i2c1_rx",
668 .min_signal = 8,
669 .max_signal = 8,
670 .muxval = 1,
671 .cctl = 0,
672 .periph_buses = PL08X_AHB2,
673 }, {
674 .bus_id = "i2c1_tx",
675 .min_signal = 9,
676 .max_signal = 9,
677 .muxval = 1,
678 .cctl = 0,
679 .periph_buses = PL08X_AHB2,
680 }, {
681 .bus_id = "i2c2_rx",
682 .min_signal = 10,
683 .max_signal = 10,
684 .muxval = 1,
685 .cctl = 0,
686 .periph_buses = PL08X_AHB2,
687 }, {
688 .bus_id = "i2c2_tx",
689 .min_signal = 11,
690 .max_signal = 11,
691 .muxval = 1,
692 .cctl = 0,
693 .periph_buses = PL08X_AHB2,
694 }, {
695 .bus_id = "i2s_rx",
696 .min_signal = 12,
697 .max_signal = 12,
698 .muxval = 1,
699 .cctl = 0,
700 .periph_buses = PL08X_AHB2,
701 }, {
702 .bus_id = "i2s_tx",
703 .min_signal = 13,
704 .max_signal = 13,
705 .muxval = 1,
706 .cctl = 0,
707 .periph_buses = PL08X_AHB2,
708 }, {
709 .bus_id = "rs485_rx",
710 .min_signal = 14,
711 .max_signal = 14,
712 .muxval = 1,
713 .cctl = 0,
714 .periph_buses = PL08X_AHB2,
715 }, {
716 .bus_id = "rs485_tx",
717 .min_signal = 15,
718 .max_signal = 15,
719 .muxval = 1,
720 .cctl = 0,
721 .periph_buses = PL08X_AHB2,
722 },
723};
724
538static struct pl022_ssp_controller spear320_ssp_data[] = { 725static struct pl022_ssp_controller spear320_ssp_data[] = {
539 { 726 {
540 .bus_id = 1, 727 .bus_id = 1,
@@ -569,6 +756,8 @@ static struct amba_pl011_data spear320_uart_data[] = {
569static struct of_dev_auxdata spear320_auxdata_lookup[] __initdata = { 756static struct of_dev_auxdata spear320_auxdata_lookup[] __initdata = {
570 OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL, 757 OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL,
571 &pl022_plat_data), 758 &pl022_plat_data),
759 OF_DEV_AUXDATA("arm,pl080", SPEAR3XX_ICM3_DMA_BASE, NULL,
760 &pl080_plat_data),
572 OF_DEV_AUXDATA("arm,pl022", SPEAR320_SSP0_BASE, NULL, 761 OF_DEV_AUXDATA("arm,pl022", SPEAR320_SSP0_BASE, NULL,
573 &spear320_ssp_data[0]), 762 &spear320_ssp_data[0]),
574 OF_DEV_AUXDATA("arm,pl022", SPEAR320_SSP1_BASE, NULL, 763 OF_DEV_AUXDATA("arm,pl022", SPEAR320_SSP1_BASE, NULL,
@@ -585,6 +774,9 @@ static void __init spear320_dt_init(void)
585 void __iomem *base; 774 void __iomem *base;
586 int ret = 0; 775 int ret = 0;
587 776
777 pl080_plat_data.slave_channels = spear320_dma_info;
778 pl080_plat_data.num_slave_channels = ARRAY_SIZE(spear320_dma_info);
779
588 of_platform_populate(NULL, of_default_bus_match_table, 780 of_platform_populate(NULL, of_default_bus_match_table,
589 spear320_auxdata_lookup, NULL); 781 spear320_auxdata_lookup, NULL);
590 782
diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c
index a94d8c12ed99..17d4ac9a95e1 100644
--- a/arch/arm/mach-spear3xx/spear3xx.c
+++ b/arch/arm/mach-spear3xx/spear3xx.c
@@ -17,7 +17,9 @@
17#include <linux/amba/pl08x.h> 17#include <linux/amba/pl08x.h>
18#include <linux/of_irq.h> 18#include <linux/of_irq.h>
19#include <linux/io.h> 19#include <linux/io.h>
20#include <asm/hardware/pl080.h>
20#include <asm/hardware/vic.h> 21#include <asm/hardware/vic.h>
22#include <plat/pl080.h>
21#include <mach/generic.h> 23#include <mach/generic.h>
22#include <mach/hardware.h> 24#include <mach/hardware.h>
23 25
@@ -465,6 +467,23 @@ struct pl022_ssp_controller pl022_plat_data = {
465 .num_chipselect = 2, 467 .num_chipselect = 2,
466}; 468};
467 469
470/* dmac device registration */
471struct pl08x_platform_data pl080_plat_data = {
472 .memcpy_channel = {
473 .bus_id = "memcpy",
474 .cctl = (PL080_BSIZE_16 << PL080_CONTROL_SB_SIZE_SHIFT | \
475 PL080_BSIZE_16 << PL080_CONTROL_DB_SIZE_SHIFT | \
476 PL080_WIDTH_32BIT << PL080_CONTROL_SWIDTH_SHIFT | \
477 PL080_WIDTH_32BIT << PL080_CONTROL_DWIDTH_SHIFT | \
478 PL080_CONTROL_PROT_BUFF | PL080_CONTROL_PROT_CACHE | \
479 PL080_CONTROL_PROT_SYS),
480 },
481 .lli_buses = PL08X_AHB1,
482 .mem_buses = PL08X_AHB1,
483 .get_signal = pl080_get_signal,
484 .put_signal = pl080_put_signal,
485};
486
468/* 487/*
469 * Following will create 16MB static virtual/physical mappings 488 * Following will create 16MB static virtual/physical mappings
470 * PHYSICAL VIRTUAL 489 * PHYSICAL VIRTUAL
diff --git a/arch/arm/mach-spear6xx/clock.c b/arch/arm/mach-spear6xx/clock.c
index 5a469800b142..adadef2b27b4 100644
--- a/arch/arm/mach-spear6xx/clock.c
+++ b/arch/arm/mach-spear6xx/clock.c
@@ -657,7 +657,7 @@ static struct clk_lookup spear_clk_lookups[] = {
657 /* clock derived from ahb clk */ 657 /* clock derived from ahb clk */
658 CLKDEV_INIT(NULL, "apb_clk", &apb_clk), 658 CLKDEV_INIT(NULL, "apb_clk", &apb_clk),
659 CLKDEV_INIT("d0200000.i2c", NULL, &i2c_clk), 659 CLKDEV_INIT("d0200000.i2c", NULL, &i2c_clk),
660 CLKDEV_INIT("dma", NULL, &dma_clk), 660 CLKDEV_INIT("fc400000.dma", NULL, &dma_clk),
661 CLKDEV_INIT("jpeg", NULL, &jpeg_clk), 661 CLKDEV_INIT("jpeg", NULL, &jpeg_clk),
662 CLKDEV_INIT("gmac", NULL, &gmac_clk), 662 CLKDEV_INIT("gmac", NULL, &gmac_clk),
663 CLKDEV_INIT("fc000000.flash", NULL, &smi_clk), 663 CLKDEV_INIT("fc000000.flash", NULL, &smi_clk),
diff --git a/arch/arm/mach-spear6xx/spear6xx.c b/arch/arm/mach-spear6xx/spear6xx.c
index 2ed8b14c82c8..5b9e30f54cdb 100644
--- a/arch/arm/mach-spear6xx/spear6xx.c
+++ b/arch/arm/mach-spear6xx/spear6xx.c
@@ -13,15 +13,377 @@
13 * warranty of any kind, whether express or implied. 13 * warranty of any kind, whether express or implied.
14 */ 14 */
15 15
16#include <linux/amba/pl08x.h>
16#include <linux/of.h> 17#include <linux/of.h>
17#include <linux/of_address.h> 18#include <linux/of_address.h>
18#include <linux/of_irq.h> 19#include <linux/of_irq.h>
19#include <linux/of_platform.h> 20#include <linux/of_platform.h>
21#include <asm/hardware/pl080.h>
20#include <asm/hardware/vic.h> 22#include <asm/hardware/vic.h>
21#include <asm/mach/arch.h> 23#include <asm/mach/arch.h>
24#include <plat/pl080.h>
22#include <mach/generic.h> 25#include <mach/generic.h>
23#include <mach/hardware.h> 26#include <mach/hardware.h>
24 27
28/* dmac device registration */
29static struct pl08x_channel_data spear600_dma_info[] = {
30 {
31 .bus_id = "ssp1_rx",
32 .min_signal = 0,
33 .max_signal = 0,
34 .muxval = 0,
35 .cctl = 0,
36 .periph_buses = PL08X_AHB1,
37 }, {
38 .bus_id = "ssp1_tx",
39 .min_signal = 1,
40 .max_signal = 1,
41 .muxval = 0,
42 .cctl = 0,
43 .periph_buses = PL08X_AHB1,
44 }, {
45 .bus_id = "uart0_rx",
46 .min_signal = 2,
47 .max_signal = 2,
48 .muxval = 0,
49 .cctl = 0,
50 .periph_buses = PL08X_AHB1,
51 }, {
52 .bus_id = "uart0_tx",
53 .min_signal = 3,
54 .max_signal = 3,
55 .muxval = 0,
56 .cctl = 0,
57 .periph_buses = PL08X_AHB1,
58 }, {
59 .bus_id = "uart1_rx",
60 .min_signal = 4,
61 .max_signal = 4,
62 .muxval = 0,
63 .cctl = 0,
64 .periph_buses = PL08X_AHB1,
65 }, {
66 .bus_id = "uart1_tx",
67 .min_signal = 5,
68 .max_signal = 5,
69 .muxval = 0,
70 .cctl = 0,
71 .periph_buses = PL08X_AHB1,
72 }, {
73 .bus_id = "ssp2_rx",
74 .min_signal = 6,
75 .max_signal = 6,
76 .muxval = 0,
77 .cctl = 0,
78 .periph_buses = PL08X_AHB2,
79 }, {
80 .bus_id = "ssp2_tx",
81 .min_signal = 7,
82 .max_signal = 7,
83 .muxval = 0,
84 .cctl = 0,
85 .periph_buses = PL08X_AHB2,
86 }, {
87 .bus_id = "ssp0_rx",
88 .min_signal = 8,
89 .max_signal = 8,
90 .muxval = 0,
91 .cctl = 0,
92 .periph_buses = PL08X_AHB1,
93 }, {
94 .bus_id = "ssp0_tx",
95 .min_signal = 9,
96 .max_signal = 9,
97 .muxval = 0,
98 .cctl = 0,
99 .periph_buses = PL08X_AHB1,
100 }, {
101 .bus_id = "i2c_rx",
102 .min_signal = 10,
103 .max_signal = 10,
104 .muxval = 0,
105 .cctl = 0,
106 .periph_buses = PL08X_AHB1,
107 }, {
108 .bus_id = "i2c_tx",
109 .min_signal = 11,
110 .max_signal = 11,
111 .muxval = 0,
112 .cctl = 0,
113 .periph_buses = PL08X_AHB1,
114 }, {
115 .bus_id = "irda",
116 .min_signal = 12,
117 .max_signal = 12,
118 .muxval = 0,
119 .cctl = 0,
120 .periph_buses = PL08X_AHB1,
121 }, {
122 .bus_id = "adc",
123 .min_signal = 13,
124 .max_signal = 13,
125 .muxval = 0,
126 .cctl = 0,
127 .periph_buses = PL08X_AHB2,
128 }, {
129 .bus_id = "to_jpeg",
130 .min_signal = 14,
131 .max_signal = 14,
132 .muxval = 0,
133 .cctl = 0,
134 .periph_buses = PL08X_AHB1,
135 }, {
136 .bus_id = "from_jpeg",
137 .min_signal = 15,
138 .max_signal = 15,
139 .muxval = 0,
140 .cctl = 0,
141 .periph_buses = PL08X_AHB1,
142 }, {
143 .bus_id = "ras0_rx",
144 .min_signal = 0,
145 .max_signal = 0,
146 .muxval = 1,
147 .cctl = 0,
148 .periph_buses = PL08X_AHB1,
149 }, {
150 .bus_id = "ras0_tx",
151 .min_signal = 1,
152 .max_signal = 1,
153 .muxval = 1,
154 .cctl = 0,
155 .periph_buses = PL08X_AHB1,
156 }, {
157 .bus_id = "ras1_rx",
158 .min_signal = 2,
159 .max_signal = 2,
160 .muxval = 1,
161 .cctl = 0,
162 .periph_buses = PL08X_AHB1,
163 }, {
164 .bus_id = "ras1_tx",
165 .min_signal = 3,
166 .max_signal = 3,
167 .muxval = 1,
168 .cctl = 0,
169 .periph_buses = PL08X_AHB1,
170 }, {
171 .bus_id = "ras2_rx",
172 .min_signal = 4,
173 .max_signal = 4,
174 .muxval = 1,
175 .cctl = 0,
176 .periph_buses = PL08X_AHB1,
177 }, {
178 .bus_id = "ras2_tx",
179 .min_signal = 5,
180 .max_signal = 5,
181 .muxval = 1,
182 .cctl = 0,
183 .periph_buses = PL08X_AHB1,
184 }, {
185 .bus_id = "ras3_rx",
186 .min_signal = 6,
187 .max_signal = 6,
188 .muxval = 1,
189 .cctl = 0,
190 .periph_buses = PL08X_AHB1,
191 }, {
192 .bus_id = "ras3_tx",
193 .min_signal = 7,
194 .max_signal = 7,
195 .muxval = 1,
196 .cctl = 0,
197 .periph_buses = PL08X_AHB1,
198 }, {
199 .bus_id = "ras4_rx",
200 .min_signal = 8,
201 .max_signal = 8,
202 .muxval = 1,
203 .cctl = 0,
204 .periph_buses = PL08X_AHB1,
205 }, {
206 .bus_id = "ras4_tx",
207 .min_signal = 9,
208 .max_signal = 9,
209 .muxval = 1,
210 .cctl = 0,
211 .periph_buses = PL08X_AHB1,
212 }, {
213 .bus_id = "ras5_rx",
214 .min_signal = 10,
215 .max_signal = 10,
216 .muxval = 1,
217 .cctl = 0,
218 .periph_buses = PL08X_AHB1,
219 }, {
220 .bus_id = "ras5_tx",
221 .min_signal = 11,
222 .max_signal = 11,
223 .muxval = 1,
224 .cctl = 0,
225 .periph_buses = PL08X_AHB1,
226 }, {
227 .bus_id = "ras6_rx",
228 .min_signal = 12,
229 .max_signal = 12,
230 .muxval = 1,
231 .cctl = 0,
232 .periph_buses = PL08X_AHB1,
233 }, {
234 .bus_id = "ras6_tx",
235 .min_signal = 13,
236 .max_signal = 13,
237 .muxval = 1,
238 .cctl = 0,
239 .periph_buses = PL08X_AHB1,
240 }, {
241 .bus_id = "ras7_rx",
242 .min_signal = 14,
243 .max_signal = 14,
244 .muxval = 1,
245 .cctl = 0,
246 .periph_buses = PL08X_AHB1,
247 }, {
248 .bus_id = "ras7_tx",
249 .min_signal = 15,
250 .max_signal = 15,
251 .muxval = 1,
252 .cctl = 0,
253 .periph_buses = PL08X_AHB1,
254 }, {
255 .bus_id = "ext0_rx",
256 .min_signal = 0,
257 .max_signal = 0,
258 .muxval = 2,
259 .cctl = 0,
260 .periph_buses = PL08X_AHB2,
261 }, {
262 .bus_id = "ext0_tx",
263 .min_signal = 1,
264 .max_signal = 1,
265 .muxval = 2,
266 .cctl = 0,
267 .periph_buses = PL08X_AHB2,
268 }, {
269 .bus_id = "ext1_rx",
270 .min_signal = 2,
271 .max_signal = 2,
272 .muxval = 2,
273 .cctl = 0,
274 .periph_buses = PL08X_AHB2,
275 }, {
276 .bus_id = "ext1_tx",
277 .min_signal = 3,
278 .max_signal = 3,
279 .muxval = 2,
280 .cctl = 0,
281 .periph_buses = PL08X_AHB2,
282 }, {
283 .bus_id = "ext2_rx",
284 .min_signal = 4,
285 .max_signal = 4,
286 .muxval = 2,
287 .cctl = 0,
288 .periph_buses = PL08X_AHB2,
289 }, {
290 .bus_id = "ext2_tx",
291 .min_signal = 5,
292 .max_signal = 5,
293 .muxval = 2,
294 .cctl = 0,
295 .periph_buses = PL08X_AHB2,
296 }, {
297 .bus_id = "ext3_rx",
298 .min_signal = 6,
299 .max_signal = 6,
300 .muxval = 2,
301 .cctl = 0,
302 .periph_buses = PL08X_AHB2,
303 }, {
304 .bus_id = "ext3_tx",
305 .min_signal = 7,
306 .max_signal = 7,
307 .muxval = 2,
308 .cctl = 0,
309 .periph_buses = PL08X_AHB2,
310 }, {
311 .bus_id = "ext4_rx",
312 .min_signal = 8,
313 .max_signal = 8,
314 .muxval = 2,
315 .cctl = 0,
316 .periph_buses = PL08X_AHB2,
317 }, {
318 .bus_id = "ext4_tx",
319 .min_signal = 9,
320 .max_signal = 9,
321 .muxval = 2,
322 .cctl = 0,
323 .periph_buses = PL08X_AHB2,
324 }, {
325 .bus_id = "ext5_rx",
326 .min_signal = 10,
327 .max_signal = 10,
328 .muxval = 2,
329 .cctl = 0,
330 .periph_buses = PL08X_AHB2,
331 }, {
332 .bus_id = "ext5_tx",
333 .min_signal = 11,
334 .max_signal = 11,
335 .muxval = 2,
336 .cctl = 0,
337 .periph_buses = PL08X_AHB2,
338 }, {
339 .bus_id = "ext6_rx",
340 .min_signal = 12,
341 .max_signal = 12,
342 .muxval = 2,
343 .cctl = 0,
344 .periph_buses = PL08X_AHB2,
345 }, {
346 .bus_id = "ext6_tx",
347 .min_signal = 13,
348 .max_signal = 13,
349 .muxval = 2,
350 .cctl = 0,
351 .periph_buses = PL08X_AHB2,
352 }, {
353 .bus_id = "ext7_rx",
354 .min_signal = 14,
355 .max_signal = 14,
356 .muxval = 2,
357 .cctl = 0,
358 .periph_buses = PL08X_AHB2,
359 }, {
360 .bus_id = "ext7_tx",
361 .min_signal = 15,
362 .max_signal = 15,
363 .muxval = 2,
364 .cctl = 0,
365 .periph_buses = PL08X_AHB2,
366 },
367};
368
369struct pl08x_platform_data pl080_plat_data = {
370 .memcpy_channel = {
371 .bus_id = "memcpy",
372 .cctl = (PL080_BSIZE_16 << PL080_CONTROL_SB_SIZE_SHIFT | \
373 PL080_BSIZE_16 << PL080_CONTROL_DB_SIZE_SHIFT | \
374 PL080_WIDTH_32BIT << PL080_CONTROL_SWIDTH_SHIFT | \
375 PL080_WIDTH_32BIT << PL080_CONTROL_DWIDTH_SHIFT | \
376 PL080_CONTROL_PROT_BUFF | PL080_CONTROL_PROT_CACHE | \
377 PL080_CONTROL_PROT_SYS),
378 },
379 .lli_buses = PL08X_AHB1,
380 .mem_buses = PL08X_AHB1,
381 .get_signal = pl080_get_signal,
382 .put_signal = pl080_put_signal,
383 .slave_channels = spear600_dma_info,
384 .num_slave_channels = ARRAY_SIZE(spear600_dma_info),
385};
386
25/* Following will create static virtual/physical mappings */ 387/* Following will create static virtual/physical mappings */
26static struct map_desc spear6xx_io_desc[] __initdata = { 388static struct map_desc spear6xx_io_desc[] __initdata = {
27 { 389 {
@@ -92,9 +454,17 @@ struct sys_timer spear6xx_timer = {
92 .init = spear6xx_timer_init, 454 .init = spear6xx_timer_init,
93}; 455};
94 456
457/* Add auxdata to pass platform data */
458struct of_dev_auxdata spear6xx_auxdata_lookup[] __initdata = {
459 OF_DEV_AUXDATA("arm,pl080", SPEAR6XX_ICM3_DMA_BASE, NULL,
460 &pl080_plat_data),
461 {}
462};
463
95static void __init spear600_dt_init(void) 464static void __init spear600_dt_init(void)
96{ 465{
97 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 466 of_platform_populate(NULL, of_default_bus_match_table,
467 spear6xx_auxdata_lookup, NULL);
98} 468}
99 469
100static const char *spear600_dt_board_compat[] = { 470static const char *spear600_dt_board_compat[] = {
diff --git a/arch/arm/plat-spear/Makefile b/arch/arm/plat-spear/Makefile
index e0f2e5b9530c..4af6258d0fee 100644
--- a/arch/arm/plat-spear/Makefile
+++ b/arch/arm/plat-spear/Makefile
@@ -3,6 +3,6 @@
3# 3#
4 4
5# Common support 5# Common support
6obj-y := clock.o restart.o time.o 6obj-y := clock.o restart.o time.o pl080.o
7 7
8obj-$(CONFIG_ARCH_SPEAR3XX) += shirq.o padmux.o 8obj-$(CONFIG_ARCH_SPEAR3XX) += shirq.o padmux.o
diff --git a/arch/arm/plat-spear/include/plat/pl080.h b/arch/arm/plat-spear/include/plat/pl080.h
new file mode 100644
index 000000000000..e14a3e4932f9
--- /dev/null
+++ b/arch/arm/plat-spear/include/plat/pl080.h
@@ -0,0 +1,21 @@
1/*
2 * arch/arm/plat-spear/include/plat/pl080.h
3 *
4 * DMAC pl080 definitions for SPEAr platform
5 *
6 * Copyright (C) 2012 ST Microelectronics
7 * Viresh Kumar <viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __PLAT_PL080_H
15#define __PLAT_PL080_H
16
17struct pl08x_dma_chan;
18int pl080_get_signal(struct pl08x_dma_chan *ch);
19void pl080_put_signal(struct pl08x_dma_chan *ch);
20
21#endif /* __PLAT_PL080_H */
diff --git a/arch/arm/plat-spear/pl080.c b/arch/arm/plat-spear/pl080.c
new file mode 100644
index 000000000000..d53d75e1af5e
--- /dev/null
+++ b/arch/arm/plat-spear/pl080.c
@@ -0,0 +1,79 @@
1/*
2 * arch/arm/plat-spear/pl080.c
3 *
4 * DMAC pl080 definitions for SPEAr platform
5 *
6 * Copyright (C) 2012 ST Microelectronics
7 * Viresh Kumar <viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#include <linux/amba/pl08x.h>
15#include <linux/amba/bus.h>
16#include <linux/bug.h>
17#include <linux/err.h>
18#include <linux/io.h>
19#include <linux/spinlock_types.h>
20#include <mach/misc_regs.h>
21
22static spinlock_t lock = __SPIN_LOCK_UNLOCKED(x);
23
24struct {
25 unsigned char busy;
26 unsigned char val;
27} signals[16] = {{0, 0}, };
28
29int pl080_get_signal(struct pl08x_dma_chan *ch)
30{
31 const struct pl08x_channel_data *cd = ch->cd;
32 unsigned int signal = cd->min_signal, val;
33 unsigned long flags;
34
35 spin_lock_irqsave(&lock, flags);
36
37 /* Return if signal is already acquired by somebody else */
38 if (signals[signal].busy &&
39 (signals[signal].val != cd->muxval)) {
40 spin_unlock_irqrestore(&lock, flags);
41 return -EBUSY;
42 }
43
44 /* If acquiring for the first time, configure it */
45 if (!signals[signal].busy) {
46 val = readl(DMA_CHN_CFG);
47
48 /*
49 * Each request line has two bits in DMA_CHN_CFG register. To
50 * goto the bits of current request line, do left shift of
51 * value by 2 * signal number.
52 */
53 val &= ~(0x3 << (signal * 2));
54 val |= cd->muxval << (signal * 2);
55 writel(val, DMA_CHN_CFG);
56 }
57
58 signals[signal].busy++;
59 signals[signal].val = cd->muxval;
60 spin_unlock_irqrestore(&lock, flags);
61
62 return signal;
63}
64
65void pl080_put_signal(struct pl08x_dma_chan *ch)
66{
67 const struct pl08x_channel_data *cd = ch->cd;
68 unsigned long flags;
69
70 spin_lock_irqsave(&lock, flags);
71
72 /* if signal is not used */
73 if (!signals[cd->min_signal].busy)
74 BUG();
75
76 signals[cd->min_signal].busy--;
77
78 spin_unlock_irqrestore(&lock, flags);
79}
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-10 12:55:17 -0500