diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-02-01 15:06:40 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-02-01 15:06:40 -0500 |
commit | 0b7d5170dc5a4aca144b27d40b67d73b245df066 (patch) | |
tree | 3637e349b22d8554f4febfed4ef03b3ada63d010 | |
parent | dbead405801c8d5aa1bc21ab6e2a47f060d47c06 (diff) | |
parent | 66ddfc62caec65a25fd5a8b20f535a2958ee94e6 (diff) |
Merge branch 'for-rmk' of git://git.pengutronix.de/git/imx/linux-2.6
-rw-r--r-- | arch/arm/mach-mx25/clock.c | 58 | ||||
-rw-r--r-- | arch/arm/mach-mx25/mx25pdk.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-mx3/mx31ads.c | 4 | ||||
-rw-r--r-- | arch/arm/plat-mxc/audmux-v2.c | 137 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/board-mx31lite.h | 2 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/common.h | 2 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/iomux-mx35.h | 2 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/irqs.h | 5 |
8 files changed, 187 insertions, 25 deletions
diff --git a/arch/arm/mach-mx25/clock.c b/arch/arm/mach-mx25/clock.c index 6e838b857712..6acc88bcdc40 100644 --- a/arch/arm/mach-mx25/clock.c +++ b/arch/arm/mach-mx25/clock.c | |||
@@ -119,6 +119,11 @@ static unsigned long get_rate_nfc(struct clk *clk) | |||
119 | return get_rate_per(8); | 119 | return get_rate_per(8); |
120 | } | 120 | } |
121 | 121 | ||
122 | static unsigned long get_rate_gpt(struct clk *clk) | ||
123 | { | ||
124 | return get_rate_per(5); | ||
125 | } | ||
126 | |||
122 | static unsigned long get_rate_otg(struct clk *clk) | 127 | static unsigned long get_rate_otg(struct clk *clk) |
123 | { | 128 | { |
124 | return 48000000; /* FIXME */ | 129 | return 48000000; /* FIXME */ |
@@ -144,7 +149,7 @@ static void clk_cgcr_disable(struct clk *clk) | |||
144 | __raw_writel(reg, clk->enable_reg); | 149 | __raw_writel(reg, clk->enable_reg); |
145 | } | 150 | } |
146 | 151 | ||
147 | #define DEFINE_CLOCK(name, i, er, es, gr, sr) \ | 152 | #define DEFINE_CLOCK(name, i, er, es, gr, sr, s) \ |
148 | static struct clk name = { \ | 153 | static struct clk name = { \ |
149 | .id = i, \ | 154 | .id = i, \ |
150 | .enable_reg = CRM_BASE + er, \ | 155 | .enable_reg = CRM_BASE + er, \ |
@@ -153,27 +158,30 @@ static void clk_cgcr_disable(struct clk *clk) | |||
153 | .set_rate = sr, \ | 158 | .set_rate = sr, \ |
154 | .enable = clk_cgcr_enable, \ | 159 | .enable = clk_cgcr_enable, \ |
155 | .disable = clk_cgcr_disable, \ | 160 | .disable = clk_cgcr_disable, \ |
161 | .secondary = s, \ | ||
156 | } | 162 | } |
157 | 163 | ||
158 | DEFINE_CLOCK(gpt_clk, 0, CCM_CGCR0, 5, get_rate_ipg, NULL); | 164 | DEFINE_CLOCK(gpt_clk, 0, CCM_CGCR0, 5, get_rate_gpt, NULL, NULL); |
159 | DEFINE_CLOCK(cspi1_clk, 0, CCM_CGCR1, 5, get_rate_ipg, NULL); | 165 | DEFINE_CLOCK(uart_per_clk, 0, CCM_CGCR0, 15, get_rate_uart, NULL, NULL); |
160 | DEFINE_CLOCK(cspi2_clk, 0, CCM_CGCR1, 6, get_rate_ipg, NULL); | 166 | DEFINE_CLOCK(cspi1_clk, 0, CCM_CGCR1, 5, get_rate_ipg, NULL, NULL); |
161 | DEFINE_CLOCK(cspi3_clk, 0, CCM_CGCR1, 7, get_rate_ipg, NULL); | 167 | DEFINE_CLOCK(cspi2_clk, 0, CCM_CGCR1, 6, get_rate_ipg, NULL, NULL); |
162 | DEFINE_CLOCK(uart1_clk, 0, CCM_CGCR2, 14, get_rate_uart, NULL); | 168 | DEFINE_CLOCK(cspi3_clk, 0, CCM_CGCR1, 7, get_rate_ipg, NULL, NULL); |
163 | DEFINE_CLOCK(uart2_clk, 0, CCM_CGCR2, 15, get_rate_uart, NULL); | 169 | DEFINE_CLOCK(fec_ahb_clk, 0, CCM_CGCR0, 23, NULL, NULL, NULL); |
164 | DEFINE_CLOCK(uart3_clk, 0, CCM_CGCR2, 16, get_rate_uart, NULL); | 170 | DEFINE_CLOCK(uart1_clk, 0, CCM_CGCR2, 14, get_rate_uart, NULL, &uart_per_clk); |
165 | DEFINE_CLOCK(uart4_clk, 0, CCM_CGCR2, 17, get_rate_uart, NULL); | 171 | DEFINE_CLOCK(uart2_clk, 0, CCM_CGCR2, 15, get_rate_uart, NULL, &uart_per_clk); |
166 | DEFINE_CLOCK(uart5_clk, 0, CCM_CGCR2, 18, get_rate_uart, NULL); | 172 | DEFINE_CLOCK(uart3_clk, 0, CCM_CGCR2, 16, get_rate_uart, NULL, &uart_per_clk); |
167 | DEFINE_CLOCK(nfc_clk, 0, CCM_CGCR0, 8, get_rate_nfc, NULL); | 173 | DEFINE_CLOCK(uart4_clk, 0, CCM_CGCR2, 17, get_rate_uart, NULL, &uart_per_clk); |
168 | DEFINE_CLOCK(usbotg_clk, 0, CCM_CGCR0, 28, get_rate_otg, NULL); | 174 | DEFINE_CLOCK(uart5_clk, 0, CCM_CGCR2, 18, get_rate_uart, NULL, &uart_per_clk); |
169 | DEFINE_CLOCK(pwm1_clk, 0, CCM_CGCR1, 31, get_rate_ipg, NULL); | 175 | DEFINE_CLOCK(nfc_clk, 0, CCM_CGCR0, 8, get_rate_nfc, NULL, NULL); |
170 | DEFINE_CLOCK(pwm2_clk, 0, CCM_CGCR2, 0, get_rate_ipg, NULL); | 176 | DEFINE_CLOCK(usbotg_clk, 0, CCM_CGCR0, 28, get_rate_otg, NULL, NULL); |
171 | DEFINE_CLOCK(pwm3_clk, 0, CCM_CGCR2, 1, get_rate_ipg, NULL); | 177 | DEFINE_CLOCK(pwm1_clk, 0, CCM_CGCR1, 31, get_rate_ipg, NULL, NULL); |
172 | DEFINE_CLOCK(pwm4_clk, 0, CCM_CGCR2, 2, get_rate_ipg, NULL); | 178 | DEFINE_CLOCK(pwm2_clk, 0, CCM_CGCR2, 0, get_rate_ipg, NULL, NULL); |
173 | DEFINE_CLOCK(kpp_clk, 0, CCM_CGCR1, 28, get_rate_ipg, NULL); | 179 | DEFINE_CLOCK(pwm3_clk, 0, CCM_CGCR2, 1, get_rate_ipg, NULL, NULL); |
174 | DEFINE_CLOCK(tsc_clk, 0, CCM_CGCR2, 13, get_rate_ipg, NULL); | 180 | DEFINE_CLOCK(pwm4_clk, 0, CCM_CGCR2, 2, get_rate_ipg, NULL, NULL); |
175 | DEFINE_CLOCK(i2c_clk, 0, CCM_CGCR0, 6, get_rate_i2c, NULL); | 181 | DEFINE_CLOCK(kpp_clk, 0, CCM_CGCR1, 28, get_rate_ipg, NULL, NULL); |
176 | DEFINE_CLOCK(fec_clk, 0, CCM_CGCR0, 23, get_rate_ipg, NULL); | 182 | DEFINE_CLOCK(tsc_clk, 0, CCM_CGCR2, 13, get_rate_ipg, NULL, NULL); |
183 | DEFINE_CLOCK(i2c_clk, 0, CCM_CGCR0, 6, get_rate_i2c, NULL, NULL); | ||
184 | DEFINE_CLOCK(fec_clk, 0, CCM_CGCR1, 15, get_rate_ipg, NULL, &fec_ahb_clk); | ||
177 | 185 | ||
178 | #define _REGISTER_CLOCK(d, n, c) \ | 186 | #define _REGISTER_CLOCK(d, n, c) \ |
179 | { \ | 187 | { \ |
@@ -208,13 +216,21 @@ static struct clk_lookup lookups[] = { | |||
208 | _REGISTER_CLOCK("fec.0", NULL, fec_clk) | 216 | _REGISTER_CLOCK("fec.0", NULL, fec_clk) |
209 | }; | 217 | }; |
210 | 218 | ||
211 | int __init mx25_clocks_init(unsigned long fref) | 219 | int __init mx25_clocks_init(void) |
212 | { | 220 | { |
213 | int i; | 221 | int i; |
214 | 222 | ||
215 | for (i = 0; i < ARRAY_SIZE(lookups); i++) | 223 | for (i = 0; i < ARRAY_SIZE(lookups); i++) |
216 | clkdev_add(&lookups[i]); | 224 | clkdev_add(&lookups[i]); |
217 | 225 | ||
226 | /* Turn off all clocks except the ones we need to survive, namely: | ||
227 | * EMI, GPIO1-3 (CCM_CGCR1[18:16]), GPT1, IOMUXC (CCM_CGCR1[27]), IIM, | ||
228 | * SCC | ||
229 | */ | ||
230 | __raw_writel((1 << 19), CRM_BASE + CCM_CGCR0); | ||
231 | __raw_writel((0xf << 16) | (3 << 26), CRM_BASE + CCM_CGCR1); | ||
232 | __raw_writel((1 << 5), CRM_BASE + CCM_CGCR2); | ||
233 | |||
218 | mxc_timer_init(&gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54); | 234 | mxc_timer_init(&gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54); |
219 | 235 | ||
220 | return 0; | 236 | return 0; |
diff --git a/arch/arm/mach-mx25/mx25pdk.c b/arch/arm/mach-mx25/mx25pdk.c index 921bc99ea231..6f06089246eb 100644 --- a/arch/arm/mach-mx25/mx25pdk.c +++ b/arch/arm/mach-mx25/mx25pdk.c | |||
@@ -91,7 +91,7 @@ static void __init mx25pdk_init(void) | |||
91 | 91 | ||
92 | static void __init mx25pdk_timer_init(void) | 92 | static void __init mx25pdk_timer_init(void) |
93 | { | 93 | { |
94 | mx25_clocks_init(26000000); | 94 | mx25_clocks_init(); |
95 | } | 95 | } |
96 | 96 | ||
97 | static struct sys_timer mx25pdk_timer = { | 97 | static struct sys_timer mx25pdk_timer = { |
diff --git a/arch/arm/mach-mx3/mx31ads.c b/arch/arm/mach-mx3/mx31ads.c index 3e7bafa2ddbb..938c549767dc 100644 --- a/arch/arm/mach-mx3/mx31ads.c +++ b/arch/arm/mach-mx3/mx31ads.c | |||
@@ -173,6 +173,7 @@ static void expio_unmask_irq(u32 irq) | |||
173 | } | 173 | } |
174 | 174 | ||
175 | static struct irq_chip expio_irq_chip = { | 175 | static struct irq_chip expio_irq_chip = { |
176 | .name = "EXPIO(CPLD)", | ||
176 | .ack = expio_ack_irq, | 177 | .ack = expio_ack_irq, |
177 | .mask = expio_mask_irq, | 178 | .mask = expio_mask_irq, |
178 | .unmask = expio_unmask_irq, | 179 | .unmask = expio_unmask_irq, |
@@ -302,6 +303,7 @@ static struct regulator_init_data ldo1_data = { | |||
302 | .min_uV = 2800000, | 303 | .min_uV = 2800000, |
303 | .max_uV = 2800000, | 304 | .max_uV = 2800000, |
304 | .valid_modes_mask = REGULATOR_MODE_NORMAL, | 305 | .valid_modes_mask = REGULATOR_MODE_NORMAL, |
306 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
305 | .apply_uV = 1, | 307 | .apply_uV = 1, |
306 | }, | 308 | }, |
307 | }; | 309 | }; |
@@ -322,6 +324,7 @@ static struct regulator_init_data ldo2_data = { | |||
322 | .min_uV = 3300000, | 324 | .min_uV = 3300000, |
323 | .max_uV = 3300000, | 325 | .max_uV = 3300000, |
324 | .valid_modes_mask = REGULATOR_MODE_NORMAL, | 326 | .valid_modes_mask = REGULATOR_MODE_NORMAL, |
327 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
325 | .apply_uV = 1, | 328 | .apply_uV = 1, |
326 | }, | 329 | }, |
327 | .num_consumer_supplies = ARRAY_SIZE(ldo2_consumers), | 330 | .num_consumer_supplies = ARRAY_SIZE(ldo2_consumers), |
@@ -459,6 +462,7 @@ static int mx31_wm8350_init(struct wm8350 *wm8350) | |||
459 | 462 | ||
460 | static struct wm8350_platform_data __initdata mx31_wm8350_pdata = { | 463 | static struct wm8350_platform_data __initdata mx31_wm8350_pdata = { |
461 | .init = mx31_wm8350_init, | 464 | .init = mx31_wm8350_init, |
465 | .irq_base = MXC_BOARD_IRQ_START + MXC_MAX_EXP_IO_LINES, | ||
462 | }; | 466 | }; |
463 | #endif | 467 | #endif |
464 | 468 | ||
diff --git a/arch/arm/plat-mxc/audmux-v2.c b/arch/arm/plat-mxc/audmux-v2.c index 6f21096086fd..b06954a84436 100644 --- a/arch/arm/plat-mxc/audmux-v2.c +++ b/arch/arm/plat-mxc/audmux-v2.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include <linux/err.h> | 23 | #include <linux/err.h> |
24 | #include <linux/io.h> | 24 | #include <linux/io.h> |
25 | #include <linux/clk.h> | 25 | #include <linux/clk.h> |
26 | #include <linux/debugfs.h> | ||
26 | #include <mach/audmux.h> | 27 | #include <mach/audmux.h> |
27 | #include <mach/hardware.h> | 28 | #include <mach/hardware.h> |
28 | 29 | ||
@@ -32,6 +33,140 @@ static void __iomem *audmux_base; | |||
32 | #define MXC_AUDMUX_V2_PTCR(x) ((x) * 8) | 33 | #define MXC_AUDMUX_V2_PTCR(x) ((x) * 8) |
33 | #define MXC_AUDMUX_V2_PDCR(x) ((x) * 8 + 4) | 34 | #define MXC_AUDMUX_V2_PDCR(x) ((x) * 8 + 4) |
34 | 35 | ||
36 | #ifdef CONFIG_DEBUG_FS | ||
37 | static struct dentry *audmux_debugfs_root; | ||
38 | |||
39 | static int audmux_open_file(struct inode *inode, struct file *file) | ||
40 | { | ||
41 | file->private_data = inode->i_private; | ||
42 | return 0; | ||
43 | } | ||
44 | |||
45 | /* There is an annoying discontinuity in the SSI numbering with regard | ||
46 | * to the Linux number of the devices */ | ||
47 | static const char *audmux_port_string(int port) | ||
48 | { | ||
49 | switch (port) { | ||
50 | case MX31_AUDMUX_PORT1_SSI0: | ||
51 | return "imx-ssi.0"; | ||
52 | case MX31_AUDMUX_PORT2_SSI1: | ||
53 | return "imx-ssi.1"; | ||
54 | case MX31_AUDMUX_PORT3_SSI_PINS_3: | ||
55 | return "SSI3"; | ||
56 | case MX31_AUDMUX_PORT4_SSI_PINS_4: | ||
57 | return "SSI4"; | ||
58 | case MX31_AUDMUX_PORT5_SSI_PINS_5: | ||
59 | return "SSI5"; | ||
60 | case MX31_AUDMUX_PORT6_SSI_PINS_6: | ||
61 | return "SSI6"; | ||
62 | default: | ||
63 | return "UNKNOWN"; | ||
64 | } | ||
65 | } | ||
66 | |||
67 | static ssize_t audmux_read_file(struct file *file, char __user *user_buf, | ||
68 | size_t count, loff_t *ppos) | ||
69 | { | ||
70 | ssize_t ret; | ||
71 | char *buf = kmalloc(PAGE_SIZE, GFP_KERNEL); | ||
72 | int port = (int)file->private_data; | ||
73 | u32 pdcr, ptcr; | ||
74 | |||
75 | if (!buf) | ||
76 | return -ENOMEM; | ||
77 | |||
78 | if (audmux_clk) | ||
79 | clk_enable(audmux_clk); | ||
80 | |||
81 | ptcr = readl(audmux_base + MXC_AUDMUX_V2_PTCR(port)); | ||
82 | pdcr = readl(audmux_base + MXC_AUDMUX_V2_PDCR(port)); | ||
83 | |||
84 | if (audmux_clk) | ||
85 | clk_disable(audmux_clk); | ||
86 | |||
87 | ret = snprintf(buf, PAGE_SIZE, "PDCR: %08x\nPTCR: %08x\n", | ||
88 | pdcr, ptcr); | ||
89 | |||
90 | if (ptcr & MXC_AUDMUX_V2_PTCR_TFSDIR) | ||
91 | ret += snprintf(buf + ret, PAGE_SIZE - ret, | ||
92 | "TxFS output from %s, ", | ||
93 | audmux_port_string((ptcr >> 27) & 0x7)); | ||
94 | else | ||
95 | ret += snprintf(buf + ret, PAGE_SIZE - ret, | ||
96 | "TxFS input, "); | ||
97 | |||
98 | if (ptcr & MXC_AUDMUX_V2_PTCR_TCLKDIR) | ||
99 | ret += snprintf(buf + ret, PAGE_SIZE - ret, | ||
100 | "TxClk output from %s", | ||
101 | audmux_port_string((ptcr >> 22) & 0x7)); | ||
102 | else | ||
103 | ret += snprintf(buf + ret, PAGE_SIZE - ret, | ||
104 | "TxClk input"); | ||
105 | |||
106 | ret += snprintf(buf + ret, PAGE_SIZE - ret, "\n"); | ||
107 | |||
108 | if (ptcr & MXC_AUDMUX_V2_PTCR_SYN) { | ||
109 | ret += snprintf(buf + ret, PAGE_SIZE - ret, | ||
110 | "Port is symmetric"); | ||
111 | } else { | ||
112 | if (ptcr & MXC_AUDMUX_V2_PTCR_RFSDIR) | ||
113 | ret += snprintf(buf + ret, PAGE_SIZE - ret, | ||
114 | "RxFS output from %s, ", | ||
115 | audmux_port_string((ptcr >> 17) & 0x7)); | ||
116 | else | ||
117 | ret += snprintf(buf + ret, PAGE_SIZE - ret, | ||
118 | "RxFS input, "); | ||
119 | |||
120 | if (ptcr & MXC_AUDMUX_V2_PTCR_RCLKDIR) | ||
121 | ret += snprintf(buf + ret, PAGE_SIZE - ret, | ||
122 | "RxClk output from %s", | ||
123 | audmux_port_string((ptcr >> 12) & 0x7)); | ||
124 | else | ||
125 | ret += snprintf(buf + ret, PAGE_SIZE - ret, | ||
126 | "RxClk input"); | ||
127 | } | ||
128 | |||
129 | ret += snprintf(buf + ret, PAGE_SIZE - ret, | ||
130 | "\nData received from %s\n", | ||
131 | audmux_port_string((pdcr >> 13) & 0x7)); | ||
132 | |||
133 | ret = simple_read_from_buffer(user_buf, count, ppos, buf, ret); | ||
134 | |||
135 | kfree(buf); | ||
136 | |||
137 | return ret; | ||
138 | } | ||
139 | |||
140 | static const struct file_operations audmux_debugfs_fops = { | ||
141 | .open = audmux_open_file, | ||
142 | .read = audmux_read_file, | ||
143 | }; | ||
144 | |||
145 | static void audmux_debugfs_init(void) | ||
146 | { | ||
147 | int i; | ||
148 | char buf[20]; | ||
149 | |||
150 | audmux_debugfs_root = debugfs_create_dir("audmux", NULL); | ||
151 | if (!audmux_debugfs_root) { | ||
152 | pr_warning("Failed to create AUDMUX debugfs root\n"); | ||
153 | return; | ||
154 | } | ||
155 | |||
156 | for (i = 1; i < 8; i++) { | ||
157 | snprintf(buf, sizeof(buf), "ssi%d", i); | ||
158 | if (!debugfs_create_file(buf, 0444, audmux_debugfs_root, | ||
159 | (void *)i, &audmux_debugfs_fops)) | ||
160 | pr_warning("Failed to create AUDMUX port %d debugfs file\n", | ||
161 | i); | ||
162 | } | ||
163 | } | ||
164 | #else | ||
165 | static inline void audmux_debugfs_init(void) | ||
166 | { | ||
167 | } | ||
168 | #endif | ||
169 | |||
35 | int mxc_audmux_v2_configure_port(unsigned int port, unsigned int ptcr, | 170 | int mxc_audmux_v2_configure_port(unsigned int port, unsigned int ptcr, |
36 | unsigned int pdcr) | 171 | unsigned int pdcr) |
37 | { | 172 | { |
@@ -68,6 +203,8 @@ static int mxc_audmux_v2_init(void) | |||
68 | if (cpu_is_mx31() || cpu_is_mx35()) | 203 | if (cpu_is_mx31() || cpu_is_mx35()) |
69 | audmux_base = IO_ADDRESS(AUDMUX_BASE_ADDR); | 204 | audmux_base = IO_ADDRESS(AUDMUX_BASE_ADDR); |
70 | 205 | ||
206 | audmux_debugfs_init(); | ||
207 | |||
71 | return 0; | 208 | return 0; |
72 | } | 209 | } |
73 | 210 | ||
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31lite.h b/arch/arm/plat-mxc/include/mach/board-mx31lite.h index 0184b638c268..2b2da0367578 100644 --- a/arch/arm/plat-mxc/include/mach/board-mx31lite.h +++ b/arch/arm/plat-mxc/include/mach/board-mx31lite.h | |||
@@ -25,7 +25,7 @@ | |||
25 | 25 | ||
26 | #ifndef __ASSEMBLY__ | 26 | #ifndef __ASSEMBLY__ |
27 | 27 | ||
28 | enum mx31lilly_boards { | 28 | enum mx31lite_boards { |
29 | MX31LITE_NOBOARD = 0, | 29 | MX31LITE_NOBOARD = 0, |
30 | MX31LITE_DB = 1, | 30 | MX31LITE_DB = 1, |
31 | }; | 31 | }; |
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h index 286cb9b0a25b..4bf1068ffad9 100644 --- a/arch/arm/plat-mxc/include/mach/common.h +++ b/arch/arm/plat-mxc/include/mach/common.h | |||
@@ -32,7 +32,7 @@ extern void mxc91231_init_irq(void); | |||
32 | extern void mxc_timer_init(struct clk *timer_clk, void __iomem *, int); | 32 | extern void mxc_timer_init(struct clk *timer_clk, void __iomem *, int); |
33 | extern int mx1_clocks_init(unsigned long fref); | 33 | extern int mx1_clocks_init(unsigned long fref); |
34 | extern int mx21_clocks_init(unsigned long lref, unsigned long fref); | 34 | extern int mx21_clocks_init(unsigned long lref, unsigned long fref); |
35 | extern int mx25_clocks_init(unsigned long fref); | 35 | extern int mx25_clocks_init(void); |
36 | extern int mx27_clocks_init(unsigned long fref); | 36 | extern int mx27_clocks_init(unsigned long fref); |
37 | extern int mx31_clocks_init(unsigned long fref); | 37 | extern int mx31_clocks_init(unsigned long fref); |
38 | extern int mx35_clocks_init(void); | 38 | extern int mx35_clocks_init(void); |
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx35.h b/arch/arm/plat-mxc/include/mach/iomux-mx35.h index 00b0ac1db225..c88d40795f7a 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx35.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx35.h | |||
@@ -671,7 +671,7 @@ | |||
671 | #define MX35_PAD_LD8__SDMA_SDMA_DEBUG_PC_8 IOMUX_PAD(0x634, 0x1d0, 6, 0x0, 0, NO_PAD_CTRL) | 671 | #define MX35_PAD_LD8__SDMA_SDMA_DEBUG_PC_8 IOMUX_PAD(0x634, 0x1d0, 6, 0x0, 0, NO_PAD_CTRL) |
672 | 672 | ||
673 | #define MX35_PAD_LD9__IPU_DISPB_DAT_9 IOMUX_PAD(0x638, 0x1d4, 0, 0x0, 0, NO_PAD_CTRL) | 673 | #define MX35_PAD_LD9__IPU_DISPB_DAT_9 IOMUX_PAD(0x638, 0x1d4, 0, 0x0, 0, NO_PAD_CTRL) |
674 | #define MX35_PAD_LD9__GPIO2_9 IOMUX_PAD(0x638, 0x1d4, 5, 0x8e4 0, NO_PAD_CTRL) | 674 | #define MX35_PAD_LD9__GPIO2_9 IOMUX_PAD(0x638, 0x1d4, 5, 0x8e4, 0, NO_PAD_CTRL) |
675 | #define MX35_PAD_LD9__SDMA_SDMA_DEBUG_PC_9 IOMUX_PAD(0x638, 0x1d4, 6, 0x0, 0, NO_PAD_CTRL) | 675 | #define MX35_PAD_LD9__SDMA_SDMA_DEBUG_PC_9 IOMUX_PAD(0x638, 0x1d4, 6, 0x0, 0, NO_PAD_CTRL) |
676 | 676 | ||
677 | #define MX35_PAD_LD10__IPU_DISPB_DAT_10 IOMUX_PAD(0x63c, 0x1d8, 0, 0x0, 0, NO_PAD_CTRL) | 677 | #define MX35_PAD_LD10__IPU_DISPB_DAT_10 IOMUX_PAD(0x63c, 0x1d8, 0, 0x0, 0, NO_PAD_CTRL) |
diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h index ead9d592168d..0cb347645db4 100644 --- a/arch/arm/plat-mxc/include/mach/irqs.h +++ b/arch/arm/plat-mxc/include/mach/irqs.h | |||
@@ -37,7 +37,12 @@ | |||
37 | * within sensible limits. | 37 | * within sensible limits. |
38 | */ | 38 | */ |
39 | #define MXC_BOARD_IRQ_START (MXC_INTERNAL_IRQS + MXC_GPIO_IRQS) | 39 | #define MXC_BOARD_IRQ_START (MXC_INTERNAL_IRQS + MXC_GPIO_IRQS) |
40 | |||
41 | #ifdef CONFIG_MACH_MX31ADS_WM1133_EV1 | ||
42 | #define MXC_BOARD_IRQS 80 | ||
43 | #else | ||
40 | #define MXC_BOARD_IRQS 16 | 44 | #define MXC_BOARD_IRQS 16 |
45 | #endif | ||
41 | 46 | ||
42 | #define MXC_IPU_IRQ_START (MXC_BOARD_IRQ_START + MXC_BOARD_IRQS) | 47 | #define MXC_IPU_IRQ_START (MXC_BOARD_IRQ_START + MXC_BOARD_IRQS) |
43 | 48 | ||