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authorRussell King <rmk+kernel@arm.linux.org.uk>2014-04-25 07:57:18 -0400
committerChris Ball <chris@printf.net>2014-05-22 07:26:28 -0400
commit0718e59ae259f7c48155b4e852d8b0632d59028e (patch)
treee501c1b617ac1ee208eafd8a7fd353ac23dbb018
parent03231f9b781f24205c0af0398ce3cbef70090939 (diff)
mmc: sdhci: move FSL ESDHC reset handling quirk into esdhc code
The Freescale esdhc driver is the only driver which needs the interrupt registers restored after a reset. Move this quirk to be part of the ESDHC driver implementation. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Markus Pargmann <mpa@pengutronix.de> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <chris@printf.net>
-rw-r--r--drivers/mmc/host/sdhci-esdhc-imx.c10
-rw-r--r--drivers/mmc/host/sdhci-esdhc.h3
-rw-r--r--drivers/mmc/host/sdhci.c5
-rw-r--r--include/linux/mmc/sdhci.h2
4 files changed, 10 insertions, 10 deletions
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
index b1d74fa33c5f..812c5772d900 100644
--- a/drivers/mmc/host/sdhci-esdhc-imx.c
+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
@@ -876,6 +876,14 @@ static int esdhc_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs)
876 return esdhc_change_pinstate(host, uhs); 876 return esdhc_change_pinstate(host, uhs);
877} 877}
878 878
879static void esdhc_reset(struct sdhci_host *host, u8 mask)
880{
881 sdhci_reset(host, mask);
882
883 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE);
884 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE);
885}
886
879static struct sdhci_ops sdhci_esdhc_ops = { 887static struct sdhci_ops sdhci_esdhc_ops = {
880 .read_l = esdhc_readl_le, 888 .read_l = esdhc_readl_le,
881 .read_w = esdhc_readw_le, 889 .read_w = esdhc_readw_le,
@@ -888,7 +896,7 @@ static struct sdhci_ops sdhci_esdhc_ops = {
888 .get_ro = esdhc_pltfm_get_ro, 896 .get_ro = esdhc_pltfm_get_ro,
889 .set_bus_width = esdhc_pltfm_set_bus_width, 897 .set_bus_width = esdhc_pltfm_set_bus_width,
890 .set_uhs_signaling = esdhc_set_uhs_signaling, 898 .set_uhs_signaling = esdhc_set_uhs_signaling,
891 .reset = sdhci_reset, 899 .reset = esdhc_reset,
892}; 900};
893 901
894static const struct sdhci_pltfm_data sdhci_esdhc_imx_pdata = { 902static const struct sdhci_pltfm_data sdhci_esdhc_imx_pdata = {
diff --git a/drivers/mmc/host/sdhci-esdhc.h b/drivers/mmc/host/sdhci-esdhc.h
index a7d9f95a7b03..de69bddc3afc 100644
--- a/drivers/mmc/host/sdhci-esdhc.h
+++ b/drivers/mmc/host/sdhci-esdhc.h
@@ -22,8 +22,7 @@
22 SDHCI_QUIRK_NO_BUSY_IRQ | \ 22 SDHCI_QUIRK_NO_BUSY_IRQ | \
23 SDHCI_QUIRK_NONSTANDARD_CLOCK | \ 23 SDHCI_QUIRK_NONSTANDARD_CLOCK | \
24 SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | \ 24 SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | \
25 SDHCI_QUIRK_PIO_NEEDS_DELAY | \ 25 SDHCI_QUIRK_PIO_NEEDS_DELAY)
26 SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET)
27 26
28#define ESDHC_SYSTEM_CONTROL 0x2c 27#define ESDHC_SYSTEM_CONTROL 0x2c
29#define ESDHC_CLOCK_MASK 0x0000fff0 28#define ESDHC_CLOCK_MASK 0x0000fff0
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 5e25147e92f7..074157e8e73d 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -203,11 +203,6 @@ static void sdhci_do_reset(struct sdhci_host *host, u8 mask)
203 203
204 host->ops->reset(host, mask); 204 host->ops->reset(host, mask);
205 205
206 if (host->quirks & SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET) {
207 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE);
208 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE);
209 }
210
211 if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { 206 if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) {
212 if ((host->ops->enable_dma) && (mask & SDHCI_RESET_ALL)) 207 if ((host->ops->enable_dma) && (mask & SDHCI_RESET_ALL))
213 host->ops->enable_dma(host); 208 host->ops->enable_dma(host);
diff --git a/include/linux/mmc/sdhci.h b/include/linux/mmc/sdhci.h
index 9361d8ef509d..02919ef99419 100644
--- a/include/linux/mmc/sdhci.h
+++ b/include/linux/mmc/sdhci.h
@@ -61,8 +61,6 @@ struct sdhci_host {
61#define SDHCI_QUIRK_NONSTANDARD_CLOCK (1<<17) 61#define SDHCI_QUIRK_NONSTANDARD_CLOCK (1<<17)
62/* Controller does not like fast PIO transfers */ 62/* Controller does not like fast PIO transfers */
63#define SDHCI_QUIRK_PIO_NEEDS_DELAY (1<<18) 63#define SDHCI_QUIRK_PIO_NEEDS_DELAY (1<<18)
64/* Controller losing signal/interrupt enable states after reset */
65#define SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET (1<<19)
66/* Controller has to be forced to use block size of 2048 bytes */ 64/* Controller has to be forced to use block size of 2048 bytes */
67#define SDHCI_QUIRK_FORCE_BLK_SZ_2048 (1<<20) 65#define SDHCI_QUIRK_FORCE_BLK_SZ_2048 (1<<20)
68/* Controller cannot do multi-block transfers */ 66/* Controller cannot do multi-block transfers */