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authorGreg Ungerer <gerg@uclinux.org>2010-09-09 03:12:53 -0400
committerGreg Ungerer <gerg@uclinux.org>2010-10-20 20:17:30 -0400
commit04570b46215f81001c94b2baea4af3284d6161ec (patch)
tree0439cdb006d0f00e679a9ef2daec9a831fb32433
parenteb497e7b4996c4c6d2afaa19ee6a32aba867ae4c (diff)
m68knommu: stop using __do_IRQ
The use of __do_IRQ is deprecated, so lets stop using it. Generally the interrupts on the supported processors here are level triggered, so this is strait forward to switch over to using the standard handle_level_irq flow handler. (Although some ColdFire parts support edge triggered GPIO line interrupts we have no support for them yet). Signed-off-by: Greg Ungerer <gerg@uclinux.org>
-rw-r--r--arch/m68knommu/Kconfig4
-rw-r--r--arch/m68knommu/platform/5272/intc.c8
-rw-r--r--arch/m68knommu/platform/68328/ints.c6
-rw-r--r--arch/m68knommu/platform/68360/ints.c6
-rw-r--r--arch/m68knommu/platform/coldfire/intc-2.c13
-rw-r--r--arch/m68knommu/platform/coldfire/intc-simr.c8
-rw-r--r--arch/m68knommu/platform/coldfire/intc.c8
7 files changed, 26 insertions, 27 deletions
diff --git a/arch/m68knommu/Kconfig b/arch/m68knommu/Kconfig
index 2609c394e1df..fd28178b5877 100644
--- a/arch/m68knommu/Kconfig
+++ b/arch/m68knommu/Kconfig
@@ -59,6 +59,10 @@ config GENERIC_HARDIRQS
59 bool 59 bool
60 default y 60 default y
61 61
62config GENERIC_HARDIRQS_NO__DO_IRQ
63 bool
64 default y
65
62config GENERIC_CALIBRATE_DELAY 66config GENERIC_CALIBRATE_DELAY
63 bool 67 bool
64 default y 68 default y
diff --git a/arch/m68knommu/platform/5272/intc.c b/arch/m68knommu/platform/5272/intc.c
index 7081e0a9720e..a61c9c288f40 100644
--- a/arch/m68knommu/platform/5272/intc.c
+++ b/arch/m68knommu/platform/5272/intc.c
@@ -128,11 +128,9 @@ void __init init_IRQ(void)
128 writel(0x88888888, MCF_MBAR + MCFSIM_ICR4); 128 writel(0x88888888, MCF_MBAR + MCFSIM_ICR4);
129 129
130 for (irq = 0; (irq < NR_IRQS); irq++) { 130 for (irq = 0; (irq < NR_IRQS); irq++) {
131 irq_desc[irq].status = IRQ_DISABLED; 131 set_irq_chip(irq, &intc_irq_chip);
132 irq_desc[irq].action = NULL; 132 set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH);
133 irq_desc[irq].depth = 1; 133 set_irq_handler(irq, handle_level_irq);
134 irq_desc[irq].chip = &intc_irq_chip;
135 intc_irq_set_type(irq, 0);
136 } 134 }
137} 135}
138 136
diff --git a/arch/m68knommu/platform/68328/ints.c b/arch/m68knommu/platform/68328/ints.c
index b91ee85d4b5d..865852806a17 100644
--- a/arch/m68knommu/platform/68328/ints.c
+++ b/arch/m68knommu/platform/68328/ints.c
@@ -179,10 +179,8 @@ void __init init_IRQ(void)
179 IMR = ~0; 179 IMR = ~0;
180 180
181 for (i = 0; (i < NR_IRQS); i++) { 181 for (i = 0; (i < NR_IRQS); i++) {
182 irq_desc[i].status = IRQ_DISABLED; 182 set_irq_chip(irq, &intc_irq_chip);
183 irq_desc[i].action = NULL; 183 set_irq_handler(irq, handle_level_irq);
184 irq_desc[i].depth = 1;
185 irq_desc[i].chip = &intc_irq_chip;
186 } 184 }
187} 185}
188 186
diff --git a/arch/m68knommu/platform/68360/ints.c b/arch/m68knommu/platform/68360/ints.c
index 6f22970d8c20..ad96ab1051f0 100644
--- a/arch/m68knommu/platform/68360/ints.c
+++ b/arch/m68knommu/platform/68360/ints.c
@@ -132,10 +132,8 @@ void init_IRQ(void)
132 pquicc->intr_cimr = 0x00000000; 132 pquicc->intr_cimr = 0x00000000;
133 133
134 for (i = 0; (i < NR_IRQS); i++) { 134 for (i = 0; (i < NR_IRQS); i++) {
135 irq_desc[i].status = IRQ_DISABLED; 135 set_irq_chip(irq, &intc_irq_chip);
136 irq_desc[i].action = NULL; 136 set_irq_handler(irq, handle_level_irq);
137 irq_desc[i].depth = 1;
138 irq_desc[i].chip = &intc_irq_chip;
139 } 137 }
140} 138}
141 139
diff --git a/arch/m68knommu/platform/coldfire/intc-2.c b/arch/m68knommu/platform/coldfire/intc-2.c
index c23046cc6564..85daa2b3001a 100644
--- a/arch/m68knommu/platform/coldfire/intc-2.c
+++ b/arch/m68knommu/platform/coldfire/intc-2.c
@@ -93,10 +93,16 @@ static void intc_irq_unmask(unsigned int irq)
93 } 93 }
94} 94}
95 95
96static int intc_irq_set_type(unsigned int irq, unsigned int type)
97{
98 return 0;
99}
100
96static struct irq_chip intc_irq_chip = { 101static struct irq_chip intc_irq_chip = {
97 .name = "CF-INTC", 102 .name = "CF-INTC",
98 .mask = intc_irq_mask, 103 .mask = intc_irq_mask,
99 .unmask = intc_irq_unmask, 104 .unmask = intc_irq_unmask,
105 .set_type = intc_irq_set_type,
100}; 106};
101 107
102void __init init_IRQ(void) 108void __init init_IRQ(void)
@@ -112,10 +118,9 @@ void __init init_IRQ(void)
112#endif 118#endif
113 119
114 for (irq = 0; (irq < NR_IRQS); irq++) { 120 for (irq = 0; (irq < NR_IRQS); irq++) {
115 irq_desc[irq].status = IRQ_DISABLED; 121 set_irq_chip(irq, &intc_irq_chip);
116 irq_desc[irq].action = NULL; 122 set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH);
117 irq_desc[irq].depth = 1; 123 set_irq_handler(irq, handle_level_irq);
118 irq_desc[irq].chip = &intc_irq_chip;
119 } 124 }
120} 125}
121 126
diff --git a/arch/m68knommu/platform/coldfire/intc-simr.c b/arch/m68knommu/platform/coldfire/intc-simr.c
index 8435ced33ac4..bb7048636140 100644
--- a/arch/m68knommu/platform/coldfire/intc-simr.c
+++ b/arch/m68knommu/platform/coldfire/intc-simr.c
@@ -70,11 +70,9 @@ void __init init_IRQ(void)
70 __raw_writeb(0xff, MCFINTC1_SIMR); 70 __raw_writeb(0xff, MCFINTC1_SIMR);
71 71
72 for (irq = 0; (irq < NR_IRQS); irq++) { 72 for (irq = 0; (irq < NR_IRQS); irq++) {
73 irq_desc[irq].status = IRQ_DISABLED; 73 set_irq_chip(irq, &intc_irq_chip);
74 irq_desc[irq].action = NULL; 74 set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH);
75 irq_desc[irq].depth = 1; 75 set_irq_handler(irq, handle_level_irq);
76 irq_desc[irq].chip = &intc_irq_chip;
77 intc_irq_set_type(irq, 0);
78 } 76 }
79} 77}
80 78
diff --git a/arch/m68knommu/platform/coldfire/intc.c b/arch/m68knommu/platform/coldfire/intc.c
index a4560c86db71..60d2fcbe182b 100644
--- a/arch/m68knommu/platform/coldfire/intc.c
+++ b/arch/m68knommu/platform/coldfire/intc.c
@@ -143,11 +143,9 @@ void __init init_IRQ(void)
143 mcf_maskimr(0xffffffff); 143 mcf_maskimr(0xffffffff);
144 144
145 for (irq = 0; (irq < NR_IRQS); irq++) { 145 for (irq = 0; (irq < NR_IRQS); irq++) {
146 irq_desc[irq].status = IRQ_DISABLED; 146 set_irq_chip(irq, &intc_irq_chip);
147 irq_desc[irq].action = NULL; 147 set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH);
148 irq_desc[irq].depth = 1; 148 set_irq_handler(irq, handle_level_irq);
149 irq_desc[irq].chip = &intc_irq_chip;
150 intc_irq_set_type(irq, 0);
151 } 149 }
152} 150}
153 151