diff options
author | Len Brown <len.brown@intel.com> | 2010-10-23 02:33:50 -0400 |
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committer | Len Brown <len.brown@intel.com> | 2010-10-23 02:35:23 -0400 |
commit | 00527cc6bbcac05ab7d54c40bda1ff2a0625ab10 (patch) | |
tree | f74a89bc9c32fb1a978e427ab6687f4231111ba0 | |
parent | 0f3f164d9794f57d8afb033819f508a486c1304d (diff) | |
parent | d13780d439d08a57c87c1a07b6e76ddde61da1aa (diff) |
Merge branch 'intel_idle+snb' into idle-release
Signed-off-by: Len Brown <len.brown@intel.com>
-rw-r--r-- | drivers/idle/intel_idle.c | 43 |
1 files changed, 42 insertions, 1 deletions
diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c index 8e35c89d0927..d310590598f9 100644 --- a/drivers/idle/intel_idle.c +++ b/drivers/idle/intel_idle.c | |||
@@ -81,7 +81,7 @@ static int max_cstate = MWAIT_MAX_NUM_CSTATES - 1; | |||
81 | static unsigned int mwait_substates; | 81 | static unsigned int mwait_substates; |
82 | 82 | ||
83 | /* Reliable LAPIC Timer States, bit 1 for C1 etc. */ | 83 | /* Reliable LAPIC Timer States, bit 1 for C1 etc. */ |
84 | static unsigned int lapic_timer_reliable_states; | 84 | static unsigned int lapic_timer_reliable_states = (1 << 1); /* Default to only C1 */ |
85 | 85 | ||
86 | static struct cpuidle_device __percpu *intel_idle_cpuidle_devices; | 86 | static struct cpuidle_device __percpu *intel_idle_cpuidle_devices; |
87 | static int intel_idle(struct cpuidle_device *dev, struct cpuidle_state *state); | 87 | static int intel_idle(struct cpuidle_device *dev, struct cpuidle_state *state); |
@@ -121,6 +121,42 @@ static struct cpuidle_state nehalem_cstates[MWAIT_MAX_NUM_CSTATES] = { | |||
121 | .enter = &intel_idle }, | 121 | .enter = &intel_idle }, |
122 | }; | 122 | }; |
123 | 123 | ||
124 | static struct cpuidle_state snb_cstates[MWAIT_MAX_NUM_CSTATES] = { | ||
125 | { /* MWAIT C0 */ }, | ||
126 | { /* MWAIT C1 */ | ||
127 | .name = "SNB-C1", | ||
128 | .desc = "MWAIT 0x00", | ||
129 | .driver_data = (void *) 0x00, | ||
130 | .flags = CPUIDLE_FLAG_TIME_VALID, | ||
131 | .exit_latency = 1, | ||
132 | .target_residency = 4, | ||
133 | .enter = &intel_idle }, | ||
134 | { /* MWAIT C2 */ | ||
135 | .name = "SNB-C3", | ||
136 | .desc = "MWAIT 0x10", | ||
137 | .driver_data = (void *) 0x10, | ||
138 | .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, | ||
139 | .exit_latency = 80, | ||
140 | .target_residency = 160, | ||
141 | .enter = &intel_idle }, | ||
142 | { /* MWAIT C3 */ | ||
143 | .name = "SNB-C6", | ||
144 | .desc = "MWAIT 0x20", | ||
145 | .driver_data = (void *) 0x20, | ||
146 | .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, | ||
147 | .exit_latency = 104, | ||
148 | .target_residency = 208, | ||
149 | .enter = &intel_idle }, | ||
150 | { /* MWAIT C4 */ | ||
151 | .name = "SNB-C7", | ||
152 | .desc = "MWAIT 0x30", | ||
153 | .driver_data = (void *) 0x30, | ||
154 | .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, | ||
155 | .exit_latency = 109, | ||
156 | .target_residency = 300, | ||
157 | .enter = &intel_idle }, | ||
158 | }; | ||
159 | |||
124 | static struct cpuidle_state atom_cstates[MWAIT_MAX_NUM_CSTATES] = { | 160 | static struct cpuidle_state atom_cstates[MWAIT_MAX_NUM_CSTATES] = { |
125 | { /* MWAIT C0 */ }, | 161 | { /* MWAIT C0 */ }, |
126 | { /* MWAIT C1 */ | 162 | { /* MWAIT C1 */ |
@@ -269,6 +305,11 @@ static int intel_idle_probe(void) | |||
269 | lapic_timer_reliable_states = (1 << 2) | (1 << 1); /* C2, C1 */ | 305 | lapic_timer_reliable_states = (1 << 2) | (1 << 1); /* C2, C1 */ |
270 | cpuidle_state_table = atom_cstates; | 306 | cpuidle_state_table = atom_cstates; |
271 | break; | 307 | break; |
308 | |||
309 | case 0x2A: /* SNB */ | ||
310 | case 0x2D: /* SNB Xeon */ | ||
311 | cpuidle_state_table = snb_cstates; | ||
312 | break; | ||
272 | #ifdef FUTURE_USE | 313 | #ifdef FUTURE_USE |
273 | case 0x17: /* 23 - Core 2 Duo */ | 314 | case 0x17: /* 23 - Core 2 Duo */ |
274 | lapic_timer_reliable_states = (1 << 2) | (1 << 1); /* C2, C1 */ | 315 | lapic_timer_reliable_states = (1 << 2) | (1 << 1); /* C2, C1 */ |