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authorThomas Gleixner <tglx@linutronix.de>2010-10-08 15:40:23 -0400
committerThomas Gleixner <tglx@linutronix.de>2010-10-12 10:53:38 -0400
commitf7e909eae444ff733ecc5628af76d89c363ab480 (patch)
treedca76cd20bd6fe498b9610fce25be0b45618269a
parent60c69948e5b6357ac0d5ef2a2d0ce31c173c3c64 (diff)
x86: Prepare the affinity common functions for taking struct irq_data *
While at it rename it to sensible function names and fix the return value from unsigned to int for __ioapic_set_affinity (set_desc_affinity). Returning -1 in a function returning unsigned int is somewhat strange. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu>
-rw-r--r--arch/x86/include/asm/hw_irq.h6
-rw-r--r--arch/x86/kernel/apic/io_apic.c77
-rw-r--r--arch/x86/kernel/uv_irq.c2
3 files changed, 33 insertions, 52 deletions
diff --git a/arch/x86/include/asm/hw_irq.h b/arch/x86/include/asm/hw_irq.h
index 46c0fe05f230..76848f27b1ac 100644
--- a/arch/x86/include/asm/hw_irq.h
+++ b/arch/x86/include/asm/hw_irq.h
@@ -95,9 +95,9 @@ extern struct irq_cfg *irq_cfg(unsigned int);
95extern int assign_irq_vector(int, struct irq_cfg *, const struct cpumask *); 95extern int assign_irq_vector(int, struct irq_cfg *, const struct cpumask *);
96extern void send_cleanup_vector(struct irq_cfg *); 96extern void send_cleanup_vector(struct irq_cfg *);
97 97
98struct irq_desc; 98struct irq_data;
99extern unsigned int set_desc_affinity(struct irq_desc *, const struct cpumask *, 99int __ioapic_set_affinity(struct irq_data *, const struct cpumask *,
100 unsigned int *dest_id); 100 unsigned int *dest_id);
101extern int IO_APIC_get_PCI_irq_vector(int bus, int devfn, int pin, struct io_apic_irq_attr *irq_attr); 101extern int IO_APIC_get_PCI_irq_vector(int bus, int devfn, int pin, struct io_apic_irq_attr *irq_attr);
102extern void setup_ioapic_dest(void); 102extern void setup_ioapic_dest(void);
103 103
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 82c3c66e333f..60ca9a47087d 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -2279,65 +2279,46 @@ static void __target_IO_APIC_irq(unsigned int irq, unsigned int dest, struct irq
2279} 2279}
2280 2280
2281/* 2281/*
2282 * Either sets desc->affinity to a valid value, and returns 2282 * Either sets data->affinity to a valid value, and returns
2283 * ->cpu_mask_to_apicid of that in dest_id, or returns -1 and 2283 * ->cpu_mask_to_apicid of that in dest_id, or returns -1 and
2284 * leaves desc->affinity untouched. 2284 * leaves data->affinity untouched.
2285 */ 2285 */
2286unsigned int 2286int __ioapic_set_affinity(struct irq_data *data, const struct cpumask *mask,
2287set_desc_affinity(struct irq_desc *desc, const struct cpumask *mask, 2287 unsigned int *dest_id)
2288 unsigned int *dest_id)
2289{ 2288{
2290 struct irq_cfg *cfg; 2289 struct irq_cfg *cfg = data->chip_data;
2291 unsigned int irq;
2292 2290
2293 if (!cpumask_intersects(mask, cpu_online_mask)) 2291 if (!cpumask_intersects(mask, cpu_online_mask))
2294 return -1; 2292 return -1;
2295 2293
2296 irq = desc->irq; 2294 if (assign_irq_vector(data->irq, data->chip_data, mask))
2297 cfg = get_irq_desc_chip_data(desc);
2298 if (assign_irq_vector(irq, cfg, mask))
2299 return -1; 2295 return -1;
2300 2296
2301 cpumask_copy(desc->affinity, mask); 2297 cpumask_copy(data->affinity, mask);
2302 2298
2303 *dest_id = apic->cpu_mask_to_apicid_and(desc->affinity, cfg->domain); 2299 *dest_id = apic->cpu_mask_to_apicid_and(mask, cfg->domain);
2304 return 0; 2300 return 0;
2305} 2301}
2306 2302
2307static int 2303static int
2308set_ioapic_affinity_irq_desc(struct irq_desc *desc, const struct cpumask *mask) 2304ioapic_set_affinity(struct irq_data *data, const struct cpumask *mask,
2305 bool force)
2309{ 2306{
2310 struct irq_cfg *cfg; 2307 unsigned int dest, irq = data->irq;
2311 unsigned long flags; 2308 unsigned long flags;
2312 unsigned int dest; 2309 int ret;
2313 unsigned int irq;
2314 int ret = -1;
2315
2316 irq = desc->irq;
2317 cfg = get_irq_desc_chip_data(desc);
2318 2310
2319 raw_spin_lock_irqsave(&ioapic_lock, flags); 2311 raw_spin_lock_irqsave(&ioapic_lock, flags);
2320 ret = set_desc_affinity(desc, mask, &dest); 2312 ret = __ioapic_set_affinity(data, mask, &dest);
2321 if (!ret) { 2313 if (!ret) {
2322 /* Only the high 8 bits are valid. */ 2314 /* Only the high 8 bits are valid. */
2323 dest = SET_APIC_LOGICAL_ID(dest); 2315 dest = SET_APIC_LOGICAL_ID(dest);
2324 __target_IO_APIC_irq(irq, dest, cfg); 2316 __target_IO_APIC_irq(irq, dest, data->chip_data);
2325 } 2317 }
2326 raw_spin_unlock_irqrestore(&ioapic_lock, flags); 2318 raw_spin_unlock_irqrestore(&ioapic_lock, flags);
2327
2328 return ret; 2319 return ret;
2329} 2320}
2330 2321
2331static int
2332set_ioapic_affinity_irq(unsigned int irq, const struct cpumask *mask)
2333{
2334 struct irq_desc *desc;
2335
2336 desc = irq_to_desc(irq);
2337
2338 return set_ioapic_affinity_irq_desc(desc, mask);
2339}
2340
2341#ifdef CONFIG_INTR_REMAP 2322#ifdef CONFIG_INTR_REMAP
2342 2323
2343/* 2324/*
@@ -2668,16 +2649,16 @@ static void ir_ack_apic_level(struct irq_data *data)
2668#endif /* CONFIG_INTR_REMAP */ 2649#endif /* CONFIG_INTR_REMAP */
2669 2650
2670static struct irq_chip ioapic_chip __read_mostly = { 2651static struct irq_chip ioapic_chip __read_mostly = {
2671 .name = "IO-APIC", 2652 .name = "IO-APIC",
2672 .irq_startup = startup_ioapic_irq, 2653 .irq_startup = startup_ioapic_irq,
2673 .irq_mask = mask_ioapic_irq, 2654 .irq_mask = mask_ioapic_irq,
2674 .irq_unmask = unmask_ioapic_irq, 2655 .irq_unmask = unmask_ioapic_irq,
2675 .irq_ack = ack_apic_edge, 2656 .irq_ack = ack_apic_edge,
2676 .irq_eoi = ack_apic_level, 2657 .irq_eoi = ack_apic_level,
2677#ifdef CONFIG_SMP 2658#ifdef CONFIG_SMP
2678 .set_affinity = set_ioapic_affinity_irq, 2659 .irq_set_affinity = ioapic_set_affinity,
2679#endif 2660#endif
2680 .irq_retrigger = ioapic_retrigger_irq, 2661 .irq_retrigger = ioapic_retrigger_irq,
2681}; 2662};
2682 2663
2683static struct irq_chip ir_ioapic_chip __read_mostly = { 2664static struct irq_chip ir_ioapic_chip __read_mostly = {
@@ -3327,7 +3308,7 @@ static int set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask)
3327 struct msi_msg msg; 3308 struct msi_msg msg;
3328 unsigned int dest; 3309 unsigned int dest;
3329 3310
3330 if (set_desc_affinity(desc, mask, &dest)) 3311 if (__ioapic_set_affinity(&desc->irq_data, mask, &dest))
3331 return -1; 3312 return -1;
3332 3313
3333 cfg = get_irq_desc_chip_data(desc); 3314 cfg = get_irq_desc_chip_data(desc);
@@ -3359,7 +3340,7 @@ ir_set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask)
3359 if (get_irte(irq, &irte)) 3340 if (get_irte(irq, &irte))
3360 return -1; 3341 return -1;
3361 3342
3362 if (set_desc_affinity(desc, mask, &dest)) 3343 if (__ioapic_set_affinity(&desc->irq_data, mask, &dest))
3363 return -1; 3344 return -1;
3364 3345
3365 irte.vector = cfg->vector; 3346 irte.vector = cfg->vector;
@@ -3534,7 +3515,7 @@ static int dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
3534 struct msi_msg msg; 3515 struct msi_msg msg;
3535 unsigned int dest; 3516 unsigned int dest;
3536 3517
3537 if (set_desc_affinity(desc, mask, &dest)) 3518 if (__ioapic_set_affinity(&desc->irq_data, mask, &dest))
3538 return -1; 3519 return -1;
3539 3520
3540 cfg = get_irq_desc_chip_data(desc); 3521 cfg = get_irq_desc_chip_data(desc);
@@ -3590,7 +3571,7 @@ static int hpet_msi_set_affinity(struct irq_data *data,
3590 struct msi_msg msg; 3571 struct msi_msg msg;
3591 unsigned int dest; 3572 unsigned int dest;
3592 3573
3593 if (set_desc_affinity(desc, mask, &dest)) 3574 if (__ioapic_set_affinity(&desc->irq_data, mask, &dest))
3594 return -1; 3575 return -1;
3595 3576
3596 hpet_msi_read(data->handler_data, &msg); 3577 hpet_msi_read(data->handler_data, &msg);
@@ -3693,7 +3674,7 @@ static int set_ht_irq_affinity(unsigned int irq, const struct cpumask *mask)
3693 struct irq_cfg *cfg; 3674 struct irq_cfg *cfg;
3694 unsigned int dest; 3675 unsigned int dest;
3695 3676
3696 if (set_desc_affinity(desc, mask, &dest)) 3677 if (__ioapic_set_affinity(&desc->irq_data, mask, &dest))
3697 return -1; 3678 return -1;
3698 3679
3699 cfg = get_irq_desc_chip_data(desc); 3680 cfg = get_irq_desc_chip_data(desc);
@@ -4045,14 +4026,14 @@ void __init setup_ioapic_dest(void)
4045 */ 4026 */
4046 if (desc->status & 4027 if (desc->status &
4047 (IRQ_NO_BALANCING | IRQ_AFFINITY_SET)) 4028 (IRQ_NO_BALANCING | IRQ_AFFINITY_SET))
4048 mask = desc->affinity; 4029 mask = desc->irq_data.affinity;
4049 else 4030 else
4050 mask = apic->target_cpus(); 4031 mask = apic->target_cpus();
4051 4032
4052 if (intr_remapping_enabled) 4033 if (intr_remapping_enabled)
4053 set_ir_ioapic_affinity_irq_desc(desc, mask); 4034 set_ir_ioapic_affinity_irq_desc(desc, mask);
4054 else 4035 else
4055 set_ioapic_affinity_irq_desc(desc, mask); 4036 ioapic_set_affinity(&desc->irq_data, mask, false);
4056 } 4037 }
4057 4038
4058} 4039}
diff --git a/arch/x86/kernel/uv_irq.c b/arch/x86/kernel/uv_irq.c
index 2233a42fb907..56a42e11ae07 100644
--- a/arch/x86/kernel/uv_irq.c
+++ b/arch/x86/kernel/uv_irq.c
@@ -216,7 +216,7 @@ static int uv_set_irq_affinity(unsigned int irq, const struct cpumask *mask)
216 unsigned long mmr_offset; 216 unsigned long mmr_offset;
217 int mmr_pnode; 217 int mmr_pnode;
218 218
219 if (set_desc_affinity(desc, mask, &dest)) 219 if (__ioapic_set_affinity(&desc->irq_data, mask, &dest))
220 return -1; 220 return -1;
221 221
222 mmr_value = 0; 222 mmr_value = 0;