diff options
author | Matt Carlson <mcarlson@broadcom.com> | 2009-04-20 02:58:27 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-04-21 04:41:02 -0400 |
commit | 9cf74ebb634fe79587cf9a1d5ff971391dd12e1b (patch) | |
tree | aac181b596720fd60a68732f29514503c18de660 | |
parent | 8d519ab2866c92f5d722085492a124f016f601aa (diff) |
tg3: Limit CLKREQ fix to A[01] of 57780 asic rev
This patch restricts the CLKREQ bugfix to the A0 and A1 revisions
of 57780 ASIC rev chips.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r-- | drivers/net/tg3.c | 3 | ||||
-rw-r--r-- | drivers/net/tg3.h | 2 |
2 files changed, 4 insertions, 1 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index c5c3d2853144..0501fb48a004 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
@@ -11992,7 +11992,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) | |||
11992 | tp->tg3_flags2 &= ~TG3_FLG2_HW_TSO_2; | 11992 | tp->tg3_flags2 &= ~TG3_FLG2_HW_TSO_2; |
11993 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 || | 11993 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 || |
11994 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761 || | 11994 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761 || |
11995 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780) | 11995 | tp->pci_chip_rev_id == CHIPREV_ID_57780_A0 || |
11996 | tp->pci_chip_rev_id == CHIPREV_ID_57780_A1) | ||
11996 | tp->tg3_flags3 |= TG3_FLG3_CLKREQ_BUG; | 11997 | tp->tg3_flags3 |= TG3_FLG3_CLKREQ_BUG; |
11997 | } | 11998 | } |
11998 | } else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785) { | 11999 | } else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785) { |
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h index f1016cb1a89a..b3347c41a1a3 100644 --- a/drivers/net/tg3.h +++ b/drivers/net/tg3.h | |||
@@ -95,6 +95,8 @@ | |||
95 | #define CHIPREV_ID_5752_A1 0x6001 | 95 | #define CHIPREV_ID_5752_A1 0x6001 |
96 | #define CHIPREV_ID_5714_A2 0x9002 | 96 | #define CHIPREV_ID_5714_A2 0x9002 |
97 | #define CHIPREV_ID_5906_A1 0xc001 | 97 | #define CHIPREV_ID_5906_A1 0xc001 |
98 | #define CHIPREV_ID_57780_A0 0x57780000 | ||
99 | #define CHIPREV_ID_57780_A1 0x57780001 | ||
98 | #define GET_ASIC_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 12) | 100 | #define GET_ASIC_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 12) |
99 | #define ASIC_REV_5700 0x07 | 101 | #define ASIC_REV_5700 0x07 |
100 | #define ASIC_REV_5701 0x00 | 102 | #define ASIC_REV_5701 0x00 |