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authorPeter Zijlstra <a.p.zijlstra@chello.nl>2010-03-02 15:16:55 -0500
committerIngo Molnar <mingo@elte.hu>2010-03-10 07:22:29 -0500
commit34538ee77b39a12702e0f4c3ed9e8fa2dd5eb92c (patch)
treeaf887af1600921641c92d1ae637274bb11728b28
parentaff3d91a913c9ae0c2f56b65b27cbd00c7d27ee3 (diff)
perf, x86: Use unlocked bitops
There is no concurrency on these variables, so don't use LOCK'ed ops. As to the intel_pmu_handle_irq() status bit clean, nobody uses that so remove it all together. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: paulus@samba.org Cc: eranian@google.com Cc: robert.richter@amd.com Cc: fweisbec@gmail.com Cc: Arnaldo Carvalho de Melo <acme@infradead.org> LKML-Reference: <20100304140100.240023029@chello.nl> Signed-off-by: Ingo Molnar <mingo@elte.hu>
-rw-r--r--arch/x86/kernel/cpu/perf_event.c8
-rw-r--r--arch/x86/kernel/cpu/perf_event_amd.c2
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel.c1
3 files changed, 5 insertions, 6 deletions
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index 2dd704fa1299..01b166737424 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -643,7 +643,7 @@ static int x86_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign)
643 if (test_bit(hwc->idx, used_mask)) 643 if (test_bit(hwc->idx, used_mask))
644 break; 644 break;
645 645
646 set_bit(hwc->idx, used_mask); 646 __set_bit(hwc->idx, used_mask);
647 if (assign) 647 if (assign)
648 assign[i] = hwc->idx; 648 assign[i] = hwc->idx;
649 } 649 }
@@ -692,7 +692,7 @@ static int x86_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign)
692 if (j == X86_PMC_IDX_MAX) 692 if (j == X86_PMC_IDX_MAX)
693 break; 693 break;
694 694
695 set_bit(j, used_mask); 695 __set_bit(j, used_mask);
696 696
697 if (assign) 697 if (assign)
698 assign[i] = j; 698 assign[i] = j;
@@ -842,7 +842,7 @@ void hw_perf_enable(void)
842 * clear active_mask and events[] yet it preserves 842 * clear active_mask and events[] yet it preserves
843 * idx 843 * idx
844 */ 844 */
845 set_bit(hwc->idx, cpuc->active_mask); 845 __set_bit(hwc->idx, cpuc->active_mask);
846 cpuc->events[hwc->idx] = event; 846 cpuc->events[hwc->idx] = event;
847 847
848 x86_pmu.enable(event); 848 x86_pmu.enable(event);
@@ -1057,7 +1057,7 @@ static void x86_pmu_stop(struct perf_event *event)
1057 * Must be done before we disable, otherwise the nmi handler 1057 * Must be done before we disable, otherwise the nmi handler
1058 * could reenable again: 1058 * could reenable again:
1059 */ 1059 */
1060 clear_bit(idx, cpuc->active_mask); 1060 __clear_bit(idx, cpuc->active_mask);
1061 x86_pmu.disable(event); 1061 x86_pmu.disable(event);
1062 1062
1063 /* 1063 /*
diff --git a/arch/x86/kernel/cpu/perf_event_amd.c b/arch/x86/kernel/cpu/perf_event_amd.c
index 014528ba7d57..573458f1caf2 100644
--- a/arch/x86/kernel/cpu/perf_event_amd.c
+++ b/arch/x86/kernel/cpu/perf_event_amd.c
@@ -287,7 +287,7 @@ static struct amd_nb *amd_alloc_nb(int cpu, int nb_id)
287 * initialize all possible NB constraints 287 * initialize all possible NB constraints
288 */ 288 */
289 for (i = 0; i < x86_pmu.num_events; i++) { 289 for (i = 0; i < x86_pmu.num_events; i++) {
290 set_bit(i, nb->event_constraints[i].idxmsk); 290 __set_bit(i, nb->event_constraints[i].idxmsk);
291 nb->event_constraints[i].weight = 1; 291 nb->event_constraints[i].weight = 1;
292 } 292 }
293 return nb; 293 return nb;
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index a84094897799..d87421c3f55b 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -765,7 +765,6 @@ again:
765 for_each_set_bit(bit, (unsigned long *)&status, X86_PMC_IDX_MAX) { 765 for_each_set_bit(bit, (unsigned long *)&status, X86_PMC_IDX_MAX) {
766 struct perf_event *event = cpuc->events[bit]; 766 struct perf_event *event = cpuc->events[bit];
767 767
768 clear_bit(bit, (unsigned long *) &status);
769 if (!test_bit(bit, cpuc->active_mask)) 768 if (!test_bit(bit, cpuc->active_mask))
770 continue; 769 continue;
771 770