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authorJesper Nilsson <jesper.nilsson@axis.com>2007-12-03 05:16:25 -0500
committerJesper Nilsson <jesper.nilsson@axis.com>2008-02-08 05:06:28 -0500
commitd8ca6b1593382e51f4c245de9040c795be3a0281 (patch)
tree542930dde1e907165b753295286638dd7d9767eb
parent9ce1ea751f7256b2248321c2427612a295f15137 (diff)
CRIS v32: Minor fixes for io.h
- Shorten include paths for machine dependent header files. - Add volatile to hardeware register pointers. - Add spinlocks around critical region. - Expand macros for handling of leds.
-rw-r--r--include/asm-cris/arch-v32/io.h70
1 files changed, 55 insertions, 15 deletions
diff --git a/include/asm-cris/arch-v32/io.h b/include/asm-cris/arch-v32/io.h
index 5efe4d949001..65a287953f50 100644
--- a/include/asm-cris/arch-v32/io.h
+++ b/include/asm-cris/arch-v32/io.h
@@ -1,9 +1,10 @@
1#ifndef _ASM_ARCH_CRIS_IO_H 1#ifndef _ASM_ARCH_CRIS_IO_H
2#define _ASM_ARCH_CRIS_IO_H 2#define _ASM_ARCH_CRIS_IO_H
3 3
4#include <asm/arch/hwregs/reg_map.h> 4#include <linux/spinlock.h>
5#include <asm/arch/hwregs/reg_rdwr.h> 5#include <hwregs/reg_map.h>
6#include <asm/arch/hwregs/gio_defs.h> 6#include <hwregs/reg_rdwr.h>
7#include <hwregs/gio_defs.h>
7 8
8enum crisv32_io_dir 9enum crisv32_io_dir
9{ 10{
@@ -13,10 +14,11 @@ enum crisv32_io_dir
13 14
14struct crisv32_ioport 15struct crisv32_ioport
15{ 16{
16 unsigned long* oe; 17 volatile unsigned long *oe;
17 unsigned long* data; 18 volatile unsigned long *data;
18 unsigned long* data_in; 19 volatile unsigned long *data_in;
19 unsigned int pin_count; 20 unsigned int pin_count;
21 spinlock_t lock;
20}; 22};
21 23
22struct crisv32_iopin 24struct crisv32_iopin
@@ -34,22 +36,37 @@ extern struct crisv32_iopin crisv32_led2_red;
34extern struct crisv32_iopin crisv32_led3_green; 36extern struct crisv32_iopin crisv32_led3_green;
35extern struct crisv32_iopin crisv32_led3_red; 37extern struct crisv32_iopin crisv32_led3_red;
36 38
39extern struct crisv32_iopin crisv32_led_net0_green;
40extern struct crisv32_iopin crisv32_led_net0_red;
41extern struct crisv32_iopin crisv32_led_net1_green;
42extern struct crisv32_iopin crisv32_led_net1_red;
43
37static inline void crisv32_io_set(struct crisv32_iopin* iopin, 44static inline void crisv32_io_set(struct crisv32_iopin* iopin,
38 int val) 45 int val)
39{ 46{
47 long flags;
48 spin_lock_irqsave(&iopin->port->lock, flags);
49
40 if (val) 50 if (val)
41 *iopin->port->data |= iopin->bit; 51 *iopin->port->data |= iopin->bit;
42 else 52 else
43 *iopin->port->data &= ~iopin->bit; 53 *iopin->port->data &= ~iopin->bit;
54
55 spin_unlock_irqrestore(&iopin->port->lock, flags);
44} 56}
45 57
46static inline void crisv32_io_set_dir(struct crisv32_iopin* iopin, 58static inline void crisv32_io_set_dir(struct crisv32_iopin* iopin,
47 enum crisv32_io_dir dir) 59 enum crisv32_io_dir dir)
48{ 60{
61 long flags;
62 spin_lock_irqsave(&iopin->port->lock, flags);
63
49 if (dir == crisv32_io_dir_in) 64 if (dir == crisv32_io_dir_in)
50 *iopin->port->oe &= ~iopin->bit; 65 *iopin->port->oe &= ~iopin->bit;
51 else 66 else
52 *iopin->port->oe |= iopin->bit; 67 *iopin->port->oe |= iopin->bit;
68
69 spin_unlock_irqrestore(&iopin->port->lock, flags);
53} 70}
54 71
55static inline int crisv32_io_rd(struct crisv32_iopin* iopin) 72static inline int crisv32_io_rd(struct crisv32_iopin* iopin)
@@ -60,28 +77,51 @@ static inline int crisv32_io_rd(struct crisv32_iopin* iopin)
60int crisv32_io_get(struct crisv32_iopin* iopin, 77int crisv32_io_get(struct crisv32_iopin* iopin,
61 unsigned int port, unsigned int pin); 78 unsigned int port, unsigned int pin);
62int crisv32_io_get_name(struct crisv32_iopin* iopin, 79int crisv32_io_get_name(struct crisv32_iopin* iopin,
63 char* name); 80 const char *name);
64 81
65#define LED_OFF 0x00 82#define LED_OFF 0x00
66#define LED_GREEN 0x01 83#define LED_GREEN 0x01
67#define LED_RED 0x02 84#define LED_RED 0x02
68#define LED_ORANGE (LED_GREEN | LED_RED) 85#define LED_ORANGE (LED_GREEN | LED_RED)
69 86
70#define LED_NETWORK_SET(x) \ 87#if (defined(CONFIG_ETRAX_NBR_LED_GRP_ONE) || defined(CONFIG_ETRAX_NBR_LED_GRP_TWO))
71 do { \ 88#define LED_NETWORK_GRP0_SET(x) \
72 LED_NETWORK_SET_G((x) & LED_GREEN); \ 89 do { \
73 LED_NETWORK_SET_R((x) & LED_RED); \ 90 LED_NETWORK_GRP0_SET_G((x) & LED_GREEN); \
91 LED_NETWORK_GRP0_SET_R((x) & LED_RED); \
74 } while (0) 92 } while (0)
93#else
94#define LED_NETWORK_GRP0_SET(x) while (0) {}
95#endif
96
97#define LED_NETWORK_GRP0_SET_G(x) \
98 crisv32_io_set(&crisv32_led_net0_green, !(x));
99
100#define LED_NETWORK_GRP0_SET_R(x) \
101 crisv32_io_set(&crisv32_led_net0_red, !(x));
102
103#if defined(CONFIG_ETRAX_NBR_LED_GRP_TWO)
104#define LED_NETWORK_GRP1_SET(x) \
105 do { \
106 LED_NETWORK_GRP1_SET_G((x) & LED_GREEN); \
107 LED_NETWORK_GRP1_SET_R((x) & LED_RED); \
108 } while (0)
109#else
110#define LED_NETWORK_GRP1_SET(x) while (0) {}
111#endif
112
113#define LED_NETWORK_GRP1_SET_G(x) \
114 crisv32_io_set(&crisv32_led_net1_green, !(x));
115
116#define LED_NETWORK_GRP1_SET_R(x) \
117 crisv32_io_set(&crisv32_led_net1_red, !(x));
118
75#define LED_ACTIVE_SET(x) \ 119#define LED_ACTIVE_SET(x) \
76 do { \ 120 do { \
77 LED_ACTIVE_SET_G((x) & LED_GREEN); \ 121 LED_ACTIVE_SET_G((x) & LED_GREEN); \
78 LED_ACTIVE_SET_R((x) & LED_RED); \ 122 LED_ACTIVE_SET_R((x) & LED_RED); \
79 } while (0) 123 } while (0)
80 124
81#define LED_NETWORK_SET_G(x) \
82 crisv32_io_set(&crisv32_led1_green, !(x));
83#define LED_NETWORK_SET_R(x) \
84 crisv32_io_set(&crisv32_led1_red, !(x));
85#define LED_ACTIVE_SET_G(x) \ 125#define LED_ACTIVE_SET_G(x) \
86 crisv32_io_set(&crisv32_led2_green, !(x)); 126 crisv32_io_set(&crisv32_led2_green, !(x));
87#define LED_ACTIVE_SET_R(x) \ 127#define LED_ACTIVE_SET_R(x) \