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authorDavid Howells <dhowells@redhat.com>2009-06-11 08:08:32 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2009-06-11 12:02:20 -0400
commitfd4f683d045e053abb093f80d81afce30ceadad2 (patch)
tree2904ce3549032b63cc0c0ec8f1d74ad82b741237
parent07a2039b8eb0af4ff464efd3dfd95de5c02648c6 (diff)
MN10300: Don't set the dirty bit in the DTLB entries in the TLB-miss handler
Remove the special handling for the Data TLB entry dirty bit in the TLB-miss handler. As the code stands, all that it does is to cause us to take a second data address exception to set the dirty bit. Instead, we can just let pte_mkdirty() set the bit. Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
-rw-r--r--arch/mn10300/mm/tlb-mn10300.S18
1 files changed, 0 insertions, 18 deletions
diff --git a/arch/mn10300/mm/tlb-mn10300.S b/arch/mn10300/mm/tlb-mn10300.S
index 789208094e98..7095147dcb8b 100644
--- a/arch/mn10300/mm/tlb-mn10300.S
+++ b/arch/mn10300/mm/tlb-mn10300.S
@@ -165,24 +165,6 @@ ENTRY(itlb_aerror)
165ENTRY(dtlb_aerror) 165ENTRY(dtlb_aerror)
166 and ~EPSW_NMID,epsw 166 and ~EPSW_NMID,epsw
167 add -4,sp 167 add -4,sp
168 mov d1,(sp)
169
170 movhu (MMUFCR_DFC),d1 # is it the initial valid write
171 # to this page?
172 and MMUFCR_xFC_INITWR,d1
173 beq dtlb_pagefault # jump if not
174
175 mov (DPTEL),d1 # set the dirty bit
176 # (don't replace with BSET!)
177 or _PAGE_DIRTY,d1
178 mov d1,(DPTEL)
179 mov (sp),d1
180 add 4,sp
181 rti
182
183 ALIGN
184dtlb_pagefault:
185 mov (sp),d1
186 SAVE_ALL 168 SAVE_ALL
187 add -4,sp # need to pass three params 169 add -4,sp # need to pass three params
188 170