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authorDave Airlie <airlied@linux.ie>2009-09-21 00:06:30 -0400
committerDave Airlie <airlied@linux.ie>2009-09-21 00:14:59 -0400
commitfe62e1a45d8b11cf653cba79e244fc07bb9a84b0 (patch)
tree41107776d5b3312a20d97cd2061cfb6b3b63ad50
parent4153e584ee02ee59388a89879795fd3653a6b6da (diff)
drm/radeon/kms: more fixes to rv770 suspend/resume path.
This resumes my RV730PRO (4650) RV770 (4850) fine. Still researching the RV4550 (RV710), resumes without X fine. Signed-off-by: Dave Airlie <airlied@redhat.com>
-rw-r--r--drivers/gpu/drm/radeon/radeon.h1
-rw-r--r--drivers/gpu/drm/radeon/rv770.c21
2 files changed, 12 insertions, 10 deletions
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index d7c4efd08928..8567f809a425 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -1070,5 +1070,6 @@ extern void r600_scratch_init(struct radeon_device *rdev);
1070extern int r600_blit_init(struct radeon_device *rdev); 1070extern int r600_blit_init(struct radeon_device *rdev);
1071extern void r600_blit_fini(struct radeon_device *rdev); 1071extern void r600_blit_fini(struct radeon_device *rdev);
1072extern int r600_cp_init_microcode(struct radeon_device *rdev); 1072extern int r600_cp_init_microcode(struct radeon_device *rdev);
1073extern int r600_gpu_reset(struct radeon_device *rdev);
1073 1074
1074#endif 1075#endif
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index 83723f8b94b0..b574c73a5109 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -56,8 +56,6 @@ int rv770_pcie_gart_enable(struct radeon_device *rdev)
56 r = radeon_gart_table_vram_pin(rdev); 56 r = radeon_gart_table_vram_pin(rdev);
57 if (r) 57 if (r)
58 return r; 58 return r;
59 for (i = 0; i < rdev->gart.num_gpu_pages; i++)
60 r600_gart_clear_page(rdev, i);
61 /* Setup L2 cache */ 59 /* Setup L2 cache */
62 WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING | 60 WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING |
63 ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE | 61 ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE |
@@ -681,11 +679,11 @@ static void rv770_gpu_init(struct radeon_device *rdev)
681 WREG32(SQ_CONFIG, sq_config); 679 WREG32(SQ_CONFIG, sq_config);
682 680
683 WREG32(SQ_GPR_RESOURCE_MGMT_1, (NUM_PS_GPRS((rdev->config.rv770.max_gprs * 24)/64) | 681 WREG32(SQ_GPR_RESOURCE_MGMT_1, (NUM_PS_GPRS((rdev->config.rv770.max_gprs * 24)/64) |
684 NUM_VS_GPRS((rdev->config.rv770.max_gprs * 24)/64) | 682 NUM_VS_GPRS((rdev->config.rv770.max_gprs * 24)/64) |
685 NUM_CLAUSE_TEMP_GPRS(((rdev->config.rv770.max_gprs * 24)/64)/2))); 683 NUM_CLAUSE_TEMP_GPRS(((rdev->config.rv770.max_gprs * 24)/64)/2)));
686 684
687 WREG32(SQ_GPR_RESOURCE_MGMT_2, (NUM_GS_GPRS((rdev->config.rv770.max_gprs * 7)/64) | 685 WREG32(SQ_GPR_RESOURCE_MGMT_2, (NUM_GS_GPRS((rdev->config.rv770.max_gprs * 7)/64) |
688 NUM_ES_GPRS((rdev->config.rv770.max_gprs * 7)/64))); 686 NUM_ES_GPRS((rdev->config.rv770.max_gprs * 7)/64)));
689 687
690 sq_thread_resource_mgmt = (NUM_PS_THREADS((rdev->config.rv770.max_threads * 4)/8) | 688 sq_thread_resource_mgmt = (NUM_PS_THREADS((rdev->config.rv770.max_threads * 4)/8) |
691 NUM_VS_THREADS((rdev->config.rv770.max_threads * 2)/8) | 689 NUM_VS_THREADS((rdev->config.rv770.max_threads * 2)/8) |
@@ -717,14 +715,14 @@ static void rv770_gpu_init(struct radeon_device *rdev)
717 WREG32(SQ_DYN_GPR_SIZE_SIMD_AB_7, sq_dyn_gpr_size_simd_ab_0); 715 WREG32(SQ_DYN_GPR_SIZE_SIMD_AB_7, sq_dyn_gpr_size_simd_ab_0);
718 716
719 WREG32(PA_SC_FORCE_EOV_MAX_CNTS, (FORCE_EOV_MAX_CLK_CNT(4095) | 717 WREG32(PA_SC_FORCE_EOV_MAX_CNTS, (FORCE_EOV_MAX_CLK_CNT(4095) |
720 FORCE_EOV_MAX_REZ_CNT(255))); 718 FORCE_EOV_MAX_REZ_CNT(255)));
721 719
722 if (rdev->family == CHIP_RV710) 720 if (rdev->family == CHIP_RV710)
723 WREG32(VGT_CACHE_INVALIDATION, (CACHE_INVALIDATION(TC_ONLY) | 721 WREG32(VGT_CACHE_INVALIDATION, (CACHE_INVALIDATION(TC_ONLY) |
724 AUTO_INVLD_EN(ES_AND_GS_AUTO))); 722 AUTO_INVLD_EN(ES_AND_GS_AUTO)));
725 else 723 else
726 WREG32(VGT_CACHE_INVALIDATION, (CACHE_INVALIDATION(VC_AND_TC) | 724 WREG32(VGT_CACHE_INVALIDATION, (CACHE_INVALIDATION(VC_AND_TC) |
727 AUTO_INVLD_EN(ES_AND_GS_AUTO))); 725 AUTO_INVLD_EN(ES_AND_GS_AUTO)));
728 726
729 switch (rdev->family) { 727 switch (rdev->family) {
730 case CHIP_RV770: 728 case CHIP_RV770:
@@ -848,14 +846,15 @@ int rv770_mc_init(struct radeon_device *rdev)
848} 846}
849int rv770_gpu_reset(struct radeon_device *rdev) 847int rv770_gpu_reset(struct radeon_device *rdev)
850{ 848{
851 /* FIXME: implement */ 849 /* FIXME: implement any rv770 specific bits */
852 return 0; 850 return r600_gpu_reset(rdev);
853} 851}
854 852
855static int rv770_startup(struct radeon_device *rdev) 853static int rv770_startup(struct radeon_device *rdev)
856{ 854{
857 int r; 855 int r;
858 856
857 radeon_gpu_reset(rdev);
859 rv770_mc_resume(rdev); 858 rv770_mc_resume(rdev);
860 r = rv770_pcie_gart_enable(rdev); 859 r = rv770_pcie_gart_enable(rdev);
861 if (r) 860 if (r)
@@ -1039,6 +1038,8 @@ int rv770_init(struct radeon_device *rdev)
1039 1038
1040void rv770_fini(struct radeon_device *rdev) 1039void rv770_fini(struct radeon_device *rdev)
1041{ 1040{
1041 rv770_suspend(rdev);
1042
1042 r600_blit_fini(rdev); 1043 r600_blit_fini(rdev);
1043 radeon_ring_fini(rdev); 1044 radeon_ring_fini(rdev);
1044 rv770_pcie_gart_fini(rdev); 1045 rv770_pcie_gart_fini(rdev);