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authorPaul Mundt <lethal@linux-sh.org>2006-09-27 05:03:34 -0400
committerPaul Mundt <lethal@linux-sh.org>2006-09-27 05:03:34 -0400
commit8599cf059209de22dd3be16816b90f1aad10c74a (patch)
tree8cd5bdec25431a2797147c3eea11532ec71b6272
parentba463937ef75bceaf3943edf01f849257c68623a (diff)
sh: Cleanup IRQ disabling for hardirq handlers.
The generic hardirq layer already takes care of a lot of the appropriate locking and disabling for us, no need to duplicate it in the handlers.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-rw-r--r--arch/sh/boards/bigsur/irq.c47
-rw-r--r--arch/sh/boards/dreamcast/irq.c7
-rw-r--r--arch/sh/boards/landisk/irq.c6
-rw-r--r--arch/sh/boards/mpc1211/setup.c14
-rw-r--r--arch/sh/boards/renesas/hs7751rvoip/irq.c6
-rw-r--r--arch/sh/boards/renesas/r7780rp/irq.c6
-rw-r--r--arch/sh/boards/renesas/rts7751r2d/irq.c6
-rw-r--r--arch/sh/boards/renesas/systemh/irq.c8
-rw-r--r--arch/sh/boards/superh/microdev/irq.c39
-rw-r--r--arch/sh/cchips/hd6446x/hd64461/setup.c7
-rw-r--r--arch/sh/cchips/hd6446x/hd64465/setup.c6
-rw-r--r--arch/sh/cchips/voyagergx/irq.c20
-rw-r--r--arch/sh/kernel/cpu/irq/ipr.c8
-rw-r--r--arch/sh/kernel/cpu/irq/maskreg.c6
-rw-r--r--arch/sh/kernel/cpu/irq/pint.c8
15 files changed, 38 insertions, 156 deletions
diff --git a/arch/sh/boards/bigsur/irq.c b/arch/sh/boards/bigsur/irq.c
index ac946a2201c7..1ab04da36382 100644
--- a/arch/sh/boards/bigsur/irq.c
+++ b/arch/sh/boards/bigsur/irq.c
@@ -19,6 +19,7 @@
19 * IRQ functions for a Hitachi Big Sur Evaluation Board. 19 * IRQ functions for a Hitachi Big Sur Evaluation Board.
20 * 20 *
21 */ 21 */
22#undef DEBUG
22 23
23#include <linux/sched.h> 24#include <linux/sched.h>
24#include <linux/module.h> 25#include <linux/module.h>
@@ -41,10 +42,8 @@
41#undef BIGSUR_DEBUG 42#undef BIGSUR_DEBUG
42 43
43#ifdef BIGSUR_DEBUG 44#ifdef BIGSUR_DEBUG
44#define DPRINTK(args...) printk(args)
45#define DIPRINTK(n, args...) if (BIGSUR_DEBUG>(n)) printk(args) 45#define DIPRINTK(n, args...) if (BIGSUR_DEBUG>(n)) printk(args)
46#else 46#else
47#define DPRINTK(args...)
48#define DIPRINTK(n, args...) 47#define DIPRINTK(n, args...)
49#endif /* BIGSUR_DEBUG */ 48#endif /* BIGSUR_DEBUG */
50 49
@@ -60,45 +59,39 @@ extern int hd64465_irq_demux(int irq);
60/* Level 1 IRQ routines */ 59/* Level 1 IRQ routines */
61static void disable_bigsur_l1irq(unsigned int irq) 60static void disable_bigsur_l1irq(unsigned int irq)
62{ 61{
63 unsigned long flags;
64 unsigned char mask; 62 unsigned char mask;
65 unsigned int mask_port = ((irq - BIGSUR_IRQ_LOW)/8) ? BIGSUR_IRLMR1 : BIGSUR_IRLMR0; 63 unsigned int mask_port = ((irq - BIGSUR_IRQ_LOW)/8) ? BIGSUR_IRLMR1 : BIGSUR_IRLMR0;
66 unsigned char bit = (1 << ((irq - MGATE_IRQ_LOW)%8) ); 64 unsigned char bit = (1 << ((irq - MGATE_IRQ_LOW)%8) );
67 65
68 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) { 66 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) {
69 DPRINTK("Disable L1 IRQ %d\n", irq); 67 pr_debug("Disable L1 IRQ %d\n", irq);
70 DIPRINTK(2,"disable_bigsur_l1irq: IMR=0x%08x mask=0x%x\n", 68 DIPRINTK(2,"disable_bigsur_l1irq: IMR=0x%08x mask=0x%x\n",
71 mask_port, bit); 69 mask_port, bit);
72 local_irq_save(flags);
73 70
74 /* Disable IRQ - set mask bit */ 71 /* Disable IRQ - set mask bit */
75 mask = inb(mask_port) | bit; 72 mask = inb(mask_port) | bit;
76 outb(mask, mask_port); 73 outb(mask, mask_port);
77 local_irq_restore(flags);
78 return; 74 return;
79 } 75 }
80 DPRINTK("disable_bigsur_l1irq: Invalid IRQ %d\n", irq); 76 pr_debug("disable_bigsur_l1irq: Invalid IRQ %d\n", irq);
81} 77}
82 78
83static void enable_bigsur_l1irq(unsigned int irq) 79static void enable_bigsur_l1irq(unsigned int irq)
84{ 80{
85 unsigned long flags;
86 unsigned char mask; 81 unsigned char mask;
87 unsigned int mask_port = ((irq - BIGSUR_IRQ_LOW)/8) ? BIGSUR_IRLMR1 : BIGSUR_IRLMR0; 82 unsigned int mask_port = ((irq - BIGSUR_IRQ_LOW)/8) ? BIGSUR_IRLMR1 : BIGSUR_IRLMR0;
88 unsigned char bit = (1 << ((irq - MGATE_IRQ_LOW)%8) ); 83 unsigned char bit = (1 << ((irq - MGATE_IRQ_LOW)%8) );
89 84
90 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) { 85 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) {
91 DPRINTK("Enable L1 IRQ %d\n", irq); 86 pr_debug("Enable L1 IRQ %d\n", irq);
92 DIPRINTK(2,"enable_bigsur_l1irq: IMR=0x%08x mask=0x%x\n", 87 DIPRINTK(2,"enable_bigsur_l1irq: IMR=0x%08x mask=0x%x\n",
93 mask_port, bit); 88 mask_port, bit);
94 local_irq_save(flags);
95 /* Enable L1 IRQ - clear mask bit */ 89 /* Enable L1 IRQ - clear mask bit */
96 mask = inb(mask_port) & ~bit; 90 mask = inb(mask_port) & ~bit;
97 outb(mask, mask_port); 91 outb(mask, mask_port);
98 local_irq_restore(flags);
99 return; 92 return;
100 } 93 }
101 DPRINTK("enable_bigsur_l1irq: Invalid IRQ %d\n", irq); 94 pr_debug("enable_bigsur_l1irq: Invalid IRQ %d\n", irq);
102} 95}
103 96
104 97
@@ -126,51 +119,45 @@ static const u32 imr_offset = BIGSUR_IMR0 - BIGSUR_IMR1;
126/* Level 2 IRQ routines */ 119/* Level 2 IRQ routines */
127static void disable_bigsur_l2irq(unsigned int irq) 120static void disable_bigsur_l2irq(unsigned int irq)
128{ 121{
129 unsigned long flags;
130 unsigned char mask; 122 unsigned char mask;
131 unsigned char bit = 1 << ((irq-BIGSUR_2NDLVL_IRQ_LOW)%8); 123 unsigned char bit = 1 << ((irq-BIGSUR_2NDLVL_IRQ_LOW)%8);
132 unsigned int mask_port = imr_base - REG_NUM(irq)*imr_offset; 124 unsigned int mask_port = imr_base - REG_NUM(irq)*imr_offset;
133 125
134 if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) { 126 if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) {
135 DPRINTK("Disable L2 IRQ %d\n", irq); 127 pr_debug("Disable L2 IRQ %d\n", irq);
136 DIPRINTK(2,"disable_bigsur_l2irq: IMR=0x%08x mask=0x%x\n", 128 DIPRINTK(2,"disable_bigsur_l2irq: IMR=0x%08x mask=0x%x\n",
137 mask_port, bit); 129 mask_port, bit);
138 local_irq_save(flags);
139 130
140 /* Disable L2 IRQ - set mask bit */ 131 /* Disable L2 IRQ - set mask bit */
141 mask = inb(mask_port) | bit; 132 mask = inb(mask_port) | bit;
142 outb(mask, mask_port); 133 outb(mask, mask_port);
143 local_irq_restore(flags);
144 return; 134 return;
145 } 135 }
146 DPRINTK("disable_bigsur_l2irq: Invalid IRQ %d\n", irq); 136 pr_debug("disable_bigsur_l2irq: Invalid IRQ %d\n", irq);
147} 137}
148 138
149static void enable_bigsur_l2irq(unsigned int irq) 139static void enable_bigsur_l2irq(unsigned int irq)
150{ 140{
151 unsigned long flags;
152 unsigned char mask; 141 unsigned char mask;
153 unsigned char bit = 1 << ((irq-BIGSUR_2NDLVL_IRQ_LOW)%8); 142 unsigned char bit = 1 << ((irq-BIGSUR_2NDLVL_IRQ_LOW)%8);
154 unsigned int mask_port = imr_base - REG_NUM(irq)*imr_offset; 143 unsigned int mask_port = imr_base - REG_NUM(irq)*imr_offset;
155 144
156 if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) { 145 if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) {
157 DPRINTK("Enable L2 IRQ %d\n", irq); 146 pr_debug("Enable L2 IRQ %d\n", irq);
158 DIPRINTK(2,"enable_bigsur_l2irq: IMR=0x%08x mask=0x%x\n", 147 DIPRINTK(2,"enable_bigsur_l2irq: IMR=0x%08x mask=0x%x\n",
159 mask_port, bit); 148 mask_port, bit);
160 local_irq_save(flags);
161 149
162 /* Enable L2 IRQ - clear mask bit */ 150 /* Enable L2 IRQ - clear mask bit */
163 mask = inb(mask_port) & ~bit; 151 mask = inb(mask_port) & ~bit;
164 outb(mask, mask_port); 152 outb(mask, mask_port);
165 local_irq_restore(flags);
166 return; 153 return;
167 } 154 }
168 DPRINTK("enable_bigsur_l2irq: Invalid IRQ %d\n", irq); 155 pr_debug("enable_bigsur_l2irq: Invalid IRQ %d\n", irq);
169} 156}
170 157
171static void mask_and_ack_bigsur(unsigned int irq) 158static void mask_and_ack_bigsur(unsigned int irq)
172{ 159{
173 DPRINTK("mask_and_ack_bigsur IRQ %d\n", irq); 160 pr_debug("mask_and_ack_bigsur IRQ %d\n", irq);
174 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) 161 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH)
175 disable_bigsur_l1irq(irq); 162 disable_bigsur_l1irq(irq);
176 else 163 else
@@ -179,7 +166,7 @@ static void mask_and_ack_bigsur(unsigned int irq)
179 166
180static void end_bigsur_irq(unsigned int irq) 167static void end_bigsur_irq(unsigned int irq)
181{ 168{
182 DPRINTK("end_bigsur_irq IRQ %d\n", irq); 169 pr_debug("end_bigsur_irq IRQ %d\n", irq);
183 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) { 170 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) {
184 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) 171 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH)
185 enable_bigsur_l1irq(irq); 172 enable_bigsur_l1irq(irq);
@@ -193,7 +180,7 @@ static unsigned int startup_bigsur_irq(unsigned int irq)
193 u8 mask; 180 u8 mask;
194 u32 reg; 181 u32 reg;
195 182
196 DPRINTK("startup_bigsur_irq IRQ %d\n", irq); 183 pr_debug("startup_bigsur_irq IRQ %d\n", irq);
197 184
198 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) { 185 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) {
199 /* Enable the L1 IRQ */ 186 /* Enable the L1 IRQ */
@@ -218,7 +205,7 @@ static unsigned int startup_bigsur_irq(unsigned int irq)
218 205
219static void shutdown_bigsur_irq(unsigned int irq) 206static void shutdown_bigsur_irq(unsigned int irq)
220{ 207{
221 DPRINTK("shutdown_bigsur_irq IRQ %d\n", irq); 208 pr_debug("shutdown_bigsur_irq IRQ %d\n", irq);
222 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) 209 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH)
223 disable_bigsur_l1irq(irq); 210 disable_bigsur_l1irq(irq);
224 else 211 else
@@ -260,7 +247,7 @@ static void make_bigsur_l1isr(unsigned int irq) {
260 disable_bigsur_l1irq(irq); 247 disable_bigsur_l1irq(irq);
261 return; 248 return;
262 } 249 }
263 DPRINTK("make_bigsur_l1isr: bad irq, %d\n", irq); 250 pr_debug("make_bigsur_l1isr: bad irq, %d\n", irq);
264 return; 251 return;
265} 252}
266 253
@@ -277,7 +264,7 @@ static void make_bigsur_l2isr(unsigned int irq) {
277 disable_bigsur_l2irq(irq); 264 disable_bigsur_l2irq(irq);
278 return; 265 return;
279 } 266 }
280 DPRINTK("make_bigsur_l2isr: bad irq, %d\n", irq); 267 pr_debug("make_bigsur_l2isr: bad irq, %d\n", irq);
281 return; 268 return;
282} 269}
283 270
diff --git a/arch/sh/boards/dreamcast/irq.c b/arch/sh/boards/dreamcast/irq.c
index 373a22e48ac4..5bf01f86c20c 100644
--- a/arch/sh/boards/dreamcast/irq.c
+++ b/arch/sh/boards/dreamcast/irq.c
@@ -10,7 +10,6 @@
10 */ 10 */
11 11
12#include <linux/irq.h> 12#include <linux/irq.h>
13
14#include <asm/io.h> 13#include <asm/io.h>
15#include <asm/irq.h> 14#include <asm/irq.h>
16#include <asm/dreamcast/sysasic.h> 15#include <asm/dreamcast/sysasic.h>
@@ -57,29 +56,23 @@
57/* Disable the hardware event by masking its bit in its EMR */ 56/* Disable the hardware event by masking its bit in its EMR */
58static inline void disable_systemasic_irq(unsigned int irq) 57static inline void disable_systemasic_irq(unsigned int irq)
59{ 58{
60 unsigned long flags;
61 __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2); 59 __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2);
62 __u32 mask; 60 __u32 mask;
63 61
64 local_irq_save(flags);
65 mask = inl(emr); 62 mask = inl(emr);
66 mask &= ~(1 << EVENT_BIT(irq)); 63 mask &= ~(1 << EVENT_BIT(irq));
67 outl(mask, emr); 64 outl(mask, emr);
68 local_irq_restore(flags);
69} 65}
70 66
71/* Enable the hardware event by setting its bit in its EMR */ 67/* Enable the hardware event by setting its bit in its EMR */
72static inline void enable_systemasic_irq(unsigned int irq) 68static inline void enable_systemasic_irq(unsigned int irq)
73{ 69{
74 unsigned long flags;
75 __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2); 70 __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2);
76 __u32 mask; 71 __u32 mask;
77 72
78 local_irq_save(flags);
79 mask = inl(emr); 73 mask = inl(emr);
80 mask |= (1 << EVENT_BIT(irq)); 74 mask |= (1 << EVENT_BIT(irq));
81 outl(mask, emr); 75 outl(mask, emr);
82 local_irq_restore(flags);
83} 76}
84 77
85/* Acknowledge a hardware event by writing its bit back to its ESR */ 78/* Acknowledge a hardware event by writing its bit back to its ESR */
diff --git a/arch/sh/boards/landisk/irq.c b/arch/sh/boards/landisk/irq.c
index 1dcc3feb7a44..a006d6443225 100644
--- a/arch/sh/boards/landisk/irq.c
+++ b/arch/sh/boards/landisk/irq.c
@@ -39,30 +39,24 @@ static unsigned int startup_landisk_irq(unsigned int irq)
39 39
40static void disable_landisk_irq(unsigned int irq) 40static void disable_landisk_irq(unsigned int irq)
41{ 41{
42 unsigned long flags;
43 unsigned char val; 42 unsigned char val;
44 unsigned char mask = 0xff ^ (0x01 << (irq - 5)); 43 unsigned char mask = 0xff ^ (0x01 << (irq - 5));
45 44
46 /* Set the priority in IPR to 0 */ 45 /* Set the priority in IPR to 0 */
47 local_irq_save(flags);
48 val = ctrl_inb(PA_IMASK); 46 val = ctrl_inb(PA_IMASK);
49 val &= mask; 47 val &= mask;
50 ctrl_outb(val, PA_IMASK); 48 ctrl_outb(val, PA_IMASK);
51 local_irq_restore(flags);
52} 49}
53 50
54static void enable_landisk_irq(unsigned int irq) 51static void enable_landisk_irq(unsigned int irq)
55{ 52{
56 unsigned long flags;
57 unsigned char val; 53 unsigned char val;
58 unsigned char value = (0x01 << (irq - 5)); 54 unsigned char value = (0x01 << (irq - 5));
59 55
60 /* Set priority in IPR back to original value */ 56 /* Set priority in IPR back to original value */
61 local_irq_save(flags);
62 val = ctrl_inb(PA_IMASK); 57 val = ctrl_inb(PA_IMASK);
63 val |= value; 58 val |= value;
64 ctrl_outb(val, PA_IMASK); 59 ctrl_outb(val, PA_IMASK);
65 local_irq_restore(flags);
66} 60}
67 61
68static void ack_landisk_irq(unsigned int irq) 62static void ack_landisk_irq(unsigned int irq)
diff --git a/arch/sh/boards/mpc1211/setup.c b/arch/sh/boards/mpc1211/setup.c
index a8c5180ae219..e9c8ff221dda 100644
--- a/arch/sh/boards/mpc1211/setup.c
+++ b/arch/sh/boards/mpc1211/setup.c
@@ -80,9 +80,6 @@ volatile unsigned long irq_err_count;
80 80
81static void disable_mpc1211_irq(unsigned int irq) 81static void disable_mpc1211_irq(unsigned int irq)
82{ 82{
83 unsigned long flags;
84
85 save_and_cli(flags);
86 if( irq < 8) { 83 if( irq < 8) {
87 m_irq_mask |= (1 << irq); 84 m_irq_mask |= (1 << irq);
88 outb(m_irq_mask,I8259_M_MR); 85 outb(m_irq_mask,I8259_M_MR);
@@ -90,16 +87,11 @@ static void disable_mpc1211_irq(unsigned int irq)
90 s_irq_mask |= (1 << (irq - 8)); 87 s_irq_mask |= (1 << (irq - 8));
91 outb(s_irq_mask,I8259_S_MR); 88 outb(s_irq_mask,I8259_S_MR);
92 } 89 }
93 restore_flags(flags);
94 90
95} 91}
96 92
97static void enable_mpc1211_irq(unsigned int irq) 93static void enable_mpc1211_irq(unsigned int irq)
98{ 94{
99 unsigned long flags;
100
101 save_and_cli(flags);
102
103 if( irq < 8) { 95 if( irq < 8) {
104 m_irq_mask &= ~(1 << irq); 96 m_irq_mask &= ~(1 << irq);
105 outb(m_irq_mask,I8259_M_MR); 97 outb(m_irq_mask,I8259_M_MR);
@@ -107,7 +99,6 @@ static void enable_mpc1211_irq(unsigned int irq)
107 s_irq_mask &= ~(1 << (irq - 8)); 99 s_irq_mask &= ~(1 << (irq - 8));
108 outb(s_irq_mask,I8259_S_MR); 100 outb(s_irq_mask,I8259_S_MR);
109 } 101 }
110 restore_flags(flags);
111} 102}
112 103
113static inline int mpc1211_irq_real(unsigned int irq) 104static inline int mpc1211_irq_real(unsigned int irq)
@@ -131,10 +122,6 @@ static inline int mpc1211_irq_real(unsigned int irq)
131 122
132static void mask_and_ack_mpc1211(unsigned int irq) 123static void mask_and_ack_mpc1211(unsigned int irq)
133{ 124{
134 unsigned long flags;
135
136 save_and_cli(flags);
137
138 if(irq < 8) { 125 if(irq < 8) {
139 if(m_irq_mask & (1<<irq)){ 126 if(m_irq_mask & (1<<irq)){
140 if(!mpc1211_irq_real(irq)){ 127 if(!mpc1211_irq_real(irq)){
@@ -162,7 +149,6 @@ static void mask_and_ack_mpc1211(unsigned int irq)
162 outb(0x60+(irq-8),I8259_S_CR); /* EOI */ 149 outb(0x60+(irq-8),I8259_S_CR); /* EOI */
163 outb(0x60+2,I8259_M_CR); 150 outb(0x60+2,I8259_M_CR);
164 } 151 }
165 restore_flags(flags);
166} 152}
167 153
168static void end_mpc1211_irq(unsigned int irq) 154static void end_mpc1211_irq(unsigned int irq)
diff --git a/arch/sh/boards/renesas/hs7751rvoip/irq.c b/arch/sh/boards/renesas/hs7751rvoip/irq.c
index 705b7ddcb0d2..c617b188258a 100644
--- a/arch/sh/boards/renesas/hs7751rvoip/irq.c
+++ b/arch/sh/boards/renesas/hs7751rvoip/irq.c
@@ -35,30 +35,24 @@ static unsigned int startup_hs7751rvoip_irq(unsigned int irq)
35 35
36static void disable_hs7751rvoip_irq(unsigned int irq) 36static void disable_hs7751rvoip_irq(unsigned int irq)
37{ 37{
38 unsigned long flags;
39 unsigned short val; 38 unsigned short val;
40 unsigned short mask = 0xffff ^ (0x0001 << mask_pos[irq]); 39 unsigned short mask = 0xffff ^ (0x0001 << mask_pos[irq]);
41 40
42 /* Set the priority in IPR to 0 */ 41 /* Set the priority in IPR to 0 */
43 local_irq_save(flags);
44 val = ctrl_inw(IRLCNTR3); 42 val = ctrl_inw(IRLCNTR3);
45 val &= mask; 43 val &= mask;
46 ctrl_outw(val, IRLCNTR3); 44 ctrl_outw(val, IRLCNTR3);
47 local_irq_restore(flags);
48} 45}
49 46
50static void enable_hs7751rvoip_irq(unsigned int irq) 47static void enable_hs7751rvoip_irq(unsigned int irq)
51{ 48{
52 unsigned long flags;
53 unsigned short val; 49 unsigned short val;
54 unsigned short value = (0x0001 << mask_pos[irq]); 50 unsigned short value = (0x0001 << mask_pos[irq]);
55 51
56 /* Set priority in IPR back to original value */ 52 /* Set priority in IPR back to original value */
57 local_irq_save(flags);
58 val = ctrl_inw(IRLCNTR3); 53 val = ctrl_inw(IRLCNTR3);
59 val |= value; 54 val |= value;
60 ctrl_outw(val, IRLCNTR3); 55 ctrl_outw(val, IRLCNTR3);
61 local_irq_restore(flags);
62} 56}
63 57
64static void ack_hs7751rvoip_irq(unsigned int irq) 58static void ack_hs7751rvoip_irq(unsigned int irq)
diff --git a/arch/sh/boards/renesas/r7780rp/irq.c b/arch/sh/boards/renesas/r7780rp/irq.c
index c7b9fe6e640d..61d5e5d3c294 100644
--- a/arch/sh/boards/renesas/r7780rp/irq.c
+++ b/arch/sh/boards/renesas/r7780rp/irq.c
@@ -39,30 +39,24 @@ static unsigned int startup_r7780rp_irq(unsigned int irq)
39 39
40static void disable_r7780rp_irq(unsigned int irq) 40static void disable_r7780rp_irq(unsigned int irq)
41{ 41{
42 unsigned long flags;
43 unsigned short val; 42 unsigned short val;
44 unsigned short mask = 0xffff ^ (0x0001 << mask_pos[irq]); 43 unsigned short mask = 0xffff ^ (0x0001 << mask_pos[irq]);
45 44
46 /* Set the priority in IPR to 0 */ 45 /* Set the priority in IPR to 0 */
47 local_irq_save(flags);
48 val = ctrl_inw(IRLCNTR1); 46 val = ctrl_inw(IRLCNTR1);
49 val &= mask; 47 val &= mask;
50 ctrl_outw(val, IRLCNTR1); 48 ctrl_outw(val, IRLCNTR1);
51 local_irq_restore(flags);
52} 49}
53 50
54static void enable_r7780rp_irq(unsigned int irq) 51static void enable_r7780rp_irq(unsigned int irq)
55{ 52{
56 unsigned long flags;
57 unsigned short val; 53 unsigned short val;
58 unsigned short value = (0x0001 << mask_pos[irq]); 54 unsigned short value = (0x0001 << mask_pos[irq]);
59 55
60 /* Set priority in IPR back to original value */ 56 /* Set priority in IPR back to original value */
61 local_irq_save(flags);
62 val = ctrl_inw(IRLCNTR1); 57 val = ctrl_inw(IRLCNTR1);
63 val |= value; 58 val |= value;
64 ctrl_outw(val, IRLCNTR1); 59 ctrl_outw(val, IRLCNTR1);
65 local_irq_restore(flags);
66} 60}
67 61
68static void ack_r7780rp_irq(unsigned int irq) 62static void ack_r7780rp_irq(unsigned int irq)
diff --git a/arch/sh/boards/renesas/rts7751r2d/irq.c b/arch/sh/boards/renesas/rts7751r2d/irq.c
index 154535440bbf..c915e7a3693a 100644
--- a/arch/sh/boards/renesas/rts7751r2d/irq.c
+++ b/arch/sh/boards/renesas/rts7751r2d/irq.c
@@ -41,30 +41,24 @@ static unsigned int startup_rts7751r2d_irq(unsigned int irq)
41 41
42static void disable_rts7751r2d_irq(unsigned int irq) 42static void disable_rts7751r2d_irq(unsigned int irq)
43{ 43{
44 unsigned long flags;
45 unsigned short val; 44 unsigned short val;
46 unsigned short mask = 0xffff ^ (0x0001 << mask_pos[irq]); 45 unsigned short mask = 0xffff ^ (0x0001 << mask_pos[irq]);
47 46
48 /* Set the priority in IPR to 0 */ 47 /* Set the priority in IPR to 0 */
49 local_irq_save(flags);
50 val = ctrl_inw(IRLCNTR1); 48 val = ctrl_inw(IRLCNTR1);
51 val &= mask; 49 val &= mask;
52 ctrl_outw(val, IRLCNTR1); 50 ctrl_outw(val, IRLCNTR1);
53 local_irq_restore(flags);
54} 51}
55 52
56static void enable_rts7751r2d_irq(unsigned int irq) 53static void enable_rts7751r2d_irq(unsigned int irq)
57{ 54{
58 unsigned long flags;
59 unsigned short val; 55 unsigned short val;
60 unsigned short value = (0x0001 << mask_pos[irq]); 56 unsigned short value = (0x0001 << mask_pos[irq]);
61 57
62 /* Set priority in IPR back to original value */ 58 /* Set priority in IPR back to original value */
63 local_irq_save(flags);
64 val = ctrl_inw(IRLCNTR1); 59 val = ctrl_inw(IRLCNTR1);
65 val |= value; 60 val |= value;
66 ctrl_outw(val, IRLCNTR1); 61 ctrl_outw(val, IRLCNTR1);
67 local_irq_restore(flags);
68} 62}
69 63
70int rts7751r2d_irq_demux(int irq) 64int rts7751r2d_irq_demux(int irq)
diff --git a/arch/sh/boards/renesas/systemh/irq.c b/arch/sh/boards/renesas/systemh/irq.c
index 53731a0abb8f..8d016dae2333 100644
--- a/arch/sh/boards/renesas/systemh/irq.c
+++ b/arch/sh/boards/renesas/systemh/irq.c
@@ -57,12 +57,9 @@ static void shutdown_systemh_irq(unsigned int irq)
57static void disable_systemh_irq(unsigned int irq) 57static void disable_systemh_irq(unsigned int irq)
58{ 58{
59 if (systemh_irq_mask_register) { 59 if (systemh_irq_mask_register) {
60 unsigned long flags;
61 unsigned long val, mask = 0x01 << 1; 60 unsigned long val, mask = 0x01 << 1;
62 61
63 /* Clear the "irq"th bit in the mask and set it in the request */ 62 /* Clear the "irq"th bit in the mask and set it in the request */
64 local_irq_save(flags);
65
66 val = ctrl_inl((unsigned long)systemh_irq_mask_register); 63 val = ctrl_inl((unsigned long)systemh_irq_mask_register);
67 val &= ~mask; 64 val &= ~mask;
68 ctrl_outl(val, (unsigned long)systemh_irq_mask_register); 65 ctrl_outl(val, (unsigned long)systemh_irq_mask_register);
@@ -70,23 +67,18 @@ static void disable_systemh_irq(unsigned int irq)
70 val = ctrl_inl((unsigned long)systemh_irq_request_register); 67 val = ctrl_inl((unsigned long)systemh_irq_request_register);
71 val |= mask; 68 val |= mask;
72 ctrl_outl(val, (unsigned long)systemh_irq_request_register); 69 ctrl_outl(val, (unsigned long)systemh_irq_request_register);
73
74 local_irq_restore(flags);
75 } 70 }
76} 71}
77 72
78static void enable_systemh_irq(unsigned int irq) 73static void enable_systemh_irq(unsigned int irq)
79{ 74{
80 if (systemh_irq_mask_register) { 75 if (systemh_irq_mask_register) {
81 unsigned long flags;
82 unsigned long val, mask = 0x01 << 1; 76 unsigned long val, mask = 0x01 << 1;
83 77
84 /* Set "irq"th bit in the mask register */ 78 /* Set "irq"th bit in the mask register */
85 local_irq_save(flags);
86 val = ctrl_inl((unsigned long)systemh_irq_mask_register); 79 val = ctrl_inl((unsigned long)systemh_irq_mask_register);
87 val |= mask; 80 val |= mask;
88 ctrl_outl(val, (unsigned long)systemh_irq_mask_register); 81 ctrl_outl(val, (unsigned long)systemh_irq_mask_register);
89 local_irq_restore(flags);
90 } 82 }
91} 83}
92 84
diff --git a/arch/sh/boards/superh/microdev/irq.c b/arch/sh/boards/superh/microdev/irq.c
index 236398fbc083..8c64baa30364 100644
--- a/arch/sh/boards/superh/microdev/irq.c
+++ b/arch/sh/boards/superh/microdev/irq.c
@@ -11,14 +11,12 @@
11 11
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/irq.h> 13#include <linux/irq.h>
14
15#include <asm/system.h> 14#include <asm/system.h>
16#include <asm/io.h> 15#include <asm/io.h>
17#include <asm/microdev.h> 16#include <asm/microdev.h>
18 17
19#define NUM_EXTERNAL_IRQS 16 /* IRL0 .. IRL15 */ 18#define NUM_EXTERNAL_IRQS 16 /* IRL0 .. IRL15 */
20 19
21
22static const struct { 20static const struct {
23 unsigned char fpgaIrq; 21 unsigned char fpgaIrq;
24 unsigned char mapped; 22 unsigned char mapped;
@@ -93,53 +91,42 @@ static struct hw_interrupt_type microdev_irq_type = {
93 91
94static void disable_microdev_irq(unsigned int irq) 92static void disable_microdev_irq(unsigned int irq)
95{ 93{
96 unsigned int flags;
97 unsigned int fpgaIrq; 94 unsigned int fpgaIrq;
98 95
99 if (irq >= NUM_EXTERNAL_IRQS) return; 96 if (irq >= NUM_EXTERNAL_IRQS)
100 if (!fpgaIrqTable[irq].mapped) return; 97 return;
98 if (!fpgaIrqTable[irq].mapped)
99 return;
101 100
102 fpgaIrq = fpgaIrqTable[irq].fpgaIrq; 101 fpgaIrq = fpgaIrqTable[irq].fpgaIrq;
103 102
104 /* disable interrupts */ 103 /* disable interupts on the FPGA INTC register */
105 local_irq_save(flags);
106
107 /* disable interupts on the FPGA INTC register */
108 ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTDSB_REG); 104 ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTDSB_REG);
109
110 /* restore interrupts */
111 local_irq_restore(flags);
112} 105}
113 106
114static void enable_microdev_irq(unsigned int irq) 107static void enable_microdev_irq(unsigned int irq)
115{ 108{
116 unsigned long priorityReg, priorities, pri; 109 unsigned long priorityReg, priorities, pri;
117 unsigned int flags;
118 unsigned int fpgaIrq; 110 unsigned int fpgaIrq;
119 111
120 112 if (unlikely(irq >= NUM_EXTERNAL_IRQS))
121 if (irq >= NUM_EXTERNAL_IRQS) return; 113 return;
122 if (!fpgaIrqTable[irq].mapped) return; 114 if (unlikely(!fpgaIrqTable[irq].mapped))
115 return;
123 116
124 pri = 15 - irq; 117 pri = 15 - irq;
125 118
126 fpgaIrq = fpgaIrqTable[irq].fpgaIrq; 119 fpgaIrq = fpgaIrqTable[irq].fpgaIrq;
127 priorityReg = MICRODEV_FPGA_INTPRI_REG(fpgaIrq); 120 priorityReg = MICRODEV_FPGA_INTPRI_REG(fpgaIrq);
128 121
129 /* disable interrupts */ 122 /* set priority for the interrupt */
130 local_irq_save(flags);
131
132 /* set priority for the interrupt */
133 priorities = ctrl_inl(priorityReg); 123 priorities = ctrl_inl(priorityReg);
134 priorities &= ~MICRODEV_FPGA_INTPRI_MASK(fpgaIrq); 124 priorities &= ~MICRODEV_FPGA_INTPRI_MASK(fpgaIrq);
135 priorities |= MICRODEV_FPGA_INTPRI_LEVEL(fpgaIrq, pri); 125 priorities |= MICRODEV_FPGA_INTPRI_LEVEL(fpgaIrq, pri);
136 ctrl_outl(priorities, priorityReg); 126 ctrl_outl(priorities, priorityReg);
137 127
138 /* enable interupts on the FPGA INTC register */ 128 /* enable interupts on the FPGA INTC register */
139 ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTENB_REG); 129 ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTENB_REG);
140
141 /* restore interrupts */
142 local_irq_restore(flags);
143} 130}
144 131
145 /* This functions sets the desired irq handler to be a MicroDev type */ 132 /* This functions sets the desired irq handler to be a MicroDev type */
@@ -158,9 +145,7 @@ static void mask_and_ack_microdev(unsigned int irq)
158static void end_microdev_irq(unsigned int irq) 145static void end_microdev_irq(unsigned int irq)
159{ 146{
160 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) 147 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
161 {
162 enable_microdev_irq(irq); 148 enable_microdev_irq(irq);
163 }
164} 149}
165 150
166extern void __init init_microdev_irq(void) 151extern void __init init_microdev_irq(void)
@@ -171,9 +156,7 @@ extern void __init init_microdev_irq(void)
171 ctrl_outl(~0ul, MICRODEV_FPGA_INTDSB_REG); 156 ctrl_outl(~0ul, MICRODEV_FPGA_INTDSB_REG);
172 157
173 for (i = 0; i < NUM_EXTERNAL_IRQS; i++) 158 for (i = 0; i < NUM_EXTERNAL_IRQS; i++)
174 {
175 make_microdev_irq(i); 159 make_microdev_irq(i);
176 }
177} 160}
178 161
179extern void microdev_print_fpga_intc_status(void) 162extern void microdev_print_fpga_intc_status(void)
diff --git a/arch/sh/cchips/hd6446x/hd64461/setup.c b/arch/sh/cchips/hd6446x/hd64461/setup.c
index 6c961273a23a..38f1e8171a3a 100644
--- a/arch/sh/cchips/hd6446x/hd64461/setup.c
+++ b/arch/sh/cchips/hd6446x/hd64461/setup.c
@@ -11,35 +11,28 @@
11#include <linux/interrupt.h> 11#include <linux/interrupt.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/irq.h> 13#include <linux/irq.h>
14
15#include <asm/io.h> 14#include <asm/io.h>
16#include <asm/irq.h> 15#include <asm/irq.h>
17#include <asm/hd64461.h> 16#include <asm/hd64461.h>
18 17
19static void disable_hd64461_irq(unsigned int irq) 18static void disable_hd64461_irq(unsigned int irq)
20{ 19{
21 unsigned long flags;
22 unsigned short nimr; 20 unsigned short nimr;
23 unsigned short mask = 1 << (irq - HD64461_IRQBASE); 21 unsigned short mask = 1 << (irq - HD64461_IRQBASE);
24 22
25 local_irq_save(flags);
26 nimr = inw(HD64461_NIMR); 23 nimr = inw(HD64461_NIMR);
27 nimr |= mask; 24 nimr |= mask;
28 outw(nimr, HD64461_NIMR); 25 outw(nimr, HD64461_NIMR);
29 local_irq_restore(flags);
30} 26}
31 27
32static void enable_hd64461_irq(unsigned int irq) 28static void enable_hd64461_irq(unsigned int irq)
33{ 29{
34 unsigned long flags;
35 unsigned short nimr; 30 unsigned short nimr;
36 unsigned short mask = 1 << (irq - HD64461_IRQBASE); 31 unsigned short mask = 1 << (irq - HD64461_IRQBASE);
37 32
38 local_irq_save(flags);
39 nimr = inw(HD64461_NIMR); 33 nimr = inw(HD64461_NIMR);
40 nimr &= ~mask; 34 nimr &= ~mask;
41 outw(nimr, HD64461_NIMR); 35 outw(nimr, HD64461_NIMR);
42 local_irq_restore(flags);
43} 36}
44 37
45static void mask_and_ack_hd64461(unsigned int irq) 38static void mask_and_ack_hd64461(unsigned int irq)
diff --git a/arch/sh/cchips/hd6446x/hd64465/setup.c b/arch/sh/cchips/hd6446x/hd64465/setup.c
index d2b2851bc44b..30573d3e1966 100644
--- a/arch/sh/cchips/hd6446x/hd64465/setup.c
+++ b/arch/sh/cchips/hd6446x/hd64465/setup.c
@@ -25,31 +25,25 @@
25 25
26static void disable_hd64465_irq(unsigned int irq) 26static void disable_hd64465_irq(unsigned int irq)
27{ 27{
28 unsigned long flags;
29 unsigned short nimr; 28 unsigned short nimr;
30 unsigned short mask = 1 << (irq - HD64465_IRQ_BASE); 29 unsigned short mask = 1 << (irq - HD64465_IRQ_BASE);
31 30
32 pr_debug("disable_hd64465_irq(%d): mask=%x\n", irq, mask); 31 pr_debug("disable_hd64465_irq(%d): mask=%x\n", irq, mask);
33 local_irq_save(flags);
34 nimr = inw(HD64465_REG_NIMR); 32 nimr = inw(HD64465_REG_NIMR);
35 nimr |= mask; 33 nimr |= mask;
36 outw(nimr, HD64465_REG_NIMR); 34 outw(nimr, HD64465_REG_NIMR);
37 local_irq_restore(flags);
38} 35}
39 36
40 37
41static void enable_hd64465_irq(unsigned int irq) 38static void enable_hd64465_irq(unsigned int irq)
42{ 39{
43 unsigned long flags;
44 unsigned short nimr; 40 unsigned short nimr;
45 unsigned short mask = 1 << (irq - HD64465_IRQ_BASE); 41 unsigned short mask = 1 << (irq - HD64465_IRQ_BASE);
46 42
47 pr_debug("enable_hd64465_irq(%d): mask=%x\n", irq, mask); 43 pr_debug("enable_hd64465_irq(%d): mask=%x\n", irq, mask);
48 local_irq_save(flags);
49 nimr = inw(HD64465_REG_NIMR); 44 nimr = inw(HD64465_REG_NIMR);
50 nimr &= ~mask; 45 nimr &= ~mask;
51 outw(nimr, HD64465_REG_NIMR); 46 outw(nimr, HD64465_REG_NIMR);
52 local_irq_restore(flags);
53} 47}
54 48
55 49
diff --git a/arch/sh/cchips/voyagergx/irq.c b/arch/sh/cchips/voyagergx/irq.c
index 4cfa7c990553..392c8b12ce36 100644
--- a/arch/sh/cchips/voyagergx/irq.c
+++ b/arch/sh/cchips/voyagergx/irq.c
@@ -36,32 +36,26 @@
36 36
37static void disable_voyagergx_irq(unsigned int irq) 37static void disable_voyagergx_irq(unsigned int irq)
38{ 38{
39 unsigned long flags, val; 39 unsigned long val;
40 unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE); 40 unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE);
41 41
42 pr_debug("disable_voyagergx_irq(%d): mask=%x\n", irq, mask); 42 pr_debug("disable_voyagergx_irq(%d): mask=%x\n", irq, mask);
43 local_irq_save(flags);
44 val = inl(VOYAGER_INT_MASK); 43 val = inl(VOYAGER_INT_MASK);
45 val &= ~mask; 44 val &= ~mask;
46 outl(val, VOYAGER_INT_MASK); 45 outl(val, VOYAGER_INT_MASK);
47 local_irq_restore(flags);
48} 46}
49 47
50
51static void enable_voyagergx_irq(unsigned int irq) 48static void enable_voyagergx_irq(unsigned int irq)
52{ 49{
53 unsigned long flags, val; 50 unsigned long val;
54 unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE); 51 unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE);
55 52
56 pr_debug("disable_voyagergx_irq(%d): mask=%x\n", irq, mask); 53 pr_debug("disable_voyagergx_irq(%d): mask=%x\n", irq, mask);
57 local_irq_save(flags);
58 val = inl(VOYAGER_INT_MASK); 54 val = inl(VOYAGER_INT_MASK);
59 val |= mask; 55 val |= mask;
60 outl(val, VOYAGER_INT_MASK); 56 outl(val, VOYAGER_INT_MASK);
61 local_irq_restore(flags);
62} 57}
63 58
64
65static void mask_and_ack_voyagergx(unsigned int irq) 59static void mask_and_ack_voyagergx(unsigned int irq)
66{ 60{
67 disable_voyagergx_irq(irq); 61 disable_voyagergx_irq(irq);
@@ -94,7 +88,8 @@ static struct hw_interrupt_type voyagergx_irq_type = {
94 .end = end_voyagergx_irq, 88 .end = end_voyagergx_irq,
95}; 89};
96 90
97static irqreturn_t voyagergx_interrupt(int irq, void *dev_id, struct pt_regs *regs) 91static irqreturn_t voyagergx_interrupt(int irq, void *dev_id,
92 struct pt_regs *regs)
98{ 93{
99 printk(KERN_INFO 94 printk(KERN_INFO
100 "VoyagerGX: spurious interrupt, status: 0x%x\n", 95 "VoyagerGX: spurious interrupt, status: 0x%x\n",
@@ -102,9 +97,6 @@ static irqreturn_t voyagergx_interrupt(int irq, void *dev_id, struct pt_regs *re
102 return IRQ_HANDLED; 97 return IRQ_HANDLED;
103} 98}
104 99
105
106/*====================================================*/
107
108static struct { 100static struct {
109 int (*func)(int, void *); 101 int (*func)(int, void *);
110 void *dev; 102 void *dev;
diff --git a/arch/sh/kernel/cpu/irq/ipr.c b/arch/sh/kernel/cpu/irq/ipr.c
index 00edee971bcb..4c4fd4118d1a 100644
--- a/arch/sh/kernel/cpu/irq/ipr.c
+++ b/arch/sh/kernel/cpu/irq/ipr.c
@@ -57,31 +57,27 @@ static struct hw_interrupt_type ipr_irq_type = {
57 57
58static void disable_ipr_irq(unsigned int irq) 58static void disable_ipr_irq(unsigned int irq)
59{ 59{
60 unsigned long val, flags; 60 unsigned long val;
61 unsigned int addr = ipr_data[irq].addr; 61 unsigned int addr = ipr_data[irq].addr;
62 unsigned short mask = 0xffff ^ (0x0f << ipr_data[irq].shift); 62 unsigned short mask = 0xffff ^ (0x0f << ipr_data[irq].shift);
63 63
64 /* Set the priority in IPR to 0 */ 64 /* Set the priority in IPR to 0 */
65 local_irq_save(flags);
66 val = ctrl_inw(addr); 65 val = ctrl_inw(addr);
67 val &= mask; 66 val &= mask;
68 ctrl_outw(val, addr); 67 ctrl_outw(val, addr);
69 local_irq_restore(flags);
70} 68}
71 69
72static void enable_ipr_irq(unsigned int irq) 70static void enable_ipr_irq(unsigned int irq)
73{ 71{
74 unsigned long val, flags; 72 unsigned long val;
75 unsigned int addr = ipr_data[irq].addr; 73 unsigned int addr = ipr_data[irq].addr;
76 int priority = ipr_data[irq].priority; 74 int priority = ipr_data[irq].priority;
77 unsigned short value = (priority << ipr_data[irq].shift); 75 unsigned short value = (priority << ipr_data[irq].shift);
78 76
79 /* Set priority in IPR back to original value */ 77 /* Set priority in IPR back to original value */
80 local_irq_save(flags);
81 val = ctrl_inw(addr); 78 val = ctrl_inw(addr);
82 val |= value; 79 val |= value;
83 ctrl_outw(val, addr); 80 ctrl_outw(val, addr);
84 local_irq_restore(flags);
85} 81}
86 82
87static void mask_and_ack_ipr(unsigned int irq) 83static void mask_and_ack_ipr(unsigned int irq)
diff --git a/arch/sh/kernel/cpu/irq/maskreg.c b/arch/sh/kernel/cpu/irq/maskreg.c
index 1cc0de15e4a6..492db31b3cab 100644
--- a/arch/sh/kernel/cpu/irq/maskreg.c
+++ b/arch/sh/kernel/cpu/irq/maskreg.c
@@ -52,32 +52,26 @@ static void shutdown_maskreg_irq(unsigned int irq)
52 52
53static void disable_maskreg_irq(unsigned int irq) 53static void disable_maskreg_irq(unsigned int irq)
54{ 54{
55 unsigned long flags;
56 unsigned short val, mask = 0x01 << irq; 55 unsigned short val, mask = 0x01 << irq;
57 56
58 BUG_ON(!irq_mask_register); 57 BUG_ON(!irq_mask_register);
59 58
60 /* Set "irq"th bit */ 59 /* Set "irq"th bit */
61 local_irq_save(flags);
62 val = ctrl_inw(irq_mask_register); 60 val = ctrl_inw(irq_mask_register);
63 val |= mask; 61 val |= mask;
64 ctrl_outw(val, irq_mask_register); 62 ctrl_outw(val, irq_mask_register);
65 local_irq_restore(flags);
66} 63}
67 64
68static void enable_maskreg_irq(unsigned int irq) 65static void enable_maskreg_irq(unsigned int irq)
69{ 66{
70 unsigned long flags;
71 unsigned short val, mask = ~(0x01 << irq); 67 unsigned short val, mask = ~(0x01 << irq);
72 68
73 BUG_ON(!irq_mask_register); 69 BUG_ON(!irq_mask_register);
74 70
75 /* Clear "irq"th bit */ 71 /* Clear "irq"th bit */
76 local_irq_save(flags);
77 val = ctrl_inw(irq_mask_register); 72 val = ctrl_inw(irq_mask_register);
78 val &= mask; 73 val &= mask;
79 ctrl_outw(val, irq_mask_register); 74 ctrl_outw(val, irq_mask_register);
80 local_irq_restore(flags);
81} 75}
82 76
83static void mask_and_ack_maskreg(unsigned int irq) 77static void mask_and_ack_maskreg(unsigned int irq)
diff --git a/arch/sh/kernel/cpu/irq/pint.c b/arch/sh/kernel/cpu/irq/pint.c
index 80cd8108d36a..17f47b373d6e 100644
--- a/arch/sh/kernel/cpu/irq/pint.c
+++ b/arch/sh/kernel/cpu/irq/pint.c
@@ -48,26 +48,22 @@ static struct hw_interrupt_type pint_irq_type = {
48 48
49static void disable_pint_irq(unsigned int irq) 49static void disable_pint_irq(unsigned int irq)
50{ 50{
51 unsigned long val, flags; 51 unsigned long val;
52 52
53 local_irq_save(flags);
54 val = ctrl_inw(INTC_INTER); 53 val = ctrl_inw(INTC_INTER);
55 val &= ~(1 << (irq - PINT_IRQ_BASE)); 54 val &= ~(1 << (irq - PINT_IRQ_BASE));
56 ctrl_outw(val, INTC_INTER); /* disable PINTn */ 55 ctrl_outw(val, INTC_INTER); /* disable PINTn */
57 portcr_mask &= ~(3 << (irq - PINT_IRQ_BASE)*2); 56 portcr_mask &= ~(3 << (irq - PINT_IRQ_BASE)*2);
58 local_irq_restore(flags);
59} 57}
60 58
61static void enable_pint_irq(unsigned int irq) 59static void enable_pint_irq(unsigned int irq)
62{ 60{
63 unsigned long val, flags; 61 unsigned long val;
64 62
65 local_irq_save(flags);
66 val = ctrl_inw(INTC_INTER); 63 val = ctrl_inw(INTC_INTER);
67 val |= 1 << (irq - PINT_IRQ_BASE); 64 val |= 1 << (irq - PINT_IRQ_BASE);
68 ctrl_outw(val, INTC_INTER); /* enable PINTn */ 65 ctrl_outw(val, INTC_INTER); /* enable PINTn */
69 portcr_mask |= 3 << (irq - PINT_IRQ_BASE)*2; 66 portcr_mask |= 3 << (irq - PINT_IRQ_BASE)*2;
70 local_irq_restore(flags);
71} 67}
72 68
73static void mask_and_ack_pint(unsigned int irq) 69static void mask_and_ack_pint(unsigned int irq)