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authorGraf Yang <graf.yang@analog.com>2008-04-24 15:09:15 -0400
committerBryan Wu <cooloney@kernel.org>2008-04-24 15:09:15 -0400
commit5be36d22b28f01e5074f78b29aa6128da0a53641 (patch)
tree1fda8bcb0680eda6a826fc3753ee8c9f52a2c75b
parent37b6972ad8fb08d438fd600888aff212b1b193b0 (diff)
[Blackfin] arch: add Blackfin on-chip SIR IrDA driver support
- add platform device resources in board files - add new bfin_sir.h to each machines Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat
-rw-r--r--arch/blackfin/kernel/bfin_dma_5xx.c4
-rw-r--r--arch/blackfin/mach-bf527/boards/ezkit.c30
-rw-r--r--arch/blackfin/mach-bf533/boards/H8606.c23
-rw-r--r--arch/blackfin/mach-bf533/boards/cm_bf533.c23
-rw-r--r--arch/blackfin/mach-bf533/boards/ezkit.c23
-rw-r--r--arch/blackfin/mach-bf533/boards/ip0x.c24
-rw-r--r--arch/blackfin/mach-bf533/boards/stamp.c23
-rw-r--r--arch/blackfin/mach-bf537/boards/cm_bf537.c30
-rw-r--r--arch/blackfin/mach-bf537/boards/generic_board.c30
-rw-r--r--arch/blackfin/mach-bf537/boards/minotaur.c30
-rw-r--r--arch/blackfin/mach-bf537/boards/pnav10.c29
-rw-r--r--arch/blackfin/mach-bf537/boards/stamp.c30
-rw-r--r--arch/blackfin/mach-bf548/boards/cm_bf548.c44
-rw-r--r--arch/blackfin/mach-bf548/boards/ezkit.c44
-rw-r--r--arch/blackfin/mach-bf561/boards/cm_bf561.c23
-rw-r--r--arch/blackfin/mach-bf561/boards/ezkit.c23
-rw-r--r--include/asm-blackfin/mach-bf527/bfin_serial_5xx.h48
-rw-r--r--include/asm-blackfin/mach-bf527/bfin_sir.h133
-rw-r--r--include/asm-blackfin/mach-bf527/blackfin.h15
-rw-r--r--include/asm-blackfin/mach-bf533/bfin_serial_5xx.h50
-rw-r--r--include/asm-blackfin/mach-bf533/bfin_sir.h120
-rw-r--r--include/asm-blackfin/mach-bf533/blackfin.h15
-rw-r--r--include/asm-blackfin/mach-bf537/bfin_serial_5xx.h48
-rw-r--r--include/asm-blackfin/mach-bf537/bfin_sir.h133
-rw-r--r--include/asm-blackfin/mach-bf537/blackfin.h15
-rw-r--r--include/asm-blackfin/mach-bf548/bfin_serial_5xx.h48
-rw-r--r--include/asm-blackfin/mach-bf548/bfin_sir.h149
-rw-r--r--include/asm-blackfin/mach-bf548/blackfin.h15
-rw-r--r--include/asm-blackfin/mach-bf561/bfin_serial_5xx.h50
-rw-r--r--include/asm-blackfin/mach-bf561/bfin_sir.h120
-rw-r--r--include/asm-blackfin/mach-bf561/blackfin.h14
31 files changed, 1322 insertions, 84 deletions
diff --git a/arch/blackfin/kernel/bfin_dma_5xx.c b/arch/blackfin/kernel/bfin_dma_5xx.c
index 18fc8a835944..df4d2a5b8e30 100644
--- a/arch/blackfin/kernel/bfin_dma_5xx.c
+++ b/arch/blackfin/kernel/bfin_dma_5xx.c
@@ -108,10 +108,10 @@ int request_dma(unsigned int channel, char *device_id)
108 if (channel >= CH_UART2_RX && channel <= CH_UART3_TX) { 108 if (channel >= CH_UART2_RX && channel <= CH_UART3_TX) {
109 if (strncmp(device_id, "BFIN_UART", 9) == 0) 109 if (strncmp(device_id, "BFIN_UART", 9) == 0)
110 dma_ch[channel].regs->peripheral_map |= 110 dma_ch[channel].regs->peripheral_map |=
111 (channel - CH_UART2_RX + 0xC); 111 ((channel - CH_UART2_RX + 0xC)<<12);
112 else 112 else
113 dma_ch[channel].regs->peripheral_map |= 113 dma_ch[channel].regs->peripheral_map |=
114 (channel - CH_UART2_RX + 0x6); 114 ((channel - CH_UART2_RX + 0x6)<<12);
115 } 115 }
116#endif 116#endif
117 117
diff --git a/arch/blackfin/mach-bf527/boards/ezkit.c b/arch/blackfin/mach-bf527/boards/ezkit.c
index be20f79a7fe0..583d53811f03 100644
--- a/arch/blackfin/mach-bf527/boards/ezkit.c
+++ b/arch/blackfin/mach-bf527/boards/ezkit.c
@@ -707,6 +707,32 @@ static struct platform_device bfin_uart_device = {
707}; 707};
708#endif 708#endif
709 709
710#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
711static struct resource bfin_sir_resources[] = {
712#ifdef CONFIG_BFIN_SIR0
713 {
714 .start = 0xFFC00400,
715 .end = 0xFFC004FF,
716 .flags = IORESOURCE_MEM,
717 },
718#endif
719#ifdef CONFIG_BFIN_SIR1
720 {
721 .start = 0xFFC02000,
722 .end = 0xFFC020FF,
723 .flags = IORESOURCE_MEM,
724 },
725#endif
726};
727
728static struct platform_device bfin_sir_device = {
729 .name = "bfin_sir",
730 .id = 0,
731 .num_resources = ARRAY_SIZE(bfin_sir_resources),
732 .resource = bfin_sir_resources,
733};
734#endif
735
710#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) 736#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
711static struct resource bfin_twi0_resource[] = { 737static struct resource bfin_twi0_resource[] = {
712 [0] = { 738 [0] = {
@@ -874,6 +900,10 @@ static struct platform_device *stamp_devices[] __initdata = {
874 &bfin_uart_device, 900 &bfin_uart_device,
875#endif 901#endif
876 902
903#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
904 &bfin_sir_device,
905#endif
906
877#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) 907#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
878 &i2c_bfin_twi_device, 908 &i2c_bfin_twi_device,
879#endif 909#endif
diff --git a/arch/blackfin/mach-bf533/boards/H8606.c b/arch/blackfin/mach-bf533/boards/H8606.c
index 39c3dd3d595c..7cc4864f6aaf 100644
--- a/arch/blackfin/mach-bf533/boards/H8606.c
+++ b/arch/blackfin/mach-bf533/boards/H8606.c
@@ -304,6 +304,25 @@ static struct platform_device bfin_uart_device = {
304}; 304};
305#endif 305#endif
306 306
307#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
308static struct resource bfin_sir_resources[] = {
309#ifdef CONFIG_BFIN_SIR0
310 {
311 .start = 0xFFC00400,
312 .end = 0xFFC004FF,
313 .flags = IORESOURCE_MEM,
314 },
315#endif
316};
317
318static struct platform_device bfin_sir_device = {
319 .name = "bfin_sir",
320 .id = 0,
321 .num_resources = ARRAY_SIZE(bfin_sir_resources),
322 .resource = bfin_sir_resources,
323};
324#endif
325
307#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE) 326#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
308 327
309#include <linux/serial_8250.h> 328#include <linux/serial_8250.h>
@@ -403,6 +422,10 @@ static struct platform_device *h8606_devices[] __initdata = {
403 &serial8250_device, 422 &serial8250_device,
404#endif 423#endif
405 424
425#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
426 &bfin_sir_device,
427#endif
428
406#if defined(CONFIG_KEYBOARD_OPENCORES) || defined(CONFIG_KEYBOARD_OPENCORES_MODULE) 429#if defined(CONFIG_KEYBOARD_OPENCORES) || defined(CONFIG_KEYBOARD_OPENCORES_MODULE)
407 &opencores_kbd_device, 430 &opencores_kbd_device,
408#endif 431#endif
diff --git a/arch/blackfin/mach-bf533/boards/cm_bf533.c b/arch/blackfin/mach-bf533/boards/cm_bf533.c
index 7e7b7c9a5c85..a03149c72681 100644
--- a/arch/blackfin/mach-bf533/boards/cm_bf533.c
+++ b/arch/blackfin/mach-bf533/boards/cm_bf533.c
@@ -234,6 +234,25 @@ static struct platform_device bfin_uart_device = {
234}; 234};
235#endif 235#endif
236 236
237#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
238static struct resource bfin_sir_resources[] = {
239#ifdef CONFIG_BFIN_SIR0
240 {
241 .start = 0xFFC00400,
242 .end = 0xFFC004FF,
243 .flags = IORESOURCE_MEM,
244 },
245#endif
246};
247
248static struct platform_device bfin_sir_device = {
249 .name = "bfin_sir",
250 .id = 0,
251 .num_resources = ARRAY_SIZE(bfin_sir_resources),
252 .resource = bfin_sir_resources,
253};
254#endif
255
237#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 256#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
238static struct platform_device bfin_sport0_uart_device = { 257static struct platform_device bfin_sport0_uart_device = {
239 .name = "bfin-sport-uart", 258 .name = "bfin-sport-uart",
@@ -327,6 +346,10 @@ static struct platform_device *cm_bf533_devices[] __initdata = {
327 &bfin_uart_device, 346 &bfin_uart_device,
328#endif 347#endif
329 348
349#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
350 &bfin_sir_device,
351#endif
352
330#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 353#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
331 &bfin_sport0_uart_device, 354 &bfin_sport0_uart_device,
332 &bfin_sport1_uart_device, 355 &bfin_sport1_uart_device,
diff --git a/arch/blackfin/mach-bf533/boards/ezkit.c b/arch/blackfin/mach-bf533/boards/ezkit.c
index 35c1efdf8e16..08a7943949ae 100644
--- a/arch/blackfin/mach-bf533/boards/ezkit.c
+++ b/arch/blackfin/mach-bf533/boards/ezkit.c
@@ -237,6 +237,25 @@ static struct platform_device bfin_uart_device = {
237}; 237};
238#endif 238#endif
239 239
240#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
241static struct resource bfin_sir_resources[] = {
242#ifdef CONFIG_BFIN_SIR0
243 {
244 .start = 0xFFC00400,
245 .end = 0xFFC004FF,
246 .flags = IORESOURCE_MEM,
247 },
248#endif
249};
250
251static struct platform_device bfin_sir_device = {
252 .name = "bfin_sir",
253 .id = 0,
254 .num_resources = ARRAY_SIZE(bfin_sir_resources),
255 .resource = bfin_sir_resources,
256};
257#endif
258
240#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) 259#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
241#define PATA_INT 55 260#define PATA_INT 55
242 261
@@ -352,6 +371,10 @@ static struct platform_device *ezkit_devices[] __initdata = {
352 &bfin_uart_device, 371 &bfin_uart_device,
353#endif 372#endif
354 373
374#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
375 &bfin_sir_device,
376#endif
377
355#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) 378#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
356 &bfin_pata_device, 379 &bfin_pata_device,
357#endif 380#endif
diff --git a/arch/blackfin/mach-bf533/boards/ip0x.c b/arch/blackfin/mach-bf533/boards/ip0x.c
index 4af61474a991..5864892de314 100644
--- a/arch/blackfin/mach-bf533/boards/ip0x.c
+++ b/arch/blackfin/mach-bf533/boards/ip0x.c
@@ -196,6 +196,25 @@ static struct platform_device bfin_uart_device = {
196}; 196};
197#endif 197#endif
198 198
199#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
200static struct resource bfin_sir_resources[] = {
201#ifdef CONFIG_BFIN_SIR0
202 {
203 .start = 0xFFC00400,
204 .end = 0xFFC004FF,
205 .flags = IORESOURCE_MEM,
206 },
207#endif
208};
209
210static struct platform_device bfin_sir_device = {
211 .name = "bfin_sir",
212 .id = 0,
213 .num_resources = ARRAY_SIZE(bfin_sir_resources),
214 .resource = bfin_sir_resources,
215};
216#endif
217
199#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) 218#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
200static struct resource isp1362_hcd_resources[] = { 219static struct resource isp1362_hcd_resources[] = {
201 { 220 {
@@ -251,6 +270,11 @@ static struct platform_device *ip0x_devices[] __initdata = {
251#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 270#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
252 &bfin_uart_device, 271 &bfin_uart_device,
253#endif 272#endif
273
274#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
275 &bfin_sir_device,
276#endif
277
254#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) 278#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
255 &isp1362_hcd_device, 279 &isp1362_hcd_device,
256#endif 280#endif
diff --git a/arch/blackfin/mach-bf533/boards/stamp.c b/arch/blackfin/mach-bf533/boards/stamp.c
index 3a727d3676e1..fddce32901a2 100644
--- a/arch/blackfin/mach-bf533/boards/stamp.c
+++ b/arch/blackfin/mach-bf533/boards/stamp.c
@@ -370,6 +370,25 @@ static struct platform_device bfin_uart_device = {
370}; 370};
371#endif 371#endif
372 372
373#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
374static struct resource bfin_sir_resources[] = {
375#ifdef CONFIG_BFIN_SIR0
376 {
377 .start = 0xFFC00400,
378 .end = 0xFFC004FF,
379 .flags = IORESOURCE_MEM,
380 },
381#endif
382};
383
384static struct platform_device bfin_sir_device = {
385 .name = "bfin_sir",
386 .id = 0,
387 .num_resources = ARRAY_SIZE(bfin_sir_resources),
388 .resource = bfin_sir_resources,
389};
390#endif
391
373#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 392#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
374static struct platform_device bfin_sport0_uart_device = { 393static struct platform_device bfin_sport0_uart_device = {
375 .name = "bfin-sport-uart", 394 .name = "bfin-sport-uart",
@@ -525,6 +544,10 @@ static struct platform_device *stamp_devices[] __initdata = {
525 &bfin_uart_device, 544 &bfin_uart_device,
526#endif 545#endif
527 546
547#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
548 &bfin_sir_device,
549#endif
550
528#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 551#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
529 &bfin_sport0_uart_device, 552 &bfin_sport0_uart_device,
530 &bfin_sport1_uart_device, 553 &bfin_sport1_uart_device,
diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537.c b/arch/blackfin/mach-bf537/boards/cm_bf537.c
index 199fde69b964..d8a23cd9b9ed 100644
--- a/arch/blackfin/mach-bf537/boards/cm_bf537.c
+++ b/arch/blackfin/mach-bf537/boards/cm_bf537.c
@@ -325,6 +325,32 @@ static struct platform_device bfin_uart_device = {
325}; 325};
326#endif 326#endif
327 327
328#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
329static struct resource bfin_sir_resources[] = {
330#ifdef CONFIG_BFIN_SIR0
331 {
332 .start = 0xFFC00400,
333 .end = 0xFFC004FF,
334 .flags = IORESOURCE_MEM,
335 },
336#endif
337#ifdef CONFIG_BFIN_SIR1
338 {
339 .start = 0xFFC02000,
340 .end = 0xFFC020FF,
341 .flags = IORESOURCE_MEM,
342 },
343#endif
344};
345
346static struct platform_device bfin_sir_device = {
347 .name = "bfin_sir",
348 .id = 0,
349 .num_resources = ARRAY_SIZE(bfin_sir_resources),
350 .resource = bfin_sir_resources,
351};
352#endif
353
328#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) 354#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
329static struct resource bfin_twi0_resource[] = { 355static struct resource bfin_twi0_resource[] = {
330 [0] = { 356 [0] = {
@@ -415,6 +441,10 @@ static struct platform_device *cm_bf537_devices[] __initdata = {
415 &bfin_uart_device, 441 &bfin_uart_device,
416#endif 442#endif
417 443
444#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
445 &bfin_sir_device,
446#endif
447
418#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) 448#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
419 &i2c_bfin_twi_device, 449 &i2c_bfin_twi_device,
420#endif 450#endif
diff --git a/arch/blackfin/mach-bf537/boards/generic_board.c b/arch/blackfin/mach-bf537/boards/generic_board.c
index b3d78ea755ca..7d250828dad8 100644
--- a/arch/blackfin/mach-bf537/boards/generic_board.c
+++ b/arch/blackfin/mach-bf537/boards/generic_board.c
@@ -554,6 +554,32 @@ static struct platform_device bfin_uart_device = {
554}; 554};
555#endif 555#endif
556 556
557#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
558static struct resource bfin_sir_resources[] = {
559#ifdef CONFIG_BFIN_SIR0
560 {
561 .start = 0xFFC00400,
562 .end = 0xFFC004FF,
563 .flags = IORESOURCE_MEM,
564 },
565#endif
566#ifdef CONFIG_BFIN_SIR1
567 {
568 .start = 0xFFC02000,
569 .end = 0xFFC020FF,
570 .flags = IORESOURCE_MEM,
571 },
572#endif
573};
574
575static struct platform_device bfin_sir_device = {
576 .name = "bfin_sir",
577 .id = 0,
578 .num_resources = ARRAY_SIZE(bfin_sir_resources),
579 .resource = bfin_sir_resources,
580};
581#endif
582
557#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) 583#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
558static struct resource bfin_twi0_resource[] = { 584static struct resource bfin_twi0_resource[] = {
559 [0] = { 585 [0] = {
@@ -674,6 +700,10 @@ static struct platform_device *stamp_devices[] __initdata = {
674 &bfin_uart_device, 700 &bfin_uart_device,
675#endif 701#endif
676 702
703#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
704 &bfin_sir_device,
705#endif
706
677#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) 707#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
678 &i2c_bfin_twi_device, 708 &i2c_bfin_twi_device,
679#endif 709#endif
diff --git a/arch/blackfin/mach-bf537/boards/minotaur.c b/arch/blackfin/mach-bf537/boards/minotaur.c
index 4ea7173915ef..18ddf7a52005 100644
--- a/arch/blackfin/mach-bf537/boards/minotaur.c
+++ b/arch/blackfin/mach-bf537/boards/minotaur.c
@@ -225,6 +225,32 @@ static struct platform_device bfin_uart_device = {
225}; 225};
226#endif 226#endif
227 227
228#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
229static struct resource bfin_sir_resources[] = {
230#ifdef CONFIG_BFIN_SIR0
231 {
232 .start = 0xFFC00400,
233 .end = 0xFFC004FF,
234 .flags = IORESOURCE_MEM,
235 },
236#endif
237#ifdef CONFIG_BFIN_SIR1
238 {
239 .start = 0xFFC02000,
240 .end = 0xFFC020FF,
241 .flags = IORESOURCE_MEM,
242 },
243#endif
244};
245
246static struct platform_device bfin_sir_device = {
247 .name = "bfin_sir",
248 .id = 0,
249 .num_resources = ARRAY_SIZE(bfin_sir_resources),
250 .resource = bfin_sir_resources,
251};
252#endif
253
228#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) 254#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
229static struct resource bfin_twi0_resource[] = { 255static struct resource bfin_twi0_resource[] = {
230 [0] = { 256 [0] = {
@@ -284,6 +310,10 @@ static struct platform_device *minotaur_devices[] __initdata = {
284 &bfin_uart_device, 310 &bfin_uart_device,
285#endif 311#endif
286 312
313#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
314 &bfin_sir_device,
315#endif
316
287#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) 317#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
288 &i2c_bfin_twi_device, 318 &i2c_bfin_twi_device,
289#endif 319#endif
diff --git a/arch/blackfin/mach-bf537/boards/pnav10.c b/arch/blackfin/mach-bf537/boards/pnav10.c
index 0b3e22b1b681..51c3bab14a69 100644
--- a/arch/blackfin/mach-bf537/boards/pnav10.c
+++ b/arch/blackfin/mach-bf537/boards/pnav10.c
@@ -452,6 +452,31 @@ static struct platform_device bfin_uart_device = {
452}; 452};
453#endif 453#endif
454 454
455#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
456static struct resource bfin_sir_resources[] = {
457#ifdef CONFIG_BFIN_SIR0
458 {
459 .start = 0xFFC00400,
460 .end = 0xFFC004FF,
461 .flags = IORESOURCE_MEM,
462 },
463#endif
464#ifdef CONFIG_BFIN_SIR1
465 {
466 .start = 0xFFC02000,
467 .end = 0xFFC020FF,
468 .flags = IORESOURCE_MEM,
469 },
470#endif
471};
472
473static struct platform_device bfin_sir_device = {
474 .name = "bfin_sir",
475 .id = 0,
476 .num_resources = ARRAY_SIZE(bfin_sir_resources),
477 .resource = bfin_sir_resources,
478};
479#endif
455 480
456static struct platform_device *stamp_devices[] __initdata = { 481static struct platform_device *stamp_devices[] __initdata = {
457#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) 482#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
@@ -493,6 +518,10 @@ static struct platform_device *stamp_devices[] __initdata = {
493#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 518#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
494 &bfin_uart_device, 519 &bfin_uart_device,
495#endif 520#endif
521
522#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
523 &bfin_sir_device,
524#endif
496}; 525};
497 526
498static int __init stamp_init(void) 527static int __init stamp_init(void)
diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c
index d4cbcb8774e7..0cec14b1ef5c 100644
--- a/arch/blackfin/mach-bf537/boards/stamp.c
+++ b/arch/blackfin/mach-bf537/boards/stamp.c
@@ -698,6 +698,32 @@ static struct platform_device bfin_uart_device = {
698}; 698};
699#endif 699#endif
700 700
701#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
702static struct resource bfin_sir_resources[] = {
703#ifdef CONFIG_BFIN_SIR0
704 {
705 .start = 0xFFC00400,
706 .end = 0xFFC004FF,
707 .flags = IORESOURCE_MEM,
708 },
709#endif
710#ifdef CONFIG_BFIN_SIR1
711 {
712 .start = 0xFFC02000,
713 .end = 0xFFC020FF,
714 .flags = IORESOURCE_MEM,
715 },
716#endif
717};
718
719static struct platform_device bfin_sir_device = {
720 .name = "bfin_sir",
721 .id = 0,
722 .num_resources = ARRAY_SIZE(bfin_sir_resources),
723 .resource = bfin_sir_resources,
724};
725#endif
726
701#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) 727#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
702static struct resource bfin_twi0_resource[] = { 728static struct resource bfin_twi0_resource[] = {
703 [0] = { 729 [0] = {
@@ -847,6 +873,10 @@ static struct platform_device *stamp_devices[] __initdata = {
847 &bfin_uart_device, 873 &bfin_uart_device,
848#endif 874#endif
849 875
876#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
877 &bfin_sir_device,
878#endif
879
850#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) 880#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
851 &i2c_bfin_twi_device, 881 &i2c_bfin_twi_device,
852#endif 882#endif
diff --git a/arch/blackfin/mach-bf548/boards/cm_bf548.c b/arch/blackfin/mach-bf548/boards/cm_bf548.c
index 1aa3c1b86bcf..e3e8479fffb5 100644
--- a/arch/blackfin/mach-bf548/boards/cm_bf548.c
+++ b/arch/blackfin/mach-bf548/boards/cm_bf548.c
@@ -184,6 +184,46 @@ static struct platform_device bfin_uart_device = {
184}; 184};
185#endif 185#endif
186 186
187#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
188static struct resource bfin_sir_resources[] = {
189#ifdef CONFIG_BFIN_SIR0
190 {
191 .start = 0xFFC00400,
192 .end = 0xFFC004FF,
193 .flags = IORESOURCE_MEM,
194 },
195#endif
196#ifdef CONFIG_BFIN_SIR1
197 {
198 .start = 0xFFC02000,
199 .end = 0xFFC020FF,
200 .flags = IORESOURCE_MEM,
201 },
202#endif
203#ifdef CONFIG_BFIN_SIR2
204 {
205 .start = 0xFFC02100,
206 .end = 0xFFC021FF,
207 .flags = IORESOURCE_MEM,
208 },
209#endif
210#ifdef CONFIG_BFIN_SIR3
211 {
212 .start = 0xFFC03100,
213 .end = 0xFFC031FF,
214 .flags = IORESOURCE_MEM,
215 },
216#endif
217};
218
219static struct platform_device bfin_sir_device = {
220 .name = "bfin_sir",
221 .id = 0,
222 .num_resources = ARRAY_SIZE(bfin_sir_resources),
223 .resource = bfin_sir_resources,
224};
225#endif
226
187#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) 227#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
188static struct resource smsc911x_resources[] = { 228static struct resource smsc911x_resources[] = {
189 { 229 {
@@ -559,6 +599,10 @@ static struct platform_device *cm_bf548_devices[] __initdata = {
559 &bfin_uart_device, 599 &bfin_uart_device,
560#endif 600#endif
561 601
602#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
603 &bfin_sir_device,
604#endif
605
562#if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE) 606#if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
563 &bf54x_lq043_device, 607 &bf54x_lq043_device,
564#endif 608#endif
diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c
index 548820d25ebb..231dfbd3bc1f 100644
--- a/arch/blackfin/mach-bf548/boards/ezkit.c
+++ b/arch/blackfin/mach-bf548/boards/ezkit.c
@@ -188,6 +188,46 @@ static struct platform_device bfin_uart_device = {
188}; 188};
189#endif 189#endif
190 190
191#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
192static struct resource bfin_sir_resources[] = {
193#ifdef CONFIG_BFIN_SIR0
194 {
195 .start = 0xFFC00400,
196 .end = 0xFFC004FF,
197 .flags = IORESOURCE_MEM,
198 },
199#endif
200#ifdef CONFIG_BFIN_SIR1
201 {
202 .start = 0xFFC02000,
203 .end = 0xFFC020FF,
204 .flags = IORESOURCE_MEM,
205 },
206#endif
207#ifdef CONFIG_BFIN_SIR2
208 {
209 .start = 0xFFC02100,
210 .end = 0xFFC021FF,
211 .flags = IORESOURCE_MEM,
212 },
213#endif
214#ifdef CONFIG_BFIN_SIR3
215 {
216 .start = 0xFFC03100,
217 .end = 0xFFC031FF,
218 .flags = IORESOURCE_MEM,
219 },
220#endif
221};
222
223static struct platform_device bfin_sir_device = {
224 .name = "bfin_sir",
225 .id = 0,
226 .num_resources = ARRAY_SIZE(bfin_sir_resources),
227 .resource = bfin_sir_resources,
228};
229#endif
230
191#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) 231#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
192static struct resource smsc911x_resources[] = { 232static struct resource smsc911x_resources[] = {
193 { 233 {
@@ -660,6 +700,10 @@ static struct platform_device *ezkit_devices[] __initdata = {
660 &bfin_uart_device, 700 &bfin_uart_device,
661#endif 701#endif
662 702
703#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
704 &bfin_sir_device,
705#endif
706
663#if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE) 707#if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
664 &bf54x_lq043_device, 708 &bf54x_lq043_device,
665#endif 709#endif
diff --git a/arch/blackfin/mach-bf561/boards/cm_bf561.c b/arch/blackfin/mach-bf561/boards/cm_bf561.c
index 4a3e0853f2a4..9fd580952fd8 100644
--- a/arch/blackfin/mach-bf561/boards/cm_bf561.c
+++ b/arch/blackfin/mach-bf561/boards/cm_bf561.c
@@ -283,6 +283,25 @@ static struct platform_device bfin_uart_device = {
283}; 283};
284#endif 284#endif
285 285
286#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
287static struct resource bfin_sir_resources[] = {
288#ifdef CONFIG_BFIN_SIR0
289 {
290 .start = 0xFFC00400,
291 .end = 0xFFC004FF,
292 .flags = IORESOURCE_MEM,
293 },
294#endif
295};
296
297static struct platform_device bfin_sir_device = {
298 .name = "bfin_sir",
299 .id = 0,
300 .num_resources = ARRAY_SIZE(bfin_sir_resources),
301 .resource = bfin_sir_resources,
302};
303#endif
304
286#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) 305#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
287#define PATA_INT 119 306#define PATA_INT 119
288 307
@@ -330,6 +349,10 @@ static struct platform_device *cm_bf561_devices[] __initdata = {
330 &bfin_uart_device, 349 &bfin_uart_device,
331#endif 350#endif
332 351
352#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
353 &bfin_sir_device,
354#endif
355
333#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) 356#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
334 &isp1362_hcd_device, 357 &isp1362_hcd_device,
335#endif 358#endif
diff --git a/arch/blackfin/mach-bf561/boards/ezkit.c b/arch/blackfin/mach-bf561/boards/ezkit.c
index 8eb79e526ad0..0d74b7d99209 100644
--- a/arch/blackfin/mach-bf561/boards/ezkit.c
+++ b/arch/blackfin/mach-bf561/boards/ezkit.c
@@ -220,6 +220,25 @@ static struct platform_device bfin_uart_device = {
220}; 220};
221#endif 221#endif
222 222
223#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
224static struct resource bfin_sir_resources[] = {
225#ifdef CONFIG_BFIN_SIR0
226 {
227 .start = 0xFFC00400,
228 .end = 0xFFC004FF,
229 .flags = IORESOURCE_MEM,
230 },
231#endif
232};
233
234static struct platform_device bfin_sir_device = {
235 .name = "bfin_sir",
236 .id = 0,
237 .num_resources = ARRAY_SIZE(bfin_sir_resources),
238 .resource = bfin_sir_resources,
239};
240#endif
241
223#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) 242#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
224static struct mtd_partition ezkit_partitions[] = { 243static struct mtd_partition ezkit_partitions[] = {
225 { 244 {
@@ -445,6 +464,10 @@ static struct platform_device *ezkit_devices[] __initdata = {
445 &bfin_uart_device, 464 &bfin_uart_device,
446#endif 465#endif
447 466
467#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
468 &bfin_sir_device,
469#endif
470
448#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) 471#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
449 &bfin_pata_device, 472 &bfin_pata_device,
450#endif 473#endif
diff --git a/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h
index c0694ecd2ecd..f0ab2736a680 100644
--- a/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h
@@ -1,22 +1,38 @@
1/*
2 * file: include/asm-blackfin/mach-bf527/bfin_serial_5xx.h
3 * based on:
4 * author:
5 *
6 * created:
7 * description:
8 * blackfin serial driver head file
9 * rev:
10 *
11 * modified:
12 *
13 *
14 * bugs: enter bugs at http://blackfin.uclinux.org/
15 *
16 * this program is free software; you can redistribute it and/or modify
17 * it under the terms of the gnu general public license as published by
18 * the free software foundation; either version 2, or (at your option)
19 * any later version.
20 *
21 * this program is distributed in the hope that it will be useful,
22 * but without any warranty; without even the implied warranty of
23 * merchantability or fitness for a particular purpose. see the
24 * gnu general public license for more details.
25 *
26 * you should have received a copy of the gnu general public license
27 * along with this program; see the file copying.
28 * if not, write to the free software foundation,
29 * 59 temple place - suite 330, boston, ma 02111-1307, usa.
30 */
31
1#include <linux/serial.h> 32#include <linux/serial.h>
2#include <asm/dma.h> 33#include <asm/dma.h>
3#include <asm/portmux.h> 34#include <asm/portmux.h>
4 35
5#define NR_PORTS 2
6
7#define OFFSET_THR 0x00 /* Transmit Holding register */
8#define OFFSET_RBR 0x00 /* Receive Buffer register */
9#define OFFSET_DLL 0x00 /* Divisor Latch (Low-Byte) */
10#define OFFSET_IER 0x04 /* Interrupt Enable Register */
11#define OFFSET_DLH 0x04 /* Divisor Latch (High-Byte) */
12#define OFFSET_IIR 0x08 /* Interrupt Identification Register */
13#define OFFSET_LCR 0x0C /* Line Control Register */
14#define OFFSET_MCR 0x10 /* Modem Control Register */
15#define OFFSET_LSR 0x14 /* Line Status Register */
16#define OFFSET_MSR 0x18 /* Modem Status Register */
17#define OFFSET_SCR 0x1C /* SCR Scratch Register */
18#define OFFSET_GCTL 0x24 /* Global Control Register */
19
20#define UART_GET_CHAR(uart) bfin_read16(((uart)->port.membase + OFFSET_RBR)) 36#define UART_GET_CHAR(uart) bfin_read16(((uart)->port.membase + OFFSET_RBR))
21#define UART_GET_DLL(uart) bfin_read16(((uart)->port.membase + OFFSET_DLL)) 37#define UART_GET_DLL(uart) bfin_read16(((uart)->port.membase + OFFSET_DLL))
22#define UART_GET_IER(uart) bfin_read16(((uart)->port.membase + OFFSET_IER)) 38#define UART_GET_IER(uart) bfin_read16(((uart)->port.membase + OFFSET_IER))
@@ -92,7 +108,7 @@ static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart)
92 bfin_write16(uart->port.membase + OFFSET_LSR, -1); 108 bfin_write16(uart->port.membase + OFFSET_LSR, -1);
93} 109}
94 110
95struct bfin_serial_port bfin_serial_ports[NR_PORTS]; 111struct bfin_serial_port bfin_serial_ports[BFIN_UART_NR_PORTS];
96struct bfin_serial_res { 112struct bfin_serial_res {
97 unsigned long uart_base_addr; 113 unsigned long uart_base_addr;
98 int uart_irq; 114 int uart_irq;
diff --git a/include/asm-blackfin/mach-bf527/bfin_sir.h b/include/asm-blackfin/mach-bf527/bfin_sir.h
new file mode 100644
index 000000000000..0612d0c9501c
--- /dev/null
+++ b/include/asm-blackfin/mach-bf527/bfin_sir.h
@@ -0,0 +1,133 @@
1/*
2 * Blackfin Infra-red Driver
3 *
4 * Copyright 2006-2008 Analog Devices Inc.
5 *
6 * Enter bugs at http://blackfin.uclinux.org/
7 *
8 * Licensed under the GPL-2 or later.
9 *
10 */
11
12#include <linux/serial.h>
13#include <asm/dma.h>
14#include <asm/portmux.h>
15
16#define SIR_UART_GET_CHAR(port) bfin_read16((port)->membase + OFFSET_RBR)
17#define SIR_UART_GET_DLL(port) bfin_read16((port)->membase + OFFSET_DLL)
18#define SIR_UART_GET_IER(port) bfin_read16((port)->membase + OFFSET_IER)
19#define SIR_UART_GET_DLH(port) bfin_read16((port)->membase + OFFSET_DLH)
20#define SIR_UART_GET_IIR(port) bfin_read16((port)->membase + OFFSET_IIR)
21#define SIR_UART_GET_LCR(port) bfin_read16((port)->membase + OFFSET_LCR)
22#define SIR_UART_GET_GCTL(port) bfin_read16((port)->membase + OFFSET_GCTL)
23
24#define SIR_UART_PUT_CHAR(port, v) bfin_write16(((port)->membase + OFFSET_THR), v)
25#define SIR_UART_PUT_DLL(port, v) bfin_write16(((port)->membase + OFFSET_DLL), v)
26#define SIR_UART_PUT_IER(port, v) bfin_write16(((port)->membase + OFFSET_IER), v)
27#define SIR_UART_PUT_DLH(port, v) bfin_write16(((port)->membase + OFFSET_DLH), v)
28#define SIR_UART_PUT_LCR(port, v) bfin_write16(((port)->membase + OFFSET_LCR), v)
29#define SIR_UART_PUT_GCTL(port, v) bfin_write16(((port)->membase + OFFSET_GCTL), v)
30
31#ifdef CONFIG_SIR_BFIN_DMA
32struct dma_rx_buf {
33 char *buf;
34 int head;
35 int tail;
36 };
37#endif /* CONFIG_SIR_BFIN_DMA */
38
39struct bfin_sir_port {
40 unsigned char __iomem *membase;
41 unsigned int irq;
42 unsigned int lsr;
43 unsigned long clk;
44 struct net_device *dev;
45#ifdef CONFIG_SIR_BFIN_DMA
46 int tx_done;
47 struct dma_rx_buf rx_dma_buf;
48 struct timer_list rx_dma_timer;
49 int rx_dma_nrows;
50#endif /* CONFIG_SIR_BFIN_DMA */
51 unsigned int tx_dma_channel;
52 unsigned int rx_dma_channel;
53};
54
55struct bfin_sir_port sir_ports[BFIN_UART_NR_PORTS];
56
57struct bfin_sir_port_res {
58 unsigned long base_addr;
59 int irq;
60 unsigned int rx_dma_channel;
61 unsigned int tx_dma_channel;
62};
63
64struct bfin_sir_port_res bfin_sir_port_resource[] = {
65#ifdef CONFIG_BFIN_SIR0
66 {
67 0xFFC00400,
68 IRQ_UART0_RX,
69 CH_UART0_RX,
70 CH_UART0_TX,
71 },
72#endif
73#ifdef CONFIG_BFIN_SIR1
74 {
75 0xFFC02000,
76 IRQ_UART1_RX,
77 CH_UART1_RX,
78 CH_UART1_TX,
79 },
80#endif
81};
82
83int nr_sirs = ARRAY_SIZE(bfin_sir_port_resource);
84
85struct bfin_sir_self {
86 struct bfin_sir_port *sir_port;
87 spinlock_t lock;
88 unsigned int open;
89 int speed;
90 int newspeed;
91
92 struct sk_buff *txskb;
93 struct sk_buff *rxskb;
94 struct net_device_stats stats;
95 struct device *dev;
96 struct irlap_cb *irlap;
97 struct qos_info qos;
98
99 iobuff_t tx_buff;
100 iobuff_t rx_buff;
101
102 struct work_struct work;
103 int mtt;
104};
105
106static inline unsigned int SIR_UART_GET_LSR(struct bfin_sir_port *port)
107{
108 unsigned int lsr = bfin_read16(port->membase + OFFSET_LSR);
109 port->lsr |= (lsr & (BI|FE|PE|OE));
110 return lsr | port->lsr;
111}
112
113static inline void SIR_UART_CLEAR_LSR(struct bfin_sir_port *port)
114{
115 port->lsr = 0;
116 bfin_read16(port->membase + OFFSET_LSR);
117}
118
119#define DRIVER_NAME "bfin_sir"
120
121static void bfin_sir_hw_init(void)
122{
123#ifdef CONFIG_BFIN_SIR0
124 peripheral_request(P_UART0_TX, DRIVER_NAME);
125 peripheral_request(P_UART0_RX, DRIVER_NAME);
126#endif
127
128#ifdef CONFIG_BFIN_SIR1
129 peripheral_request(P_UART1_TX, DRIVER_NAME);
130 peripheral_request(P_UART1_RX, DRIVER_NAME);
131#endif
132 SSYNC();
133}
diff --git a/include/asm-blackfin/mach-bf527/blackfin.h b/include/asm-blackfin/mach-bf527/blackfin.h
index 1bd07e30781c..2891727b6176 100644
--- a/include/asm-blackfin/mach-bf527/blackfin.h
+++ b/include/asm-blackfin/mach-bf527/blackfin.h
@@ -64,6 +64,21 @@
64#define STATUS_P1 0x02 64#define STATUS_P1 0x02
65#define STATUS_P0 0x01 65#define STATUS_P0 0x01
66 66
67#define BFIN_UART_NR_PORTS 2
68
69#define OFFSET_THR 0x00 /* Transmit Holding register */
70#define OFFSET_RBR 0x00 /* Receive Buffer register */
71#define OFFSET_DLL 0x00 /* Divisor Latch (Low-Byte) */
72#define OFFSET_IER 0x04 /* Interrupt Enable Register */
73#define OFFSET_DLH 0x04 /* Divisor Latch (High-Byte) */
74#define OFFSET_IIR 0x08 /* Interrupt Identification Register */
75#define OFFSET_LCR 0x0C /* Line Control Register */
76#define OFFSET_MCR 0x10 /* Modem Control Register */
77#define OFFSET_LSR 0x14 /* Line Status Register */
78#define OFFSET_MSR 0x18 /* Modem Status Register */
79#define OFFSET_SCR 0x1C /* SCR Scratch Register */
80#define OFFSET_GCTL 0x24 /* Global Control Register */
81
67/* DPMC*/ 82/* DPMC*/
68#define bfin_read_STOPCK_OFF() bfin_read_STOPCK() 83#define bfin_read_STOPCK_OFF() bfin_read_STOPCK()
69#define bfin_write_STOPCK_OFF(val) bfin_write_STOPCK(val) 84#define bfin_write_STOPCK_OFF(val) bfin_write_STOPCK(val)
diff --git a/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h
index b6f513bee56e..fbe88dee3e2d 100644
--- a/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h
@@ -1,22 +1,38 @@
1/*
2 * file: include/asm-blackfin/mach-bf533/bfin_serial_5xx.h
3 * based on:
4 * author:
5 *
6 * created:
7 * description:
8 * blackfin serial driver head file
9 * rev:
10 *
11 * modified:
12 *
13 *
14 * bugs: enter bugs at http://blackfin.uclinux.org/
15 *
16 * this program is free software; you can redistribute it and/or modify
17 * it under the terms of the gnu general public license as published by
18 * the free software foundation; either version 2, or (at your option)
19 * any later version.
20 *
21 * this program is distributed in the hope that it will be useful,
22 * but without any warranty; without even the implied warranty of
23 * merchantability or fitness for a particular purpose. see the
24 * gnu general public license for more details.
25 *
26 * you should have received a copy of the gnu general public license
27 * along with this program; see the file copying.
28 * if not, write to the free software foundation,
29 * 59 temple place - suite 330, boston, ma 02111-1307, usa.
30 */
31
1#include <linux/serial.h> 32#include <linux/serial.h>
2#include <asm/dma.h> 33#include <asm/dma.h>
3#include <asm/portmux.h> 34#include <asm/portmux.h>
4 35
5#define NR_PORTS 1
6
7#define OFFSET_THR 0x00 /* Transmit Holding register */
8#define OFFSET_RBR 0x00 /* Receive Buffer register */
9#define OFFSET_DLL 0x00 /* Divisor Latch (Low-Byte) */
10#define OFFSET_IER 0x04 /* Interrupt Enable Register */
11#define OFFSET_DLH 0x04 /* Divisor Latch (High-Byte) */
12#define OFFSET_IIR 0x08 /* Interrupt Identification Register */
13#define OFFSET_LCR 0x0C /* Line Control Register */
14#define OFFSET_MCR 0x10 /* Modem Control Register */
15#define OFFSET_LSR 0x14 /* Line Status Register */
16#define OFFSET_MSR 0x18 /* Modem Status Register */
17#define OFFSET_SCR 0x1C /* SCR Scratch Register */
18#define OFFSET_GCTL 0x24 /* Global Control Register */
19
20#define UART_GET_CHAR(uart) bfin_read16(((uart)->port.membase + OFFSET_RBR)) 36#define UART_GET_CHAR(uart) bfin_read16(((uart)->port.membase + OFFSET_RBR))
21#define UART_GET_DLL(uart) bfin_read16(((uart)->port.membase + OFFSET_DLL)) 37#define UART_GET_DLL(uart) bfin_read16(((uart)->port.membase + OFFSET_DLL))
22#define UART_GET_IER(uart) bfin_read16(((uart)->port.membase + OFFSET_IER)) 38#define UART_GET_IER(uart) bfin_read16(((uart)->port.membase + OFFSET_IER))
@@ -84,7 +100,7 @@ static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart)
84 bfin_write16(uart->port.membase + OFFSET_LSR, -1); 100 bfin_write16(uart->port.membase + OFFSET_LSR, -1);
85} 101}
86 102
87struct bfin_serial_port bfin_serial_ports[NR_PORTS]; 103struct bfin_serial_port bfin_serial_ports[BFIN_UART_NR_PORTS];
88struct bfin_serial_res { 104struct bfin_serial_res {
89 unsigned long uart_base_addr; 105 unsigned long uart_base_addr;
90 int uart_irq; 106 int uart_irq;
@@ -115,7 +131,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
115 131
116#define DRIVER_NAME "bfin-uart" 132#define DRIVER_NAME "bfin-uart"
117 133
118int nr_ports = NR_PORTS; 134int nr_ports = BFIN_UART_NR_PORTS;
119static void bfin_serial_hw_init(struct bfin_serial_port *uart) 135static void bfin_serial_hw_init(struct bfin_serial_port *uart)
120{ 136{
121 137
diff --git a/include/asm-blackfin/mach-bf533/bfin_sir.h b/include/asm-blackfin/mach-bf533/bfin_sir.h
new file mode 100644
index 000000000000..cefcf8bb505b
--- /dev/null
+++ b/include/asm-blackfin/mach-bf533/bfin_sir.h
@@ -0,0 +1,120 @@
1/*
2 * Blackfin Infra-red Driver
3 *
4 * Copyright 2006-2008 Analog Devices Inc.
5 *
6 * Enter bugs at http://blackfin.uclinux.org/
7 *
8 * Licensed under the GPL-2 or later.
9 *
10 */
11
12#include <linux/serial.h>
13#include <asm/dma.h>
14#include <asm/portmux.h>
15
16#define SIR_UART_GET_CHAR(port) bfin_read16((port)->membase + OFFSET_RBR)
17#define SIR_UART_GET_DLL(port) bfin_read16((port)->membase + OFFSET_DLL)
18#define SIR_UART_GET_IER(port) bfin_read16((port)->membase + OFFSET_IER)
19#define SIR_UART_GET_DLH(port) bfin_read16((port)->membase + OFFSET_DLH)
20#define SIR_UART_GET_IIR(port) bfin_read16((port)->membase + OFFSET_IIR)
21#define SIR_UART_GET_LCR(port) bfin_read16((port)->membase + OFFSET_LCR)
22#define SIR_UART_GET_GCTL(port) bfin_read16((port)->membase + OFFSET_GCTL)
23
24#define SIR_UART_PUT_CHAR(port, v) bfin_write16(((port)->membase + OFFSET_THR), v)
25#define SIR_UART_PUT_DLL(port, v) bfin_write16(((port)->membase + OFFSET_DLL), v)
26#define SIR_UART_PUT_IER(port, v) bfin_write16(((port)->membase + OFFSET_IER), v)
27#define SIR_UART_PUT_DLH(port, v) bfin_write16(((port)->membase + OFFSET_DLH), v)
28#define SIR_UART_PUT_LCR(port, v) bfin_write16(((port)->membase + OFFSET_LCR), v)
29#define SIR_UART_PUT_GCTL(port, v) bfin_write16(((port)->membase + OFFSET_GCTL), v)
30
31#ifdef CONFIG_SIR_BFIN_DMA
32struct dma_rx_buf {
33 char *buf;
34 int head;
35 int tail;
36 };
37#endif /* CONFIG_SIR_BFIN_DMA */
38
39struct bfin_sir_port {
40 unsigned char __iomem *membase;
41 unsigned int irq;
42 unsigned int lsr;
43 unsigned long clk;
44 struct net_device *dev;
45#ifdef CONFIG_SIR_BFIN_DMA
46 int tx_done;
47 struct dma_rx_buf rx_dma_buf;
48 struct timer_list rx_dma_timer;
49 int rx_dma_nrows;
50#endif /* CONFIG_SIR_BFIN_DMA */
51 unsigned int tx_dma_channel;
52 unsigned int rx_dma_channel;
53};
54
55struct bfin_sir_port sir_ports[BFIN_UART_NR_PORTS];
56
57struct bfin_sir_port_res {
58 unsigned long base_addr;
59 int irq;
60 unsigned int rx_dma_channel;
61 unsigned int tx_dma_channel;
62};
63
64struct bfin_sir_port_res bfin_sir_port_resource[] = {
65#ifdef CONFIG_BFIN_SIR0
66 {
67 0xFFC00400,
68 IRQ_UART_RX,
69 CH_UART_RX,
70 CH_UART_TX,
71 },
72#endif
73};
74
75int nr_sirs = ARRAY_SIZE(bfin_sir_port_resource);
76
77struct bfin_sir_self {
78 struct bfin_sir_port *sir_port;
79 spinlock_t lock;
80 unsigned int open;
81 int speed;
82 int newspeed;
83
84 struct sk_buff *txskb;
85 struct sk_buff *rxskb;
86 struct net_device_stats stats;
87 struct device *dev;
88 struct irlap_cb *irlap;
89 struct qos_info qos;
90
91 iobuff_t tx_buff;
92 iobuff_t rx_buff;
93
94 struct work_struct work;
95 int mtt;
96};
97
98static inline unsigned int SIR_UART_GET_LSR(struct bfin_sir_port *port)
99{
100 unsigned int lsr = bfin_read16(port->membase + OFFSET_LSR);
101 port->lsr |= (lsr & (BI|FE|PE|OE));
102 return lsr | port->lsr;
103}
104
105static inline void SIR_UART_CLEAR_LSR(struct bfin_sir_port *port)
106{
107 port->lsr = 0;
108 bfin_read16(port->membase + OFFSET_LSR);
109}
110
111#define DRIVER_NAME "bfin_sir"
112
113static void bfin_sir_hw_init(void)
114{
115#ifdef CONFIG_BFIN_SIR0
116 peripheral_request(P_UART0_TX, DRIVER_NAME);
117 peripheral_request(P_UART0_RX, DRIVER_NAME);
118#endif
119 SSYNC();
120}
diff --git a/include/asm-blackfin/mach-bf533/blackfin.h b/include/asm-blackfin/mach-bf533/blackfin.h
index f3b240abf170..d80971b4e3aa 100644
--- a/include/asm-blackfin/mach-bf533/blackfin.h
+++ b/include/asm-blackfin/mach-bf533/blackfin.h
@@ -42,4 +42,19 @@
42#include "cdefBF532.h" 42#include "cdefBF532.h"
43#endif 43#endif
44 44
45#define BFIN_UART_NR_PORTS 1
46
47#define OFFSET_THR 0x00 /* Transmit Holding register */
48#define OFFSET_RBR 0x00 /* Receive Buffer register */
49#define OFFSET_DLL 0x00 /* Divisor Latch (Low-Byte) */
50#define OFFSET_IER 0x04 /* Interrupt Enable Register */
51#define OFFSET_DLH 0x04 /* Divisor Latch (High-Byte) */
52#define OFFSET_IIR 0x08 /* Interrupt Identification Register */
53#define OFFSET_LCR 0x0C /* Line Control Register */
54#define OFFSET_MCR 0x10 /* Modem Control Register */
55#define OFFSET_LSR 0x14 /* Line Status Register */
56#define OFFSET_MSR 0x18 /* Modem Status Register */
57#define OFFSET_SCR 0x1C /* SCR Scratch Register */
58#define OFFSET_GCTL 0x24 /* Global Control Register */
59
45#endif /* _MACH_BLACKFIN_H_ */ 60#endif /* _MACH_BLACKFIN_H_ */
diff --git a/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h
index 8fc672d31057..fd100a415b98 100644
--- a/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h
@@ -1,22 +1,38 @@
1/*
2 * file: include/asm-blackfin/mach-bf537/bfin_serial_5xx.h
3 * based on:
4 * author:
5 *
6 * created:
7 * description:
8 * blackfin serial driver header files
9 * rev:
10 *
11 * modified:
12 *
13 *
14 * bugs: enter bugs at http://blackfin.uclinux.org/
15 *
16 * this program is free software; you can redistribute it and/or modify
17 * it under the terms of the gnu general public license as published by
18 * the free software foundation; either version 2, or (at your option)
19 * any later version.
20 *
21 * this program is distributed in the hope that it will be useful,
22 * but without any warranty; without even the implied warranty of
23 * merchantability or fitness for a particular purpose. see the
24 * gnu general public license for more details.
25 *
26 * you should have received a copy of the gnu general public license
27 * along with this program; see the file copying.
28 * if not, write to the free software foundation,
29 * 59 temple place - suite 330, boston, ma 02111-1307, usa.
30 */
31
1#include <linux/serial.h> 32#include <linux/serial.h>
2#include <asm/dma.h> 33#include <asm/dma.h>
3#include <asm/portmux.h> 34#include <asm/portmux.h>
4 35
5#define NR_PORTS 2
6
7#define OFFSET_THR 0x00 /* Transmit Holding register */
8#define OFFSET_RBR 0x00 /* Receive Buffer register */
9#define OFFSET_DLL 0x00 /* Divisor Latch (Low-Byte) */
10#define OFFSET_IER 0x04 /* Interrupt Enable Register */
11#define OFFSET_DLH 0x04 /* Divisor Latch (High-Byte) */
12#define OFFSET_IIR 0x08 /* Interrupt Identification Register */
13#define OFFSET_LCR 0x0C /* Line Control Register */
14#define OFFSET_MCR 0x10 /* Modem Control Register */
15#define OFFSET_LSR 0x14 /* Line Status Register */
16#define OFFSET_MSR 0x18 /* Modem Status Register */
17#define OFFSET_SCR 0x1C /* SCR Scratch Register */
18#define OFFSET_GCTL 0x24 /* Global Control Register */
19
20#define UART_GET_CHAR(uart) bfin_read16(((uart)->port.membase + OFFSET_RBR)) 36#define UART_GET_CHAR(uart) bfin_read16(((uart)->port.membase + OFFSET_RBR))
21#define UART_GET_DLL(uart) bfin_read16(((uart)->port.membase + OFFSET_DLL)) 37#define UART_GET_DLL(uart) bfin_read16(((uart)->port.membase + OFFSET_DLL))
22#define UART_GET_IER(uart) bfin_read16(((uart)->port.membase + OFFSET_IER)) 38#define UART_GET_IER(uart) bfin_read16(((uart)->port.membase + OFFSET_IER))
@@ -92,7 +108,7 @@ static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart)
92 bfin_write16(uart->port.membase + OFFSET_LSR, -1); 108 bfin_write16(uart->port.membase + OFFSET_LSR, -1);
93} 109}
94 110
95struct bfin_serial_port bfin_serial_ports[NR_PORTS]; 111struct bfin_serial_port bfin_serial_ports[BFIN_UART_NR_PORTS];
96struct bfin_serial_res { 112struct bfin_serial_res {
97 unsigned long uart_base_addr; 113 unsigned long uart_base_addr;
98 int uart_irq; 114 int uart_irq;
diff --git a/include/asm-blackfin/mach-bf537/bfin_sir.h b/include/asm-blackfin/mach-bf537/bfin_sir.h
new file mode 100644
index 000000000000..0612d0c9501c
--- /dev/null
+++ b/include/asm-blackfin/mach-bf537/bfin_sir.h
@@ -0,0 +1,133 @@
1/*
2 * Blackfin Infra-red Driver
3 *
4 * Copyright 2006-2008 Analog Devices Inc.
5 *
6 * Enter bugs at http://blackfin.uclinux.org/
7 *
8 * Licensed under the GPL-2 or later.
9 *
10 */
11
12#include <linux/serial.h>
13#include <asm/dma.h>
14#include <asm/portmux.h>
15
16#define SIR_UART_GET_CHAR(port) bfin_read16((port)->membase + OFFSET_RBR)
17#define SIR_UART_GET_DLL(port) bfin_read16((port)->membase + OFFSET_DLL)
18#define SIR_UART_GET_IER(port) bfin_read16((port)->membase + OFFSET_IER)
19#define SIR_UART_GET_DLH(port) bfin_read16((port)->membase + OFFSET_DLH)
20#define SIR_UART_GET_IIR(port) bfin_read16((port)->membase + OFFSET_IIR)
21#define SIR_UART_GET_LCR(port) bfin_read16((port)->membase + OFFSET_LCR)
22#define SIR_UART_GET_GCTL(port) bfin_read16((port)->membase + OFFSET_GCTL)
23
24#define SIR_UART_PUT_CHAR(port, v) bfin_write16(((port)->membase + OFFSET_THR), v)
25#define SIR_UART_PUT_DLL(port, v) bfin_write16(((port)->membase + OFFSET_DLL), v)
26#define SIR_UART_PUT_IER(port, v) bfin_write16(((port)->membase + OFFSET_IER), v)
27#define SIR_UART_PUT_DLH(port, v) bfin_write16(((port)->membase + OFFSET_DLH), v)
28#define SIR_UART_PUT_LCR(port, v) bfin_write16(((port)->membase + OFFSET_LCR), v)
29#define SIR_UART_PUT_GCTL(port, v) bfin_write16(((port)->membase + OFFSET_GCTL), v)
30
31#ifdef CONFIG_SIR_BFIN_DMA
32struct dma_rx_buf {
33 char *buf;
34 int head;
35 int tail;
36 };
37#endif /* CONFIG_SIR_BFIN_DMA */
38
39struct bfin_sir_port {
40 unsigned char __iomem *membase;
41 unsigned int irq;
42 unsigned int lsr;
43 unsigned long clk;
44 struct net_device *dev;
45#ifdef CONFIG_SIR_BFIN_DMA
46 int tx_done;
47 struct dma_rx_buf rx_dma_buf;
48 struct timer_list rx_dma_timer;
49 int rx_dma_nrows;
50#endif /* CONFIG_SIR_BFIN_DMA */
51 unsigned int tx_dma_channel;
52 unsigned int rx_dma_channel;
53};
54
55struct bfin_sir_port sir_ports[BFIN_UART_NR_PORTS];
56
57struct bfin_sir_port_res {
58 unsigned long base_addr;
59 int irq;
60 unsigned int rx_dma_channel;
61 unsigned int tx_dma_channel;
62};
63
64struct bfin_sir_port_res bfin_sir_port_resource[] = {
65#ifdef CONFIG_BFIN_SIR0
66 {
67 0xFFC00400,
68 IRQ_UART0_RX,
69 CH_UART0_RX,
70 CH_UART0_TX,
71 },
72#endif
73#ifdef CONFIG_BFIN_SIR1
74 {
75 0xFFC02000,
76 IRQ_UART1_RX,
77 CH_UART1_RX,
78 CH_UART1_TX,
79 },
80#endif
81};
82
83int nr_sirs = ARRAY_SIZE(bfin_sir_port_resource);
84
85struct bfin_sir_self {
86 struct bfin_sir_port *sir_port;
87 spinlock_t lock;
88 unsigned int open;
89 int speed;
90 int newspeed;
91
92 struct sk_buff *txskb;
93 struct sk_buff *rxskb;
94 struct net_device_stats stats;
95 struct device *dev;
96 struct irlap_cb *irlap;
97 struct qos_info qos;
98
99 iobuff_t tx_buff;
100 iobuff_t rx_buff;
101
102 struct work_struct work;
103 int mtt;
104};
105
106static inline unsigned int SIR_UART_GET_LSR(struct bfin_sir_port *port)
107{
108 unsigned int lsr = bfin_read16(port->membase + OFFSET_LSR);
109 port->lsr |= (lsr & (BI|FE|PE|OE));
110 return lsr | port->lsr;
111}
112
113static inline void SIR_UART_CLEAR_LSR(struct bfin_sir_port *port)
114{
115 port->lsr = 0;
116 bfin_read16(port->membase + OFFSET_LSR);
117}
118
119#define DRIVER_NAME "bfin_sir"
120
121static void bfin_sir_hw_init(void)
122{
123#ifdef CONFIG_BFIN_SIR0
124 peripheral_request(P_UART0_TX, DRIVER_NAME);
125 peripheral_request(P_UART0_RX, DRIVER_NAME);
126#endif
127
128#ifdef CONFIG_BFIN_SIR1
129 peripheral_request(P_UART1_TX, DRIVER_NAME);
130 peripheral_request(P_UART1_RX, DRIVER_NAME);
131#endif
132 SSYNC();
133}
diff --git a/include/asm-blackfin/mach-bf537/blackfin.h b/include/asm-blackfin/mach-bf537/blackfin.h
index 4f10ee0ae10d..cffc786b2a2b 100644
--- a/include/asm-blackfin/mach-bf537/blackfin.h
+++ b/include/asm-blackfin/mach-bf537/blackfin.h
@@ -136,6 +136,21 @@
136#define bfin_write_UART_GCTL(val) bfin_write_UART0_GCTL(val) 136#define bfin_write_UART_GCTL(val) bfin_write_UART0_GCTL(val)
137#define BFIN_UART_GCTL UART0_GCTL 137#define BFIN_UART_GCTL UART0_GCTL
138 138
139#define BFIN_UART_NR_PORTS 2
140
141#define OFFSET_THR 0x00 /* Transmit Holding register */
142#define OFFSET_RBR 0x00 /* Receive Buffer register */
143#define OFFSET_DLL 0x00 /* Divisor Latch (Low-Byte) */
144#define OFFSET_IER 0x04 /* Interrupt Enable Register */
145#define OFFSET_DLH 0x04 /* Divisor Latch (High-Byte) */
146#define OFFSET_IIR 0x08 /* Interrupt Identification Register */
147#define OFFSET_LCR 0x0C /* Line Control Register */
148#define OFFSET_MCR 0x10 /* Modem Control Register */
149#define OFFSET_LSR 0x14 /* Line Status Register */
150#define OFFSET_MSR 0x18 /* Modem Status Register */
151#define OFFSET_SCR 0x1C /* SCR Scratch Register */
152#define OFFSET_GCTL 0x24 /* Global Control Register */
153
139/* DPMC*/ 154/* DPMC*/
140#define bfin_read_STOPCK_OFF() bfin_read_STOPCK() 155#define bfin_read_STOPCK_OFF() bfin_read_STOPCK()
141#define bfin_write_STOPCK_OFF(val) bfin_write_STOPCK(val) 156#define bfin_write_STOPCK_OFF(val) bfin_write_STOPCK(val)
diff --git a/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
index 7e6339f62a50..6547027cd3e6 100644
--- a/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
@@ -1,22 +1,38 @@
1/*
2 * file: include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
3 * based on:
4 * author:
5 *
6 * created:
7 * description:
8 * blackfin serial driver head file
9 * rev:
10 *
11 * modified:
12 *
13 *
14 * bugs: enter bugs at http://blackfin.uclinux.org/
15 *
16 * this program is free software; you can redistribute it and/or modify
17 * it under the terms of the gnu general public license as published by
18 * the free software foundation; either version 2, or (at your option)
19 * any later version.
20 *
21 * this program is distributed in the hope that it will be useful,
22 * but without any warranty; without even the implied warranty of
23 * merchantability or fitness for a particular purpose. see the
24 * gnu general public license for more details.
25 *
26 * you should have received a copy of the gnu general public license
27 * along with this program; see the file copying.
28 * if not, write to the free software foundation,
29 * 59 temple place - suite 330, boston, ma 02111-1307, usa.
30 */
31
1#include <linux/serial.h> 32#include <linux/serial.h>
2#include <asm/dma.h> 33#include <asm/dma.h>
3#include <asm/portmux.h> 34#include <asm/portmux.h>
4 35
5#define NR_PORTS 4
6
7#define OFFSET_DLL 0x00 /* Divisor Latch (Low-Byte) */
8#define OFFSET_DLH 0x04 /* Divisor Latch (High-Byte) */
9#define OFFSET_GCTL 0x08 /* Global Control Register */
10#define OFFSET_LCR 0x0C /* Line Control Register */
11#define OFFSET_MCR 0x10 /* Modem Control Register */
12#define OFFSET_LSR 0x14 /* Line Status Register */
13#define OFFSET_MSR 0x18 /* Modem Status Register */
14#define OFFSET_SCR 0x1C /* SCR Scratch Register */
15#define OFFSET_IER_SET 0x20 /* Set Interrupt Enable Register */
16#define OFFSET_IER_CLEAR 0x24 /* Clear Interrupt Enable Register */
17#define OFFSET_THR 0x28 /* Transmit Holding register */
18#define OFFSET_RBR 0x2C /* Receive Buffer register */
19
20#define UART_GET_CHAR(uart) bfin_read16(((uart)->port.membase + OFFSET_RBR)) 36#define UART_GET_CHAR(uart) bfin_read16(((uart)->port.membase + OFFSET_RBR))
21#define UART_GET_DLL(uart) bfin_read16(((uart)->port.membase + OFFSET_DLL)) 37#define UART_GET_DLL(uart) bfin_read16(((uart)->port.membase + OFFSET_DLL))
22#define UART_GET_DLH(uart) bfin_read16(((uart)->port.membase + OFFSET_DLH)) 38#define UART_GET_DLH(uart) bfin_read16(((uart)->port.membase + OFFSET_DLH))
@@ -80,7 +96,7 @@ struct bfin_serial_port {
80#endif 96#endif
81}; 97};
82 98
83struct bfin_serial_port bfin_serial_ports[NR_PORTS]; 99struct bfin_serial_port bfin_serial_ports[BFIN_UART_NR_PORTS];
84struct bfin_serial_res { 100struct bfin_serial_res {
85 unsigned long uart_base_addr; 101 unsigned long uart_base_addr;
86 int uart_irq; 102 int uart_irq;
diff --git a/include/asm-blackfin/mach-bf548/bfin_sir.h b/include/asm-blackfin/mach-bf548/bfin_sir.h
new file mode 100644
index 000000000000..5e94271c7e3b
--- /dev/null
+++ b/include/asm-blackfin/mach-bf548/bfin_sir.h
@@ -0,0 +1,149 @@
1/*
2 * Blackfin Infra-red Driver
3 *
4 * Copyright 2006-2008 Analog Devices Inc.
5 *
6 * Enter bugs at http://blackfin.uclinux.org/
7 *
8 * Licensed under the GPL-2 or later.
9 *
10 */
11
12#include <linux/serial.h>
13#include <asm/dma.h>
14#include <asm/portmux.h>
15
16#define SIR_UART_GET_CHAR(port) bfin_read16((port)->membase + OFFSET_RBR)
17#define SIR_UART_GET_DLL(port) bfin_read16((port)->membase + OFFSET_DLL)
18#define SIR_UART_GET_IER(port) bfin_read16((port)->membase + OFFSET_IER_SET)
19#define SIR_UART_GET_DLH(port) bfin_read16((port)->membase + OFFSET_DLH)
20#define SIR_UART_GET_LCR(port) bfin_read16((port)->membase + OFFSET_LCR)
21#define SIR_UART_GET_LSR(port) bfin_read16((port)->membase + OFFSET_LSR)
22#define SIR_UART_GET_GCTL(port) bfin_read16((port)->membase + OFFSET_GCTL)
23
24#define SIR_UART_PUT_CHAR(port, v) bfin_write16(((port)->membase + OFFSET_THR), v)
25#define SIR_UART_PUT_DLL(port, v) bfin_write16(((port)->membase + OFFSET_DLL), v)
26#define SIR_UART_SET_IER(port, v) bfin_write16(((port)->membase + OFFSET_IER_SET), v)
27#define SIR_UART_CLEAR_IER(port, v) bfin_write16(((port)->membase + OFFSET_IER_CLEAR), v)
28#define SIR_UART_PUT_DLH(port, v) bfin_write16(((port)->membase + OFFSET_DLH), v)
29#define SIR_UART_PUT_LSR(port, v) bfin_write16(((port)->membase + OFFSET_LSR), v)
30#define SIR_UART_PUT_LCR(port, v) bfin_write16(((port)->membase + OFFSET_LCR), v)
31#define SIR_UART_CLEAR_LSR(port) bfin_write16(((port)->membase + OFFSET_LSR), -1)
32#define SIR_UART_PUT_GCTL(port, v) bfin_write16(((port)->membase + OFFSET_GCTL), v)
33
34#ifdef CONFIG_SIR_BFIN_DMA
35struct dma_rx_buf {
36 char *buf;
37 int head;
38 int tail;
39 };
40#endif /* CONFIG_SIR_BFIN_DMA */
41
42struct bfin_sir_port {
43 unsigned char __iomem *membase;
44 unsigned int irq;
45 unsigned int lsr;
46 unsigned long clk;
47 struct net_device *dev;
48#ifdef CONFIG_SIR_BFIN_DMA
49 int tx_done;
50 struct dma_rx_buf rx_dma_buf;
51 struct timer_list rx_dma_timer;
52 int rx_dma_nrows;
53#endif /* CONFIG_SIR_BFIN_DMA */
54 unsigned int tx_dma_channel;
55 unsigned int rx_dma_channel;
56};
57
58struct bfin_sir_port sir_ports[BFIN_UART_NR_PORTS];
59
60struct bfin_sir_port_res {
61 unsigned long base_addr;
62 int irq;
63 unsigned int rx_dma_channel;
64 unsigned int tx_dma_channel;
65};
66
67struct bfin_sir_port_res bfin_sir_port_resource[] = {
68#ifdef CONFIG_BFIN_SIR0
69 {
70 0xFFC00400,
71 IRQ_UART0_RX,
72 CH_UART0_RX,
73 CH_UART0_TX,
74 },
75#endif
76#ifdef CONFIG_BFIN_SIR1
77 {
78 0xFFC02000,
79 IRQ_UART1_RX,
80 CH_UART1_RX,
81 CH_UART1_TX,
82 },
83#endif
84#ifdef CONFIG_BFIN_SIR2
85 {
86 0xFFC02100,
87 IRQ_UART2_RX,
88 CH_UART2_RX,
89 CH_UART2_TX,
90 },
91#endif
92#ifdef CONFIG_BFIN_SIR3
93 {
94 0xFFC03100,
95 IRQ_UART3_RX,
96 CH_UART3_RX,
97 CH_UART3_TX,
98 },
99#endif
100};
101
102int nr_sirs = ARRAY_SIZE(bfin_sir_port_resource);
103
104struct bfin_sir_self {
105 struct bfin_sir_port *sir_port;
106 spinlock_t lock;
107 unsigned int open;
108 int speed;
109 int newspeed;
110
111 struct sk_buff *txskb;
112 struct sk_buff *rxskb;
113 struct net_device_stats stats;
114 struct device *dev;
115 struct irlap_cb *irlap;
116 struct qos_info qos;
117
118 iobuff_t tx_buff;
119 iobuff_t rx_buff;
120
121 struct work_struct work;
122 int mtt;
123};
124
125#define DRIVER_NAME "bfin_sir"
126
127static void bfin_sir_hw_init(void)
128{
129#ifdef CONFIG_BFIN_SIR0
130 peripheral_request(P_UART0_TX, DRIVER_NAME);
131 peripheral_request(P_UART0_RX, DRIVER_NAME);
132#endif
133
134#ifdef CONFIG_BFIN_SIR1
135 peripheral_request(P_UART1_TX, DRIVER_NAME);
136 peripheral_request(P_UART1_RX, DRIVER_NAME);
137#endif
138
139#ifdef CONFIG_BFIN_SIR2
140 peripheral_request(P_UART2_TX, DRIVER_NAME);
141 peripheral_request(P_UART2_RX, DRIVER_NAME);
142#endif
143
144#ifdef CONFIG_BFIN_SIR3
145 peripheral_request(P_UART3_TX, DRIVER_NAME);
146 peripheral_request(P_UART3_RX, DRIVER_NAME);
147#endif
148 SSYNC();
149}
diff --git a/include/asm-blackfin/mach-bf548/blackfin.h b/include/asm-blackfin/mach-bf548/blackfin.h
index b8509c16ecd4..d6ee74ac0460 100644
--- a/include/asm-blackfin/mach-bf548/blackfin.h
+++ b/include/asm-blackfin/mach-bf548/blackfin.h
@@ -166,6 +166,21 @@
166#define BFIN_UART_SCR UART1_SCR 166#define BFIN_UART_SCR UART1_SCR
167#define BFIN_UART_GCTL UART1_GCTL 167#define BFIN_UART_GCTL UART1_GCTL
168 168
169#define BFIN_UART_NR_PORTS 4
170
171#define OFFSET_DLL 0x00 /* Divisor Latch (Low-Byte) */
172#define OFFSET_DLH 0x04 /* Divisor Latch (High-Byte) */
173#define OFFSET_GCTL 0x08 /* Global Control Register */
174#define OFFSET_LCR 0x0C /* Line Control Register */
175#define OFFSET_MCR 0x10 /* Modem Control Register */
176#define OFFSET_LSR 0x14 /* Line Status Register */
177#define OFFSET_MSR 0x18 /* Modem Status Register */
178#define OFFSET_SCR 0x1C /* SCR Scratch Register */
179#define OFFSET_IER_SET 0x20 /* Set Interrupt Enable Register */
180#define OFFSET_IER_CLEAR 0x24 /* Clear Interrupt Enable Register */
181#define OFFSET_THR 0x28 /* Transmit Holding register */
182#define OFFSET_RBR 0x2C /* Receive Buffer register */
183
169/* PLL_DIV Masks */ 184/* PLL_DIV Masks */
170#define CCLK_DIV1 CSEL_DIV1 /* CCLK = VCO / 1 */ 185#define CCLK_DIV1 CSEL_DIV1 /* CCLK = VCO / 1 */
171#define CCLK_DIV2 CSEL_DIV2 /* CCLK = VCO / 2 */ 186#define CCLK_DIV2 CSEL_DIV2 /* CCLK = VCO / 2 */
diff --git a/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
index b6f513bee56e..8a4e66d1db37 100644
--- a/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
@@ -1,22 +1,38 @@
1/*
2 * file: include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
3 * based on:
4 * author:
5 *
6 * created:
7 * description:
8 * blackfin serial driver head file
9 * rev:
10 *
11 * modified:
12 *
13 *
14 * bugs: enter bugs at http://blackfin.uclinux.org/
15 *
16 * this program is free software; you can redistribute it and/or modify
17 * it under the terms of the gnu general public license as published by
18 * the free software foundation; either version 2, or (at your option)
19 * any later version.
20 *
21 * this program is distributed in the hope that it will be useful,
22 * but without any warranty; without even the implied warranty of
23 * merchantability or fitness for a particular purpose. see the
24 * gnu general public license for more details.
25 *
26 * you should have received a copy of the gnu general public license
27 * along with this program; see the file copying.
28 * if not, write to the free software foundation,
29 * 59 temple place - suite 330, boston, ma 02111-1307, usa.
30 */
31
1#include <linux/serial.h> 32#include <linux/serial.h>
2#include <asm/dma.h> 33#include <asm/dma.h>
3#include <asm/portmux.h> 34#include <asm/portmux.h>
4 35
5#define NR_PORTS 1
6
7#define OFFSET_THR 0x00 /* Transmit Holding register */
8#define OFFSET_RBR 0x00 /* Receive Buffer register */
9#define OFFSET_DLL 0x00 /* Divisor Latch (Low-Byte) */
10#define OFFSET_IER 0x04 /* Interrupt Enable Register */
11#define OFFSET_DLH 0x04 /* Divisor Latch (High-Byte) */
12#define OFFSET_IIR 0x08 /* Interrupt Identification Register */
13#define OFFSET_LCR 0x0C /* Line Control Register */
14#define OFFSET_MCR 0x10 /* Modem Control Register */
15#define OFFSET_LSR 0x14 /* Line Status Register */
16#define OFFSET_MSR 0x18 /* Modem Status Register */
17#define OFFSET_SCR 0x1C /* SCR Scratch Register */
18#define OFFSET_GCTL 0x24 /* Global Control Register */
19
20#define UART_GET_CHAR(uart) bfin_read16(((uart)->port.membase + OFFSET_RBR)) 36#define UART_GET_CHAR(uart) bfin_read16(((uart)->port.membase + OFFSET_RBR))
21#define UART_GET_DLL(uart) bfin_read16(((uart)->port.membase + OFFSET_DLL)) 37#define UART_GET_DLL(uart) bfin_read16(((uart)->port.membase + OFFSET_DLL))
22#define UART_GET_IER(uart) bfin_read16(((uart)->port.membase + OFFSET_IER)) 38#define UART_GET_IER(uart) bfin_read16(((uart)->port.membase + OFFSET_IER))
@@ -84,7 +100,7 @@ static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart)
84 bfin_write16(uart->port.membase + OFFSET_LSR, -1); 100 bfin_write16(uart->port.membase + OFFSET_LSR, -1);
85} 101}
86 102
87struct bfin_serial_port bfin_serial_ports[NR_PORTS]; 103struct bfin_serial_port bfin_serial_ports[BFIN_UART_NR_PORTS];
88struct bfin_serial_res { 104struct bfin_serial_res {
89 unsigned long uart_base_addr; 105 unsigned long uart_base_addr;
90 int uart_irq; 106 int uart_irq;
@@ -115,7 +131,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
115 131
116#define DRIVER_NAME "bfin-uart" 132#define DRIVER_NAME "bfin-uart"
117 133
118int nr_ports = NR_PORTS; 134int nr_ports = BFIN_UART_NR_PORTS;
119static void bfin_serial_hw_init(struct bfin_serial_port *uart) 135static void bfin_serial_hw_init(struct bfin_serial_port *uart)
120{ 136{
121 137
diff --git a/include/asm-blackfin/mach-bf561/bfin_sir.h b/include/asm-blackfin/mach-bf561/bfin_sir.h
new file mode 100644
index 000000000000..cefcf8bb505b
--- /dev/null
+++ b/include/asm-blackfin/mach-bf561/bfin_sir.h
@@ -0,0 +1,120 @@
1/*
2 * Blackfin Infra-red Driver
3 *
4 * Copyright 2006-2008 Analog Devices Inc.
5 *
6 * Enter bugs at http://blackfin.uclinux.org/
7 *
8 * Licensed under the GPL-2 or later.
9 *
10 */
11
12#include <linux/serial.h>
13#include <asm/dma.h>
14#include <asm/portmux.h>
15
16#define SIR_UART_GET_CHAR(port) bfin_read16((port)->membase + OFFSET_RBR)
17#define SIR_UART_GET_DLL(port) bfin_read16((port)->membase + OFFSET_DLL)
18#define SIR_UART_GET_IER(port) bfin_read16((port)->membase + OFFSET_IER)
19#define SIR_UART_GET_DLH(port) bfin_read16((port)->membase + OFFSET_DLH)
20#define SIR_UART_GET_IIR(port) bfin_read16((port)->membase + OFFSET_IIR)
21#define SIR_UART_GET_LCR(port) bfin_read16((port)->membase + OFFSET_LCR)
22#define SIR_UART_GET_GCTL(port) bfin_read16((port)->membase + OFFSET_GCTL)
23
24#define SIR_UART_PUT_CHAR(port, v) bfin_write16(((port)->membase + OFFSET_THR), v)
25#define SIR_UART_PUT_DLL(port, v) bfin_write16(((port)->membase + OFFSET_DLL), v)
26#define SIR_UART_PUT_IER(port, v) bfin_write16(((port)->membase + OFFSET_IER), v)
27#define SIR_UART_PUT_DLH(port, v) bfin_write16(((port)->membase + OFFSET_DLH), v)
28#define SIR_UART_PUT_LCR(port, v) bfin_write16(((port)->membase + OFFSET_LCR), v)
29#define SIR_UART_PUT_GCTL(port, v) bfin_write16(((port)->membase + OFFSET_GCTL), v)
30
31#ifdef CONFIG_SIR_BFIN_DMA
32struct dma_rx_buf {
33 char *buf;
34 int head;
35 int tail;
36 };
37#endif /* CONFIG_SIR_BFIN_DMA */
38
39struct bfin_sir_port {
40 unsigned char __iomem *membase;
41 unsigned int irq;
42 unsigned int lsr;
43 unsigned long clk;
44 struct net_device *dev;
45#ifdef CONFIG_SIR_BFIN_DMA
46 int tx_done;
47 struct dma_rx_buf rx_dma_buf;
48 struct timer_list rx_dma_timer;
49 int rx_dma_nrows;
50#endif /* CONFIG_SIR_BFIN_DMA */
51 unsigned int tx_dma_channel;
52 unsigned int rx_dma_channel;
53};
54
55struct bfin_sir_port sir_ports[BFIN_UART_NR_PORTS];
56
57struct bfin_sir_port_res {
58 unsigned long base_addr;
59 int irq;
60 unsigned int rx_dma_channel;
61 unsigned int tx_dma_channel;
62};
63
64struct bfin_sir_port_res bfin_sir_port_resource[] = {
65#ifdef CONFIG_BFIN_SIR0
66 {
67 0xFFC00400,
68 IRQ_UART_RX,
69 CH_UART_RX,
70 CH_UART_TX,
71 },
72#endif
73};
74
75int nr_sirs = ARRAY_SIZE(bfin_sir_port_resource);
76
77struct bfin_sir_self {
78 struct bfin_sir_port *sir_port;
79 spinlock_t lock;
80 unsigned int open;
81 int speed;
82 int newspeed;
83
84 struct sk_buff *txskb;
85 struct sk_buff *rxskb;
86 struct net_device_stats stats;
87 struct device *dev;
88 struct irlap_cb *irlap;
89 struct qos_info qos;
90
91 iobuff_t tx_buff;
92 iobuff_t rx_buff;
93
94 struct work_struct work;
95 int mtt;
96};
97
98static inline unsigned int SIR_UART_GET_LSR(struct bfin_sir_port *port)
99{
100 unsigned int lsr = bfin_read16(port->membase + OFFSET_LSR);
101 port->lsr |= (lsr & (BI|FE|PE|OE));
102 return lsr | port->lsr;
103}
104
105static inline void SIR_UART_CLEAR_LSR(struct bfin_sir_port *port)
106{
107 port->lsr = 0;
108 bfin_read16(port->membase + OFFSET_LSR);
109}
110
111#define DRIVER_NAME "bfin_sir"
112
113static void bfin_sir_hw_init(void)
114{
115#ifdef CONFIG_BFIN_SIR0
116 peripheral_request(P_UART0_TX, DRIVER_NAME);
117 peripheral_request(P_UART0_RX, DRIVER_NAME);
118#endif
119 SSYNC();
120}
diff --git a/include/asm-blackfin/mach-bf561/blackfin.h b/include/asm-blackfin/mach-bf561/blackfin.h
index 3a16df2c86d8..0ea8666e6764 100644
--- a/include/asm-blackfin/mach-bf561/blackfin.h
+++ b/include/asm-blackfin/mach-bf561/blackfin.h
@@ -69,5 +69,19 @@
69#define bfin_read_SIC_ISR(x) bfin_read32(SICA_ISR0 + (x << 2)) 69#define bfin_read_SIC_ISR(x) bfin_read32(SICA_ISR0 + (x << 2))
70#define bfin_write_SIC_ISR(x, val) bfin_write32((SICA_ISR0 + (x << 2)), val) 70#define bfin_write_SIC_ISR(x, val) bfin_write32((SICA_ISR0 + (x << 2)), val)
71 71
72#define BFIN_UART_NR_PORTS 1
73
74#define OFFSET_THR 0x00 /* Transmit Holding register */
75#define OFFSET_RBR 0x00 /* Receive Buffer register */
76#define OFFSET_DLL 0x00 /* Divisor Latch (Low-Byte) */
77#define OFFSET_IER 0x04 /* Interrupt Enable Register */
78#define OFFSET_DLH 0x04 /* Divisor Latch (High-Byte) */
79#define OFFSET_IIR 0x08 /* Interrupt Identification Register */
80#define OFFSET_LCR 0x0C /* Line Control Register */
81#define OFFSET_MCR 0x10 /* Modem Control Register */
82#define OFFSET_LSR 0x14 /* Line Status Register */
83#define OFFSET_MSR 0x18 /* Modem Status Register */
84#define OFFSET_SCR 0x1C /* SCR Scratch Register */
85#define OFFSET_GCTL 0x24 /* Global Control Register */
72 86
73#endif /* _MACH_BLACKFIN_H_ */ 87#endif /* _MACH_BLACKFIN_H_ */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-23 06:14:22 -0500