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authorBrian Norris <norris@broadcom.com>2010-07-21 19:53:47 -0400
committerDavid Woodhouse <David.Woodhouse@intel.com>2010-08-02 04:09:50 -0400
commit02ed70bb7b2644936959aee617296022dedb109e (patch)
tree8ca2ac211e45a56dc682be08af7640a73d81cf9e
parent6ea9ad24186d1242320bf02082e02c8c5a8073be (diff)
mtd: nand: update nand_default_block_markbad()
This is an update that depends on the previous patches I sent. We can now write to all the appropriate BB marker locations (i.e. pages 1 AND 2, bytes 1 AND 6) with nand_default_block_markbad() if necessary, according to the flags marked in chip->options. Note that I removed the line: ofs += mtd->oobsize; Unless I am wrong, this line was completely unnecessary in the first place. Signed-off-by: Brian Norris <norris@broadcom.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
-rw-r--r--drivers/mtd/nand/nand_base.c34
1 files changed, 24 insertions, 10 deletions
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index c2901bd126f9..ee6a6f866b50 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -397,7 +397,7 @@ static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
397{ 397{
398 struct nand_chip *chip = mtd->priv; 398 struct nand_chip *chip = mtd->priv;
399 uint8_t buf[2] = { 0, 0 }; 399 uint8_t buf[2] = { 0, 0 };
400 int block, ret; 400 int block, ret, i = 0;
401 401
402 if (chip->options & NAND_BBT_SCANLASTPAGE) 402 if (chip->options & NAND_BBT_SCANLASTPAGE)
403 ofs += mtd->erasesize - mtd->writesize; 403 ofs += mtd->erasesize - mtd->writesize;
@@ -411,17 +411,31 @@ static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
411 if (chip->options & NAND_USE_FLASH_BBT) 411 if (chip->options & NAND_USE_FLASH_BBT)
412 ret = nand_update_bbt(mtd, ofs); 412 ret = nand_update_bbt(mtd, ofs);
413 else { 413 else {
414 /* We write two bytes, so we dont have to mess with 16 bit
415 * access
416 */
417 nand_get_device(chip, mtd, FL_WRITING); 414 nand_get_device(chip, mtd, FL_WRITING);
418 ofs += mtd->oobsize;
419 chip->ops.len = chip->ops.ooblen = 2;
420 chip->ops.datbuf = NULL;
421 chip->ops.oobbuf = buf;
422 chip->ops.ooboffs = chip->badblockpos & ~0x01;
423 415
424 ret = nand_do_write_oob(mtd, ofs, &chip->ops); 416 /* Write to first two pages and to byte 1 and 6 if necessary.
417 * If we write to more than one location, the first error
418 * encountered quits the procedure. We write two bytes per
419 * location, so we dont have to mess with 16 bit access.
420 */
421 do {
422 chip->ops.len = chip->ops.ooblen = 2;
423 chip->ops.datbuf = NULL;
424 chip->ops.oobbuf = buf;
425 chip->ops.ooboffs = chip->badblockpos & ~0x01;
426
427 ret = nand_do_write_oob(mtd, ofs, &chip->ops);
428
429 if (!ret && (chip->options & NAND_BBT_SCANBYTE1AND6)) {
430 chip->ops.ooboffs = NAND_SMALL_BADBLOCK_POS
431 & ~0x01;
432 ret = nand_do_write_oob(mtd, ofs, &chip->ops);
433 }
434 i++;
435 ofs += mtd->writesize;
436 } while (!ret && (chip->options & NAND_BBT_SCAN2NDPAGE) &&
437 i < 2);
438
425 nand_release_device(mtd); 439 nand_release_device(mtd);
426 } 440 }
427 if (!ret) 441 if (!ret)