diff options
author | Thomas Gleixner <tglx@linutronix.de> | 2008-08-14 06:17:06 -0400 |
---|---|---|
committer | Thomas Gleixner <tglx@linutronix.de> | 2008-08-14 07:23:45 -0400 |
commit | a6825f1c1fa83b1e92b6715ee5771a4d6524d3b9 (patch) | |
tree | 597cc3ed1c221c4ea76bdb51c327604b8115b85f | |
parent | a58f03b07539f6575adaa011712fa139c9343742 (diff) |
x86: hpet: workaround SB700 BIOS
AMD SB700 based systems with spread spectrum enabled use a SMM based
HPET emulation to provide proper frequency setting. The SMM code is
initialized with the first HPET register access and takes some time to
complete. During this time the config register reads 0xffffffff. We
check for max. 1000 loops whether the config register reads a non
0xffffffff value to make sure that HPET is up and running before we go
further. A counting loop is safe, as the HPET access takes thousands
of CPU cycles. On non SB700 based machines this check is only done
once and has no side effects.
Based on a quirk patch from: crane cai <crane.cai@amd.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
-rw-r--r-- | arch/x86/kernel/hpet.c | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c index ad2b15a1334d..59fd3b6b1303 100644 --- a/arch/x86/kernel/hpet.c +++ b/arch/x86/kernel/hpet.c | |||
@@ -359,6 +359,7 @@ static int hpet_clocksource_register(void) | |||
359 | int __init hpet_enable(void) | 359 | int __init hpet_enable(void) |
360 | { | 360 | { |
361 | unsigned long id; | 361 | unsigned long id; |
362 | int i; | ||
362 | 363 | ||
363 | if (!is_hpet_capable()) | 364 | if (!is_hpet_capable()) |
364 | return 0; | 365 | return 0; |
@@ -369,6 +370,29 @@ int __init hpet_enable(void) | |||
369 | * Read the period and check for a sane value: | 370 | * Read the period and check for a sane value: |
370 | */ | 371 | */ |
371 | hpet_period = hpet_readl(HPET_PERIOD); | 372 | hpet_period = hpet_readl(HPET_PERIOD); |
373 | |||
374 | /* | ||
375 | * AMD SB700 based systems with spread spectrum enabled use a | ||
376 | * SMM based HPET emulation to provide proper frequency | ||
377 | * setting. The SMM code is initialized with the first HPET | ||
378 | * register access and takes some time to complete. During | ||
379 | * this time the config register reads 0xffffffff. We check | ||
380 | * for max. 1000 loops whether the config register reads a non | ||
381 | * 0xffffffff value to make sure that HPET is up and running | ||
382 | * before we go further. A counting loop is safe, as the HPET | ||
383 | * access takes thousands of CPU cycles. On non SB700 based | ||
384 | * machines this check is only done once and has no side | ||
385 | * effects. | ||
386 | */ | ||
387 | for (i = 0; hpet_readl(HPET_CFG) == 0xFFFFFFFF; i++) { | ||
388 | if (i == 1000) { | ||
389 | printk(KERN_WARNING | ||
390 | "HPET config register value = 0xFFFFFFFF. " | ||
391 | "Disabling HPET\n"); | ||
392 | goto out_nohpet; | ||
393 | } | ||
394 | } | ||
395 | |||
372 | if (hpet_period < HPET_MIN_PERIOD || hpet_period > HPET_MAX_PERIOD) | 396 | if (hpet_period < HPET_MIN_PERIOD || hpet_period > HPET_MAX_PERIOD) |
373 | goto out_nohpet; | 397 | goto out_nohpet; |
374 | 398 | ||