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authorLi Yang <leoli@freescale.com>2008-09-02 07:58:10 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2008-10-17 17:40:54 -0400
commit3948f0e0c999a6201e9898bb8fbe3c6cc1199276 (patch)
treec05ea6720321899326095cf1a74e2a4749b1c91e
parentbedf0883cbe3015d21aec5ed47ddffb429f6cca7 (diff)
usb: add Freescale QE/CPM USB peripheral controller driver
Some of Freescale SoC chips have a QE or CPM co-processor which supports full speed USB. The driver adds device mode support of both QE and CPM USB controller to Linux USB gadget. The driver is tested with MPC8360 and MPC8272, and should work with other models having QE/CPM given minor tweaks. Signed-off-by: Xie Xiaobo <X.Xie@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Cc: David Brownell <david-b@pacbell.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat
-rw-r--r--drivers/usb/gadget/Kconfig19
-rw-r--r--drivers/usb/gadget/Makefile1
-rw-r--r--drivers/usb/gadget/fsl_qe_udc.c2723
-rw-r--r--drivers/usb/gadget/fsl_qe_udc.h436
-rw-r--r--drivers/usb/gadget/gadget_chips.h9
5 files changed, 3188 insertions, 0 deletions
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 80a7c02dc951..c0dfd9be3115 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -341,6 +341,25 @@ config USB_AMD5536UDC
341 default USB_GADGET 341 default USB_GADGET
342 select USB_GADGET_SELECTED 342 select USB_GADGET_SELECTED
343 343
344config USB_GADGET_FSL_QE
345 boolean "Freescale QE/CPM USB Device Controller"
346 depends on FSL_SOC && (QUICC_ENGINE || CPM)
347 help
348 Some of Freescale PowerPC processors have a Full Speed
349 QE/CPM2 USB controller, which support device mode with 4
350 programmable endpoints. This driver supports the
351 controller in the MPC8360 and MPC8272, and should work with
352 controllers having QE or CPM2, given minor tweaks.
353
354 Set CONFIG_USB_GADGET to "m" to build this driver as a
355 dynmically linked module called "fsl_qe_udc".
356
357config USB_FSL_QE
358 tristate
359 depends on USB_GADGET_FSL_QE
360 default USB_GADGET
361 select USB_GADGET_SELECTED
362
344config USB_GADGET_NET2280 363config USB_GADGET_NET2280
345 boolean "NetChip 228x" 364 boolean "NetChip 228x"
346 depends on PCI 365 depends on PCI
diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
index 2267fa0b51b2..bd4041b47dce 100644
--- a/drivers/usb/gadget/Makefile
+++ b/drivers/usb/gadget/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_USB_AT91) += at91_udc.o
18obj-$(CONFIG_USB_ATMEL_USBA) += atmel_usba_udc.o 18obj-$(CONFIG_USB_ATMEL_USBA) += atmel_usba_udc.o
19obj-$(CONFIG_USB_FSL_USB2) += fsl_usb2_udc.o 19obj-$(CONFIG_USB_FSL_USB2) += fsl_usb2_udc.o
20obj-$(CONFIG_USB_M66592) += m66592-udc.o 20obj-$(CONFIG_USB_M66592) += m66592-udc.o
21obj-$(CONFIG_USB_FSL_QE) += fsl_qe_udc.o
21 22
22# 23#
23# USB gadget drivers 24# USB gadget drivers
diff --git a/drivers/usb/gadget/fsl_qe_udc.c b/drivers/usb/gadget/fsl_qe_udc.c
new file mode 100644
index 000000000000..e9400e62f171
--- /dev/null
+++ b/drivers/usb/gadget/fsl_qe_udc.c
@@ -0,0 +1,2723 @@
1/*
2 * driver/usb/gadget/fsl_qe_udc.c
3 *
4 * Copyright (c) 2006-2008 Freescale Semiconductor, Inc. All rights reserved.
5 *
6 * Xie Xiaobo <X.Xie@freescale.com>
7 * Li Yang <leoli@freescale.com>
8 * Based on bareboard code from Shlomi Gridish.
9 *
10 * Description:
11 * Freescle QE/CPM USB Pheripheral Controller Driver
12 * The controller can be found on MPC8360, MPC8272, and etc.
13 * MPC8360 Rev 1.1 may need QE mircocode update
14 *
15 * This program is free software; you can redistribute it and/or modify it
16 * under the terms of the GNU General Public License as published by the
17 * Free Software Foundation; either version 2 of the License, or (at your
18 * option) any later version.
19 */
20
21#undef USB_TRACE
22
23#include <linux/module.h>
24#include <linux/kernel.h>
25#include <linux/init.h>
26#include <linux/ioport.h>
27#include <linux/types.h>
28#include <linux/errno.h>
29#include <linux/slab.h>
30#include <linux/list.h>
31#include <linux/interrupt.h>
32#include <linux/io.h>
33#include <linux/moduleparam.h>
34#include <linux/of_platform.h>
35#include <linux/dma-mapping.h>
36#include <linux/usb/ch9.h>
37#include <linux/usb/gadget.h>
38#include <linux/usb/otg.h>
39#include <asm/qe.h>
40#include <asm/cpm.h>
41#include <asm/dma.h>
42#include <asm/reg.h>
43#include "fsl_qe_udc.h"
44
45#define DRIVER_DESC "Freescale QE/CPM USB Device Controller driver"
46#define DRIVER_AUTHOR "Xie XiaoBo"
47#define DRIVER_VERSION "1.0"
48
49#define DMA_ADDR_INVALID (~(dma_addr_t)0)
50
51static const char driver_name[] = "fsl_qe_udc";
52static const char driver_desc[] = DRIVER_DESC;
53
54/*ep name is important in gadget, it should obey the convention of ep_match()*/
55static const char *const ep_name[] = {
56 "ep0-control", /* everyone has ep0 */
57 /* 3 configurable endpoints */
58 "ep1",
59 "ep2",
60 "ep3",
61};
62
63static struct usb_endpoint_descriptor qe_ep0_desc = {
64 .bLength = USB_DT_ENDPOINT_SIZE,
65 .bDescriptorType = USB_DT_ENDPOINT,
66
67 .bEndpointAddress = 0,
68 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
69 .wMaxPacketSize = USB_MAX_CTRL_PAYLOAD,
70};
71
72/* it is initialized in probe() */
73static struct qe_udc *udc_controller;
74
75/********************************************************************
76 * Internal Used Function Start
77********************************************************************/
78/*-----------------------------------------------------------------
79 * done() - retire a request; caller blocked irqs
80 *--------------------------------------------------------------*/
81static void done(struct qe_ep *ep, struct qe_req *req, int status)
82{
83 struct qe_udc *udc = ep->udc;
84 unsigned char stopped = ep->stopped;
85
86 /* the req->queue pointer is used by ep_queue() func, in which
87 * the request will be added into a udc_ep->queue 'd tail
88 * so here the req will be dropped from the ep->queue
89 */
90 list_del_init(&req->queue);
91
92 /* req.status should be set as -EINPROGRESS in ep_queue() */
93 if (req->req.status == -EINPROGRESS)
94 req->req.status = status;
95 else
96 status = req->req.status;
97
98 if (req->mapped) {
99 dma_unmap_single(udc->gadget.dev.parent,
100 req->req.dma, req->req.length,
101 ep_is_in(ep)
102 ? DMA_TO_DEVICE
103 : DMA_FROM_DEVICE);
104 req->req.dma = DMA_ADDR_INVALID;
105 req->mapped = 0;
106 } else
107 dma_sync_single_for_cpu(udc->gadget.dev.parent,
108 req->req.dma, req->req.length,
109 ep_is_in(ep)
110 ? DMA_TO_DEVICE
111 : DMA_FROM_DEVICE);
112
113 if (status && (status != -ESHUTDOWN))
114 dev_vdbg(udc->dev, "complete %s req %p stat %d len %u/%u\n",
115 ep->ep.name, &req->req, status,
116 req->req.actual, req->req.length);
117
118 /* don't modify queue heads during completion callback */
119 ep->stopped = 1;
120 spin_unlock(&udc->lock);
121
122 /* this complete() should a func implemented by gadget layer,
123 * eg fsg->bulk_in_complete() */
124 if (req->req.complete)
125 req->req.complete(&ep->ep, &req->req);
126
127 spin_lock(&udc->lock);
128
129 ep->stopped = stopped;
130}
131
132/*-----------------------------------------------------------------
133 * nuke(): delete all requests related to this ep
134 *--------------------------------------------------------------*/
135static void nuke(struct qe_ep *ep, int status)
136{
137 /* Whether this eq has request linked */
138 while (!list_empty(&ep->queue)) {
139 struct qe_req *req = NULL;
140 req = list_entry(ep->queue.next, struct qe_req, queue);
141
142 done(ep, req, status);
143 }
144}
145
146/*---------------------------------------------------------------------------*
147 * USB and Endpoint manipulate process, include parameter and register *
148 *---------------------------------------------------------------------------*/
149/* @value: 1--set stall 0--clean stall */
150static int qe_eprx_stall_change(struct qe_ep *ep, int value)
151{
152 u16 tem_usep;
153 u8 epnum = ep->epnum;
154 struct qe_udc *udc = ep->udc;
155
156 tem_usep = in_be16(&udc->usb_regs->usb_usep[epnum]);
157 tem_usep = tem_usep & ~USB_RHS_MASK;
158 if (value == 1)
159 tem_usep |= USB_RHS_STALL;
160 else if (ep->dir == USB_DIR_IN)
161 tem_usep |= USB_RHS_IGNORE_OUT;
162
163 out_be16(&udc->usb_regs->usb_usep[epnum], tem_usep);
164 return 0;
165}
166
167static int qe_eptx_stall_change(struct qe_ep *ep, int value)
168{
169 u16 tem_usep;
170 u8 epnum = ep->epnum;
171 struct qe_udc *udc = ep->udc;
172
173 tem_usep = in_be16(&udc->usb_regs->usb_usep[epnum]);
174 tem_usep = tem_usep & ~USB_THS_MASK;
175 if (value == 1)
176 tem_usep |= USB_THS_STALL;
177 else if (ep->dir == USB_DIR_OUT)
178 tem_usep |= USB_THS_IGNORE_IN;
179
180 out_be16(&udc->usb_regs->usb_usep[epnum], tem_usep);
181
182 return 0;
183}
184
185static int qe_ep0_stall(struct qe_udc *udc)
186{
187 qe_eptx_stall_change(&udc->eps[0], 1);
188 qe_eprx_stall_change(&udc->eps[0], 1);
189 udc_controller->ep0_state = WAIT_FOR_SETUP;
190 udc_controller->ep0_dir = 0;
191 return 0;
192}
193
194static int qe_eprx_nack(struct qe_ep *ep)
195{
196 u8 epnum = ep->epnum;
197 struct qe_udc *udc = ep->udc;
198
199 if (ep->state == EP_STATE_IDLE) {
200 /* Set the ep's nack */
201 clrsetbits_be16(&udc->usb_regs->usb_usep[epnum],
202 USB_RHS_MASK, USB_RHS_NACK);
203
204 /* Mask Rx and Busy interrupts */
205 clrbits16(&udc->usb_regs->usb_usbmr,
206 (USB_E_RXB_MASK | USB_E_BSY_MASK));
207
208 ep->state = EP_STATE_NACK;
209 }
210 return 0;
211}
212
213static int qe_eprx_normal(struct qe_ep *ep)
214{
215 struct qe_udc *udc = ep->udc;
216
217 if (ep->state == EP_STATE_NACK) {
218 clrsetbits_be16(&udc->usb_regs->usb_usep[ep->epnum],
219 USB_RTHS_MASK, USB_THS_IGNORE_IN);
220
221 /* Unmask RX interrupts */
222 out_be16(&udc->usb_regs->usb_usber,
223 USB_E_BSY_MASK | USB_E_RXB_MASK);
224 setbits16(&udc->usb_regs->usb_usbmr,
225 (USB_E_RXB_MASK | USB_E_BSY_MASK));
226
227 ep->state = EP_STATE_IDLE;
228 ep->has_data = 0;
229 }
230
231 return 0;
232}
233
234static int qe_ep_cmd_stoptx(struct qe_ep *ep)
235{
236 if (ep->udc->soc_type == PORT_CPM)
237 cpm_command(CPM_USB_STOP_TX | (ep->epnum << CPM_USB_EP_SHIFT),
238 CPM_USB_STOP_TX_OPCODE);
239 else
240 qe_issue_cmd(QE_USB_STOP_TX, QE_CR_SUBBLOCK_USB,
241 ep->epnum, 0);
242
243 return 0;
244}
245
246static int qe_ep_cmd_restarttx(struct qe_ep *ep)
247{
248 if (ep->udc->soc_type == PORT_CPM)
249 cpm_command(CPM_USB_RESTART_TX | (ep->epnum <<
250 CPM_USB_EP_SHIFT), CPM_USB_RESTART_TX_OPCODE);
251 else
252 qe_issue_cmd(QE_USB_RESTART_TX, QE_CR_SUBBLOCK_USB,
253 ep->epnum, 0);
254
255 return 0;
256}
257
258static int qe_ep_flushtxfifo(struct qe_ep *ep)
259{
260 struct qe_udc *udc = ep->udc;
261 int i;
262
263 i = (int)ep->epnum;
264
265 qe_ep_cmd_stoptx(ep);
266 out_8(&udc->usb_regs->usb_uscom,
267 USB_CMD_FLUSH_FIFO | (USB_CMD_EP_MASK & (ep->epnum)));
268 out_be16(&udc->ep_param[i]->tbptr, in_be16(&udc->ep_param[i]->tbase));
269 out_be32(&udc->ep_param[i]->tstate, 0);
270 out_be16(&udc->ep_param[i]->tbcnt, 0);
271
272 ep->c_txbd = ep->txbase;
273 ep->n_txbd = ep->txbase;
274 qe_ep_cmd_restarttx(ep);
275 return 0;
276}
277
278static int qe_ep_filltxfifo(struct qe_ep *ep)
279{
280 struct qe_udc *udc = ep->udc;
281
282 out_8(&udc->usb_regs->usb_uscom,
283 USB_CMD_STR_FIFO | (USB_CMD_EP_MASK & (ep->epnum)));
284 return 0;
285}
286
287static int qe_epbds_reset(struct qe_udc *udc, int pipe_num)
288{
289 struct qe_ep *ep;
290 u32 bdring_len;
291 struct qe_bd __iomem *bd;
292 int i;
293
294 ep = &udc->eps[pipe_num];
295
296 if (ep->dir == USB_DIR_OUT)
297 bdring_len = USB_BDRING_LEN_RX;
298 else
299 bdring_len = USB_BDRING_LEN;
300
301 bd = ep->rxbase;
302 for (i = 0; i < (bdring_len - 1); i++) {
303 out_be32((u32 __iomem *)bd, R_E | R_I);
304 bd++;
305 }
306 out_be32((u32 __iomem *)bd, R_E | R_I | R_W);
307
308 bd = ep->txbase;
309 for (i = 0; i < USB_BDRING_LEN_TX - 1; i++) {
310 out_be32(&bd->buf, 0);
311 out_be32((u32 __iomem *)bd, 0);
312 bd++;
313 }
314 out_be32((u32 __iomem *)bd, T_W);
315
316 return 0;
317}
318
319static int qe_ep_reset(struct qe_udc *udc, int pipe_num)
320{
321 struct qe_ep *ep;
322 u16 tmpusep;
323
324 ep = &udc->eps[pipe_num];
325 tmpusep = in_be16(&udc->usb_regs->usb_usep[pipe_num]);
326 tmpusep &= ~USB_RTHS_MASK;
327
328 switch (ep->dir) {
329 case USB_DIR_BOTH:
330 qe_ep_flushtxfifo(ep);
331 break;
332 case USB_DIR_OUT:
333 tmpusep |= USB_THS_IGNORE_IN;
334 break;
335 case USB_DIR_IN:
336 qe_ep_flushtxfifo(ep);
337 tmpusep |= USB_RHS_IGNORE_OUT;
338 break;
339 default:
340 break;
341 }
342 out_be16(&udc->usb_regs->usb_usep[pipe_num], tmpusep);
343
344 qe_epbds_reset(udc, pipe_num);
345
346 return 0;
347}
348
349static int qe_ep_toggledata01(struct qe_ep *ep)
350{
351 ep->data01 ^= 0x1;
352 return 0;
353}
354
355static int qe_ep_bd_init(struct qe_udc *udc, unsigned char pipe_num)
356{
357 struct qe_ep *ep = &udc->eps[pipe_num];
358 unsigned long tmp_addr = 0;
359 struct usb_ep_para __iomem *epparam;
360 int i;
361 struct qe_bd __iomem *bd;
362 int bdring_len;
363
364 if (ep->dir == USB_DIR_OUT)
365 bdring_len = USB_BDRING_LEN_RX;
366 else
367 bdring_len = USB_BDRING_LEN;
368
369 epparam = udc->ep_param[pipe_num];
370 /* alloc multi-ram for BD rings and set the ep parameters */
371 tmp_addr = cpm_muram_alloc(sizeof(struct qe_bd) * (bdring_len +
372 USB_BDRING_LEN_TX), QE_ALIGNMENT_OF_BD);
373 out_be16(&epparam->rbase, (u16)tmp_addr);
374 out_be16(&epparam->tbase, (u16)(tmp_addr +
375 (sizeof(struct qe_bd) * bdring_len)));
376
377 out_be16(&epparam->rbptr, in_be16(&epparam->rbase));
378 out_be16(&epparam->tbptr, in_be16(&epparam->tbase));
379
380 ep->rxbase = cpm_muram_addr(tmp_addr);
381 ep->txbase = cpm_muram_addr(tmp_addr + (sizeof(struct qe_bd)
382 * bdring_len));
383 ep->n_rxbd = ep->rxbase;
384 ep->e_rxbd = ep->rxbase;
385 ep->n_txbd = ep->txbase;
386 ep->c_txbd = ep->txbase;
387 ep->data01 = 0; /* data0 */
388
389 /* Init TX and RX bds */
390 bd = ep->rxbase;
391 for (i = 0; i < bdring_len - 1; i++) {
392 out_be32(&bd->buf, 0);
393 out_be32((u32 __iomem *)bd, 0);
394 bd++;
395 }
396 out_be32(&bd->buf, 0);
397 out_be32((u32 __iomem *)bd, R_W);
398
399 bd = ep->txbase;
400 for (i = 0; i < USB_BDRING_LEN_TX - 1; i++) {
401 out_be32(&bd->buf, 0);
402 out_be32((u32 __iomem *)bd, 0);
403 bd++;
404 }
405 out_be32(&bd->buf, 0);
406 out_be32((u32 __iomem *)bd, T_W);
407
408 return 0;
409}
410
411static int qe_ep_rxbd_update(struct qe_ep *ep)
412{
413 unsigned int size;
414 int i;
415 unsigned int tmp;
416 struct qe_bd __iomem *bd;
417 unsigned int bdring_len;
418
419 if (ep->rxbase == NULL)
420 return -EINVAL;
421
422 bd = ep->rxbase;
423
424 ep->rxframe = kmalloc(sizeof(*ep->rxframe), GFP_ATOMIC);
425 if (ep->rxframe == NULL) {
426 dev_err(ep->udc->dev, "malloc rxframe failed\n");
427 return -ENOMEM;
428 }
429
430 qe_frame_init(ep->rxframe);
431
432 if (ep->dir == USB_DIR_OUT)
433 bdring_len = USB_BDRING_LEN_RX;
434 else
435 bdring_len = USB_BDRING_LEN;
436
437 size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) * (bdring_len + 1);
438 ep->rxbuffer = kzalloc(size, GFP_ATOMIC);
439 if (ep->rxbuffer == NULL) {
440 dev_err(ep->udc->dev, "malloc rxbuffer failed,size=%d\n",
441 size);
442 kfree(ep->rxframe);
443 return -ENOMEM;
444 }
445
446 ep->rxbuf_d = virt_to_phys((void *)ep->rxbuffer);
447 if (ep->rxbuf_d == DMA_ADDR_INVALID) {
448 ep->rxbuf_d = dma_map_single(udc_controller->gadget.dev.parent,
449 ep->rxbuffer,
450 size,
451 DMA_FROM_DEVICE);
452 ep->rxbufmap = 1;
453 } else {
454 dma_sync_single_for_device(udc_controller->gadget.dev.parent,
455 ep->rxbuf_d, size,
456 DMA_FROM_DEVICE);
457 ep->rxbufmap = 0;
458 }
459
460 size = ep->ep.maxpacket + USB_CRC_SIZE + 2;
461 tmp = ep->rxbuf_d;
462 tmp = (u32)(((tmp >> 2) << 2) + 4);
463
464 for (i = 0; i < bdring_len - 1; i++) {
465 out_be32(&bd->buf, tmp);
466 out_be32((u32 __iomem *)bd, (R_E | R_I));
467 tmp = tmp + size;
468 bd++;
469 }
470 out_be32(&bd->buf, tmp);
471 out_be32((u32 __iomem *)bd, (R_E | R_I | R_W));
472
473 return 0;
474}
475
476static int qe_ep_register_init(struct qe_udc *udc, unsigned char pipe_num)
477{
478 struct qe_ep *ep = &udc->eps[pipe_num];
479 struct usb_ep_para __iomem *epparam;
480 u16 usep, logepnum;
481 u16 tmp;
482 u8 rtfcr = 0;
483
484 epparam = udc->ep_param[pipe_num];
485
486 usep = 0;
487 logepnum = (ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK);
488 usep |= (logepnum << USB_EPNUM_SHIFT);
489
490 switch (ep->desc->bmAttributes & 0x03) {
491 case USB_ENDPOINT_XFER_BULK:
492 usep |= USB_TRANS_BULK;
493 break;
494 case USB_ENDPOINT_XFER_ISOC:
495 usep |= USB_TRANS_ISO;
496 break;
497 case USB_ENDPOINT_XFER_INT:
498 usep |= USB_TRANS_INT;
499 break;
500 default:
501 usep |= USB_TRANS_CTR;
502 break;
503 }
504
505 switch (ep->dir) {
506 case USB_DIR_OUT:
507 usep |= USB_THS_IGNORE_IN;
508 break;
509 case USB_DIR_IN:
510 usep |= USB_RHS_IGNORE_OUT;
511 break;
512 default:
513 break;
514 }
515 out_be16(&udc->usb_regs->usb_usep[pipe_num], usep);
516
517 rtfcr = 0x30;
518 out_8(&epparam->rbmr, rtfcr);
519 out_8(&epparam->tbmr, rtfcr);
520
521 tmp = (u16)(ep->ep.maxpacket + USB_CRC_SIZE);
522 /* MRBLR must be divisble by 4 */
523 tmp = (u16)(((tmp >> 2) << 2) + 4);
524 out_be16(&epparam->mrblr, tmp);
525
526 return 0;
527}
528
529static int qe_ep_init(struct qe_udc *udc,
530 unsigned char pipe_num,
531 const struct usb_endpoint_descriptor *desc)
532{
533 struct qe_ep *ep = &udc->eps[pipe_num];
534 unsigned long flags;
535 int reval = 0;
536 u16 max = 0;
537
538 max = le16_to_cpu(desc->wMaxPacketSize);
539
540 /* check the max package size validate for this endpoint */
541 /* Refer to USB2.0 spec table 9-13,
542 */
543 if (pipe_num != 0) {
544 switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
545 case USB_ENDPOINT_XFER_BULK:
546 if (strstr(ep->ep.name, "-iso")
547 || strstr(ep->ep.name, "-int"))
548 goto en_done;
549 switch (udc->gadget.speed) {
550 case USB_SPEED_HIGH:
551 if ((max == 128) || (max == 256) || (max == 512))
552 break;
553 default:
554 switch (max) {
555 case 4:
556 case 8:
557 case 16:
558 case 32:
559 case 64:
560 break;
561 default:
562 case USB_SPEED_LOW:
563 goto en_done;
564 }
565 }
566 break;
567 case USB_ENDPOINT_XFER_INT:
568 if (strstr(ep->ep.name, "-iso")) /* bulk is ok */
569 goto en_done;
570 switch (udc->gadget.speed) {
571 case USB_SPEED_HIGH:
572 if (max <= 1024)
573 break;
574 case USB_SPEED_FULL:
575 if (max <= 64)
576 break;
577 default:
578 if (max <= 8)
579 break;
580 goto en_done;
581 }
582 break;
583 case USB_ENDPOINT_XFER_ISOC:
584 if (strstr(ep->ep.name, "-bulk")
585 || strstr(ep->ep.name, "-int"))
586 goto en_done;
587 switch (udc->gadget.speed) {
588 case USB_SPEED_HIGH:
589 if (max <= 1024)
590 break;
591 case USB_SPEED_FULL:
592 if (max <= 1023)
593 break;
594 default:
595 goto en_done;
596 }
597 break;
598 case USB_ENDPOINT_XFER_CONTROL:
599 if (strstr(ep->ep.name, "-iso")
600 || strstr(ep->ep.name, "-int"))
601 goto en_done;
602 switch (udc->gadget.speed) {
603 case USB_SPEED_HIGH:
604 case USB_SPEED_FULL:
605 switch (max) {
606 case 1:
607 case 2:
608 case 4:
609 case 8:
610 case 16:
611 case 32:
612 case 64:
613 break;
614 default:
615 goto en_done;
616 }
617 case USB_SPEED_LOW:
618 switch (max) {
619 case 1:
620 case 2:
621 case 4:
622 case 8:
623 break;
624 default:
625 goto en_done;
626 }
627 default:
628 goto en_done;
629 }
630 break;
631
632 default:
633 goto en_done;
634 }
635 } /* if ep0*/
636
637 spin_lock_irqsave(&udc->lock, flags);
638
639 /* initialize ep structure */
640 ep->ep.maxpacket = max;
641 ep->tm = (u8)(desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK);
642 ep->desc = desc;
643 ep->stopped = 0;
644 ep->init = 1;
645
646 if (pipe_num == 0) {
647 ep->dir = USB_DIR_BOTH;
648 udc->ep0_dir = USB_DIR_OUT;
649 udc->ep0_state = WAIT_FOR_SETUP;
650 } else {
651 switch (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) {
652 case USB_DIR_OUT:
653 ep->dir = USB_DIR_OUT;
654 break;
655 case USB_DIR_IN:
656 ep->dir = USB_DIR_IN;
657 default:
658 break;
659 }
660 }
661
662 /* hardware special operation */
663 qe_ep_bd_init(udc, pipe_num);
664 if ((ep->tm == USBP_TM_CTL) || (ep->dir == USB_DIR_OUT)) {
665 reval = qe_ep_rxbd_update(ep);
666 if (reval)
667 goto en_done1;
668 }
669
670 if ((ep->tm == USBP_TM_CTL) || (ep->dir == USB_DIR_IN)) {
671 ep->txframe = kmalloc(sizeof(*ep->txframe), GFP_ATOMIC);
672 if (ep->txframe == NULL) {
673 dev_err(udc->dev, "malloc txframe failed\n");
674 goto en_done2;
675 }
676 qe_frame_init(ep->txframe);
677 }
678
679 qe_ep_register_init(udc, pipe_num);
680
681 /* Now HW will be NAKing transfers to that EP,
682 * until a buffer is queued to it. */
683 spin_unlock_irqrestore(&udc->lock, flags);
684
685 return 0;
686en_done2:
687 kfree(ep->rxbuffer);
688 kfree(ep->rxframe);
689en_done1:
690 spin_unlock_irqrestore(&udc->lock, flags);
691en_done:
692 dev_dbg(udc->dev, "failed to initialize %s\n", ep->ep.name);
693 return -ENODEV;
694}
695
696static inline void qe_usb_enable(void)
697{
698 setbits8(&udc_controller->usb_regs->usb_usmod, USB_MODE_EN);
699}
700
701static inline void qe_usb_disable(void)
702{
703 clrbits8(&udc_controller->usb_regs->usb_usmod, USB_MODE_EN);
704}
705
706/*----------------------------------------------------------------------------*
707 * USB and EP basic manipulate function end *
708 *----------------------------------------------------------------------------*/
709
710
711/******************************************************************************
712 UDC transmit and receive process
713 ******************************************************************************/
714static void recycle_one_rxbd(struct qe_ep *ep)
715{
716 u32 bdstatus;
717
718 bdstatus = in_be32((u32 __iomem *)ep->e_rxbd);
719 bdstatus = R_I | R_E | (bdstatus & R_W);
720 out_be32((u32 __iomem *)ep->e_rxbd, bdstatus);
721
722 if (bdstatus & R_W)
723 ep->e_rxbd = ep->rxbase;
724 else
725 ep->e_rxbd++;
726}
727
728static void recycle_rxbds(struct qe_ep *ep, unsigned char stopatnext)
729{
730 u32 bdstatus;
731 struct qe_bd __iomem *bd, *nextbd;
732 unsigned char stop = 0;
733
734 nextbd = ep->n_rxbd;
735 bd = ep->e_rxbd;
736 bdstatus = in_be32((u32 __iomem *)bd);
737
738 while (!(bdstatus & R_E) && !(bdstatus & BD_LENGTH_MASK) && !stop) {
739 bdstatus = R_E | R_I | (bdstatus & R_W);
740 out_be32((u32 __iomem *)bd, bdstatus);
741
742 if (bdstatus & R_W)
743 bd = ep->rxbase;
744 else
745 bd++;
746
747 bdstatus = in_be32((u32 __iomem *)bd);
748 if (stopatnext && (bd == nextbd))
749 stop = 1;
750 }
751
752 ep->e_rxbd = bd;
753}
754
755static void ep_recycle_rxbds(struct qe_ep *ep)
756{
757 struct qe_bd __iomem *bd = ep->n_rxbd;
758 u32 bdstatus;
759 u8 epnum = ep->epnum;
760 struct qe_udc *udc = ep->udc;
761
762 bdstatus = in_be32((u32 __iomem *)bd);
763 if (!(bdstatus & R_E) && !(bdstatus & BD_LENGTH_MASK)) {
764 bd = ep->rxbase +
765 ((in_be16(&udc->ep_param[epnum]->rbptr) -
766 in_be16(&udc->ep_param[epnum]->rbase))
767 >> 3);
768 bdstatus = in_be32((u32 __iomem *)bd);
769
770 if (bdstatus & R_W)
771 bd = ep->rxbase;
772 else
773 bd++;
774
775 ep->e_rxbd = bd;
776 recycle_rxbds(ep, 0);
777 ep->e_rxbd = ep->n_rxbd;
778 } else
779 recycle_rxbds(ep, 1);
780
781 if (in_be16(&udc->usb_regs->usb_usber) & USB_E_BSY_MASK)
782 out_be16(&udc->usb_regs->usb_usber, USB_E_BSY_MASK);
783
784 if (ep->has_data <= 0 && (!list_empty(&ep->queue)))
785 qe_eprx_normal(ep);
786
787 ep->localnack = 0;
788}
789
790static void setup_received_handle(struct qe_udc *udc,
791 struct usb_ctrlrequest *setup);
792static int qe_ep_rxframe_handle(struct qe_ep *ep);
793static void ep0_req_complete(struct qe_udc *udc, struct qe_req *req);
794/* when BD PID is setup, handle the packet */
795static int ep0_setup_handle(struct qe_udc *udc)
796{
797 struct qe_ep *ep = &udc->eps[0];
798 struct qe_frame *pframe;
799 unsigned int fsize;
800 u8 *cp;
801
802 pframe = ep->rxframe;
803 if ((frame_get_info(pframe) & PID_SETUP)
804 && (udc->ep0_state == WAIT_FOR_SETUP)) {
805 fsize = frame_get_length(pframe);
806 if (unlikely(fsize != 8))
807 return -EINVAL;
808 cp = (u8 *)&udc->local_setup_buff;
809 memcpy(cp, pframe->data, fsize);
810 ep->data01 = 1;
811
812 /* handle the usb command base on the usb_ctrlrequest */
813 setup_received_handle(udc, &udc->local_setup_buff);
814 return 0;
815 }
816 return -EINVAL;
817}
818
819static int qe_ep0_rx(struct qe_udc *udc)
820{
821 struct qe_ep *ep = &udc->eps[0];
822 struct qe_frame *pframe;
823 struct qe_bd __iomem *bd;
824 u32 bdstatus, length;
825 u32 vaddr;
826
827 pframe = ep->rxframe;
828
829 if (ep->dir == USB_DIR_IN) {
830 dev_err(udc->dev, "ep0 not a control endpoint\n");
831 return -EINVAL;
832 }
833
834 bd = ep->n_rxbd;
835 bdstatus = in_be32((u32 __iomem *)bd);
836 length = bdstatus & BD_LENGTH_MASK;
837
838 while (!(bdstatus & R_E) && length) {
839 if ((bdstatus & R_F) && (bdstatus & R_L)
840 && !(bdstatus & R_ERROR)) {
841 if (length == USB_CRC_SIZE) {
842 udc->ep0_state = WAIT_FOR_SETUP;
843 dev_vdbg(udc->dev,
844 "receive a ZLP in status phase\n");
845 } else {
846 qe_frame_clean(pframe);
847 vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
848 frame_set_data(pframe, (u8 *)vaddr);
849 frame_set_length(pframe,
850 (length - USB_CRC_SIZE));
851 frame_set_status(pframe, FRAME_OK);
852 switch (bdstatus & R_PID) {
853 case R_PID_SETUP:
854 frame_set_info(pframe, PID_SETUP);
855 break;
856 case R_PID_DATA1:
857 frame_set_info(pframe, PID_DATA1);
858 break;
859 default:
860 frame_set_info(pframe, PID_DATA0);
861 break;
862 }
863
864 if ((bdstatus & R_PID) == R_PID_SETUP)
865 ep0_setup_handle(udc);
866 else
867 qe_ep_rxframe_handle(ep);
868 }
869 } else {
870 dev_err(udc->dev, "The receive frame with error!\n");
871 }
872
873 /* note: don't clear the rxbd's buffer address */
874 recycle_one_rxbd(ep);
875
876 /* Get next BD */
877 if (bdstatus & R_W)
878 bd = ep->rxbase;
879 else
880 bd++;
881
882 bdstatus = in_be32((u32 __iomem *)bd);
883 length = bdstatus & BD_LENGTH_MASK;
884
885 }
886
887 ep->n_rxbd = bd;
888
889 return 0;
890}
891
892static int qe_ep_rxframe_handle(struct qe_ep *ep)
893{
894 struct qe_frame *pframe;
895 u8 framepid = 0;
896 unsigned int fsize;
897 u8 *cp;
898 struct qe_req *req;
899
900 pframe = ep->rxframe;
901
902 if (frame_get_info(pframe) & PID_DATA1)
903 framepid = 0x1;
904
905 if (framepid != ep->data01) {
906 dev_err(ep->udc->dev, "the data01 error!\n");
907 return -EIO;
908 }
909
910 fsize = frame_get_length(pframe);
911 if (list_empty(&ep->queue)) {
912 dev_err(ep->udc->dev, "the %s have no requeue!\n", ep->name);
913 } else {
914 req = list_entry(ep->queue.next, struct qe_req, queue);
915
916 cp = (u8 *)(req->req.buf) + req->req.actual;
917 if (cp) {
918 memcpy(cp, pframe->data, fsize);
919 req->req.actual += fsize;
920 if ((fsize < ep->ep.maxpacket) ||
921 (req->req.actual >= req->req.length)) {
922 if (ep->epnum == 0)
923 ep0_req_complete(ep->udc, req);
924 else
925 done(ep, req, 0);
926 if (list_empty(&ep->queue) && ep->epnum != 0)
927 qe_eprx_nack(ep);
928 }
929 }
930 }
931
932 qe_ep_toggledata01(ep);
933
934 return 0;
935}
936
937static void ep_rx_tasklet(unsigned long data)
938{
939 struct qe_udc *udc = (struct qe_udc *)data;
940 struct qe_ep *ep;
941 struct qe_frame *pframe;
942 struct qe_bd __iomem *bd;
943 unsigned long flags;
944 u32 bdstatus, length;
945 u32 vaddr, i;
946
947 spin_lock_irqsave(&udc->lock, flags);
948
949 for (i = 1; i < USB_MAX_ENDPOINTS; i++) {
950 ep = &udc->eps[i];
951
952 if (ep->dir == USB_DIR_IN || ep->enable_tasklet == 0) {
953 dev_dbg(udc->dev,
954 "This is a transmit ep or disable tasklet!\n");
955 continue;
956 }
957
958 pframe = ep->rxframe;
959 bd = ep->n_rxbd;
960 bdstatus = in_be32((u32 __iomem *)bd);
961 length = bdstatus & BD_LENGTH_MASK;
962
963 while (!(bdstatus & R_E) && length) {
964 if (list_empty(&ep->queue)) {
965 qe_eprx_nack(ep);
966 dev_dbg(udc->dev,
967 "The rxep have noreq %d\n",
968 ep->has_data);
969 break;
970 }
971
972 if ((bdstatus & R_F) && (bdstatus & R_L)
973 && !(bdstatus & R_ERROR)) {
974 qe_frame_clean(pframe);
975 vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
976 frame_set_data(pframe, (u8 *)vaddr);
977 frame_set_length(pframe,
978 (length - USB_CRC_SIZE));
979 frame_set_status(pframe, FRAME_OK);
980 switch (bdstatus & R_PID) {
981 case R_PID_DATA1:
982 frame_set_info(pframe, PID_DATA1);
983 break;
984 case R_PID_SETUP:
985 frame_set_info(pframe, PID_SETUP);
986 break;
987 default:
988 frame_set_info(pframe, PID_DATA0);
989 break;
990 }
991 /* handle the rx frame */
992 qe_ep_rxframe_handle(ep);
993 } else {
994 dev_err(udc->dev,
995 "error in received frame\n");
996 }
997 /* note: don't clear the rxbd's buffer address */
998 /*clear the length */
999 out_be32((u32 __iomem *)bd, bdstatus & BD_STATUS_MASK);
1000 ep->has_data--;
1001 if (!(ep->localnack))
1002 recycle_one_rxbd(ep);
1003
1004 /* Get next BD */
1005 if (bdstatus & R_W)
1006 bd = ep->rxbase;
1007 else
1008 bd++;
1009
1010 bdstatus = in_be32((u32 __iomem *)bd);
1011 length = bdstatus & BD_LENGTH_MASK;
1012 }
1013
1014 ep->n_rxbd = bd;
1015
1016 if (ep->localnack)
1017 ep_recycle_rxbds(ep);
1018
1019 ep->enable_tasklet = 0;
1020 } /* for i=1 */
1021
1022 spin_unlock_irqrestore(&udc->lock, flags);
1023}
1024
1025static int qe_ep_rx(struct qe_ep *ep)
1026{
1027 struct qe_udc *udc;
1028 struct qe_frame *pframe;
1029 struct qe_bd __iomem *bd;
1030 u16 swoffs, ucoffs, emptybds;
1031
1032 udc = ep->udc;
1033 pframe = ep->rxframe;
1034
1035 if (ep->dir == USB_DIR_IN) {
1036 dev_err(udc->dev, "transmit ep in rx function\n");
1037 return -EINVAL;
1038 }
1039
1040 bd = ep->n_rxbd;
1041
1042 swoffs = (u16)(bd - ep->rxbase);
1043 ucoffs = (u16)((in_be16(&udc->ep_param[ep->epnum]->rbptr) -
1044 in_be16(&udc->ep_param[ep->epnum]->rbase)) >> 3);
1045 if (swoffs < ucoffs)
1046 emptybds = USB_BDRING_LEN_RX - ucoffs + swoffs;
1047 else
1048 emptybds = swoffs - ucoffs;
1049
1050 if (emptybds < MIN_EMPTY_BDS) {
1051 qe_eprx_nack(ep);
1052 ep->localnack = 1;
1053 dev_vdbg(udc->dev, "%d empty bds, send NACK\n", emptybds);
1054 }
1055 ep->has_data = USB_BDRING_LEN_RX - emptybds;
1056
1057 if (list_empty(&ep->queue)) {
1058 qe_eprx_nack(ep);
1059 dev_vdbg(udc->dev, "The rxep have no req queued with %d BDs\n",
1060 ep->has_data);
1061 return 0;
1062 }
1063
1064 tasklet_schedule(&udc->rx_tasklet);
1065 ep->enable_tasklet = 1;
1066
1067 return 0;
1068}
1069
1070/* send data from a frame, no matter what tx_req */
1071static int qe_ep_tx(struct qe_ep *ep, struct qe_frame *frame)
1072{
1073 struct qe_udc *udc = ep->udc;
1074 struct qe_bd __iomem *bd;
1075 u16 saveusbmr;
1076 u32 bdstatus, pidmask;
1077 u32 paddr;
1078
1079 if (ep->dir == USB_DIR_OUT) {
1080 dev_err(udc->dev, "receive ep passed to tx function\n");
1081 return -EINVAL;
1082 }
1083
1084 /* Disable the Tx interrupt */
1085 saveusbmr = in_be16(&udc->usb_regs->usb_usbmr);
1086 out_be16(&udc->usb_regs->usb_usbmr,
1087 saveusbmr & ~(USB_E_TXB_MASK | USB_E_TXE_MASK));
1088
1089 bd = ep->n_txbd;
1090 bdstatus = in_be32((u32 __iomem *)bd);
1091
1092 if (!(bdstatus & (T_R | BD_LENGTH_MASK))) {
1093 if (frame_get_length(frame) == 0) {
1094 frame_set_data(frame, udc->nullbuf);
1095 frame_set_length(frame, 2);
1096 frame->info |= (ZLP | NO_CRC);
1097 dev_vdbg(udc->dev, "the frame size = 0\n");
1098 }
1099 paddr = virt_to_phys((void *)frame->data);
1100 out_be32(&bd->buf, paddr);
1101 bdstatus = (bdstatus&T_W);
1102 if (!(frame_get_info(frame) & NO_CRC))
1103 bdstatus |= T_R | T_I | T_L | T_TC
1104 | frame_get_length(frame);
1105 else
1106 bdstatus |= T_R | T_I | T_L | frame_get_length(frame);
1107
1108 /* if the packet is a ZLP in status phase */
1109 if ((ep->epnum == 0) && (udc->ep0_state == DATA_STATE_NEED_ZLP))
1110 ep->data01 = 0x1;
1111
1112 if (ep->data01) {
1113 pidmask = T_PID_DATA1;
1114 frame->info |= PID_DATA1;
1115 } else {
1116 pidmask = T_PID_DATA0;
1117 frame->info |= PID_DATA0;
1118 }
1119 bdstatus |= T_CNF;
1120 bdstatus |= pidmask;
1121 out_be32((u32 __iomem *)bd, bdstatus);
1122 qe_ep_filltxfifo(ep);
1123
1124 /* enable the TX interrupt */
1125 out_be16(&udc->usb_regs->usb_usbmr, saveusbmr);
1126
1127 qe_ep_toggledata01(ep);
1128 if (bdstatus & T_W)
1129 ep->n_txbd = ep->txbase;
1130 else
1131 ep->n_txbd++;
1132
1133 return 0;
1134 } else {
1135 out_be16(&udc->usb_regs->usb_usbmr, saveusbmr);
1136 dev_vdbg(udc->dev, "The tx bd is not ready!\n");
1137 return -EBUSY;
1138 }
1139}
1140
1141/* when an bd was transmitted, the function can *
1142 * handle the tx_req, not include ep0 */
1143static int txcomplete(struct qe_ep *ep, unsigned char restart)
1144{
1145 if (ep->tx_req != NULL) {
1146 if (!restart) {
1147 int asent = ep->last;
1148 ep->sent += asent;
1149 ep->last -= asent;
1150 } else {
1151 ep->last = 0;
1152 }
1153
1154 /* a request already were transmitted completely */
1155 if ((ep->tx_req->req.length - ep->sent) <= 0) {
1156 ep->tx_req->req.actual = (unsigned int)ep->sent;
1157 done(ep, ep->tx_req, 0);
1158 ep->tx_req = NULL;
1159 ep->last = 0;
1160 ep->sent = 0;
1161 }
1162 }
1163
1164 /* we should gain a new tx_req fot this endpoint */
1165 if (ep->tx_req == NULL) {
1166 if (!list_empty(&ep->queue)) {
1167 ep->tx_req = list_entry(ep->queue.next, struct qe_req,
1168 queue);
1169 ep->last = 0;
1170 ep->sent = 0;
1171 }
1172 }
1173
1174 return 0;
1175}
1176
1177/* give a frame and a tx_req,send some data */
1178static int qe_usb_senddata(struct qe_ep *ep, struct qe_frame *frame)
1179{
1180 unsigned int size;
1181 u8 *buf;
1182
1183 qe_frame_clean(frame);
1184 size = min_t(u32, (ep->tx_req->req.length - ep->sent),
1185 ep->ep.maxpacket);
1186 buf = (u8 *)ep->tx_req->req.buf + ep->sent;
1187 if (buf && size) {
1188 ep->last = size;
1189 frame_set_data(frame, buf);
1190 frame_set_length(frame, size);
1191 frame_set_status(frame, FRAME_OK);
1192 frame_set_info(frame, 0);
1193 return qe_ep_tx(ep, frame);
1194 }
1195 return -EIO;
1196}
1197
1198/* give a frame struct,send a ZLP */
1199static int sendnulldata(struct qe_ep *ep, struct qe_frame *frame, uint infor)
1200{
1201 struct qe_udc *udc = ep->udc;
1202
1203 if (frame == NULL)
1204 return -ENODEV;
1205
1206 qe_frame_clean(frame);
1207 frame_set_data(frame, (u8 *)udc->nullbuf);
1208 frame_set_length(frame, 2);
1209 frame_set_status(frame, FRAME_OK);
1210 frame_set_info(frame, (ZLP | NO_CRC | infor));
1211
1212 return qe_ep_tx(ep, frame);
1213}
1214
1215static int frame_create_tx(struct qe_ep *ep, struct qe_frame *frame)
1216{
1217 struct qe_req *req = ep->tx_req;
1218 int reval;
1219
1220 if (req == NULL)
1221 return -ENODEV;
1222
1223 if ((req->req.length - ep->sent) > 0)
1224 reval = qe_usb_senddata(ep, frame);
1225 else
1226 reval = sendnulldata(ep, frame, 0);
1227
1228 return reval;
1229}
1230
1231/* if direction is DIR_IN, the status is Device->Host
1232 * if direction is DIR_OUT, the status transaction is Device<-Host
1233 * in status phase, udc create a request and gain status */
1234static int ep0_prime_status(struct qe_udc *udc, int direction)
1235{
1236
1237 struct qe_ep *ep = &udc->eps[0];
1238
1239 if (direction == USB_DIR_IN) {
1240 udc->ep0_state = DATA_STATE_NEED_ZLP;
1241 udc->ep0_dir = USB_DIR_IN;
1242 sendnulldata(ep, ep->txframe, SETUP_STATUS | NO_REQ);
1243 } else {
1244 udc->ep0_dir = USB_DIR_OUT;
1245 udc->ep0_state = WAIT_FOR_OUT_STATUS;
1246 }
1247
1248 return 0;
1249}
1250
1251/* a request complete in ep0, whether gadget request or udc request */
1252static void ep0_req_complete(struct qe_udc *udc, struct qe_req *req)
1253{
1254 struct qe_ep *ep = &udc->eps[0];
1255 /* because usb and ep's status already been set in ch9setaddress() */
1256
1257 switch (udc->ep0_state) {
1258 case DATA_STATE_XMIT:
1259 done(ep, req, 0);
1260 /* receive status phase */
1261 if (ep0_prime_status(udc, USB_DIR_OUT))
1262 qe_ep0_stall(udc);
1263 break;
1264
1265 case DATA_STATE_NEED_ZLP:
1266 done(ep, req, 0);
1267 udc->ep0_state = WAIT_FOR_SETUP;
1268 break;
1269
1270 case DATA_STATE_RECV:
1271 done(ep, req, 0);
1272 /* send status phase */
1273 if (ep0_prime_status(udc, USB_DIR_IN))
1274 qe_ep0_stall(udc);
1275 break;
1276
1277 case WAIT_FOR_OUT_STATUS:
1278 done(ep, req, 0);
1279 udc->ep0_state = WAIT_FOR_SETUP;
1280 break;
1281
1282 case WAIT_FOR_SETUP:
1283 dev_vdbg(udc->dev, "Unexpected interrupt\n");
1284 break;
1285
1286 default:
1287 qe_ep0_stall(udc);
1288 break;
1289 }
1290}
1291
1292static int ep0_txcomplete(struct qe_ep *ep, unsigned char restart)
1293{
1294 struct qe_req *tx_req = NULL;
1295 struct qe_frame *frame = ep->txframe;
1296
1297 if ((frame_get_info(frame) & (ZLP | NO_REQ)) == (ZLP | NO_REQ)) {
1298 if (!restart)
1299 ep->udc->ep0_state = WAIT_FOR_SETUP;
1300 else
1301 sendnulldata(ep, ep->txframe, SETUP_STATUS | NO_REQ);
1302 return 0;
1303 }
1304
1305 tx_req = ep->tx_req;
1306 if (tx_req != NULL) {
1307 if (!restart) {
1308 int asent = ep->last;
1309 ep->sent += asent;
1310 ep->last -= asent;
1311 } else {
1312 ep->last = 0;
1313 }
1314
1315 /* a request already were transmitted completely */
1316 if ((ep->tx_req->req.length - ep->sent) <= 0) {
1317 ep->tx_req->req.actual = (unsigned int)ep->sent;
1318 ep0_req_complete(ep->udc, ep->tx_req);
1319 ep->tx_req = NULL;
1320 ep->last = 0;
1321 ep->sent = 0;
1322 }
1323 } else {
1324 dev_vdbg(ep->udc->dev, "the ep0_controller have no req\n");
1325 }
1326
1327 return 0;
1328}
1329
1330static int ep0_txframe_handle(struct qe_ep *ep)
1331{
1332 /* if have error, transmit again */
1333 if (frame_get_status(ep->txframe) & FRAME_ERROR) {
1334 qe_ep_flushtxfifo(ep);
1335 dev_vdbg(ep->udc->dev, "The EP0 transmit data have error!\n");
1336 if (frame_get_info(ep->txframe) & PID_DATA0)
1337 ep->data01 = 0;
1338 else
1339 ep->data01 = 1;
1340
1341 ep0_txcomplete(ep, 1);
1342 } else
1343 ep0_txcomplete(ep, 0);
1344
1345 frame_create_tx(ep, ep->txframe);
1346 return 0;
1347}
1348
1349static int qe_ep0_txconf(struct qe_ep *ep)
1350{
1351 struct qe_bd __iomem *bd;
1352 struct qe_frame *pframe;
1353 u32 bdstatus;
1354
1355 bd = ep->c_txbd;
1356 bdstatus = in_be32((u32 __iomem *)bd);
1357 while (!(bdstatus & T_R) && (bdstatus & ~T_W)) {
1358 pframe = ep->txframe;
1359
1360 /* clear and recycle the BD */
1361 out_be32((u32 __iomem *)bd, bdstatus & T_W);
1362 out_be32(&bd->buf, 0);
1363 if (bdstatus & T_W)
1364 ep->c_txbd = ep->txbase;
1365 else
1366 ep->c_txbd++;
1367
1368 if (ep->c_txbd == ep->n_txbd) {
1369 if (bdstatus & DEVICE_T_ERROR) {
1370 frame_set_status(pframe, FRAME_ERROR);
1371 if (bdstatus & T_TO)
1372 pframe->status |= TX_ER_TIMEOUT;
1373 if (bdstatus & T_UN)
1374 pframe->status |= TX_ER_UNDERUN;
1375 }
1376 ep0_txframe_handle(ep);
1377 }
1378
1379 bd = ep->c_txbd;
1380 bdstatus = in_be32((u32 __iomem *)bd);
1381 }
1382
1383 return 0;
1384}
1385
1386static int ep_txframe_handle(struct qe_ep *ep)
1387{
1388 if (frame_get_status(ep->txframe) & FRAME_ERROR) {
1389 qe_ep_flushtxfifo(ep);
1390 dev_vdbg(ep->udc->dev, "The EP0 transmit data have error!\n");
1391 if (frame_get_info(ep->txframe) & PID_DATA0)
1392 ep->data01 = 0;
1393 else
1394 ep->data01 = 1;
1395
1396 txcomplete(ep, 1);
1397 } else
1398 txcomplete(ep, 0);
1399
1400 frame_create_tx(ep, ep->txframe); /* send the data */
1401 return 0;
1402}
1403
1404/* confirm the already trainsmited bd */
1405static int qe_ep_txconf(struct qe_ep *ep)
1406{
1407 struct qe_bd __iomem *bd;
1408 struct qe_frame *pframe = NULL;
1409 u32 bdstatus;
1410 unsigned char breakonrxinterrupt = 0;
1411
1412 bd = ep->c_txbd;
1413 bdstatus = in_be32((u32 __iomem *)bd);
1414 while (!(bdstatus & T_R) && (bdstatus & ~T_W)) {
1415 pframe = ep->txframe;
1416 if (bdstatus & DEVICE_T_ERROR) {
1417 frame_set_status(pframe, FRAME_ERROR);
1418 if (bdstatus & T_TO)
1419 pframe->status |= TX_ER_TIMEOUT;
1420 if (bdstatus & T_UN)
1421 pframe->status |= TX_ER_UNDERUN;
1422 }
1423
1424 /* clear and recycle the BD */
1425 out_be32((u32 __iomem *)bd, bdstatus & T_W);
1426 out_be32(&bd->buf, 0);
1427 if (bdstatus & T_W)
1428 ep->c_txbd = ep->txbase;
1429 else
1430 ep->c_txbd++;
1431
1432 /* handle the tx frame */
1433 ep_txframe_handle(ep);
1434 bd = ep->c_txbd;
1435 bdstatus = in_be32((u32 __iomem *)bd);
1436 }
1437 if (breakonrxinterrupt)
1438 return -EIO;
1439 else
1440 return 0;
1441}
1442
1443/* Add a request in queue, and try to transmit a packet */
1444static int ep_req_send(struct qe_ep *ep, struct qe_req *req)
1445{
1446 int reval = 0;
1447
1448 if (ep->tx_req == NULL) {
1449 ep->sent = 0;
1450 ep->last = 0;
1451 txcomplete(ep, 0); /* can gain a new tx_req */
1452 reval = frame_create_tx(ep, ep->txframe);
1453 }
1454 return reval;
1455}
1456
1457/* Maybe this is a good ideal */
1458static int ep_req_rx(struct qe_ep *ep, struct qe_req *req)
1459{
1460 struct qe_udc *udc = ep->udc;
1461 struct qe_frame *pframe = NULL;
1462 struct qe_bd __iomem *bd;
1463 u32 bdstatus, length;
1464 u32 vaddr, fsize;
1465 u8 *cp;
1466 u8 finish_req = 0;
1467 u8 framepid;
1468
1469 if (list_empty(&ep->queue)) {
1470 dev_vdbg(udc->dev, "the req already finish!\n");
1471 return 0;
1472 }
1473 pframe = ep->rxframe;
1474
1475 bd = ep->n_rxbd;
1476 bdstatus = in_be32((u32 __iomem *)bd);
1477 length = bdstatus & BD_LENGTH_MASK;
1478
1479 while (!(bdstatus & R_E) && length) {
1480 if (finish_req)
1481 break;
1482 if ((bdstatus & R_F) && (bdstatus & R_L)
1483 && !(bdstatus & R_ERROR)) {
1484 qe_frame_clean(pframe);
1485 vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
1486 frame_set_data(pframe, (u8 *)vaddr);
1487 frame_set_length(pframe, (length - USB_CRC_SIZE));
1488 frame_set_status(pframe, FRAME_OK);
1489 switch (bdstatus & R_PID) {
1490 case R_PID_DATA1:
1491 frame_set_info(pframe, PID_DATA1); break;
1492 default:
1493 frame_set_info(pframe, PID_DATA0); break;
1494 }
1495 /* handle the rx frame */
1496
1497 if (frame_get_info(pframe) & PID_DATA1)
1498 framepid = 0x1;
1499 else
1500 framepid = 0;
1501
1502 if (framepid != ep->data01) {
1503 dev_vdbg(udc->dev, "the data01 error!\n");
1504 } else {
1505 fsize = frame_get_length(pframe);
1506
1507 cp = (u8 *)(req->req.buf) + req->req.actual;
1508 if (cp) {
1509 memcpy(cp, pframe->data, fsize);
1510 req->req.actual += fsize;
1511 if ((fsize < ep->ep.maxpacket)
1512 || (req->req.actual >=
1513 req->req.length)) {
1514 finish_req = 1;
1515 done(ep, req, 0);
1516 if (list_empty(&ep->queue))
1517 qe_eprx_nack(ep);
1518 }
1519 }
1520 qe_ep_toggledata01(ep);
1521 }
1522 } else {
1523 dev_err(udc->dev, "The receive frame with error!\n");
1524 }
1525
1526 /* note: don't clear the rxbd's buffer address *
1527 * only Clear the length */
1528 out_be32((u32 __iomem *)bd, (bdstatus & BD_STATUS_MASK));
1529 ep->has_data--;
1530
1531 /* Get next BD */
1532 if (bdstatus & R_W)
1533 bd = ep->rxbase;
1534 else
1535 bd++;
1536
1537 bdstatus = in_be32((u32 __iomem *)bd);
1538 length = bdstatus & BD_LENGTH_MASK;
1539 }
1540
1541 ep->n_rxbd = bd;
1542 ep_recycle_rxbds(ep);
1543
1544 return 0;
1545}
1546
1547/* only add the request in queue */
1548static int ep_req_receive(struct qe_ep *ep, struct qe_req *req)
1549{
1550 if (ep->state == EP_STATE_NACK) {
1551 if (ep->has_data <= 0) {
1552 /* Enable rx and unmask rx interrupt */
1553 qe_eprx_normal(ep);
1554 } else {
1555 /* Copy the exist BD data */
1556 ep_req_rx(ep, req);
1557 }
1558 }
1559
1560 return 0;
1561}
1562
1563/********************************************************************
1564 Internal Used Function End
1565********************************************************************/
1566
1567/*-----------------------------------------------------------------------
1568 Endpoint Management Functions For Gadget
1569 -----------------------------------------------------------------------*/
1570static int qe_ep_enable(struct usb_ep *_ep,
1571 const struct usb_endpoint_descriptor *desc)
1572{
1573 struct qe_udc *udc;
1574 struct qe_ep *ep;
1575 int retval = 0;
1576 unsigned char epnum;
1577
1578 ep = container_of(_ep, struct qe_ep, ep);
1579
1580 /* catch various bogus parameters */
1581 if (!_ep || !desc || ep->desc || _ep->name == ep_name[0] ||
1582 (desc->bDescriptorType != USB_DT_ENDPOINT))
1583 return -EINVAL;
1584
1585 udc = ep->udc;
1586 if (!udc->driver || (udc->gadget.speed == USB_SPEED_UNKNOWN))
1587 return -ESHUTDOWN;
1588
1589 epnum = (u8)desc->bEndpointAddress & 0xF;
1590
1591 retval = qe_ep_init(udc, epnum, desc);
1592 if (retval != 0) {
1593 cpm_muram_free(cpm_muram_offset(ep->rxbase));
1594 dev_dbg(udc->dev, "enable ep%d failed\n", ep->epnum);
1595 return -EINVAL;
1596 }
1597 dev_dbg(udc->dev, "enable ep%d successful\n", ep->epnum);
1598 return 0;
1599}
1600
1601static int qe_ep_disable(struct usb_ep *_ep)
1602{
1603 struct qe_udc *udc;
1604 struct qe_ep *ep;
1605 unsigned long flags;
1606 unsigned int size;
1607
1608 ep = container_of(_ep, struct qe_ep, ep);
1609 udc = ep->udc;
1610
1611 if (!_ep || !ep->desc) {
1612 dev_dbg(udc->dev, "%s not enabled\n", _ep ? ep->ep.name : NULL);
1613 return -EINVAL;
1614 }
1615
1616 spin_lock_irqsave(&udc->lock, flags);
1617 /* Nuke all pending requests (does flush) */
1618 nuke(ep, -ESHUTDOWN);
1619 ep->desc = NULL;
1620 ep->stopped = 1;
1621 spin_unlock_irqrestore(&udc->lock, flags);
1622
1623 cpm_muram_free(cpm_muram_offset(ep->rxbase));
1624
1625 if (ep->dir == USB_DIR_OUT)
1626 size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) *
1627 (USB_BDRING_LEN_RX + 1);
1628 else
1629 size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) *
1630 (USB_BDRING_LEN + 1);
1631
1632 if (ep->dir != USB_DIR_IN) {
1633 kfree(ep->rxframe);
1634 if (ep->rxbufmap) {
1635 dma_unmap_single(udc_controller->gadget.dev.parent,
1636 ep->rxbuf_d, size,
1637 DMA_FROM_DEVICE);
1638 ep->rxbuf_d = DMA_ADDR_INVALID;
1639 } else {
1640 dma_sync_single_for_cpu(
1641 udc_controller->gadget.dev.parent,
1642 ep->rxbuf_d, size,
1643 DMA_FROM_DEVICE);
1644 }
1645 kfree(ep->rxbuffer);
1646 }
1647
1648 if (ep->dir != USB_DIR_OUT)
1649 kfree(ep->txframe);
1650
1651 dev_dbg(udc->dev, "disabled %s OK\n", _ep->name);
1652 return 0;
1653}
1654
1655static struct usb_request *qe_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
1656{
1657 struct qe_req *req;
1658
1659 req = kzalloc(sizeof(*req), gfp_flags);
1660 if (!req)
1661 return NULL;
1662
1663 req->req.dma = DMA_ADDR_INVALID;
1664
1665 INIT_LIST_HEAD(&req->queue);
1666
1667 return &req->req;
1668}
1669
1670static void qe_free_request(struct usb_ep *_ep, struct usb_request *_req)
1671{
1672 struct qe_req *req;
1673
1674 req = container_of(_req, struct qe_req, req);
1675
1676 if (_req)
1677 kfree(req);
1678}
1679
1680/* queues (submits) an I/O request to an endpoint */
1681static int qe_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
1682 gfp_t gfp_flags)
1683{
1684 struct qe_ep *ep = container_of(_ep, struct qe_ep, ep);
1685 struct qe_req *req = container_of(_req, struct qe_req, req);
1686 struct qe_udc *udc;
1687 unsigned long flags;
1688 int reval;
1689
1690 udc = ep->udc;
1691 /* catch various bogus parameters */
1692 if (!_req || !req->req.complete || !req->req.buf
1693 || !list_empty(&req->queue)) {
1694 dev_dbg(udc->dev, "bad params\n");
1695 return -EINVAL;
1696 }
1697 if (!_ep || (!ep->desc && ep_index(ep))) {
1698 dev_dbg(udc->dev, "bad ep\n");
1699 return -EINVAL;
1700 }
1701
1702 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN)
1703 return -ESHUTDOWN;
1704
1705 req->ep = ep;
1706
1707 /* map virtual address to hardware */
1708 if (req->req.dma == DMA_ADDR_INVALID) {
1709 req->req.dma = dma_map_single(ep->udc->gadget.dev.parent,
1710 req->req.buf,
1711 req->req.length,
1712 ep_is_in(ep)
1713 ? DMA_TO_DEVICE :
1714 DMA_FROM_DEVICE);
1715 req->mapped = 1;
1716 } else {
1717 dma_sync_single_for_device(ep->udc->gadget.dev.parent,
1718 req->req.dma, req->req.length,
1719 ep_is_in(ep)
1720 ? DMA_TO_DEVICE :
1721 DMA_FROM_DEVICE);
1722 req->mapped = 0;
1723 }
1724
1725 req->req.status = -EINPROGRESS;
1726 req->req.actual = 0;
1727
1728 list_add_tail(&req->queue, &ep->queue);
1729 dev_vdbg(udc->dev, "gadget have request in %s! %d\n",
1730 ep->name, req->req.length);
1731 spin_lock_irqsave(&udc->lock, flags);
1732 /* push the request to device */
1733 if (ep_is_in(ep))
1734 reval = ep_req_send(ep, req);
1735
1736 /* EP0 */
1737 if (ep_index(ep) == 0 && req->req.length > 0) {
1738 if (ep_is_in(ep))
1739 udc->ep0_state = DATA_STATE_XMIT;
1740 else
1741 udc->ep0_state = DATA_STATE_RECV;
1742 }
1743
1744 if (ep->dir == USB_DIR_OUT)
1745 reval = ep_req_receive(ep, req);
1746
1747 spin_unlock_irqrestore(&udc->lock, flags);
1748
1749 return 0;
1750}
1751
1752/* dequeues (cancels, unlinks) an I/O request from an endpoint */
1753static int qe_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1754{
1755 struct qe_ep *ep = container_of(_ep, struct qe_ep, ep);
1756 struct qe_req *req;
1757 unsigned long flags;
1758
1759 if (!_ep || !_req)
1760 return -EINVAL;
1761
1762 spin_lock_irqsave(&ep->udc->lock, flags);
1763
1764 /* make sure it's actually queued on this endpoint */
1765 list_for_each_entry(req, &ep->queue, queue) {
1766 if (&req->req == _req)
1767 break;
1768 }
1769
1770 if (&req->req != _req) {
1771 spin_unlock_irqrestore(&ep->udc->lock, flags);
1772 return -EINVAL;
1773 }
1774
1775 done(ep, req, -ECONNRESET);
1776
1777 spin_unlock_irqrestore(&ep->udc->lock, flags);
1778 return 0;
1779}
1780
1781/*-----------------------------------------------------------------
1782 * modify the endpoint halt feature
1783 * @ep: the non-isochronous endpoint being stalled
1784 * @value: 1--set halt 0--clear halt
1785 * Returns zero, or a negative error code.
1786*----------------------------------------------------------------*/
1787static int qe_ep_set_halt(struct usb_ep *_ep, int value)
1788{
1789 struct qe_ep *ep;
1790 unsigned long flags;
1791 int status = -EOPNOTSUPP;
1792 struct qe_udc *udc;
1793
1794 ep = container_of(_ep, struct qe_ep, ep);
1795 if (!_ep || !ep->desc) {
1796 status = -EINVAL;
1797 goto out;
1798 }
1799
1800 if (ep->epnum != 0) {
1801 status = 0;
1802 goto out;
1803 }
1804
1805 udc = ep->udc;
1806 /* Attempt to halt IN ep will fail if any transfer requests
1807 * are still queue */
1808 if (value && ep_is_in(ep) && !list_empty(&ep->queue)) {
1809 status = -EAGAIN;
1810 goto out;
1811 }
1812
1813 status = 0;
1814 spin_lock_irqsave(&ep->udc->lock, flags);
1815 qe_eptx_stall_change(ep, value);
1816 qe_eprx_stall_change(ep, value);
1817 spin_unlock_irqrestore(&ep->udc->lock, flags);
1818
1819 if (ep->epnum == 0) {
1820 udc->ep0_state = WAIT_FOR_SETUP;
1821 udc->ep0_dir = 0;
1822 }
1823out:
1824 dev_vdbg(udc->dev, " %s %s halt stat %d\n", ep->ep.name,
1825 value ? "set" : "clear", status);
1826
1827 return status;
1828}
1829
1830static struct usb_ep_ops qe_ep_ops = {
1831 .enable = qe_ep_enable,
1832 .disable = qe_ep_disable,
1833
1834 .alloc_request = qe_alloc_request,
1835 .free_request = qe_free_request,
1836
1837 .queue = qe_ep_queue,
1838 .dequeue = qe_ep_dequeue,
1839
1840 .set_halt = qe_ep_set_halt,
1841};
1842
1843/*------------------------------------------------------------------------
1844 Gadget Driver Layer Operations
1845 ------------------------------------------------------------------------*/
1846
1847/* Get the current frame number */
1848static int qe_get_frame(struct usb_gadget *gadget)
1849{
1850 u16 tmp;
1851
1852 tmp = in_be16(&udc_controller->usb_param->frame_n);
1853 if (tmp & 0x8000)
1854 tmp = tmp & 0x07ff;
1855 else
1856 tmp = -EINVAL;
1857
1858 return (int)tmp;
1859}
1860
1861/* Tries to wake up the host connected to this gadget
1862 *
1863 * Return : 0-success
1864 * Negative-this feature not enabled by host or not supported by device hw
1865 */
1866static int qe_wakeup(struct usb_gadget *gadget)
1867{
1868 return -ENOTSUPP;
1869}
1870
1871/* Notify controller that VBUS is powered, Called by whatever
1872 detects VBUS sessions */
1873static int qe_vbus_session(struct usb_gadget *gadget, int is_active)
1874{
1875 return -ENOTSUPP;
1876}
1877
1878/* constrain controller's VBUS power usage
1879 * This call is used by gadget drivers during SET_CONFIGURATION calls,
1880 * reporting how much power the device may consume. For example, this
1881 * could affect how quickly batteries are recharged.
1882 *
1883 * Returns zero on success, else negative errno.
1884 */
1885static int qe_vbus_draw(struct usb_gadget *gadget, unsigned mA)
1886{
1887 return -ENOTSUPP;
1888}
1889
1890/* Change Data+ pullup status
1891 * this func is used by usb_gadget_connect/disconnect
1892 */
1893static int qe_pullup(struct usb_gadget *gadget, int is_on)
1894{
1895 return -ENOTSUPP;
1896}
1897
1898/* defined in usb_gadget.h */
1899static struct usb_gadget_ops qe_gadget_ops = {
1900 .get_frame = qe_get_frame,
1901 .wakeup = qe_wakeup,
1902/* .set_selfpowered = qe_set_selfpowered,*/ /* always selfpowered */
1903 .vbus_session = qe_vbus_session,
1904 .vbus_draw = qe_vbus_draw,
1905 .pullup = qe_pullup,
1906};
1907
1908/*-------------------------------------------------------------------------
1909 USB ep0 Setup process in BUS Enumeration
1910 -------------------------------------------------------------------------*/
1911static int udc_reset_ep_queue(struct qe_udc *udc, u8 pipe)
1912{
1913 struct qe_ep *ep = &udc->eps[pipe];
1914
1915 nuke(ep, -ECONNRESET);
1916 ep->tx_req = NULL;
1917 return 0;
1918}
1919
1920static int reset_queues(struct qe_udc *udc)
1921{
1922 u8 pipe;
1923
1924 for (pipe = 0; pipe < USB_MAX_ENDPOINTS; pipe++)
1925 udc_reset_ep_queue(udc, pipe);
1926
1927 /* report disconnect; the driver is already quiesced */
1928 spin_unlock(&udc->lock);
1929 udc->driver->disconnect(&udc->gadget);
1930 spin_lock(&udc->lock);
1931
1932 return 0;
1933}
1934
1935static void ch9setaddress(struct qe_udc *udc, u16 value, u16 index,
1936 u16 length)
1937{
1938 /* Save the new address to device struct */
1939 udc->device_address = (u8) value;
1940 /* Update usb state */
1941 udc->usb_state = USB_STATE_ADDRESS;
1942
1943 /* Status phase , send a ZLP */
1944 if (ep0_prime_status(udc, USB_DIR_IN))
1945 qe_ep0_stall(udc);
1946}
1947
1948static void ownercomplete(struct usb_ep *_ep, struct usb_request *_req)
1949{
1950 struct qe_req *req = container_of(_req, struct qe_req, req);
1951
1952 req->req.buf = NULL;
1953 kfree(req);
1954}
1955
1956static void ch9getstatus(struct qe_udc *udc, u16 value, u16 index,
1957 u16 length)
1958{
1959 u16 usb_status = 0; /* fix me to give correct status */
1960
1961 struct qe_req *req;
1962 struct qe_ep *ep;
1963 int status = 0;
1964
1965 ep = &udc->eps[0];
1966
1967 req = container_of(qe_alloc_request(&ep->ep, GFP_KERNEL),
1968 struct qe_req, req);
1969 req->req.length = 2;
1970 req->req.buf = udc->nullbuf;
1971 memcpy(req->req.buf, (u8 *)&usb_status, 2);
1972 req->req.status = -EINPROGRESS;
1973 req->req.actual = 0;
1974 req->req.complete = ownercomplete;
1975
1976 udc->ep0_dir = USB_DIR_IN;
1977
1978 /* data phase */
1979 status = qe_ep_queue(&ep->ep, &req->req, GFP_ATOMIC);
1980
1981 if (status) {
1982 dev_err(udc->dev, "Can't respond to getstatus request \n");
1983 qe_ep0_stall(udc);
1984 }
1985}
1986
1987/* only handle the setup request, suppose the device in normal status */
1988static void setup_received_handle(struct qe_udc *udc,
1989 struct usb_ctrlrequest *setup)
1990{
1991 /* Fix Endian (udc->local_setup_buff is cpu Endian now)*/
1992 u16 wValue = le16_to_cpu(setup->wValue);
1993 u16 wIndex = le16_to_cpu(setup->wIndex);
1994 u16 wLength = le16_to_cpu(setup->wLength);
1995
1996 /* clear the previous request in the ep0 */
1997 udc_reset_ep_queue(udc, 0);
1998
1999 if (setup->bRequestType & USB_DIR_IN)
2000 udc->ep0_dir = USB_DIR_IN;
2001 else
2002 udc->ep0_dir = USB_DIR_OUT;
2003
2004 switch (setup->bRequest) {
2005 case USB_REQ_GET_STATUS:
2006 /* Data+Status phase form udc */
2007 if ((setup->bRequestType & (USB_DIR_IN | USB_TYPE_MASK))
2008 != (USB_DIR_IN | USB_TYPE_STANDARD))
2009 break;
2010 ch9getstatus(udc, wValue, wIndex, wLength);
2011 return;
2012
2013 case USB_REQ_SET_ADDRESS:
2014 /* Status phase from udc */
2015 if (setup->bRequestType != (USB_DIR_OUT | USB_TYPE_STANDARD |
2016 USB_RECIP_DEVICE))
2017 break;
2018 ch9setaddress(udc, wValue, wIndex, wLength);
2019 return;
2020
2021 case USB_REQ_CLEAR_FEATURE:
2022 case USB_REQ_SET_FEATURE:
2023 /* Requests with no data phase, status phase from udc */
2024 if ((setup->bRequestType & USB_TYPE_MASK)
2025 != USB_TYPE_STANDARD)
2026 break;
2027
2028 if ((setup->bRequestType & USB_RECIP_MASK)
2029 == USB_RECIP_ENDPOINT) {
2030 int pipe = wIndex & USB_ENDPOINT_NUMBER_MASK;
2031 struct qe_ep *ep;
2032
2033 if (wValue != 0 || wLength != 0
2034 || pipe > USB_MAX_ENDPOINTS)
2035 break;
2036 ep = &udc->eps[pipe];
2037
2038 spin_unlock(&udc->lock);
2039 qe_ep_set_halt(&ep->ep,
2040 (setup->bRequest == USB_REQ_SET_FEATURE)
2041 ? 1 : 0);
2042 spin_lock(&udc->lock);
2043 }
2044
2045 ep0_prime_status(udc, USB_DIR_IN);
2046
2047 return;
2048
2049 default:
2050 break;
2051 }
2052
2053 if (wLength) {
2054 /* Data phase from gadget, status phase from udc */
2055 if (setup->bRequestType & USB_DIR_IN) {
2056 udc->ep0_state = DATA_STATE_XMIT;
2057 udc->ep0_dir = USB_DIR_IN;
2058 } else{
2059 udc->ep0_state = DATA_STATE_RECV;
2060 udc->ep0_dir = USB_DIR_OUT;
2061 }
2062 spin_unlock(&udc->lock);
2063 if (udc->driver->setup(&udc->gadget,
2064 &udc->local_setup_buff) < 0)
2065 qe_ep0_stall(udc);
2066 spin_lock(&udc->lock);
2067 } else {
2068 /* No data phase, IN status from gadget */
2069 udc->ep0_dir = USB_DIR_IN;
2070 spin_unlock(&udc->lock);
2071 if (udc->driver->setup(&udc->gadget,
2072 &udc->local_setup_buff) < 0)
2073 qe_ep0_stall(udc);
2074 spin_lock(&udc->lock);
2075 udc->ep0_state = DATA_STATE_NEED_ZLP;
2076 }
2077}
2078
2079/*-------------------------------------------------------------------------
2080 USB Interrupt handlers
2081 -------------------------------------------------------------------------*/
2082static void suspend_irq(struct qe_udc *udc)
2083{
2084 udc->resume_state = udc->usb_state;
2085 udc->usb_state = USB_STATE_SUSPENDED;
2086
2087 /* report suspend to the driver ,serial.c not support this*/
2088 if (udc->driver->suspend)
2089 udc->driver->suspend(&udc->gadget);
2090}
2091
2092static void resume_irq(struct qe_udc *udc)
2093{
2094 udc->usb_state = udc->resume_state;
2095 udc->resume_state = 0;
2096
2097 /* report resume to the driver , serial.c not support this*/
2098 if (udc->driver->resume)
2099 udc->driver->resume(&udc->gadget);
2100}
2101
2102static void idle_irq(struct qe_udc *udc)
2103{
2104 u8 usbs;
2105
2106 usbs = in_8(&udc->usb_regs->usb_usbs);
2107 if (usbs & USB_IDLE_STATUS_MASK) {
2108 if ((udc->usb_state) != USB_STATE_SUSPENDED)
2109 suspend_irq(udc);
2110 } else {
2111 if (udc->usb_state == USB_STATE_SUSPENDED)
2112 resume_irq(udc);
2113 }
2114}
2115
2116static int reset_irq(struct qe_udc *udc)
2117{
2118 unsigned char i;
2119
2120 qe_usb_disable();
2121 out_8(&udc->usb_regs->usb_usadr, 0);
2122
2123 for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
2124 if (udc->eps[i].init)
2125 qe_ep_reset(udc, i);
2126 }
2127
2128 reset_queues(udc);
2129 udc->usb_state = USB_STATE_DEFAULT;
2130 udc->ep0_state = WAIT_FOR_SETUP;
2131 udc->ep0_dir = USB_DIR_OUT;
2132 qe_usb_enable();
2133 return 0;
2134}
2135
2136static int bsy_irq(struct qe_udc *udc)
2137{
2138 return 0;
2139}
2140
2141static int txe_irq(struct qe_udc *udc)
2142{
2143 return 0;
2144}
2145
2146/* ep0 tx interrupt also in here */
2147static int tx_irq(struct qe_udc *udc)
2148{
2149 struct qe_ep *ep;
2150 struct qe_bd __iomem *bd;
2151 int i, res = 0;
2152
2153 if ((udc->usb_state == USB_STATE_ADDRESS)
2154 && (in_8(&udc->usb_regs->usb_usadr) == 0))
2155 out_8(&udc->usb_regs->usb_usadr, udc->device_address);
2156
2157 for (i = (USB_MAX_ENDPOINTS-1); ((i >= 0) && (res == 0)); i--) {
2158 ep = &udc->eps[i];
2159 if (ep && ep->init && (ep->dir != USB_DIR_OUT)) {
2160 bd = ep->c_txbd;
2161 if (!(in_be32((u32 __iomem *)bd) & T_R)
2162 && (in_be32(&bd->buf))) {
2163 /* Disable the TX Interrupt */
2164 /*confirm the transmitted bd*/
2165 if (ep->epnum == 0)
2166 res = qe_ep0_txconf(ep);
2167 else
2168 res = qe_ep_txconf(ep);
2169 /* Enable the TX Interrupt */
2170 }
2171 }
2172 }
2173 return res;
2174}
2175
2176
2177/* setup packect's rx is handle in the function too */
2178static void rx_irq(struct qe_udc *udc)
2179{
2180 struct qe_ep *ep;
2181 struct qe_bd __iomem *bd;
2182 int i;
2183
2184 for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
2185 ep = &udc->eps[i];
2186 if (ep && ep->init && (ep->dir != USB_DIR_IN)) {
2187 bd = ep->n_rxbd;
2188 if (!(in_be32((u32 __iomem *)bd) & R_E)
2189 && (in_be32(&bd->buf))) {
2190 if (ep->epnum == 0) {
2191 qe_ep0_rx(udc);
2192 } else {
2193 /*non-setup package receive*/
2194 qe_ep_rx(ep);
2195 }
2196 }
2197 }
2198 }
2199}
2200
2201static irqreturn_t qe_udc_irq(int irq, void *_udc)
2202{
2203 struct qe_udc *udc = (struct qe_udc *)_udc;
2204 u16 irq_src;
2205 irqreturn_t status = IRQ_NONE;
2206 unsigned long flags;
2207
2208
2209 spin_lock_irqsave(&udc->lock, flags);
2210
2211 irq_src = in_be16(&udc->usb_regs->usb_usber) &
2212 in_be16(&udc->usb_regs->usb_usbmr);
2213 /* Clear notification bits */
2214 out_be16(&udc->usb_regs->usb_usber, irq_src);
2215 /* USB Interrupt */
2216 if (irq_src & USB_E_IDLE_MASK) {
2217 idle_irq(udc);
2218 irq_src &= ~USB_E_IDLE_MASK;
2219 status = IRQ_HANDLED;
2220 }
2221
2222 if (irq_src & USB_E_TXB_MASK) {
2223 tx_irq(udc);
2224 irq_src &= ~USB_E_TXB_MASK;
2225 status = IRQ_HANDLED;
2226 }
2227
2228 if (irq_src & USB_E_RXB_MASK) {
2229 rx_irq(udc);
2230 irq_src &= ~USB_E_RXB_MASK;
2231 status = IRQ_HANDLED;
2232 }
2233
2234 if (irq_src & USB_E_RESET_MASK) {
2235 reset_irq(udc);
2236 irq_src &= ~USB_E_RESET_MASK;
2237 status = IRQ_HANDLED;
2238 }
2239
2240 if (irq_src & USB_E_BSY_MASK) {
2241 bsy_irq(udc);
2242 irq_src &= ~USB_E_BSY_MASK;
2243 status = IRQ_HANDLED;
2244 }
2245
2246 if (irq_src & USB_E_TXE_MASK) {
2247 txe_irq(udc);
2248 irq_src &= ~USB_E_TXE_MASK;
2249 status = IRQ_HANDLED;
2250 }
2251
2252 spin_unlock_irqrestore(&udc->lock, flags);
2253
2254 return status;
2255}
2256
2257/*-------------------------------------------------------------------------
2258 Gadget driver register and unregister.
2259 --------------------------------------------------------------------------*/
2260int usb_gadget_register_driver(struct usb_gadget_driver *driver)
2261{
2262 int retval;
2263 unsigned long flags = 0;
2264
2265 /* standard operations */
2266 if (!udc_controller)
2267 return -ENODEV;
2268
2269 if (!driver || (driver->speed != USB_SPEED_FULL
2270 && driver->speed != USB_SPEED_HIGH)
2271 || !driver->bind || !driver->disconnect
2272 || !driver->setup)
2273 return -EINVAL;
2274
2275 if (udc_controller->driver)
2276 return -EBUSY;
2277
2278 /* lock is needed but whether should use this lock or another */
2279 spin_lock_irqsave(&udc_controller->lock, flags);
2280
2281 driver->driver.bus = NULL;
2282 /* hook up the driver */
2283 udc_controller->driver = driver;
2284 udc_controller->gadget.dev.driver = &driver->driver;
2285 udc_controller->gadget.speed = (enum usb_device_speed)(driver->speed);
2286 spin_unlock_irqrestore(&udc_controller->lock, flags);
2287
2288 retval = driver->bind(&udc_controller->gadget);
2289 if (retval) {
2290 dev_err(udc_controller->dev, "bind to %s --> %d",
2291 driver->driver.name, retval);
2292 udc_controller->gadget.dev.driver = NULL;
2293 udc_controller->driver = NULL;
2294 return retval;
2295 }
2296
2297 /* Enable IRQ reg and Set usbcmd reg EN bit */
2298 qe_usb_enable();
2299
2300 out_be16(&udc_controller->usb_regs->usb_usber, 0xffff);
2301 out_be16(&udc_controller->usb_regs->usb_usbmr, USB_E_DEFAULT_DEVICE);
2302 udc_controller->usb_state = USB_STATE_ATTACHED;
2303 udc_controller->ep0_state = WAIT_FOR_SETUP;
2304 udc_controller->ep0_dir = USB_DIR_OUT;
2305 dev_info(udc_controller->dev, "%s bind to driver %s \n",
2306 udc_controller->gadget.name, driver->driver.name);
2307 return 0;
2308}
2309EXPORT_SYMBOL(usb_gadget_register_driver);
2310
2311int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
2312{
2313 struct qe_ep *loop_ep;
2314 unsigned long flags;
2315
2316 if (!udc_controller)
2317 return -ENODEV;
2318
2319 if (!driver || driver != udc_controller->driver)
2320 return -EINVAL;
2321
2322 /* stop usb controller, disable intr */
2323 qe_usb_disable();
2324
2325 /* in fact, no needed */
2326 udc_controller->usb_state = USB_STATE_ATTACHED;
2327 udc_controller->ep0_state = WAIT_FOR_SETUP;
2328 udc_controller->ep0_dir = 0;
2329
2330 /* stand operation */
2331 spin_lock_irqsave(&udc_controller->lock, flags);
2332 udc_controller->gadget.speed = USB_SPEED_UNKNOWN;
2333 nuke(&udc_controller->eps[0], -ESHUTDOWN);
2334 list_for_each_entry(loop_ep, &udc_controller->gadget.ep_list,
2335 ep.ep_list)
2336 nuke(loop_ep, -ESHUTDOWN);
2337 spin_unlock_irqrestore(&udc_controller->lock, flags);
2338
2339 /* unbind gadget and unhook driver. */
2340 driver->unbind(&udc_controller->gadget);
2341 udc_controller->gadget.dev.driver = NULL;
2342 udc_controller->driver = NULL;
2343
2344 dev_info(udc_controller->dev, "unregistered gadget driver '%s'\r\n",
2345 driver->driver.name);
2346 return 0;
2347}
2348EXPORT_SYMBOL(usb_gadget_unregister_driver);
2349
2350/* udc structure's alloc and setup, include ep-param alloc */
2351static struct qe_udc __devinit *qe_udc_config(struct of_device *ofdev)
2352{
2353 struct qe_udc *udc;
2354 struct device_node *np = ofdev->node;
2355 unsigned int tmp_addr = 0;
2356 struct usb_device_para __iomem *usbpram;
2357 unsigned int i;
2358 u64 size;
2359 u32 offset;
2360
2361 udc = kzalloc(sizeof(*udc), GFP_KERNEL);
2362 if (udc == NULL) {
2363 dev_err(&ofdev->dev, "malloc udc failed\n");
2364 goto cleanup;
2365 }
2366
2367 udc->dev = &ofdev->dev;
2368
2369 /* get default address of usb parameter in MURAM from device tree */
2370 offset = *of_get_address(np, 1, &size, NULL);
2371 udc->usb_param = cpm_muram_addr(offset);
2372 memset_io(udc->usb_param, 0, size);
2373
2374 usbpram = udc->usb_param;
2375 out_be16(&usbpram->frame_n, 0);
2376 out_be32(&usbpram->rstate, 0);
2377
2378 tmp_addr = cpm_muram_alloc((USB_MAX_ENDPOINTS *
2379 sizeof(struct usb_ep_para)),
2380 USB_EP_PARA_ALIGNMENT);
2381
2382 for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
2383 out_be16(&usbpram->epptr[i], (u16)tmp_addr);
2384 udc->ep_param[i] = cpm_muram_addr(tmp_addr);
2385 tmp_addr += 32;
2386 }
2387
2388 memset_io(udc->ep_param[0], 0,
2389 USB_MAX_ENDPOINTS * sizeof(struct usb_ep_para));
2390
2391 udc->resume_state = USB_STATE_NOTATTACHED;
2392 udc->usb_state = USB_STATE_POWERED;
2393 udc->ep0_dir = 0;
2394
2395 spin_lock_init(&udc->lock);
2396 return udc;
2397
2398cleanup:
2399 kfree(udc);
2400 return NULL;
2401}
2402
2403/* USB Controller register init */
2404static int __devinit qe_udc_reg_init(struct qe_udc *udc)
2405{
2406 struct usb_ctlr __iomem *qe_usbregs;
2407 qe_usbregs = udc->usb_regs;
2408
2409 /* Init the usb register */
2410 out_8(&qe_usbregs->usb_usmod, 0x01);
2411 out_be16(&qe_usbregs->usb_usbmr, 0);
2412 out_8(&qe_usbregs->usb_uscom, 0);
2413 out_be16(&qe_usbregs->usb_usber, USBER_ALL_CLEAR);
2414
2415 return 0;
2416}
2417
2418static int __devinit qe_ep_config(struct qe_udc *udc, unsigned char pipe_num)
2419{
2420 struct qe_ep *ep = &udc->eps[pipe_num];
2421
2422 ep->udc = udc;
2423 strcpy(ep->name, ep_name[pipe_num]);
2424 ep->ep.name = ep_name[pipe_num];
2425
2426 ep->ep.ops = &qe_ep_ops;
2427 ep->stopped = 1;
2428 ep->ep.maxpacket = (unsigned short) ~0;
2429 ep->desc = NULL;
2430 ep->dir = 0xff;
2431 ep->epnum = (u8)pipe_num;
2432 ep->sent = 0;
2433 ep->last = 0;
2434 ep->init = 0;
2435 ep->rxframe = NULL;
2436 ep->txframe = NULL;
2437 ep->tx_req = NULL;
2438 ep->state = EP_STATE_IDLE;
2439 ep->has_data = 0;
2440
2441 /* the queue lists any req for this ep */
2442 INIT_LIST_HEAD(&ep->queue);
2443
2444 /* gagdet.ep_list used for ep_autoconfig so no ep0*/
2445 if (pipe_num != 0)
2446 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
2447
2448 ep->gadget = &udc->gadget;
2449
2450 return 0;
2451}
2452
2453/*-----------------------------------------------------------------------
2454 * UDC device Driver operation functions *
2455 *----------------------------------------------------------------------*/
2456static void qe_udc_release(struct device *dev)
2457{
2458 int i = 0;
2459
2460 complete(udc_controller->done);
2461 cpm_muram_free(cpm_muram_offset(udc_controller->ep_param[0]));
2462 for (i = 0; i < USB_MAX_ENDPOINTS; i++)
2463 udc_controller->ep_param[i] = NULL;
2464
2465 kfree(udc_controller);
2466 udc_controller = NULL;
2467}
2468
2469/* Driver probe functions */
2470static int __devinit qe_udc_probe(struct of_device *ofdev,
2471 const struct of_device_id *match)
2472{
2473 struct device_node *np = ofdev->node;
2474 struct qe_ep *ep;
2475 unsigned int ret = 0;
2476 unsigned int i;
2477 const void *prop;
2478
2479 prop = of_get_property(np, "mode", NULL);
2480 if (!prop || strcmp(prop, "peripheral"))
2481 return -ENODEV;
2482
2483 /* Initialize the udc structure including QH member and other member */
2484 udc_controller = qe_udc_config(ofdev);
2485 if (!udc_controller) {
2486 dev_dbg(&ofdev->dev, "udc_controll is NULL\n");
2487 return -ENOMEM;
2488 }
2489
2490 udc_controller->soc_type = (unsigned long)match->data;
2491 udc_controller->usb_regs = of_iomap(np, 0);
2492 if (!udc_controller->usb_regs) {
2493 ret = -ENOMEM;
2494 goto err1;
2495 }
2496
2497 /* initialize usb hw reg except for regs for EP,
2498 * leave usbintr reg untouched*/
2499 qe_udc_reg_init(udc_controller);
2500
2501 /* here comes the stand operations for probe
2502 * set the qe_udc->gadget.xxx */
2503 udc_controller->gadget.ops = &qe_gadget_ops;
2504
2505 /* gadget.ep0 is a pointer */
2506 udc_controller->gadget.ep0 = &udc_controller->eps[0].ep;
2507
2508 INIT_LIST_HEAD(&udc_controller->gadget.ep_list);
2509
2510 /* modify in register gadget process */
2511 udc_controller->gadget.speed = USB_SPEED_UNKNOWN;
2512
2513 /* name: Identifies the controller hardware type. */
2514 udc_controller->gadget.name = driver_name;
2515
2516 device_initialize(&udc_controller->gadget.dev);
2517
2518 strcpy(udc_controller->gadget.dev.bus_id, "gadget");
2519
2520 udc_controller->gadget.dev.release = qe_udc_release;
2521 udc_controller->gadget.dev.parent = &ofdev->dev;
2522
2523
2524 /* EP:intialization qe_ep struct */
2525 for (i = 0; i < USB_MAX_ENDPOINTS ; i++) {
2526 /*because the ep type isn't decide here so
2527 * qe_ep_init() should be called in ep_enable() */
2528
2529 /* setup the qe_ep struct and link ep.ep.list
2530 * into gadget.ep_list */
2531 qe_ep_config(udc_controller, (unsigned char)i);
2532 }
2533
2534 /* ep0 initialization in here */
2535 ret = qe_ep_init(udc_controller, 0, &qe_ep0_desc);
2536 if (ret)
2537 goto err2;
2538
2539 /* create a buf for ZLP send */
2540 udc_controller->nullbuf = kzalloc(256, GFP_KERNEL);
2541 if (udc_controller->nullbuf == NULL) {
2542 dev_dbg(udc_controller->dev, "cannot alloc nullbuf\n");
2543 ret = -ENOMEM;
2544 goto err3;
2545 }
2546
2547 udc_controller->nullp = virt_to_phys((void *)udc_controller->nullbuf);
2548 if (udc_controller->nullp == DMA_ADDR_INVALID) {
2549 udc_controller->nullp = dma_map_single(
2550 udc_controller->gadget.dev.parent,
2551 udc_controller->nullbuf,
2552 256,
2553 DMA_TO_DEVICE);
2554 udc_controller->nullmap = 1;
2555 } else {
2556 dma_sync_single_for_device(udc_controller->gadget.dev.parent,
2557 udc_controller->nullp, 256,
2558 DMA_TO_DEVICE);
2559 }
2560
2561 tasklet_init(&udc_controller->rx_tasklet, ep_rx_tasklet,
2562 (unsigned long)udc_controller);
2563 /* request irq and disable DR */
2564 udc_controller->usb_irq = irq_of_parse_and_map(np, 0);
2565
2566 ret = request_irq(udc_controller->usb_irq, qe_udc_irq, 0,
2567 driver_name, udc_controller);
2568 if (ret) {
2569 dev_err(udc_controller->dev, "cannot request irq %d err %d \n",
2570 udc_controller->usb_irq, ret);
2571 goto err4;
2572 }
2573
2574 ret = device_add(&udc_controller->gadget.dev);
2575 if (ret)
2576 goto err5;
2577
2578 dev_info(udc_controller->dev,
2579 "QE/CPM USB controller initialized as device\n");
2580 return 0;
2581
2582err5:
2583 free_irq(udc_controller->usb_irq, udc_controller);
2584err4:
2585 if (udc_controller->nullmap) {
2586 dma_unmap_single(udc_controller->gadget.dev.parent,
2587 udc_controller->nullp, 256,
2588 DMA_TO_DEVICE);
2589 udc_controller->nullp = DMA_ADDR_INVALID;
2590 } else {
2591 dma_sync_single_for_cpu(udc_controller->gadget.dev.parent,
2592 udc_controller->nullp, 256,
2593 DMA_TO_DEVICE);
2594 }
2595 kfree(udc_controller->nullbuf);
2596err3:
2597 ep = &udc_controller->eps[0];
2598 cpm_muram_free(cpm_muram_offset(ep->rxbase));
2599 kfree(ep->rxframe);
2600 kfree(ep->rxbuffer);
2601 kfree(ep->txframe);
2602err2:
2603 iounmap(udc_controller->usb_regs);
2604err1:
2605 kfree(udc_controller);
2606
2607 return ret;
2608}
2609
2610#ifdef CONFIG_PM
2611static int qe_udc_suspend(struct of_device *dev, pm_message_t state)
2612{
2613 return -ENOTSUPP;
2614}
2615
2616static int qe_udc_resume(struct of_device *dev)
2617{
2618 return -ENOTSUPP;
2619}
2620#endif
2621
2622static int __devexit qe_udc_remove(struct of_device *ofdev)
2623{
2624 struct qe_ep *ep;
2625 unsigned int size;
2626
2627 DECLARE_COMPLETION(done);
2628
2629 if (!udc_controller)
2630 return -ENODEV;
2631
2632 udc_controller->done = &done;
2633 tasklet_disable(&udc_controller->rx_tasklet);
2634
2635 if (udc_controller->nullmap) {
2636 dma_unmap_single(udc_controller->gadget.dev.parent,
2637 udc_controller->nullp, 256,
2638 DMA_TO_DEVICE);
2639 udc_controller->nullp = DMA_ADDR_INVALID;
2640 } else {
2641 dma_sync_single_for_cpu(udc_controller->gadget.dev.parent,
2642 udc_controller->nullp, 256,
2643 DMA_TO_DEVICE);
2644 }
2645 kfree(udc_controller->nullbuf);
2646
2647 ep = &udc_controller->eps[0];
2648 cpm_muram_free(cpm_muram_offset(ep->rxbase));
2649 size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) * (USB_BDRING_LEN + 1);
2650
2651 kfree(ep->rxframe);
2652 if (ep->rxbufmap) {
2653 dma_unmap_single(udc_controller->gadget.dev.parent,
2654 ep->rxbuf_d, size,
2655 DMA_FROM_DEVICE);
2656 ep->rxbuf_d = DMA_ADDR_INVALID;
2657 } else {
2658 dma_sync_single_for_cpu(udc_controller->gadget.dev.parent,
2659 ep->rxbuf_d, size,
2660 DMA_FROM_DEVICE);
2661 }
2662
2663 kfree(ep->rxbuffer);
2664 kfree(ep->txframe);
2665
2666 free_irq(udc_controller->usb_irq, udc_controller);
2667
2668 tasklet_kill(&udc_controller->rx_tasklet);
2669
2670 iounmap(udc_controller->usb_regs);
2671
2672 device_unregister(&udc_controller->gadget.dev);
2673 /* wait for release() of gadget.dev to free udc */
2674 wait_for_completion(&done);
2675
2676 return 0;
2677}
2678
2679/*-------------------------------------------------------------------------*/
2680static struct of_device_id __devinitdata qe_udc_match[] = {
2681 {
2682 .compatible = "fsl,mpc8360-qe-usb",
2683 .data = (void *)PORT_QE,
2684 },
2685 {
2686 .compatible = "fsl,mpc8272-cpm-usb",
2687 .data = (void *)PORT_CPM,
2688 },
2689 {},
2690};
2691
2692MODULE_DEVICE_TABLE(of, qe_udc_match);
2693
2694static struct of_platform_driver udc_driver = {
2695 .name = (char *)driver_name,
2696 .match_table = qe_udc_match,
2697 .probe = qe_udc_probe,
2698 .remove = __devexit_p(qe_udc_remove),
2699#ifdef CONFIG_PM
2700 .suspend = qe_udc_suspend,
2701 .resume = qe_udc_resume,
2702#endif
2703};
2704
2705static int __init qe_udc_init(void)
2706{
2707 printk(KERN_INFO "%s: %s, %s\n", driver_name, driver_desc,
2708 DRIVER_VERSION);
2709 return of_register_platform_driver(&udc_driver);
2710}
2711
2712static void __exit qe_udc_exit(void)
2713{
2714 of_unregister_platform_driver(&udc_driver);
2715}
2716
2717module_init(qe_udc_init);
2718module_exit(qe_udc_exit);
2719
2720MODULE_DESCRIPTION(DRIVER_DESC);
2721MODULE_AUTHOR(DRIVER_AUTHOR);
2722MODULE_LICENSE("GPL");
2723
diff --git a/drivers/usb/gadget/fsl_qe_udc.h b/drivers/usb/gadget/fsl_qe_udc.h
new file mode 100644
index 000000000000..b4c07a22e8e7
--- /dev/null
+++ b/drivers/usb/gadget/fsl_qe_udc.h
@@ -0,0 +1,436 @@
1/*
2 * drivers/usb/gadget/qe_udc.h
3 *
4 * Copyright (C) 2006-2008 Freescale Semiconductor, Inc. All rights reserved.
5 *
6 * Xiaobo Xie <X.Xie@freescale.com>
7 * Li Yang <leoli@freescale.com>
8 *
9 * Description:
10 * Freescale USB device/endpoint management registers
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or (at
15 * your option) any later version.
16 */
17
18#ifndef __FSL_QE_UDC_H
19#define __FSL_QE_UDC_H
20
21/* SoC type */
22#define PORT_CPM 0
23#define PORT_QE 1
24
25#define USB_MAX_ENDPOINTS 4
26#define USB_MAX_PIPES USB_MAX_ENDPOINTS
27#define USB_EP0_MAX_SIZE 64
28#define USB_MAX_CTRL_PAYLOAD 0x4000
29#define USB_BDRING_LEN 16
30#define USB_BDRING_LEN_RX 256
31#define USB_BDRING_LEN_TX 16
32#define MIN_EMPTY_BDS 128
33#define MAX_DATA_BDS 8
34#define USB_CRC_SIZE 2
35#define USB_DIR_BOTH 0x88
36#define R_BUF_MAXSIZE 0x800
37#define USB_EP_PARA_ALIGNMENT 32
38
39/* USB Mode Register bit define */
40#define USB_MODE_EN 0x01
41#define USB_MODE_HOST 0x02
42#define USB_MODE_TEST 0x04
43#define USB_MODE_SFTE 0x08
44#define USB_MODE_RESUME 0x40
45#define USB_MODE_LSS 0x80
46
47/* USB Slave Address Register Mask */
48#define USB_SLVADDR_MASK 0x7F
49
50/* USB Endpoint register define */
51#define USB_EPNUM_MASK 0xF000
52#define USB_EPNUM_SHIFT 12
53
54#define USB_TRANS_MODE_SHIFT 8
55#define USB_TRANS_CTR 0x0000
56#define USB_TRANS_INT 0x0100
57#define USB_TRANS_BULK 0x0200
58#define USB_TRANS_ISO 0x0300
59
60#define USB_EP_MF 0x0020
61#define USB_EP_RTE 0x0010
62
63#define USB_THS_SHIFT 2
64#define USB_THS_MASK 0x000c
65#define USB_THS_NORMAL 0x0
66#define USB_THS_IGNORE_IN 0x0004
67#define USB_THS_NACK 0x0008
68#define USB_THS_STALL 0x000c
69
70#define USB_RHS_SHIFT 0
71#define USB_RHS_MASK 0x0003
72#define USB_RHS_NORMAL 0x0
73#define USB_RHS_IGNORE_OUT 0x0001
74#define USB_RHS_NACK 0x0002
75#define USB_RHS_STALL 0x0003
76
77#define USB_RTHS_MASK 0x000f
78
79/* USB Command Register define */
80#define USB_CMD_STR_FIFO 0x80
81#define USB_CMD_FLUSH_FIFO 0x40
82#define USB_CMD_ISFT 0x20
83#define USB_CMD_DSFT 0x10
84#define USB_CMD_EP_MASK 0x03
85
86/* USB Event and Mask Register define */
87#define USB_E_MSF_MASK 0x0800
88#define USB_E_SFT_MASK 0x0400
89#define USB_E_RESET_MASK 0x0200
90#define USB_E_IDLE_MASK 0x0100
91#define USB_E_TXE4_MASK 0x0080
92#define USB_E_TXE3_MASK 0x0040
93#define USB_E_TXE2_MASK 0x0020
94#define USB_E_TXE1_MASK 0x0010
95#define USB_E_SOF_MASK 0x0008
96#define USB_E_BSY_MASK 0x0004
97#define USB_E_TXB_MASK 0x0002
98#define USB_E_RXB_MASK 0x0001
99#define USBER_ALL_CLEAR 0x0fff
100
101#define USB_E_DEFAULT_DEVICE (USB_E_RESET_MASK | USB_E_TXE4_MASK | \
102 USB_E_TXE3_MASK | USB_E_TXE2_MASK | \
103 USB_E_TXE1_MASK | USB_E_BSY_MASK | \
104 USB_E_TXB_MASK | USB_E_RXB_MASK)
105
106#define USB_E_TXE_MASK (USB_E_TXE4_MASK | USB_E_TXE3_MASK|\
107 USB_E_TXE2_MASK | USB_E_TXE1_MASK)
108/* USB Status Register define */
109#define USB_IDLE_STATUS_MASK 0x01
110
111/* USB Start of Frame Timer */
112#define USB_USSFT_MASK 0x3FFF
113
114/* USB Frame Number Register */
115#define USB_USFRN_MASK 0xFFFF
116
117struct usb_device_para{
118 u16 epptr[4];
119 u32 rstate;
120 u32 rptr;
121 u16 frame_n;
122 u16 rbcnt;
123 u32 rtemp;
124 u32 rxusb_data;
125 u16 rxuptr;
126 u8 reso[2];
127 u32 softbl;
128 u8 sofucrctemp;
129};
130
131struct usb_ep_para{
132 u16 rbase;
133 u16 tbase;
134 u8 rbmr;
135 u8 tbmr;
136 u16 mrblr;
137 u16 rbptr;
138 u16 tbptr;
139 u32 tstate;
140 u32 tptr;
141 u16 tcrc;
142 u16 tbcnt;
143 u32 ttemp;
144 u16 txusbu_ptr;
145 u8 reserve[2];
146};
147
148#define USB_BUSMODE_GBL 0x20
149#define USB_BUSMODE_BO_MASK 0x18
150#define USB_BUSMODE_BO_SHIFT 0x3
151#define USB_BUSMODE_BE 0x2
152#define USB_BUSMODE_CETM 0x04
153#define USB_BUSMODE_DTB 0x02
154
155/* Endpoint basic handle */
156#define ep_index(EP) ((EP)->desc->bEndpointAddress & 0xF)
157#define ep_maxpacket(EP) ((EP)->ep.maxpacket)
158#define ep_is_in(EP) ((ep_index(EP) == 0) ? (EP->udc->ep0_dir == \
159 USB_DIR_IN) : ((EP)->desc->bEndpointAddress \
160 & USB_DIR_IN) == USB_DIR_IN)
161
162/* ep0 transfer state */
163#define WAIT_FOR_SETUP 0
164#define DATA_STATE_XMIT 1
165#define DATA_STATE_NEED_ZLP 2
166#define WAIT_FOR_OUT_STATUS 3
167#define DATA_STATE_RECV 4
168
169/* ep tramsfer mode */
170#define USBP_TM_CTL 0
171#define USBP_TM_ISO 1
172#define USBP_TM_BULK 2
173#define USBP_TM_INT 3
174
175/*-----------------------------------------------------------------------------
176 USB RX And TX DATA Frame
177 -----------------------------------------------------------------------------*/
178struct qe_frame{
179 u8 *data;
180 u32 len;
181 u32 status;
182 u32 info;
183
184 void *privdata;
185 struct list_head node;
186};
187
188/* Frame structure, info field. */
189#define PID_DATA0 0x80000000 /* Data toggle zero */
190#define PID_DATA1 0x40000000 /* Data toggle one */
191#define PID_SETUP 0x20000000 /* setup bit */
192#define SETUP_STATUS 0x10000000 /* setup status bit */
193#define SETADDR_STATUS 0x08000000 /* setupup address status bit */
194#define NO_REQ 0x04000000 /* Frame without request */
195#define HOST_DATA 0x02000000 /* Host data frame */
196#define FIRST_PACKET_IN_FRAME 0x01000000 /* first packet in the frame */
197#define TOKEN_FRAME 0x00800000 /* Host token frame */
198#define ZLP 0x00400000 /* Zero length packet */
199#define IN_TOKEN_FRAME 0x00200000 /* In token package */
200#define OUT_TOKEN_FRAME 0x00100000 /* Out token package */
201#define SETUP_TOKEN_FRAME 0x00080000 /* Setup token package */
202#define STALL_FRAME 0x00040000 /* Stall handshake */
203#define NACK_FRAME 0x00020000 /* Nack handshake */
204#define NO_PID 0x00010000 /* No send PID */
205#define NO_CRC 0x00008000 /* No send CRC */
206#define HOST_COMMAND 0x00004000 /* Host command frame */
207
208/* Frame status field */
209/* Receive side */
210#define FRAME_OK 0x00000000 /* Frame tranmitted or received OK */
211#define FRAME_ERROR 0x80000000 /* Error occured on frame */
212#define START_FRAME_LOST 0x40000000 /* START_FRAME_LOST */
213#define END_FRAME_LOST 0x20000000 /* END_FRAME_LOST */
214#define RX_ER_NONOCT 0x10000000 /* Rx Non Octet Aligned Packet */
215#define RX_ER_BITSTUFF 0x08000000 /* Frame Aborted --Received packet
216 with bit stuff error */
217#define RX_ER_CRC 0x04000000 /* Received packet with CRC error */
218#define RX_ER_OVERUN 0x02000000 /* Over-run occured on reception */
219#define RX_ER_PID 0x01000000 /* Wrong PID received */
220/* Tranmit side */
221#define TX_ER_NAK 0x00800000 /* Received NAK handshake */
222#define TX_ER_STALL 0x00400000 /* Received STALL handshake */
223#define TX_ER_TIMEOUT 0x00200000 /* Transmit time out */
224#define TX_ER_UNDERUN 0x00100000 /* Transmit underrun */
225#define FRAME_INPROGRESS 0x00080000 /* Frame is being transmitted */
226#define ER_DATA_UNDERUN 0x00040000 /* Frame is shorter then expected */
227#define ER_DATA_OVERUN 0x00020000 /* Frame is longer then expected */
228
229/* QE USB frame operation functions */
230#define frame_get_length(frm) (frm->len)
231#define frame_set_length(frm, leng) (frm->len = leng)
232#define frame_get_data(frm) (frm->data)
233#define frame_set_data(frm, dat) (frm->data = dat)
234#define frame_get_info(frm) (frm->info)
235#define frame_set_info(frm, inf) (frm->info = inf)
236#define frame_get_status(frm) (frm->status)
237#define frame_set_status(frm, stat) (frm->status = stat)
238#define frame_get_privdata(frm) (frm->privdata)
239#define frame_set_privdata(frm, dat) (frm->privdata = dat)
240
241static inline void qe_frame_clean(struct qe_frame *frm)
242{
243 frame_set_data(frm, NULL);
244 frame_set_length(frm, 0);
245 frame_set_status(frm, FRAME_OK);
246 frame_set_info(frm, 0);
247 frame_set_privdata(frm, NULL);
248}
249
250static inline void qe_frame_init(struct qe_frame *frm)
251{
252 qe_frame_clean(frm);
253 INIT_LIST_HEAD(&(frm->node));
254}
255
256struct qe_req {
257 struct usb_request req;
258 struct list_head queue;
259 /* ep_queue() func will add
260 a request->queue into a udc_ep->queue 'd tail */
261 struct qe_ep *ep;
262 unsigned mapped:1;
263};
264
265struct qe_ep {
266 struct usb_ep ep;
267 struct list_head queue;
268 struct qe_udc *udc;
269 const struct usb_endpoint_descriptor *desc;
270 struct usb_gadget *gadget;
271
272 u8 state;
273
274 struct qe_bd __iomem *rxbase;
275 struct qe_bd __iomem *n_rxbd;
276 struct qe_bd __iomem *e_rxbd;
277
278 struct qe_bd __iomem *txbase;
279 struct qe_bd __iomem *n_txbd;
280 struct qe_bd __iomem *c_txbd;
281
282 struct qe_frame *rxframe;
283 u8 *rxbuffer;
284 dma_addr_t rxbuf_d;
285 u8 rxbufmap;
286 unsigned char localnack;
287 int has_data;
288
289 struct qe_frame *txframe;
290 struct qe_req *tx_req;
291 int sent; /*data already sent */
292 int last; /*data sent in the last time*/
293
294 u8 dir;
295 u8 epnum;
296 u8 tm; /* transfer mode */
297 u8 data01;
298 u8 init;
299
300 u8 already_seen;
301 u8 enable_tasklet;
302 u8 setup_stage;
303 u32 last_io; /* timestamp */
304
305 char name[14];
306
307 unsigned double_buf:1;
308 unsigned stopped:1;
309 unsigned fnf:1;
310 unsigned has_dma:1;
311
312 u8 ackwait;
313 u8 dma_channel;
314 u16 dma_counter;
315 int lch;
316
317 struct timer_list timer;
318};
319
320struct qe_udc {
321 struct usb_gadget gadget;
322 struct usb_gadget_driver *driver;
323 struct device *dev;
324 struct qe_ep eps[USB_MAX_ENDPOINTS];
325 struct usb_ctrlrequest local_setup_buff;
326 spinlock_t lock; /* lock for set/config qe_udc */
327 unsigned long soc_type; /* QE or CPM soc */
328
329 struct qe_req *status_req; /* ep0 status request */
330
331 /* USB and EP Parameter Block pointer */
332 struct usb_device_para __iomem *usb_param;
333 struct usb_ep_para __iomem *ep_param[4];
334
335 u32 max_pipes; /* Device max pipes */
336 u32 max_use_endpts; /* Max endpointes to be used */
337 u32 bus_reset; /* Device is bus reseting */
338 u32 resume_state; /* USB state to resume*/
339 u32 usb_state; /* USB current state */
340 u32 usb_next_state; /* USB next state */
341 u32 ep0_state; /* Enpoint zero state */
342 u32 ep0_dir; /* Enpoint zero direction: can be
343 USB_DIR_IN or USB_DIR_OUT*/
344 u32 usb_sof_count; /* SOF count */
345 u32 errors; /* USB ERRORs count */
346
347 u8 *tmpbuf;
348 u32 c_start;
349 u32 c_end;
350
351 u8 *nullbuf;
352 dma_addr_t nullp;
353 u8 nullmap;
354 u8 device_address; /* Device USB address */
355
356 unsigned int usb_clock;
357 unsigned int usb_irq;
358 struct usb_ctlr __iomem *usb_regs;
359
360 struct tasklet_struct rx_tasklet;
361
362 struct completion *done; /* to make sure release() is done */
363};
364
365#define EP_STATE_IDLE 0
366#define EP_STATE_NACK 1
367#define EP_STATE_STALL 2
368
369/*
370 * transmit BD's status
371 */
372#define T_R 0x80000000 /* ready bit */
373#define T_W 0x20000000 /* wrap bit */
374#define T_I 0x10000000 /* interrupt on completion */
375#define T_L 0x08000000 /* last */
376#define T_TC 0x04000000 /* transmit CRC */
377#define T_CNF 0x02000000 /* wait for transmit confirm */
378#define T_LSP 0x01000000 /* Low-speed transaction */
379#define T_PID 0x00c00000 /* packet id */
380#define T_NAK 0x00100000 /* No ack. */
381#define T_STAL 0x00080000 /* Stall recieved */
382#define T_TO 0x00040000 /* time out */
383#define T_UN 0x00020000 /* underrun */
384
385#define DEVICE_T_ERROR (T_UN | T_TO)
386#define HOST_T_ERROR (T_UN | T_TO | T_NAK | T_STAL)
387#define DEVICE_T_BD_MASK DEVICE_T_ERROR
388#define HOST_T_BD_MASK HOST_T_ERROR
389
390#define T_PID_SHIFT 6
391#define T_PID_DATA0 0x00800000 /* Data 0 toggle */
392#define T_PID_DATA1 0x00c00000 /* Data 1 toggle */
393
394/*
395 * receive BD's status
396 */
397#define R_E 0x80000000 /* buffer empty */
398#define R_W 0x20000000 /* wrap bit */
399#define R_I 0x10000000 /* interrupt on reception */
400#define R_L 0x08000000 /* last */
401#define R_F 0x04000000 /* first */
402#define R_PID 0x00c00000 /* packet id */
403#define R_NO 0x00100000 /* Rx Non Octet Aligned Packet */
404#define R_AB 0x00080000 /* Frame Aborted */
405#define R_CR 0x00040000 /* CRC Error */
406#define R_OV 0x00020000 /* Overrun */
407
408#define R_ERROR (R_NO | R_AB | R_CR | R_OV)
409#define R_BD_MASK R_ERROR
410
411#define R_PID_DATA0 0x00000000
412#define R_PID_DATA1 0x00400000
413#define R_PID_SETUP 0x00800000
414
415#define CPM_USB_STOP_TX 0x2e600000
416#define CPM_USB_RESTART_TX 0x2e600000
417#define CPM_USB_STOP_TX_OPCODE 0x0a
418#define CPM_USB_RESTART_TX_OPCODE 0x0b
419#define CPM_USB_EP_SHIFT 5
420
421#ifndef CONFIG_CPM
422inline int cpm_command(u32 command, u8 opcode)
423{
424 return -EOPNOTSUPP;
425}
426#endif
427
428#ifndef CONFIG_QUICC_ENGINE
429inline int qe_issue_cmd(u32 cmd, u32 device, u8 mcn_protocol,
430 u32 cmd_input)
431{
432 return -EOPNOTSUPP;
433}
434#endif
435
436#endif /* __FSL_QE_UDC_H */
diff --git a/drivers/usb/gadget/gadget_chips.h b/drivers/usb/gadget/gadget_chips.h
index 17d9905101b7..4e3107dd2f34 100644
--- a/drivers/usb/gadget/gadget_chips.h
+++ b/drivers/usb/gadget/gadget_chips.h
@@ -151,6 +151,13 @@
151#define gadget_is_m66592(g) 0 151#define gadget_is_m66592(g) 0
152#endif 152#endif
153 153
154/* Freescale CPM/QE UDC SUPPORT */
155#ifdef CONFIG_USB_GADGET_FSL_QE
156#define gadget_is_fsl_qe(g) !strcmp("fsl_qe_udc", (g)->name)
157#else
158#define gadget_is_fsl_qe(g) 0
159#endif
160
154 161
155// CONFIG_USB_GADGET_SX2 162// CONFIG_USB_GADGET_SX2
156// CONFIG_USB_GADGET_AU1X00 163// CONFIG_USB_GADGET_AU1X00
@@ -216,6 +223,8 @@ static inline int usb_gadget_controller_number(struct usb_gadget *gadget)
216 return 0x20; 223 return 0x20;
217 else if (gadget_is_m66592(gadget)) 224 else if (gadget_is_m66592(gadget))
218 return 0x21; 225 return 0x21;
226 else if (gadget_is_fsl_qe(gadget))
227 return 0x22;
219 return -ENOENT; 228 return -ENOENT;
220} 229}
221 230
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-19 00:06:49 -0500