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authorDivy Le Ray <divy@chelsio.com>2007-05-30 13:01:39 -0400
committerJeff Garzik <jeff@garzik.org>2007-06-20 19:16:58 -0400
commitc706bfb52afc9b5d115f61a8e1c0c30540feb3f4 (patch)
tree22650d8837c7037e43f8e2a53a8821a94bac2949
parent890de332834a95450a74e5f615f4f9a0fa564623 (diff)
cxgb3 - Fix direct XAUI support
Check all lanes for link status on direct XAUI cards. Don't assume that direct XAUI always uses XGMAC 1. Signed-off-by: Divy Le Ray <divy@chelsio.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
-rw-r--r--drivers/net/cxgb3/ael1002.c10
-rw-r--r--drivers/net/cxgb3/regs.h2
2 files changed, 10 insertions, 2 deletions
diff --git a/drivers/net/cxgb3/ael1002.c b/drivers/net/cxgb3/ael1002.c
index 73a41e6a5bfc..ee140e63ddc5 100644
--- a/drivers/net/cxgb3/ael1002.c
+++ b/drivers/net/cxgb3/ael1002.c
@@ -219,7 +219,13 @@ static int xaui_direct_get_link_status(struct cphy *phy, int *link_ok,
219 unsigned int status; 219 unsigned int status;
220 220
221 status = t3_read_reg(phy->adapter, 221 status = t3_read_reg(phy->adapter,
222 XGM_REG(A_XGM_SERDES_STAT0, phy->addr)); 222 XGM_REG(A_XGM_SERDES_STAT0, phy->addr)) |
223 t3_read_reg(phy->adapter,
224 XGM_REG(A_XGM_SERDES_STAT1, phy->addr)) |
225 t3_read_reg(phy->adapter,
226 XGM_REG(A_XGM_SERDES_STAT2, phy->addr)) |
227 t3_read_reg(phy->adapter,
228 XGM_REG(A_XGM_SERDES_STAT3, phy->addr));
223 *link_ok = !(status & F_LOWSIG0); 229 *link_ok = !(status & F_LOWSIG0);
224 } 230 }
225 if (speed) 231 if (speed)
@@ -247,5 +253,5 @@ static struct cphy_ops xaui_direct_ops = {
247void t3_xaui_direct_phy_prep(struct cphy *phy, struct adapter *adapter, 253void t3_xaui_direct_phy_prep(struct cphy *phy, struct adapter *adapter,
248 int phy_addr, const struct mdio_ops *mdio_ops) 254 int phy_addr, const struct mdio_ops *mdio_ops)
249{ 255{
250 cphy_init(phy, adapter, 1, &xaui_direct_ops, mdio_ops); 256 cphy_init(phy, adapter, phy_addr, &xaui_direct_ops, mdio_ops);
251} 257}
diff --git a/drivers/net/cxgb3/regs.h b/drivers/net/cxgb3/regs.h
index e5a553410e24..bf9d6be7f214 100644
--- a/drivers/net/cxgb3/regs.h
+++ b/drivers/net/cxgb3/regs.h
@@ -2128,6 +2128,8 @@
2128#define F_RESETPLL01 V_RESETPLL01(1U) 2128#define F_RESETPLL01 V_RESETPLL01(1U)
2129 2129
2130#define A_XGM_SERDES_STAT0 0x8f0 2130#define A_XGM_SERDES_STAT0 0x8f0
2131#define A_XGM_SERDES_STAT1 0x8f4
2132#define A_XGM_SERDES_STAT2 0x8f8
2131 2133
2132#define S_LOWSIG0 0 2134#define S_LOWSIG0 0
2133#define V_LOWSIG0(x) ((x) << S_LOWSIG0) 2135#define V_LOWSIG0(x) ((x) << S_LOWSIG0)