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authorMauro Carvalho Chehab <mchehab@redhat.com>2009-03-03 04:14:34 -0500
committerMauro Carvalho Chehab <mchehab@redhat.com>2009-04-06 20:44:01 -0400
commit84b5dbf39ed2f51224841bbbf08439158d69d427 (patch)
treeb24963462dc1ad93860645d8729d1ddfc6ce526e
parente0d3bafd02586cfde286c320f56906fd9fa8d256 (diff)
V4L/DVB (10955): cx231xx: CodingStyle automatic fixes with Lindent
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat
-rw-r--r--drivers/media/video/cx231xx/cx231xx-audio.c255
-rw-r--r--drivers/media/video/cx231xx/cx231xx-avcore.c4383
-rw-r--r--drivers/media/video/cx231xx/cx231xx-cards.c976
-rw-r--r--drivers/media/video/cx231xx/cx231xx-conf-reg.h132
-rw-r--r--drivers/media/video/cx231xx/cx231xx-core.c1126
-rw-r--r--drivers/media/video/cx231xx/cx231xx-dvb.c264
-rw-r--r--drivers/media/video/cx231xx/cx231xx-i2c.c567
-rw-r--r--drivers/media/video/cx231xx/cx231xx-input.c24
-rw-r--r--drivers/media/video/cx231xx/cx231xx-reg.h59
-rw-r--r--drivers/media/video/cx231xx/cx231xx-vbi.c555
-rw-r--r--drivers/media/video/cx231xx/cx231xx-vbi.h26
-rw-r--r--drivers/media/video/cx231xx/cx231xx-video.c1820
-rw-r--r--drivers/media/video/cx231xx/cx231xx.h522
13 files changed, 5809 insertions, 4900 deletions
diff --git a/drivers/media/video/cx231xx/cx231xx-audio.c b/drivers/media/video/cx231xx/cx231xx-audio.c
index e4335e2a4103..cee64879c4f0 100644
--- a/drivers/media/video/cx231xx/cx231xx-audio.c
+++ b/drivers/media/video/cx231xx/cx231xx-audio.c
@@ -58,21 +58,20 @@ static int cx231xx_isoc_audio_deinit(struct cx231xx *dev)
58 58
59 dprintk("Stopping isoc\n"); 59 dprintk("Stopping isoc\n");
60 60
61
62 for (i = 0; i < CX231XX_AUDIO_BUFS; i++) { 61 for (i = 0; i < CX231XX_AUDIO_BUFS; i++) {
63 if(dev->adev.urb[i]) { 62 if (dev->adev.urb[i]) {
64 if (!irqs_disabled()) 63 if (!irqs_disabled())
65 usb_kill_urb(dev->adev.urb[i]); 64 usb_kill_urb(dev->adev.urb[i]);
66 else 65 else
67 usb_unlink_urb(dev->adev.urb[i]); 66 usb_unlink_urb(dev->adev.urb[i]);
68 67
69 usb_free_urb(dev->adev.urb[i]); 68 usb_free_urb(dev->adev.urb[i]);
70 dev->adev.urb[i] = NULL; 69 dev->adev.urb[i] = NULL;
71 70
72 kfree(dev->adev.transfer_buffer[i]); 71 kfree(dev->adev.transfer_buffer[i]);
73 dev->adev.transfer_buffer[i] = NULL; 72 dev->adev.transfer_buffer[i] = NULL;
74 73
75 } 74 }
76 } 75 }
77 76
78 return 0; 77 return 0;
@@ -80,27 +79,27 @@ static int cx231xx_isoc_audio_deinit(struct cx231xx *dev)
80 79
81static void cx231xx_audio_isocirq(struct urb *urb) 80static void cx231xx_audio_isocirq(struct urb *urb)
82{ 81{
83 struct cx231xx *dev = urb->context; 82 struct cx231xx *dev = urb->context;
84 int i; 83 int i;
85 unsigned int oldptr; 84 unsigned int oldptr;
86 int period_elapsed = 0; 85 int period_elapsed = 0;
87 int status; 86 int status;
88 unsigned char *cp; 87 unsigned char *cp;
89 unsigned int stride; 88 unsigned int stride;
90 struct snd_pcm_substream *substream; 89 struct snd_pcm_substream *substream;
91 struct snd_pcm_runtime *runtime; 90 struct snd_pcm_runtime *runtime;
92 91
93 switch (urb->status) { 92 switch (urb->status) {
94 case 0: /* success */ 93 case 0: /* success */
95 case -ETIMEDOUT: /* NAK */ 94 case -ETIMEDOUT: /* NAK */
96 break; 95 break;
97 case -ECONNRESET: /* kill */ 96 case -ECONNRESET: /* kill */
98 case -ENOENT: 97 case -ENOENT:
99 case -ESHUTDOWN: 98 case -ESHUTDOWN:
100 return; 99 return;
101 default: /* error */ 100 default: /* error */
102 dprintk("urb completition error %d.\n", urb->status); 101 dprintk("urb completition error %d.\n", urb->status);
103 break; 102 break;
104 } 103 }
105 104
106 if (dev->adev.capture_pcm_substream) { 105 if (dev->adev.capture_pcm_substream) {
@@ -145,7 +144,6 @@ static void cx231xx_audio_isocirq(struct urb *urb)
145 runtime->period_size; 144 runtime->period_size;
146 period_elapsed = 1; 145 period_elapsed = 1;
147 } 146 }
148
149 snd_pcm_stream_unlock(substream); 147 snd_pcm_stream_unlock(substream);
150 } 148 }
151 if (period_elapsed) 149 if (period_elapsed)
@@ -156,19 +154,19 @@ static void cx231xx_audio_isocirq(struct urb *urb)
156 status = usb_submit_urb(urb, GFP_ATOMIC); 154 status = usb_submit_urb(urb, GFP_ATOMIC);
157 if (status < 0) { 155 if (status < 0) {
158 cx231xx_errdev("resubmit of audio urb failed (error=%i)\n", 156 cx231xx_errdev("resubmit of audio urb failed (error=%i)\n",
159 status); 157 status);
160 } 158 }
161 return; 159 return;
162} 160}
163 161
164static int cx231xx_init_audio_isoc(struct cx231xx *dev) 162static int cx231xx_init_audio_isoc(struct cx231xx *dev)
165{ 163{
166 int i, errCode; 164 int i, errCode;
167 int sb_size; 165 int sb_size;
168 166
169 cx231xx_info("%s: Starting AUDIO transfers\n",__func__); 167 cx231xx_info("%s: Starting AUDIO transfers\n", __func__);
170 168
171 sb_size = CX231XX_NUM_AUDIO_PACKETS * dev->adev.max_pkt_size; 169 sb_size = CX231XX_NUM_AUDIO_PACKETS * dev->adev.max_pkt_size;
172 170
173 for (i = 0; i < CX231XX_AUDIO_BUFS; i++) { 171 for (i = 0; i < CX231XX_AUDIO_BUFS; i++) {
174 struct urb *urb; 172 struct urb *urb;
@@ -191,7 +189,8 @@ static int cx231xx_init_audio_isoc(struct cx231xx *dev)
191 189
192 urb->dev = dev->udev; 190 urb->dev = dev->udev;
193 urb->context = dev; 191 urb->context = dev;
194 urb->pipe = usb_rcvisocpipe(dev->udev, dev->adev.end_point_addr); 192 urb->pipe =
193 usb_rcvisocpipe(dev->udev, dev->adev.end_point_addr);
195 urb->transfer_flags = URB_ISO_ASAP; 194 urb->transfer_flags = URB_ISO_ASAP;
196 urb->transfer_buffer = dev->adev.transfer_buffer[i]; 195 urb->transfer_buffer = dev->adev.transfer_buffer[i];
197 urb->interval = 1; 196 urb->interval = 1;
@@ -200,10 +199,9 @@ static int cx231xx_init_audio_isoc(struct cx231xx *dev)
200 urb->transfer_buffer_length = sb_size; 199 urb->transfer_buffer_length = sb_size;
201 200
202 for (j = k = 0; j < CX231XX_NUM_AUDIO_PACKETS; 201 for (j = k = 0; j < CX231XX_NUM_AUDIO_PACKETS;
203 j++, k += dev->adev.max_pkt_size) { 202 j++, k += dev->adev.max_pkt_size) {
204 urb->iso_frame_desc[j].offset = k; 203 urb->iso_frame_desc[j].offset = k;
205 urb->iso_frame_desc[j].length = 204 urb->iso_frame_desc[j].length = dev->adev.max_pkt_size;
206 dev->adev.max_pkt_size;
207 } 205 }
208 dev->adev.urb[i] = urb; 206 dev->adev.urb[i] = urb;
209 } 207 }
@@ -221,11 +219,11 @@ static int cx231xx_init_audio_isoc(struct cx231xx *dev)
221 219
222static int cx231xx_cmd(struct cx231xx *dev, int cmd, int arg) 220static int cx231xx_cmd(struct cx231xx *dev, int cmd, int arg)
223{ 221{
224 dprintk("%s transfer\n", (dev->adev.capture_stream == STREAM_ON)? 222 dprintk("%s transfer\n", (dev->adev.capture_stream == STREAM_ON) ?
225 "stop" : "start"); 223 "stop" : "start");
226 224
227 switch (cmd) { 225 switch (cmd) {
228 case CX231XX_CAPTURE_STREAM_EN: 226 case CX231XX_CAPTURE_STREAM_EN:
229 if (dev->adev.capture_stream == STREAM_OFF && arg == 1) { 227 if (dev->adev.capture_stream == STREAM_OFF && arg == 1) {
230 dev->adev.capture_stream = STREAM_ON; 228 dev->adev.capture_stream = STREAM_ON;
231 cx231xx_init_audio_isoc(dev); 229 cx231xx_init_audio_isoc(dev);
@@ -233,8 +231,8 @@ static int cx231xx_cmd(struct cx231xx *dev, int cmd, int arg)
233 dev->adev.capture_stream = STREAM_OFF; 231 dev->adev.capture_stream = STREAM_OFF;
234 cx231xx_isoc_audio_deinit(dev); 232 cx231xx_isoc_audio_deinit(dev);
235 } else { 233 } else {
236 cx231xx_errdev( "An underrun very likely occurred. " 234 cx231xx_errdev("An underrun very likely occurred. "
237 "Ignoring it.\n"); 235 "Ignoring it.\n");
238 } 236 }
239 return 0; 237 return 0;
240 default: 238 default:
@@ -265,9 +263,8 @@ static int snd_pcm_alloc_vmalloc_buffer(struct snd_pcm_substream *subs,
265 263
266static struct snd_pcm_hardware snd_cx231xx_hw_capture = { 264static struct snd_pcm_hardware snd_cx231xx_hw_capture = {
267 .info = SNDRV_PCM_INFO_BLOCK_TRANSFER | 265 .info = SNDRV_PCM_INFO_BLOCK_TRANSFER |
268 SNDRV_PCM_INFO_MMAP | 266 SNDRV_PCM_INFO_MMAP |
269 SNDRV_PCM_INFO_INTERLEAVED | 267 SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_MMAP_VALID,
270 SNDRV_PCM_INFO_MMAP_VALID,
271 268
272 .formats = SNDRV_PCM_FMTBIT_S16_LE, 269 .formats = SNDRV_PCM_FMTBIT_S16_LE,
273 270
@@ -278,10 +275,10 @@ static struct snd_pcm_hardware snd_cx231xx_hw_capture = {
278 .channels_min = 2, 275 .channels_min = 2,
279 .channels_max = 2, 276 .channels_max = 2,
280 .buffer_bytes_max = 62720 * 8, /* just about the value in usbaudio.c */ 277 .buffer_bytes_max = 62720 * 8, /* just about the value in usbaudio.c */
281 .period_bytes_min = 64, /* 12544/2, */ 278 .period_bytes_min = 64, /* 12544/2, */
282 .period_bytes_max = 12544, 279 .period_bytes_max = 12544,
283 .periods_min = 2, 280 .periods_min = 2,
284 .periods_max = 98, /* 12544, */ 281 .periods_max = 98, /* 12544, */
285}; 282};
286 283
287static int snd_cx231xx_capture_open(struct snd_pcm_substream *substream) 284static int snd_cx231xx_capture_open(struct snd_pcm_substream *substream)
@@ -294,29 +291,29 @@ static int snd_cx231xx_capture_open(struct snd_pcm_substream *substream)
294 291
295 if (!dev) { 292 if (!dev) {
296 cx231xx_errdev("BUG: cx231xx can't find device struct." 293 cx231xx_errdev("BUG: cx231xx can't find device struct."
297 " Can't proceed with open\n"); 294 " Can't proceed with open\n");
298 return -ENODEV; 295 return -ENODEV;
299 } 296 }
300 297
301 /* Sets volume, mute, etc */ 298 /* Sets volume, mute, etc */
302 dev->mute = 0; 299 dev->mute = 0;
303 300
304 /* set alternate setting for audio interface */ 301 /* set alternate setting for audio interface */
305 ret = cx231xx_set_alt_setting(dev, INDEX_AUDIO, 1); /* 1 - 48000 samples per sec */ 302 ret = cx231xx_set_alt_setting(dev, INDEX_AUDIO, 1); /* 1 - 48000 samples per sec */
306 if (ret < 0) { 303 if (ret < 0) {
307 cx231xx_errdev("failed to set alternate setting !\n"); 304 cx231xx_errdev("failed to set alternate setting !\n");
308 305
309 return ret; 306 return ret;
310 } 307 }
311 308
312 /* inform hardware to start streaming */ 309 /* inform hardware to start streaming */
313 ret = cx231xx_capture_start(dev, 1, Audio); 310 ret = cx231xx_capture_start(dev, 1, Audio);
314 311
315 runtime->hw = snd_cx231xx_hw_capture; 312 runtime->hw = snd_cx231xx_hw_capture;
316 313
317 mutex_lock(&dev->lock); 314 mutex_lock(&dev->lock);
318 dev->adev.users++; 315 dev->adev.users++;
319 mutex_unlock(&dev->lock); 316 mutex_unlock(&dev->lock);
320 317
321 snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS); 318 snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
322 dev->adev.capture_pcm_substream = substream; 319 dev->adev.capture_pcm_substream = substream;
@@ -327,26 +324,25 @@ static int snd_cx231xx_capture_open(struct snd_pcm_substream *substream)
327 324
328static int snd_cx231xx_pcm_close(struct snd_pcm_substream *substream) 325static int snd_cx231xx_pcm_close(struct snd_pcm_substream *substream)
329{ 326{
330 int ret; 327 int ret;
331 struct cx231xx *dev = snd_pcm_substream_chip(substream); 328 struct cx231xx *dev = snd_pcm_substream_chip(substream);
332 329
333
334 dprintk("closing device\n"); 330 dprintk("closing device\n");
335 331
336 /* set alternate setting for audio interface */ 332 /* set alternate setting for audio interface */
337 ret = cx231xx_set_alt_setting(dev, INDEX_AUDIO, 0); /* 1 - 48000 samples per sec */ 333 ret = cx231xx_set_alt_setting(dev, INDEX_AUDIO, 0); /* 1 - 48000 samples per sec */
338 if (ret < 0) { 334 if (ret < 0) {
339 cx231xx_errdev("failed to set alternate setting !\n"); 335 cx231xx_errdev("failed to set alternate setting !\n");
340 336
341 return ret; 337 return ret;
342 } 338 }
343 339
344 /* inform hardware to start streaming */ 340 /* inform hardware to start streaming */
345 ret = cx231xx_capture_start(dev, 0, Audio); 341 ret = cx231xx_capture_start(dev, 0, Audio);
346 342
347 dev->mute = 1; 343 dev->mute = 1;
348 mutex_lock(&dev->lock); 344 mutex_lock(&dev->lock);
349 dev->adev.users--; 345 dev->adev.users--;
350 mutex_unlock(&dev->lock); 346 mutex_unlock(&dev->lock);
351 347
352 if (dev->adev.users == 0 && dev->adev.shutdown == 1) { 348 if (dev->adev.users == 0 && dev->adev.shutdown == 1) {
@@ -360,7 +356,7 @@ static int snd_cx231xx_pcm_close(struct snd_pcm_substream *substream)
360} 356}
361 357
362static int snd_cx231xx_hw_capture_params(struct snd_pcm_substream *substream, 358static int snd_cx231xx_hw_capture_params(struct snd_pcm_substream *substream,
363 struct snd_pcm_hw_params *hw_params) 359 struct snd_pcm_hw_params *hw_params)
364{ 360{
365 unsigned int channels, rate, format; 361 unsigned int channels, rate, format;
366 int ret; 362 int ret;
@@ -368,7 +364,7 @@ static int snd_cx231xx_hw_capture_params(struct snd_pcm_substream *substream,
368 dprintk("Setting capture parameters\n"); 364 dprintk("Setting capture parameters\n");
369 365
370 ret = snd_pcm_alloc_vmalloc_buffer(substream, 366 ret = snd_pcm_alloc_vmalloc_buffer(substream,
371 params_buffer_bytes(hw_params)); 367 params_buffer_bytes(hw_params));
372 format = params_format(hw_params); 368 format = params_format(hw_params);
373 rate = params_rate(hw_params); 369 rate = params_rate(hw_params);
374 channels = params_channels(hw_params); 370 channels = params_channels(hw_params);
@@ -397,45 +393,45 @@ static int snd_cx231xx_prepare(struct snd_pcm_substream *substream)
397} 393}
398 394
399static int snd_cx231xx_capture_trigger(struct snd_pcm_substream *substream, 395static int snd_cx231xx_capture_trigger(struct snd_pcm_substream *substream,
400 int cmd) 396 int cmd)
401{ 397{
402 struct cx231xx *dev = snd_pcm_substream_chip(substream); 398 struct cx231xx *dev = snd_pcm_substream_chip(substream);
403 int retval; 399 int retval;
404 400
401 dprintk("Should %s capture\n", (cmd == SNDRV_PCM_TRIGGER_START) ?
402 "start" : "stop");
405 403
406 dprintk("Should %s capture\n", (cmd == SNDRV_PCM_TRIGGER_START)? 404 spin_lock(&dev->adev.slock);
407 "start": "stop");
408
409 spin_lock(&dev->adev.slock);
410 switch (cmd) { 405 switch (cmd) {
411 case SNDRV_PCM_TRIGGER_START: 406 case SNDRV_PCM_TRIGGER_START:
412 cx231xx_cmd(dev, CX231XX_CAPTURE_STREAM_EN, CX231XX_START_AUDIO); 407 cx231xx_cmd(dev, CX231XX_CAPTURE_STREAM_EN,
408 CX231XX_START_AUDIO);
413 retval = 0; 409 retval = 0;
414 break; 410 break;
415 case SNDRV_PCM_TRIGGER_STOP: 411 case SNDRV_PCM_TRIGGER_STOP:
416 cx231xx_cmd(dev, CX231XX_CAPTURE_STREAM_EN, CX231XX_STOP_AUDIO); 412 cx231xx_cmd(dev, CX231XX_CAPTURE_STREAM_EN, CX231XX_STOP_AUDIO);
417 retval = 0; 413 retval = 0;
418 break; 414 break;
419 default: 415 default:
420 retval = -EINVAL; 416 retval = -EINVAL;
421 } 417 }
422 418
423 spin_unlock(&dev->adev.slock); 419 spin_unlock(&dev->adev.slock);
424 return retval; 420 return retval;
425} 421}
426 422
427static snd_pcm_uframes_t snd_cx231xx_capture_pointer(struct snd_pcm_substream 423static snd_pcm_uframes_t snd_cx231xx_capture_pointer(struct snd_pcm_substream
428 *substream) 424 *substream)
429{ 425{
430 struct cx231xx *dev; 426 struct cx231xx *dev;
431 unsigned long flags; 427 unsigned long flags;
432 snd_pcm_uframes_t hwptr_done; 428 snd_pcm_uframes_t hwptr_done;
433 429
434 dev = snd_pcm_substream_chip(substream); 430 dev = snd_pcm_substream_chip(substream);
435 431
436 spin_lock_irqsave(&dev->adev.slock, flags); 432 spin_lock_irqsave(&dev->adev.slock, flags);
437 hwptr_done = dev->adev.hwptr_done_capture; 433 hwptr_done = dev->adev.hwptr_done_capture;
438 spin_unlock_irqrestore(&dev->adev.slock, flags); 434 spin_unlock_irqrestore(&dev->adev.slock, flags);
439 435
440 return hwptr_done; 436 return hwptr_done;
441} 437}
@@ -449,26 +445,26 @@ static struct page *snd_pcm_get_vmalloc_page(struct snd_pcm_substream *subs,
449} 445}
450 446
451static struct snd_pcm_ops snd_cx231xx_pcm_capture = { 447static struct snd_pcm_ops snd_cx231xx_pcm_capture = {
452 .open = snd_cx231xx_capture_open, 448 .open = snd_cx231xx_capture_open,
453 .close = snd_cx231xx_pcm_close, 449 .close = snd_cx231xx_pcm_close,
454 .ioctl = snd_pcm_lib_ioctl, 450 .ioctl = snd_pcm_lib_ioctl,
455 .hw_params = snd_cx231xx_hw_capture_params, 451 .hw_params = snd_cx231xx_hw_capture_params,
456 .hw_free = snd_cx231xx_hw_capture_free, 452 .hw_free = snd_cx231xx_hw_capture_free,
457 .prepare = snd_cx231xx_prepare, 453 .prepare = snd_cx231xx_prepare,
458 .trigger = snd_cx231xx_capture_trigger, 454 .trigger = snd_cx231xx_capture_trigger,
459 .pointer = snd_cx231xx_capture_pointer, 455 .pointer = snd_cx231xx_capture_pointer,
460 .page = snd_pcm_get_vmalloc_page, 456 .page = snd_pcm_get_vmalloc_page,
461}; 457};
462 458
463static int cx231xx_audio_init(struct cx231xx *dev) 459static int cx231xx_audio_init(struct cx231xx *dev)
464{ 460{
465 struct cx231xx_audio *adev = &dev->adev; 461 struct cx231xx_audio *adev = &dev->adev;
466 struct snd_pcm *pcm; 462 struct snd_pcm *pcm;
467 struct snd_card *card; 463 struct snd_card *card;
468 static int devnr; 464 static int devnr;
469 int err; 465 int err;
470 struct usb_interface *uif; 466 struct usb_interface *uif;
471 int i, isoc_pipe = 0; 467 int i, isoc_pipe = 0;
472 468
473 if (dev->has_alsa_audio != 1) { 469 if (dev->has_alsa_audio != 1) {
474 /* This device does not support the extension (in this case 470 /* This device does not support the extension (in this case
@@ -478,7 +474,7 @@ static int cx231xx_audio_init(struct cx231xx *dev)
478 } 474 }
479 475
480 cx231xx_info("cx231xx-audio.c: probing for cx231xx " 476 cx231xx_info("cx231xx-audio.c: probing for cx231xx "
481 "non standard usbaudio\n"); 477 "non standard usbaudio\n");
482 478
483 card = snd_card_new(index[devnr], "Cx231xx Audio", THIS_MODULE, 0); 479 card = snd_card_new(index[devnr], "Cx231xx Audio", THIS_MODULE, 0);
484 if (card == NULL) { 480 if (card == NULL) {
@@ -492,7 +488,8 @@ static int cx231xx_audio_init(struct cx231xx *dev)
492 return err; 488 return err;
493 } 489 }
494 490
495 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_cx231xx_pcm_capture); 491 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
492 &snd_cx231xx_pcm_capture);
496 pcm->info_flags = 0; 493 pcm->info_flags = 0;
497 pcm->private_data = dev; 494 pcm->private_data = dev;
498 strcpy(pcm->name, "Conexant cx231xx Capture"); 495 strcpy(pcm->name, "Conexant cx231xx Capture");
@@ -508,29 +505,35 @@ static int cx231xx_audio_init(struct cx231xx *dev)
508 adev->sndcard = card; 505 adev->sndcard = card;
509 adev->udev = dev->udev; 506 adev->udev = dev->udev;
510 507
511 /* compute alternate max packet sizes for Audio */ 508 /* compute alternate max packet sizes for Audio */
512 uif = dev->udev->actconfig->interface[dev->current_pcb_config.hs_config_info[0].interface_info.audio_index+1]; 509 uif =
510 dev->udev->actconfig->interface[dev->current_pcb_config.
511 hs_config_info[0].interface_info.
512 audio_index + 1];
513 513
514 adev->end_point_addr = le16_to_cpu(uif->altsetting[0].endpoint[isoc_pipe].desc.bEndpointAddress); 514 adev->end_point_addr =
515 le16_to_cpu(uif->altsetting[0].endpoint[isoc_pipe].desc.
516 bEndpointAddress);
515 517
516 adev->num_alt = uif->num_altsetting; 518 adev->num_alt = uif->num_altsetting;
517 cx231xx_info(": EndPoint Addr 0x%x, Alternate settings: %i\n", adev->end_point_addr, 519 cx231xx_info(": EndPoint Addr 0x%x, Alternate settings: %i\n",
518 adev->num_alt); 520 adev->end_point_addr, adev->num_alt);
519 adev->alt_max_pkt_size = kmalloc(32 * adev->num_alt, GFP_KERNEL); 521 adev->alt_max_pkt_size = kmalloc(32 * adev->num_alt, GFP_KERNEL);
520 522
521 if (adev->alt_max_pkt_size == NULL) { 523 if (adev->alt_max_pkt_size == NULL) {
522 cx231xx_errdev("out of memory!\n"); 524 cx231xx_errdev("out of memory!\n");
523 return -ENOMEM; 525 return -ENOMEM;
524 } 526 }
525 527
526 for (i = 0; i < adev->num_alt ; i++) { 528 for (i = 0; i < adev->num_alt; i++) {
527 u16 tmp = le16_to_cpu(uif->altsetting[i].endpoint[isoc_pipe].desc. 529 u16 tmp =
528 wMaxPacketSize); 530 le16_to_cpu(uif->altsetting[i].endpoint[isoc_pipe].desc.
529 adev->alt_max_pkt_size[i] = 531 wMaxPacketSize);
530 (tmp & 0x07ff) * (((tmp & 0x1800) >> 11) + 1); 532 adev->alt_max_pkt_size[i] =
531 cx231xx_info("Alternate setting %i, max size= %i\n", i, 533 (tmp & 0x07ff) * (((tmp & 0x1800) >> 11) + 1);
532 adev->alt_max_pkt_size[i]); 534 cx231xx_info("Alternate setting %i, max size= %i\n", i,
533 } 535 adev->alt_max_pkt_size[i]);
536 }
534 537
535 return 0; 538 return 0;
536} 539}
@@ -549,7 +552,7 @@ static int cx231xx_audio_fini(struct cx231xx *dev)
549 552
550 if (dev->adev.sndcard) { 553 if (dev->adev.sndcard) {
551 snd_card_free(dev->adev.sndcard); 554 snd_card_free(dev->adev.sndcard);
552 kfree(dev->adev.alt_max_pkt_size); 555 kfree(dev->adev.alt_max_pkt_size);
553 dev->adev.sndcard = NULL; 556 dev->adev.sndcard = NULL;
554 } 557 }
555 558
@@ -557,7 +560,7 @@ static int cx231xx_audio_fini(struct cx231xx *dev)
557} 560}
558 561
559static struct cx231xx_ops audio_ops = { 562static struct cx231xx_ops audio_ops = {
560 .id = CX231XX_AUDIO, 563 .id = CX231XX_AUDIO,
561 .name = "Cx231xx Audio Extension", 564 .name = "Cx231xx Audio Extension",
562 .init = cx231xx_audio_init, 565 .init = cx231xx_audio_init,
563 .fini = cx231xx_audio_fini, 566 .fini = cx231xx_audio_fini,
diff --git a/drivers/media/video/cx231xx/cx231xx-avcore.c b/drivers/media/video/cx231xx/cx231xx-avcore.c
index b5597337966f..3c09b9473843 100644
--- a/drivers/media/video/cx231xx/cx231xx-avcore.c
+++ b/drivers/media/video/cx231xx/cx231xx-avcore.c
@@ -38,115 +38,180 @@
38 38
39#include "cx231xx.h" 39#include "cx231xx.h"
40 40
41
42/************************************************************************************* 41/*************************************************************************************
43 * C O L I B R I - B L O C K C O N T R O L functions * 42 * C O L I B R I - B L O C K C O N T R O L functions *
44 *************************************************************************************/ 43 *************************************************************************************/
45int cx231xx_colibri_init_super_block(struct cx231xx *dev, u32 ref_count) 44int cx231xx_colibri_init_super_block(struct cx231xx *dev, u32 ref_count)
46{ 45{
47 int status = 0; 46 int status = 0;
48 u8 temp = 0; 47 u8 temp = 0;
49 u32 colibri_power_status = 0; 48 u32 colibri_power_status = 0;
50 int i = 0; 49 int i = 0;
51 50
52 /* super block initialize */ 51 /* super block initialize */
53 temp = (u8)(ref_count & 0xff); 52 temp = (u8) (ref_count & 0xff);
54 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, SUP_BLK_TUNE2, 2, temp, 1); 53 status =
55 54 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, SUP_BLK_TUNE2,
56 status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS, SUP_BLK_TUNE2, 2, &colibri_power_status, 1); 55 2, temp, 1);
57 56
58 temp = (u8)((ref_count & 0x300) >> 8); 57 status =
59 temp |= 0x40; 58 cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS, SUP_BLK_TUNE2, 2,
60 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, SUP_BLK_TUNE1, 2, temp, 1); 59 &colibri_power_status, 1);
61 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, SUP_BLK_PLL2, 2, 0x0f, 1); 60
62 61 temp = (u8) ((ref_count & 0x300) >> 8);
63 /* enable pll */ 62 temp |= 0x40;
64 while(colibri_power_status != 0x18) 63 status =
65 { 64 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, SUP_BLK_TUNE1,
66 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, SUP_BLK_PWRDN, 2, 0x18, 1); 65 2, temp, 1);
67 status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS, SUP_BLK_PWRDN, 2, &colibri_power_status, 1); 66 status =
68 colibri_power_status &= 0xff; 67 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, SUP_BLK_PLL2, 2,
69 if(status < 0) { 68 0x0f, 1);
70 cx231xx_info(": Init Super Block failed in sending/receiving cmds\n"); 69
71 break; 70 /* enable pll */
72 } 71 while (colibri_power_status != 0x18) {
73 i++; 72 status =
74 if( i == 10) { 73 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
75 cx231xx_info(": Init Super Block force break in loop !!!!\n"); 74 SUP_BLK_PWRDN, 2, 0x18, 1);
76 status = -1; 75 status =
77 break; 76 cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
78 } 77 SUP_BLK_PWRDN, 2,
79 } 78 &colibri_power_status, 1);
80 79 colibri_power_status &= 0xff;
81 if(status < 0 ) 80 if (status < 0) {
82 return status; 81 cx231xx_info
83 82 (": Init Super Block failed in sending/receiving cmds\n");
84 /* start tuning filter */ 83 break;
85 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, SUP_BLK_TUNE3, 2, 0x40, 1); 84 }
86 msleep(5); 85 i++;
87 86 if (i == 10) {
88 /* exit tuning */ 87 cx231xx_info
89 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, SUP_BLK_TUNE3, 2, 0x00, 1); 88 (": Init Super Block force break in loop !!!!\n");
90 89 status = -1;
91 return status; 90 break;
91 }
92 }
93
94 if (status < 0)
95 return status;
96
97 /* start tuning filter */
98 status =
99 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, SUP_BLK_TUNE3,
100 2, 0x40, 1);
101 msleep(5);
102
103 /* exit tuning */
104 status =
105 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, SUP_BLK_TUNE3,
106 2, 0x00, 1);
107
108 return status;
92} 109}
93 110
94int cx231xx_colibri_init_channels(struct cx231xx *dev) 111int cx231xx_colibri_init_channels(struct cx231xx *dev)
95{ 112{
96 int status = 0; 113 int status = 0;
97 114
98 /* power up all 3 channels, clear pd_buffer */ 115 /* power up all 3 channels, clear pd_buffer */
99 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_PWRDN_CLAMP_CH1, 2, 0x00, 1); 116 status =
100 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_PWRDN_CLAMP_CH2, 2, 0x00, 1); 117 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
101 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_PWRDN_CLAMP_CH3, 2, 0x00, 1); 118 ADC_PWRDN_CLAMP_CH1, 2, 0x00, 1);
102 119 status =
103 /* Enable quantizer calibration */ 120 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
104 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_COM_QUANT, 2, 0x02, 1); 121 ADC_PWRDN_CLAMP_CH2, 2, 0x00, 1);
105 122 status =
106 /* channel initialize, force modulator (fb) reset */ 123 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
107 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_FB_FRCRST_CH1, 2, 0x17, 1); 124 ADC_PWRDN_CLAMP_CH3, 2, 0x00, 1);
108 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_FB_FRCRST_CH2, 2, 0x17, 1); 125
109 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_FB_FRCRST_CH3, 2, 0x17, 1); 126 /* Enable quantizer calibration */
110 127 status =
111 /* start quantilizer calibration */ 128 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_COM_QUANT,
112 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_CAL_ATEST_CH1, 2, 0x10, 1); 129 2, 0x02, 1);
113 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_CAL_ATEST_CH2, 2, 0x10, 1); 130
114 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_CAL_ATEST_CH3, 2, 0x10, 1); 131 /* channel initialize, force modulator (fb) reset */
115 msleep(5); 132 status =
116 133 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
117 /* exit modulator (fb) reset */ 134 ADC_FB_FRCRST_CH1, 2, 0x17, 1);
118 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_FB_FRCRST_CH1, 2, 0x07, 1); 135 status =
119 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_FB_FRCRST_CH2, 2, 0x07, 1); 136 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
120 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_FB_FRCRST_CH3, 2, 0x07, 1); 137 ADC_FB_FRCRST_CH2, 2, 0x17, 1);
121 138 status =
122 /* enable the pre_clamp in each channel for single-ended input */ 139 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
123 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_NTF_PRECLMP_EN_CH1, 2, 0xf0, 1); 140 ADC_FB_FRCRST_CH3, 2, 0x17, 1);
124 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_NTF_PRECLMP_EN_CH2, 2, 0xf0, 1); 141
125 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_NTF_PRECLMP_EN_CH3, 2, 0xf0, 1); 142 /* start quantilizer calibration */
126 143 status =
127 /* use diode instead of resistor, so set term_en to 0, res_en to 0 */ 144 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
128 status = cx231xx_reg_mask_write(dev, Colibri_DEVICE_ADDRESS, 8, ADC_QGAIN_RES_TRM_CH1, 3, 7, 0x00); 145 ADC_CAL_ATEST_CH1, 2, 0x10, 1);
129 status = cx231xx_reg_mask_write(dev, Colibri_DEVICE_ADDRESS, 8, ADC_QGAIN_RES_TRM_CH2, 3, 7, 0x00); 146 status =
130 status = cx231xx_reg_mask_write(dev, Colibri_DEVICE_ADDRESS, 8, ADC_QGAIN_RES_TRM_CH3, 3, 7, 0x00); 147 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
131 148 ADC_CAL_ATEST_CH2, 2, 0x10, 1);
132 /* dynamic element matching off */ 149 status =
133 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_DCSERVO_DEM_CH1, 2, 0x03, 1); 150 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
134 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_DCSERVO_DEM_CH2, 2, 0x03, 1); 151 ADC_CAL_ATEST_CH3, 2, 0x10, 1);
135 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_DCSERVO_DEM_CH3, 2, 0x03, 1); 152 msleep(5);
136 153
137 return status; 154 /* exit modulator (fb) reset */
155 status =
156 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
157 ADC_FB_FRCRST_CH1, 2, 0x07, 1);
158 status =
159 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
160 ADC_FB_FRCRST_CH2, 2, 0x07, 1);
161 status =
162 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
163 ADC_FB_FRCRST_CH3, 2, 0x07, 1);
164
165 /* enable the pre_clamp in each channel for single-ended input */
166 status =
167 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
168 ADC_NTF_PRECLMP_EN_CH1, 2, 0xf0, 1);
169 status =
170 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
171 ADC_NTF_PRECLMP_EN_CH2, 2, 0xf0, 1);
172 status =
173 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
174 ADC_NTF_PRECLMP_EN_CH3, 2, 0xf0, 1);
175
176 /* use diode instead of resistor, so set term_en to 0, res_en to 0 */
177 status =
178 cx231xx_reg_mask_write(dev, Colibri_DEVICE_ADDRESS, 8,
179 ADC_QGAIN_RES_TRM_CH1, 3, 7, 0x00);
180 status =
181 cx231xx_reg_mask_write(dev, Colibri_DEVICE_ADDRESS, 8,
182 ADC_QGAIN_RES_TRM_CH2, 3, 7, 0x00);
183 status =
184 cx231xx_reg_mask_write(dev, Colibri_DEVICE_ADDRESS, 8,
185 ADC_QGAIN_RES_TRM_CH3, 3, 7, 0x00);
186
187 /* dynamic element matching off */
188 status =
189 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
190 ADC_DCSERVO_DEM_CH1, 2, 0x03, 1);
191 status =
192 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
193 ADC_DCSERVO_DEM_CH2, 2, 0x03, 1);
194 status =
195 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
196 ADC_DCSERVO_DEM_CH3, 2, 0x03, 1);
197
198 return status;
138} 199}
139 200
140int cx231xx_colibri_setup_AFE_for_baseband(struct cx231xx *dev) 201int cx231xx_colibri_setup_AFE_for_baseband(struct cx231xx *dev)
141{ 202{
142 u32 c_value = 0; 203 u32 c_value = 0;
143 int status = 0; 204 int status = 0;
144 205
145 status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_PWRDN_CLAMP_CH2, 2, &c_value, 1); 206 status =
146 c_value &= (~(0x50)); 207 cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
147 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_PWRDN_CLAMP_CH2, 2, c_value, 1); 208 ADC_PWRDN_CLAMP_CH2, 2, &c_value, 1);
209 c_value &= (~(0x50));
210 status =
211 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
212 ADC_PWRDN_CLAMP_CH2, 2, c_value, 1);
148 213
149 return status; 214 return status;
150} 215}
151 216
152/* 217/*
@@ -157,559 +222,802 @@ int cx231xx_colibri_setup_AFE_for_baseband(struct cx231xx *dev)
157*/ 222*/
158int cx231xx_colibri_set_input_mux(struct cx231xx *dev, u32 input_mux) 223int cx231xx_colibri_set_input_mux(struct cx231xx *dev, u32 input_mux)
159{ 224{
160 u8 ch1_setting = (u8)input_mux; 225 u8 ch1_setting = (u8) input_mux;
161 u8 ch2_setting = (u8)(input_mux >> 8); 226 u8 ch2_setting = (u8) (input_mux >> 8);
162 u8 ch3_setting = (u8)(input_mux >> 16); 227 u8 ch3_setting = (u8) (input_mux >> 16);
163 int status = 0; 228 int status = 0;
164 u32 value = 0; 229 u32 value = 0;
165 230
166 if(ch1_setting != 0) 231 if (ch1_setting != 0) {
167 { 232 status =
168 status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_INPUT_CH1, 2, &value, 1); 233 cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
169 value &= (!INPUT_SEL_MASK); 234 ADC_INPUT_CH1, 2, &value, 1);
170 value |= (ch1_setting-1)<<4; 235 value &= (!INPUT_SEL_MASK);
171 value &= 0xff; 236 value |= (ch1_setting - 1) << 4;
172 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_INPUT_CH1, 2, value, 1); 237 value &= 0xff;
173 } 238 status =
174 239 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
175 if(ch2_setting != 0) 240 ADC_INPUT_CH1, 2, value, 1);
176 { 241 }
177 status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_INPUT_CH2, 2, &value, 1); 242
178 value &= (!INPUT_SEL_MASK); 243 if (ch2_setting != 0) {
179 value |= (ch2_setting-1)<<4; 244 status =
180 value &= 0xff; 245 cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
181 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_INPUT_CH2, 2, value, 1); 246 ADC_INPUT_CH2, 2, &value, 1);
182 } 247 value &= (!INPUT_SEL_MASK);
183 248 value |= (ch2_setting - 1) << 4;
184 /* For ch3_setting, the value to put in the register is 7 less than the input number */ 249 value &= 0xff;
185 if(ch3_setting != 0) 250 status =
186 { 251 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
187 status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_INPUT_CH3, 2, &value, 1); 252 ADC_INPUT_CH2, 2, value, 1);
188 value &= (!INPUT_SEL_MASK); 253 }
189 value |= (ch3_setting-1)<<4; 254
190 value &= 0xff; 255 /* For ch3_setting, the value to put in the register is 7 less than the input number */
191 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_INPUT_CH3, 2, value, 1); 256 if (ch3_setting != 0) {
192 } 257 status =
193 258 cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
194 return status; 259 ADC_INPUT_CH3, 2, &value, 1);
260 value &= (!INPUT_SEL_MASK);
261 value |= (ch3_setting - 1) << 4;
262 value &= 0xff;
263 status =
264 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
265 ADC_INPUT_CH3, 2, value, 1);
266 }
267
268 return status;
195} 269}
196 270
197int cx231xx_colibri_set_mode(struct cx231xx *dev, enum AFE_MODE mode) 271int cx231xx_colibri_set_mode(struct cx231xx *dev, enum AFE_MODE mode)
198{ 272{
199 int status = 0; 273 int status = 0;
200 274
201 switch(mode) { 275 switch (mode) {
202 case AFE_MODE_LOW_IF: 276 case AFE_MODE_LOW_IF:
203 /* SetupAFEforLowIF(); */ 277 /* SetupAFEforLowIF(); */
204 break; 278 break;
205 case AFE_MODE_BASEBAND: 279 case AFE_MODE_BASEBAND:
206 status = cx231xx_colibri_setup_AFE_for_baseband(dev); 280 status = cx231xx_colibri_setup_AFE_for_baseband(dev);
207 break; 281 break;
208 case AFE_MODE_EU_HI_IF: 282 case AFE_MODE_EU_HI_IF:
209 /* SetupAFEforEuHiIF(); */ 283 /* SetupAFEforEuHiIF(); */
210 break; 284 break;
211 case AFE_MODE_US_HI_IF: 285 case AFE_MODE_US_HI_IF:
212 /* SetupAFEforUsHiIF(); */ 286 /* SetupAFEforUsHiIF(); */
213 break; 287 break;
214 case AFE_MODE_JAPAN_HI_IF: 288 case AFE_MODE_JAPAN_HI_IF:
215 /* SetupAFEforJapanHiIF(); */ 289 /* SetupAFEforJapanHiIF(); */
216 break; 290 break;
217 } 291 }
218 292
219 if((mode != dev->colibri_mode) && (dev->video_input == CX231XX_VMUX_TELEVISION)) { 293 if ((mode != dev->colibri_mode)
220 status = cx231xx_colibri_adjust_ref_count(dev, CX231XX_VMUX_TELEVISION); 294 && (dev->video_input == CX231XX_VMUX_TELEVISION)) {
221 } 295 status =
222 296 cx231xx_colibri_adjust_ref_count(dev,
223 dev->colibri_mode = mode; 297 CX231XX_VMUX_TELEVISION);
224 298 }
225 return status; 299
300 dev->colibri_mode = mode;
301
302 return status;
226} 303}
227 304
228/* For power saving in the EVK */ 305/* For power saving in the EVK */
229int cx231xx_colibri_update_power_control(struct cx231xx *dev, AV_MODE avmode) 306int cx231xx_colibri_update_power_control(struct cx231xx *dev, AV_MODE avmode)
230{ 307{
231 u32 colibri_power_status = 0; 308 u32 colibri_power_status = 0;
232 int status = 0; 309 int status = 0;
233 310
234 switch (dev->model) { 311 switch (dev->model) {
235 case CX231XX_BOARD_CNXT_RDE_250: 312 case CX231XX_BOARD_CNXT_RDE_250:
236 case CX231XX_BOARD_CNXT_RDU_250: 313 case CX231XX_BOARD_CNXT_RDU_250:
237 314
238 if(avmode==POLARIS_AVMODE_ANALOGT_TV) 315 if (avmode == POLARIS_AVMODE_ANALOGT_TV) {
239 { 316 while (colibri_power_status != 0x18) {
240 while(colibri_power_status != 0x18) { 317 status =
241 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, 318 cx231xx_write_i2c_data(dev,
242 SUP_BLK_PWRDN, 2, 0x18, 1); 319 Colibri_DEVICE_ADDRESS,
243 status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS, 320 SUP_BLK_PWRDN, 2,
244 SUP_BLK_PWRDN, 2, &colibri_power_status, 1); 321 0x18, 1);
245 if(status < 0 ) 322 status =
246 break; 323 cx231xx_read_i2c_data(dev,
247 } 324 Colibri_DEVICE_ADDRESS,
248 325 SUP_BLK_PWRDN, 2,
249 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, 326 &colibri_power_status,
250 ADC_PWRDN_CLAMP_CH1, 2, 0x00, 1); 327 1);
251 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, 328 if (status < 0)
252 ADC_PWRDN_CLAMP_CH2, 2, 0x00, 1); 329 break;
253 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, 330 }
254 ADC_PWRDN_CLAMP_CH3, 2, 0x00, 1); 331
255 } 332 status =
256 else if(avmode==POLARIS_AVMODE_DIGITAL) { 333 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
257 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, 334 ADC_PWRDN_CLAMP_CH1, 2, 0x00,
258 ADC_PWRDN_CLAMP_CH1, 2, 0x70, 1); 335 1);
259 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, 336 status =
260 ADC_PWRDN_CLAMP_CH2, 2, 0x70, 1); 337 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
261 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, 338 ADC_PWRDN_CLAMP_CH2, 2, 0x00,
262 ADC_PWRDN_CLAMP_CH3, 2, 0x70, 1); 339 1);
263 340 status =
264 status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS, 341 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
265 SUP_BLK_PWRDN, 2, &colibri_power_status, 1); 342 ADC_PWRDN_CLAMP_CH3, 2, 0x00,
266 colibri_power_status |=0x07; 343 1);
267 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, 344 } else if (avmode == POLARIS_AVMODE_DIGITAL) {
268 SUP_BLK_PWRDN, 2, colibri_power_status, 1); 345 status =
269 } 346 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
270 else if(avmode==POLARIS_AVMODE_ENXTERNAL_AV) { 347 ADC_PWRDN_CLAMP_CH1, 2, 0x70,
271 348 1);
272 while(colibri_power_status != 0x18) { 349 status =
273 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, 350 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
274 SUP_BLK_PWRDN, 2, 0x18, 1); 351 ADC_PWRDN_CLAMP_CH2, 2, 0x70,
275 status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS, 352 1);
276 SUP_BLK_PWRDN, 2, &colibri_power_status, 1); 353 status =
277 if(status < 0 ) 354 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
278 break; 355 ADC_PWRDN_CLAMP_CH3, 2, 0x70,
279 } 356 1);
280 357
281 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, 358 status =
282 ADC_PWRDN_CLAMP_CH1, 2, 0x00, 1); 359 cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
283 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, 360 SUP_BLK_PWRDN, 2,
284 ADC_PWRDN_CLAMP_CH2, 2, 0x00, 1); 361 &colibri_power_status, 1);
285 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, 362 colibri_power_status |= 0x07;
286 ADC_PWRDN_CLAMP_CH3, 2, 0x00, 1); 363 status =
287 } 364 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
288 else { 365 SUP_BLK_PWRDN, 2,
289 cx231xx_info("Invalid AV mode input\n"); 366 colibri_power_status, 1);
290 status = -1; 367 } else if (avmode == POLARIS_AVMODE_ENXTERNAL_AV) {
291 } 368
292 break; 369 while (colibri_power_status != 0x18) {
293 default: 370 status =
294 if(avmode==POLARIS_AVMODE_ANALOGT_TV) 371 cx231xx_write_i2c_data(dev,
295 { 372 Colibri_DEVICE_ADDRESS,
296 while(colibri_power_status != 0x18) { 373 SUP_BLK_PWRDN, 2,
297 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, 374 0x18, 1);
298 SUP_BLK_PWRDN, 2, 0x18, 1); 375 status =
299 status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS, 376 cx231xx_read_i2c_data(dev,
300 SUP_BLK_PWRDN, 2, &colibri_power_status, 1); 377 Colibri_DEVICE_ADDRESS,
301 if(status < 0 ) 378 SUP_BLK_PWRDN, 2,
302 break; 379 &colibri_power_status,
303 } 380 1);
304 381 if (status < 0)
305 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, 382 break;
306 ADC_PWRDN_CLAMP_CH1, 2, 0x40, 1); 383 }
307 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, 384
308 ADC_PWRDN_CLAMP_CH2, 2, 0x40, 1); 385 status =
309 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, 386 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
310 ADC_PWRDN_CLAMP_CH3, 2, 0x00, 1); 387 ADC_PWRDN_CLAMP_CH1, 2, 0x00,
311 } 388 1);
312 else if(avmode==POLARIS_AVMODE_DIGITAL) { 389 status =
313 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, 390 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
314 ADC_PWRDN_CLAMP_CH1, 2, 0x70, 1); 391 ADC_PWRDN_CLAMP_CH2, 2, 0x00,
315 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, 392 1);
316 ADC_PWRDN_CLAMP_CH2, 2, 0x70, 1); 393 status =
317 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, 394 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
318 ADC_PWRDN_CLAMP_CH3, 2, 0x70, 1); 395 ADC_PWRDN_CLAMP_CH3, 2, 0x00,
319 396 1);
320 status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS, 397 } else {
321 SUP_BLK_PWRDN, 2, &colibri_power_status, 1); 398 cx231xx_info("Invalid AV mode input\n");
322 colibri_power_status |=0x07; 399 status = -1;
323 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, 400 }
324 SUP_BLK_PWRDN, 2, colibri_power_status, 1); 401 break;
325 } 402 default:
326 else if(avmode==POLARIS_AVMODE_ENXTERNAL_AV) { 403 if (avmode == POLARIS_AVMODE_ANALOGT_TV) {
327 while(colibri_power_status != 0x18) { 404 while (colibri_power_status != 0x18) {
328 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, 405 status =
329 SUP_BLK_PWRDN, 2, 0x18, 1); 406 cx231xx_write_i2c_data(dev,
330 status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS, 407 Colibri_DEVICE_ADDRESS,
331 SUP_BLK_PWRDN, 2, &colibri_power_status, 1); 408 SUP_BLK_PWRDN, 2,
332 if(status < 0 ) 409 0x18, 1);
333 break; 410 status =
334 } 411 cx231xx_read_i2c_data(dev,
335 412 Colibri_DEVICE_ADDRESS,
336 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, 413 SUP_BLK_PWRDN, 2,
337 ADC_PWRDN_CLAMP_CH1, 2, 0x00, 1); 414 &colibri_power_status,
338 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, 415 1);
339 ADC_PWRDN_CLAMP_CH2, 2, 0x00, 1); 416 if (status < 0)
340 status = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, 417 break;
341 ADC_PWRDN_CLAMP_CH3, 2, 0x40, 1); 418 }
342 } 419
343 else { 420 status =
344 cx231xx_info("Invalid AV mode input\n"); 421 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
345 status = -1; 422 ADC_PWRDN_CLAMP_CH1, 2, 0x40,
346 } 423 1);
347 } /* switch */ 424 status =
348 425 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
349 return status; 426 ADC_PWRDN_CLAMP_CH2, 2, 0x40,
427 1);
428 status =
429 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
430 ADC_PWRDN_CLAMP_CH3, 2, 0x00,
431 1);
432 } else if (avmode == POLARIS_AVMODE_DIGITAL) {
433 status =
434 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
435 ADC_PWRDN_CLAMP_CH1, 2, 0x70,
436 1);
437 status =
438 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
439 ADC_PWRDN_CLAMP_CH2, 2, 0x70,
440 1);
441 status =
442 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
443 ADC_PWRDN_CLAMP_CH3, 2, 0x70,
444 1);
445
446 status =
447 cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
448 SUP_BLK_PWRDN, 2,
449 &colibri_power_status, 1);
450 colibri_power_status |= 0x07;
451 status =
452 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
453 SUP_BLK_PWRDN, 2,
454 colibri_power_status, 1);
455 } else if (avmode == POLARIS_AVMODE_ENXTERNAL_AV) {
456 while (colibri_power_status != 0x18) {
457 status =
458 cx231xx_write_i2c_data(dev,
459 Colibri_DEVICE_ADDRESS,
460 SUP_BLK_PWRDN, 2,
461 0x18, 1);
462 status =
463 cx231xx_read_i2c_data(dev,
464 Colibri_DEVICE_ADDRESS,
465 SUP_BLK_PWRDN, 2,
466 &colibri_power_status,
467 1);
468 if (status < 0)
469 break;
470 }
471
472 status =
473 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
474 ADC_PWRDN_CLAMP_CH1, 2, 0x00,
475 1);
476 status =
477 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
478 ADC_PWRDN_CLAMP_CH2, 2, 0x00,
479 1);
480 status =
481 cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS,
482 ADC_PWRDN_CLAMP_CH3, 2, 0x40,
483 1);
484 } else {
485 cx231xx_info("Invalid AV mode input\n");
486 status = -1;
487 }
488 } /* switch */
489
490 return status;
350} 491}
351 492
352int cx231xx_colibri_adjust_ref_count(struct cx231xx *dev, u32 video_input) 493int cx231xx_colibri_adjust_ref_count(struct cx231xx *dev, u32 video_input)
353{ 494{
354 u32 input_mode = 0; 495 u32 input_mode = 0;
355 u32 ntf_mode = 0; 496 u32 ntf_mode = 0;
356 int status = 0; 497 int status = 0;
357 498
358 dev->video_input = video_input; 499 dev->video_input = video_input;
359 500
360 if(video_input == CX231XX_VMUX_TELEVISION) { 501 if (video_input == CX231XX_VMUX_TELEVISION) {
361 status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_INPUT_CH3, 2, &input_mode, 1); 502 status =
362 status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS, 503 cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
363 ADC_NTF_PRECLMP_EN_CH3, 2, &ntf_mode, 1); 504 ADC_INPUT_CH3, 2, &input_mode, 1);
364 } 505 status =
365 else { 506 cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
366 status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS, ADC_INPUT_CH1, 2, &input_mode, 1); 507 ADC_NTF_PRECLMP_EN_CH3, 2, &ntf_mode,
367 status = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS, 508 1);
368 ADC_NTF_PRECLMP_EN_CH1, 2, &ntf_mode, 1); 509 } else {
369 } 510 status =
370 511 cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
371 input_mode = (ntf_mode & 0x3) | ((input_mode & 0x6) << 1); 512 ADC_INPUT_CH1, 2, &input_mode, 1);
372 513 status =
373 switch(input_mode) 514 cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
374 { 515 ADC_NTF_PRECLMP_EN_CH1, 2, &ntf_mode,
375 case SINGLE_ENDED: 516 1);
376 dev->colibri_ref_count = 0x23C; 517 }
377 break;
378 case LOW_IF:
379 dev->colibri_ref_count = 0x24C;
380 break;
381 case EU_IF:
382 dev->colibri_ref_count = 0x258;
383 break;
384 case US_IF:
385 dev->colibri_ref_count = 0x260;
386 break;
387 default:
388 break;
389 }
390
391 status = cx231xx_colibri_init_super_block(dev, dev->colibri_ref_count);
392
393 return status;
394}
395 518
519 input_mode = (ntf_mode & 0x3) | ((input_mode & 0x6) << 1);
520
521 switch (input_mode) {
522 case SINGLE_ENDED:
523 dev->colibri_ref_count = 0x23C;
524 break;
525 case LOW_IF:
526 dev->colibri_ref_count = 0x24C;
527 break;
528 case EU_IF:
529 dev->colibri_ref_count = 0x258;
530 break;
531 case US_IF:
532 dev->colibri_ref_count = 0x260;
533 break;
534 default:
535 break;
536 }
537
538 status = cx231xx_colibri_init_super_block(dev, dev->colibri_ref_count);
396 539
540 return status;
541}
397 542
398/************************************************************************************* 543/*************************************************************************************
399 * V I D E O / A U D I O D E C O D E R C O N T R O L functions * 544 * V I D E O / A U D I O D E C O D E R C O N T R O L functions *
400 *************************************************************************************/ 545 *************************************************************************************/
401int cx231xx_set_video_input_mux(struct cx231xx *dev, u8 input) 546int cx231xx_set_video_input_mux(struct cx231xx *dev, u8 input)
402{ 547{
403 int status = 0; 548 int status = 0;
404 549
405 switch(INPUT(input)->type) { 550 switch (INPUT(input)->type) {
406 case CX231XX_VMUX_COMPOSITE1: 551 case CX231XX_VMUX_COMPOSITE1:
407 case CX231XX_VMUX_SVIDEO: 552 case CX231XX_VMUX_SVIDEO:
408 if((dev->current_pcb_config.type == USB_BUS_POWER) && 553 if ((dev->current_pcb_config.type == USB_BUS_POWER) &&
409 (dev->power_mode != POLARIS_AVMODE_ENXTERNAL_AV)) { 554 (dev->power_mode != POLARIS_AVMODE_ENXTERNAL_AV)) {
410 status = cx231xx_set_power_mode(dev, POLARIS_AVMODE_ENXTERNAL_AV); /* External AV */ 555 status = cx231xx_set_power_mode(dev, POLARIS_AVMODE_ENXTERNAL_AV); /* External AV */
411 if (status < 0) { 556 if (status < 0) {
412 cx231xx_errdev("%s: cx231xx_set_power_mode : Failed to set Power - errCode [%d]!\n", 557 cx231xx_errdev
413 __func__, status); 558 ("%s: cx231xx_set_power_mode : Failed to set Power - errCode [%d]!\n",
414 return status; 559 __func__, status);
415 } 560 return status;
416 } 561 }
417 status = cx231xx_set_decoder_video_input(dev, INPUT(input)->type, INPUT(input)->vmux); 562 }
418 break; 563 status =
419 case CX231XX_VMUX_TELEVISION: 564 cx231xx_set_decoder_video_input(dev, INPUT(input)->type,
420 case CX231XX_VMUX_CABLE: 565 INPUT(input)->vmux);
421 if((dev->current_pcb_config.type == USB_BUS_POWER) && 566 break;
422 (dev->power_mode != POLARIS_AVMODE_ANALOGT_TV)) { 567 case CX231XX_VMUX_TELEVISION:
423 status = cx231xx_set_power_mode(dev, POLARIS_AVMODE_ANALOGT_TV); /* Tuner */ 568 case CX231XX_VMUX_CABLE:
424 if (status < 0) { 569 if ((dev->current_pcb_config.type == USB_BUS_POWER) &&
425 cx231xx_errdev("%s: cx231xx_set_power_mode : Failed to set Power - errCode [%d]!\n", 570 (dev->power_mode != POLARIS_AVMODE_ANALOGT_TV)) {
426 __func__, status); 571 status = cx231xx_set_power_mode(dev, POLARIS_AVMODE_ANALOGT_TV); /* Tuner */
427 return status; 572 if (status < 0) {
428 } 573 cx231xx_errdev
429 } 574 ("%s: cx231xx_set_power_mode : Failed to set Power - errCode [%d]!\n",
430 status = cx231xx_set_decoder_video_input(dev, CX231XX_VMUX_COMPOSITE1, INPUT(input)->vmux); 575 __func__, status);
431 break; 576 return status;
432 default: 577 }
433 cx231xx_errdev("%s: cx231xx_set_power_mode : Unknown Input %d !\n", 578 }
434 __func__, INPUT(input)->type); 579 status =
435 break; 580 cx231xx_set_decoder_video_input(dev,
436 } 581 CX231XX_VMUX_COMPOSITE1,
437 582 INPUT(input)->vmux);
438 /* save the selection */ 583 break;
439 dev->video_input = input; 584 default:
440 585 cx231xx_errdev
441 return status; 586 ("%s: cx231xx_set_power_mode : Unknown Input %d !\n",
587 __func__, INPUT(input)->type);
588 break;
589 }
590
591 /* save the selection */
592 dev->video_input = input;
593
594 return status;
442} 595}
443 596
444int cx231xx_set_decoder_video_input(struct cx231xx *dev, u8 pin_type, u8 input) 597int cx231xx_set_decoder_video_input(struct cx231xx *dev, u8 pin_type, u8 input)
445{ 598{
446 int status = 0; 599 int status = 0;
447 u32 value = 0; 600 u32 value = 0;
448 601
449 if(pin_type != dev->video_input) { 602 if (pin_type != dev->video_input) {
450 status = cx231xx_colibri_adjust_ref_count(dev, pin_type); 603 status = cx231xx_colibri_adjust_ref_count(dev, pin_type);
451 if(status < 0 ) { 604 if (status < 0) {
452 cx231xx_errdev("%s: cx231xx_colibri_adjust_ref_count :Failed to set Colibri input mux - errCode [%d]!\n", 605 cx231xx_errdev
453 __func__, status); 606 ("%s: cx231xx_colibri_adjust_ref_count :Failed to set Colibri input mux - errCode [%d]!\n",
454 return status; 607 __func__, status);
455 } 608 return status;
456 } 609 }
457 610 }
458 /* call colibri block to set video inputs */
459 status = cx231xx_colibri_set_input_mux(dev, input);
460 if(status < 0 ) {
461 cx231xx_errdev("%s: cx231xx_colibri_set_input_mux :Failed to set Colibri input mux - errCode [%d]!\n",
462 __func__, status);
463 return status;
464 }
465
466 switch(pin_type) {
467 case CX231XX_VMUX_COMPOSITE1:
468 {
469 status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, AFE_CTRL, 2, &value, 4);
470 value |= (0<<13)|(1<<4);
471 value &= ~(1<<5);
472
473 value &= (~(0x1FF8000)); /* set [24:23] [22:15] to 0 */
474 value |= 0x1000000; /* set FUNC_MODE[24:23] = 2 IF_MOD[22:15] = 0 */
475 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, AFE_CTRL, 2, value, 4);
476
477 status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, OUT_CTRL1, 2, &value, 4);
478 value |= (1<<7);
479 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, OUT_CTRL1, 2, value, 4);
480
481 /* Set vip 1.1 output mode */
482 status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS,
483 OUT_CTRL1, FLD_OUT_MODE, OUT_MODE_VIP11);
484
485 /* Tell DIF object to go to baseband mode */
486 status = cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND);
487 if (status < 0) {
488 cx231xx_errdev("%s: cx231xx_dif set to By pass mode - errCode [%d]!\n",
489 __func__, status);
490 return status;
491 }
492
493 /* Read the DFE_CTRL1 register */
494 status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DFE_CTRL1, 2, &value, 4);
495
496 /* enable the VBI_GATE_EN */
497 value |= FLD_VBI_GATE_EN;
498
499 /* Enable the auto-VGA enable */
500 value |= FLD_VGA_AUTO_EN;
501
502 /* Write it back */
503 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DFE_CTRL1, 2, value, 4);
504
505 /* Disable auto config of registers */
506 status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS,
507 MODE_CTRL, FLD_ACFG_DIS, cx231xx_set_field(FLD_ACFG_DIS, 1));
508
509 /* Set CVBS input mode */
510 status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS,
511 MODE_CTRL, FLD_INPUT_MODE,
512 cx231xx_set_field(FLD_INPUT_MODE, INPUT_MODE_CVBS_0));
513 }
514 break;
515 case CX231XX_VMUX_SVIDEO:
516 {
517 /* Disable the use of DIF */
518
519 status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, AFE_CTRL, 2, &value, 4);
520
521 value &= (~(0x1FF8000)); /* set [24:23] [22:15] to 0 */
522 value |= 0x1000010; /* set FUNC_MODE[24:23] = 2
523 IF_MOD[22:15] = 0 DCR_BYP_CH2[4:4] = 1; */
524 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, AFE_CTRL, 2, value, 4);
525
526 /* Tell DIF object to go to baseband mode */
527 status = cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND);
528 if (status < 0) {
529 cx231xx_errdev("%s: cx231xx_dif set to By pass mode - errCode [%d]!\n",
530 __func__, status);
531 return status;
532 }
533
534 /* Read the DFE_CTRL1 register */
535 status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DFE_CTRL1, 2, &value, 4);
536
537 /* enable the VBI_GATE_EN */
538 value |= FLD_VBI_GATE_EN;
539
540 /* Enable the auto-VGA enable */
541 value |= FLD_VGA_AUTO_EN;
542
543 /* Write it back */
544 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DFE_CTRL1, 2, value, 4);
545
546 /* Disable auto config of registers */
547 status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS,
548 MODE_CTRL, FLD_ACFG_DIS, cx231xx_set_field(FLD_ACFG_DIS, 1));
549
550 /* Set YC input mode */
551 status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS,
552 MODE_CTRL, FLD_INPUT_MODE,
553 cx231xx_set_field(FLD_INPUT_MODE, INPUT_MODE_YC_1));
554
555 /* Chroma to ADC2 */
556 status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, AFE_CTRL, 2, &value, 4);
557 value |= FLD_CHROMA_IN_SEL; /* set the chroma in select */
558
559 /* Clear VGA_SEL_CH2 and VGA_SEL_CH3 (bits 7 and 8) This sets them to use video
560 rather than audio. Only one of the two will be in use. */
561 value &= ~(FLD_VGA_SEL_CH2 | FLD_VGA_SEL_CH3);
562
563 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, AFE_CTRL, 2, value, 4);
564
565 status = cx231xx_colibri_set_mode(dev, AFE_MODE_BASEBAND);
566 }
567 break;
568 case CX231XX_VMUX_TELEVISION:
569 case CX231XX_VMUX_CABLE:
570 default:
571 {
572 switch(dev->model) {
573 case CX231XX_BOARD_CNXT_RDE_250:
574 case CX231XX_BOARD_CNXT_RDU_250:
575 {
576 /* Disable the use of DIF */
577
578 status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, AFE_CTRL, 2, &value, 4);
579 value |= (0<<13)|(1<<4);
580 value &= ~(1<<5);
581
582 value &= (~(0x1FF8000)); /* set [24:23] [22:15] to 0 */
583 value |= 0x1000000; /* set FUNC_MODE[24:23] = 2 IF_MOD[22:15] = 0 */
584 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, AFE_CTRL, 2, value, 4);
585
586 status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, OUT_CTRL1, 2, &value, 4);
587 value |= (1<<7);
588 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, OUT_CTRL1, 2, value, 4);
589
590 /* Set vip 1.1 output mode */
591 status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS,
592 OUT_CTRL1, FLD_OUT_MODE, OUT_MODE_VIP11);
593
594 /* Tell DIF object to go to baseband mode */
595 status = cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND);
596 if (status < 0) {
597 cx231xx_errdev("%s: cx231xx_dif set to By pass mode - errCode [%d]!\n",
598 __func__, status);
599 return status;
600 }
601
602 /* Read the DFE_CTRL1 register */
603 status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DFE_CTRL1, 2, &value, 4);
604
605 /* enable the VBI_GATE_EN */
606 value |= FLD_VBI_GATE_EN;
607
608 /* Enable the auto-VGA enable */
609 value |= FLD_VGA_AUTO_EN;
610
611 /* Write it back */
612 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DFE_CTRL1, 2, value, 4);
613
614 /* Disable auto config of registers */
615 status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS,
616 MODE_CTRL, FLD_ACFG_DIS, cx231xx_set_field(FLD_ACFG_DIS, 1));
617
618 /* Set CVBS input mode */
619 status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS,
620 MODE_CTRL, FLD_INPUT_MODE,
621 cx231xx_set_field(FLD_INPUT_MODE, INPUT_MODE_CVBS_0));
622 }
623 break;
624 default:
625 {
626 /* Enable the DIF for the tuner */
627
628 /* Reinitialize the DIF */
629 status = cx231xx_dif_set_standard(dev, dev->norm);
630 if (status < 0) {
631 cx231xx_errdev("%s: cx231xx_dif set to By pass mode - errCode [%d]!\n",
632 __func__, status);
633 return status;
634 }
635
636 /* Make sure bypass is cleared */
637 status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_MISC_CTRL, 2, &value, 4);
638
639 /* Clear the bypass bit */
640 value &= ~FLD_DIF_DIF_BYPASS;
641
642 /* Enable the use of the DIF block */
643 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_MISC_CTRL, 2, value, 4);
644
645 /* Read the DFE_CTRL1 register */
646 status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DFE_CTRL1, 2, &value, 4);
647
648 /* Disable the VBI_GATE_EN */
649 value &= ~FLD_VBI_GATE_EN;
650
651 /* Enable the auto-VGA enable, AGC, and set the skip count to 2 */
652 value |= FLD_VGA_AUTO_EN | FLD_AGC_AUTO_EN | 0x00200000;
653
654 /* Write it back */
655 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DFE_CTRL1, 2, value, 4);
656
657 /* Wait 15 ms */
658 msleep(1);
659
660 /* Disable the auto-VGA enable AGC */
661 value &= ~(FLD_VGA_AUTO_EN);
662
663 /* Write it back */
664 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DFE_CTRL1, 2, value, 4);
665
666 /* Enable Polaris B0 AGC output */
667 status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, PIN_CTRL, 2, &value, 4);
668 value |=(FLD_OEF_AGC_RF)|(FLD_OEF_AGC_IFVGA)|(FLD_OEF_AGC_IF);
669 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, PIN_CTRL, 2, value, 4);
670
671 /* Set vip 1.1 output mode */
672 status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS,
673 OUT_CTRL1, FLD_OUT_MODE, OUT_MODE_VIP11);
674
675 /* Disable auto config of registers */
676 status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS,
677 MODE_CTRL, FLD_ACFG_DIS, cx231xx_set_field(FLD_ACFG_DIS, 1));
678
679 /* Set CVBS input mode */
680 status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS,
681 MODE_CTRL, FLD_INPUT_MODE,
682 cx231xx_set_field(FLD_INPUT_MODE, INPUT_MODE_CVBS_0));
683
684 /* Set some bits in AFE_CTRL so that channel 2 or 3 is ready to receive audio */
685 /* Clear clamp for channels 2 and 3 (bit 16-17) */
686 /* Clear droop comp (bit 19-20) */
687 /* Set VGA_SEL (for audio control) (bit 7-8) */
688 status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, AFE_CTRL, 2, &value, 4);
689
690 value |= FLD_VGA_SEL_CH3 | FLD_VGA_SEL_CH2;
691
692 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, AFE_CTRL, 2, value, 4);
693 }
694 break;
695
696 }
697 }
698 break;
699 }
700 611
701 /* Set raw VBI mode */ 612 /* call colibri block to set video inputs */
702 status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS, 613 status = cx231xx_colibri_set_input_mux(dev, input);
703 OUT_CTRL1, FLD_VBIHACTRAW_EN, 614 if (status < 0) {
704 cx231xx_set_field(FLD_VBIHACTRAW_EN, 1)); 615 cx231xx_errdev
705 616 ("%s: cx231xx_colibri_set_input_mux :Failed to set Colibri input mux - errCode [%d]!\n",
706 status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, OUT_CTRL1, 2, &value, 4); 617 __func__, status);
707 if(value & 0x02) { 618 return status;
708 value |=(1<<19); 619 }
709 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, OUT_CTRL1, 2, value, 4); 620
710 } 621 switch (pin_type) {
711 622 case CX231XX_VMUX_COMPOSITE1:
712 return status; 623 {
624 status =
625 cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
626 AFE_CTRL, 2, &value, 4);
627 value |= (0 << 13) | (1 << 4);
628 value &= ~(1 << 5);
629
630 value &= (~(0x1FF8000)); /* set [24:23] [22:15] to 0 */
631 value |= 0x1000000; /* set FUNC_MODE[24:23] = 2 IF_MOD[22:15] = 0 */
632 status =
633 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
634 AFE_CTRL, 2, value, 4);
635
636 status =
637 cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
638 OUT_CTRL1, 2, &value, 4);
639 value |= (1 << 7);
640 status =
641 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
642 OUT_CTRL1, 2, value, 4);
643
644 /* Set vip 1.1 output mode */
645 status =
646 cx231xx_read_modify_write_i2c_dword(dev,
647 HAMMERHEAD_I2C_ADDRESS,
648 OUT_CTRL1,
649 FLD_OUT_MODE,
650 OUT_MODE_VIP11);
651
652 /* Tell DIF object to go to baseband mode */
653 status =
654 cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND);
655 if (status < 0) {
656 cx231xx_errdev
657 ("%s: cx231xx_dif set to By pass mode - errCode [%d]!\n",
658 __func__, status);
659 return status;
660 }
661
662 /* Read the DFE_CTRL1 register */
663 status =
664 cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
665 DFE_CTRL1, 2, &value, 4);
666
667 /* enable the VBI_GATE_EN */
668 value |= FLD_VBI_GATE_EN;
669
670 /* Enable the auto-VGA enable */
671 value |= FLD_VGA_AUTO_EN;
672
673 /* Write it back */
674 status =
675 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
676 DFE_CTRL1, 2, value, 4);
677
678 /* Disable auto config of registers */
679 status =
680 cx231xx_read_modify_write_i2c_dword(dev,
681 HAMMERHEAD_I2C_ADDRESS,
682 MODE_CTRL,
683 FLD_ACFG_DIS,
684 cx231xx_set_field
685 (FLD_ACFG_DIS,
686 1));
687
688 /* Set CVBS input mode */
689 status =
690 cx231xx_read_modify_write_i2c_dword(dev,
691 HAMMERHEAD_I2C_ADDRESS,
692 MODE_CTRL,
693 FLD_INPUT_MODE,
694 cx231xx_set_field
695 (FLD_INPUT_MODE,
696 INPUT_MODE_CVBS_0));
697 }
698 break;
699 case CX231XX_VMUX_SVIDEO:
700 {
701 /* Disable the use of DIF */
702
703 status =
704 cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
705 AFE_CTRL, 2, &value, 4);
706
707 value &= (~(0x1FF8000)); /* set [24:23] [22:15] to 0 */
708 value |= 0x1000010; /* set FUNC_MODE[24:23] = 2
709 IF_MOD[22:15] = 0 DCR_BYP_CH2[4:4] = 1; */
710 status =
711 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
712 AFE_CTRL, 2, value, 4);
713
714 /* Tell DIF object to go to baseband mode */
715 status =
716 cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND);
717 if (status < 0) {
718 cx231xx_errdev
719 ("%s: cx231xx_dif set to By pass mode - errCode [%d]!\n",
720 __func__, status);
721 return status;
722 }
723
724 /* Read the DFE_CTRL1 register */
725 status =
726 cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
727 DFE_CTRL1, 2, &value, 4);
728
729 /* enable the VBI_GATE_EN */
730 value |= FLD_VBI_GATE_EN;
731
732 /* Enable the auto-VGA enable */
733 value |= FLD_VGA_AUTO_EN;
734
735 /* Write it back */
736 status =
737 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
738 DFE_CTRL1, 2, value, 4);
739
740 /* Disable auto config of registers */
741 status =
742 cx231xx_read_modify_write_i2c_dword(dev,
743 HAMMERHEAD_I2C_ADDRESS,
744 MODE_CTRL,
745 FLD_ACFG_DIS,
746 cx231xx_set_field
747 (FLD_ACFG_DIS,
748 1));
749
750 /* Set YC input mode */
751 status =
752 cx231xx_read_modify_write_i2c_dword(dev,
753 HAMMERHEAD_I2C_ADDRESS,
754 MODE_CTRL,
755 FLD_INPUT_MODE,
756 cx231xx_set_field
757 (FLD_INPUT_MODE,
758 INPUT_MODE_YC_1));
759
760 /* Chroma to ADC2 */
761 status =
762 cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
763 AFE_CTRL, 2, &value, 4);
764 value |= FLD_CHROMA_IN_SEL; /* set the chroma in select */
765
766 /* Clear VGA_SEL_CH2 and VGA_SEL_CH3 (bits 7 and 8) This sets them to use video
767 rather than audio. Only one of the two will be in use. */
768 value &= ~(FLD_VGA_SEL_CH2 | FLD_VGA_SEL_CH3);
769
770 status =
771 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
772 AFE_CTRL, 2, value, 4);
773
774 status =
775 cx231xx_colibri_set_mode(dev, AFE_MODE_BASEBAND);
776 }
777 break;
778 case CX231XX_VMUX_TELEVISION:
779 case CX231XX_VMUX_CABLE:
780 default:
781 {
782 switch (dev->model) {
783 case CX231XX_BOARD_CNXT_RDE_250:
784 case CX231XX_BOARD_CNXT_RDU_250:
785 {
786 /* Disable the use of DIF */
787
788 status =
789 cx231xx_read_i2c_data(dev,
790 HAMMERHEAD_I2C_ADDRESS,
791 AFE_CTRL, 2,
792 &value, 4);
793 value |= (0 << 13) | (1 << 4);
794 value &= ~(1 << 5);
795
796 value &= (~(0x1FF8000)); /* set [24:23] [22:15] to 0 */
797 value |= 0x1000000; /* set FUNC_MODE[24:23] = 2 IF_MOD[22:15] = 0 */
798 status =
799 cx231xx_write_i2c_data(dev,
800 HAMMERHEAD_I2C_ADDRESS,
801 AFE_CTRL, 2,
802 value, 4);
803
804 status =
805 cx231xx_read_i2c_data(dev,
806 HAMMERHEAD_I2C_ADDRESS,
807 OUT_CTRL1, 2,
808 &value, 4);
809 value |= (1 << 7);
810 status =
811 cx231xx_write_i2c_data(dev,
812 HAMMERHEAD_I2C_ADDRESS,
813 OUT_CTRL1, 2,
814 value, 4);
815
816 /* Set vip 1.1 output mode */
817 status =
818 cx231xx_read_modify_write_i2c_dword
819 (dev, HAMMERHEAD_I2C_ADDRESS,
820 OUT_CTRL1, FLD_OUT_MODE,
821 OUT_MODE_VIP11);
822
823 /* Tell DIF object to go to baseband mode */
824 status =
825 cx231xx_dif_set_standard(dev,
826 DIF_USE_BASEBAND);
827 if (status < 0) {
828 cx231xx_errdev
829 ("%s: cx231xx_dif set to By pass mode - errCode [%d]!\n",
830 __func__, status);
831 return status;
832 }
833
834 /* Read the DFE_CTRL1 register */
835 status =
836 cx231xx_read_i2c_data(dev,
837 HAMMERHEAD_I2C_ADDRESS,
838 DFE_CTRL1, 2,
839 &value, 4);
840
841 /* enable the VBI_GATE_EN */
842 value |= FLD_VBI_GATE_EN;
843
844 /* Enable the auto-VGA enable */
845 value |= FLD_VGA_AUTO_EN;
846
847 /* Write it back */
848 status =
849 cx231xx_write_i2c_data(dev,
850 HAMMERHEAD_I2C_ADDRESS,
851 DFE_CTRL1, 2,
852 value, 4);
853
854 /* Disable auto config of registers */
855 status =
856 cx231xx_read_modify_write_i2c_dword
857 (dev, HAMMERHEAD_I2C_ADDRESS,
858 MODE_CTRL, FLD_ACFG_DIS,
859 cx231xx_set_field(FLD_ACFG_DIS,
860 1));
861
862 /* Set CVBS input mode */
863 status =
864 cx231xx_read_modify_write_i2c_dword
865 (dev, HAMMERHEAD_I2C_ADDRESS,
866 MODE_CTRL, FLD_INPUT_MODE,
867 cx231xx_set_field(FLD_INPUT_MODE,
868 INPUT_MODE_CVBS_0));
869 }
870 break;
871 default:
872 {
873 /* Enable the DIF for the tuner */
874
875 /* Reinitialize the DIF */
876 status =
877 cx231xx_dif_set_standard(dev,
878 dev->norm);
879 if (status < 0) {
880 cx231xx_errdev
881 ("%s: cx231xx_dif set to By pass mode - errCode [%d]!\n",
882 __func__, status);
883 return status;
884 }
885
886 /* Make sure bypass is cleared */
887 status =
888 cx231xx_read_i2c_data(dev,
889 HAMMERHEAD_I2C_ADDRESS,
890 DIF_MISC_CTRL,
891 2, &value, 4);
892
893 /* Clear the bypass bit */
894 value &= ~FLD_DIF_DIF_BYPASS;
895
896 /* Enable the use of the DIF block */
897 status =
898 cx231xx_write_i2c_data(dev,
899 HAMMERHEAD_I2C_ADDRESS,
900 DIF_MISC_CTRL,
901 2, value, 4);
902
903 /* Read the DFE_CTRL1 register */
904 status =
905 cx231xx_read_i2c_data(dev,
906 HAMMERHEAD_I2C_ADDRESS,
907 DFE_CTRL1, 2,
908 &value, 4);
909
910 /* Disable the VBI_GATE_EN */
911 value &= ~FLD_VBI_GATE_EN;
912
913 /* Enable the auto-VGA enable, AGC, and set the skip count to 2 */
914 value |=
915 FLD_VGA_AUTO_EN | FLD_AGC_AUTO_EN |
916 0x00200000;
917
918 /* Write it back */
919 status =
920 cx231xx_write_i2c_data(dev,
921 HAMMERHEAD_I2C_ADDRESS,
922 DFE_CTRL1, 2,
923 value, 4);
924
925 /* Wait 15 ms */
926 msleep(1);
927
928 /* Disable the auto-VGA enable AGC */
929 value &= ~(FLD_VGA_AUTO_EN);
930
931 /* Write it back */
932 status =
933 cx231xx_write_i2c_data(dev,
934 HAMMERHEAD_I2C_ADDRESS,
935 DFE_CTRL1, 2,
936 value, 4);
937
938 /* Enable Polaris B0 AGC output */
939 status =
940 cx231xx_read_i2c_data(dev,
941 HAMMERHEAD_I2C_ADDRESS,
942 PIN_CTRL, 2,
943 &value, 4);
944 value |=
945 (FLD_OEF_AGC_RF) |
946 (FLD_OEF_AGC_IFVGA) |
947 (FLD_OEF_AGC_IF);
948 status =
949 cx231xx_write_i2c_data(dev,
950 HAMMERHEAD_I2C_ADDRESS,
951 PIN_CTRL, 2,
952 value, 4);
953
954 /* Set vip 1.1 output mode */
955 status =
956 cx231xx_read_modify_write_i2c_dword
957 (dev, HAMMERHEAD_I2C_ADDRESS,
958 OUT_CTRL1, FLD_OUT_MODE,
959 OUT_MODE_VIP11);
960
961 /* Disable auto config of registers */
962 status =
963 cx231xx_read_modify_write_i2c_dword
964 (dev, HAMMERHEAD_I2C_ADDRESS,
965 MODE_CTRL, FLD_ACFG_DIS,
966 cx231xx_set_field(FLD_ACFG_DIS,
967 1));
968
969 /* Set CVBS input mode */
970 status =
971 cx231xx_read_modify_write_i2c_dword
972 (dev, HAMMERHEAD_I2C_ADDRESS,
973 MODE_CTRL, FLD_INPUT_MODE,
974 cx231xx_set_field(FLD_INPUT_MODE,
975 INPUT_MODE_CVBS_0));
976
977 /* Set some bits in AFE_CTRL so that channel 2 or 3 is ready to receive audio */
978 /* Clear clamp for channels 2 and 3 (bit 16-17) */
979 /* Clear droop comp (bit 19-20) */
980 /* Set VGA_SEL (for audio control) (bit 7-8) */
981 status =
982 cx231xx_read_i2c_data(dev,
983 HAMMERHEAD_I2C_ADDRESS,
984 AFE_CTRL, 2,
985 &value, 4);
986
987 value |=
988 FLD_VGA_SEL_CH3 | FLD_VGA_SEL_CH2;
989
990 status =
991 cx231xx_write_i2c_data(dev,
992 HAMMERHEAD_I2C_ADDRESS,
993 AFE_CTRL, 2,
994 value, 4);
995 }
996 break;
997
998 }
999 }
1000 break;
1001 }
1002
1003 /* Set raw VBI mode */
1004 status =
1005 cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS,
1006 OUT_CTRL1, FLD_VBIHACTRAW_EN,
1007 cx231xx_set_field
1008 (FLD_VBIHACTRAW_EN, 1));
1009
1010 status =
1011 cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, OUT_CTRL1, 2,
1012 &value, 4);
1013 if (value & 0x02) {
1014 value |= (1 << 19);
1015 status =
1016 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1017 OUT_CTRL1, 2, value, 4);
1018 }
1019
1020 return status;
713} 1021}
714 1022
715/* 1023/*
@@ -718,207 +1026,310 @@ int cx231xx_set_decoder_video_input(struct cx231xx *dev, u8 pin_type, u8 input)
718 */ 1026 */
719int cx231xx_do_mode_ctrl_overrides(struct cx231xx *dev) 1027int cx231xx_do_mode_ctrl_overrides(struct cx231xx *dev)
720{ 1028{
721 int status = 0; 1029 int status = 0;
722 1030
723 cx231xx_info("do_mode_ctrl_overrides : 0x%x\n", (unsigned int)dev->norm); 1031 cx231xx_info("do_mode_ctrl_overrides : 0x%x\n",
724 1032 (unsigned int)dev->norm);
725 /* Change the DFE_CTRL3 bp_percent to fix flagging */ 1033
726 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DFE_CTRL3, 2, 0xCD3F0280, 4); 1034 /* Change the DFE_CTRL3 bp_percent to fix flagging */
727 1035 status =
728 if( dev->norm & (V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_PAL_M) ) { 1036 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DFE_CTRL3, 2,
729 cx231xx_info("do_mode_ctrl_overrides NTSC\n"); 1037 0xCD3F0280, 4);
730 1038
731 /* Move the close caption lines out of active video, adjust the active video start point */ 1039 if (dev->norm & (V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_PAL_M)) {
732 status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS, 1040 cx231xx_info("do_mode_ctrl_overrides NTSC\n");
733 VERT_TIM_CTRL, FLD_VBLANK_CNT,0x18); 1041
734 status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS, 1042 /* Move the close caption lines out of active video, adjust the active video start point */
735 VERT_TIM_CTRL, FLD_VACTIVE_CNT,0x1E6000); 1043 status =
736 status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS, 1044 cx231xx_read_modify_write_i2c_dword(dev,
737 VERT_TIM_CTRL, FLD_V656BLANK_CNT,0x1E000000); 1045 HAMMERHEAD_I2C_ADDRESS,
738 1046 VERT_TIM_CTRL,
739 status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS, 1047 FLD_VBLANK_CNT, 0x18);
740 HORIZ_TIM_CTRL, FLD_HBLANK_CNT, 1048 status =
741 cx231xx_set_field(FLD_HBLANK_CNT, 0x79)); 1049 cx231xx_read_modify_write_i2c_dword(dev,
742 } else if ( dev->norm & ( V4L2_STD_PAL_B | V4L2_STD_PAL_G | V4L2_STD_PAL_D | 1050 HAMMERHEAD_I2C_ADDRESS,
743 V4L2_STD_PAL_I | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc) ) { 1051 VERT_TIM_CTRL,
744 cx231xx_info("do_mode_ctrl_overrides PAL\n"); 1052 FLD_VACTIVE_CNT,
745 status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS, 1053 0x1E6000);
746 VERT_TIM_CTRL, FLD_VBLANK_CNT,0x24); 1054 status =
747 /* Adjust the active video horizontal start point */ 1055 cx231xx_read_modify_write_i2c_dword(dev,
748 status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS, 1056 HAMMERHEAD_I2C_ADDRESS,
749 HORIZ_TIM_CTRL, FLD_HBLANK_CNT, 1057 VERT_TIM_CTRL,
750 cx231xx_set_field(FLD_HBLANK_CNT, 0x85)); 1058 FLD_V656BLANK_CNT,
751 } else if (dev->norm & ( V4L2_STD_SECAM_B | V4L2_STD_SECAM_D | V4L2_STD_SECAM_G | 1059 0x1E000000);
752 V4L2_STD_SECAM_K | V4L2_STD_SECAM_K1 | V4L2_STD_SECAM_L | 1060
753 V4L2_STD_SECAM_LC) ) { 1061 status =
754 cx231xx_info("do_mode_ctrl_overrides SECAM\n"); 1062 cx231xx_read_modify_write_i2c_dword(dev,
755 status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS, 1063 HAMMERHEAD_I2C_ADDRESS,
756 VERT_TIM_CTRL, FLD_VBLANK_CNT,0x24); 1064 HORIZ_TIM_CTRL,
757 /* Adjust the active video horizontal start point */ 1065 FLD_HBLANK_CNT,
758 status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS, 1066 cx231xx_set_field
759 HORIZ_TIM_CTRL, FLD_HBLANK_CNT, 1067 (FLD_HBLANK_CNT, 0x79));
760 cx231xx_set_field(FLD_HBLANK_CNT, 0x85)); 1068 } else if (dev->
761 } 1069 norm & (V4L2_STD_PAL_B | V4L2_STD_PAL_G | V4L2_STD_PAL_D |
762 1070 V4L2_STD_PAL_I | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc)) {
763 return status; 1071 cx231xx_info("do_mode_ctrl_overrides PAL\n");
1072 status =
1073 cx231xx_read_modify_write_i2c_dword(dev,
1074 HAMMERHEAD_I2C_ADDRESS,
1075 VERT_TIM_CTRL,
1076 FLD_VBLANK_CNT, 0x24);
1077 /* Adjust the active video horizontal start point */
1078 status =
1079 cx231xx_read_modify_write_i2c_dword(dev,
1080 HAMMERHEAD_I2C_ADDRESS,
1081 HORIZ_TIM_CTRL,
1082 FLD_HBLANK_CNT,
1083 cx231xx_set_field
1084 (FLD_HBLANK_CNT, 0x85));
1085 } else if (dev->
1086 norm & (V4L2_STD_SECAM_B | V4L2_STD_SECAM_D |
1087 V4L2_STD_SECAM_G | V4L2_STD_SECAM_K |
1088 V4L2_STD_SECAM_K1 | V4L2_STD_SECAM_L |
1089 V4L2_STD_SECAM_LC)) {
1090 cx231xx_info("do_mode_ctrl_overrides SECAM\n");
1091 status =
1092 cx231xx_read_modify_write_i2c_dword(dev,
1093 HAMMERHEAD_I2C_ADDRESS,
1094 VERT_TIM_CTRL,
1095 FLD_VBLANK_CNT, 0x24);
1096 /* Adjust the active video horizontal start point */
1097 status =
1098 cx231xx_read_modify_write_i2c_dword(dev,
1099 HAMMERHEAD_I2C_ADDRESS,
1100 HORIZ_TIM_CTRL,
1101 FLD_HBLANK_CNT,
1102 cx231xx_set_field
1103 (FLD_HBLANK_CNT, 0x85));
1104 }
1105
1106 return status;
764} 1107}
765 1108
766int cx231xx_set_audio_input(struct cx231xx *dev, u8 input) 1109int cx231xx_set_audio_input(struct cx231xx *dev, u8 input)
767{ 1110{
768 int status = 0; 1111 int status = 0;
769 enum AUDIO_INPUT ainput = AUDIO_INPUT_LINE; 1112 enum AUDIO_INPUT ainput = AUDIO_INPUT_LINE;
770 1113
771 switch(INPUT(input)->amux) { 1114 switch (INPUT(input)->amux) {
772 case CX231XX_AMUX_VIDEO: 1115 case CX231XX_AMUX_VIDEO:
773 ainput = AUDIO_INPUT_TUNER_TV; 1116 ainput = AUDIO_INPUT_TUNER_TV;
774 break; 1117 break;
775 case CX231XX_AMUX_LINE_IN: 1118 case CX231XX_AMUX_LINE_IN:
776 status = cx231xx_flatiron_set_audio_input(dev, input); 1119 status = cx231xx_flatiron_set_audio_input(dev, input);
777 ainput = AUDIO_INPUT_LINE; 1120 ainput = AUDIO_INPUT_LINE;
778 break; 1121 break;
779 default: 1122 default:
780 break; 1123 break;
781 } 1124 }
782 1125
783 status = cx231xx_set_audio_decoder_input(dev, ainput); 1126 status = cx231xx_set_audio_decoder_input(dev, ainput);
784 1127
785 return status; 1128 return status;
786} 1129}
787 1130
788int cx231xx_set_audio_decoder_input(struct cx231xx *dev, enum AUDIO_INPUT audio_input) 1131int cx231xx_set_audio_decoder_input(struct cx231xx *dev,
1132 enum AUDIO_INPUT audio_input)
789{ 1133{
790 u32 dwval; 1134 u32 dwval;
791 int status; 1135 int status;
792 u32 gen_ctrl; 1136 u32 gen_ctrl;
793 u32 value = 0; 1137 u32 value = 0;
794 1138
795 /* Put it in soft reset */ 1139 /* Put it in soft reset */
796 status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, GENERAL_CTL, 2, &gen_ctrl, 1); 1140 status =
797 gen_ctrl |= 1; 1141 cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, GENERAL_CTL, 2,
798 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, GENERAL_CTL, 2, gen_ctrl, 1); 1142 &gen_ctrl, 1);
799 1143 gen_ctrl |= 1;
800 switch(audio_input) 1144 status =
801 { 1145 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, GENERAL_CTL, 2,
802 case AUDIO_INPUT_LINE: 1146 gen_ctrl, 1);
803 1147
804 /* setup AUD_IO control from Merlin paralle output */ 1148 switch (audio_input) {
805 value = cx231xx_set_field(FLD_AUD_CHAN1_SRC, AUD_CHAN_SRC_PARALLEL); 1149 case AUDIO_INPUT_LINE:
806 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, AUD_IO_CTRL, 2, value, 4); 1150
807 1151 /* setup AUD_IO control from Merlin paralle output */
808 /* setup input to Merlin, SRC2 connect to AC97 1152 value =
809 bypass upsample-by-2, slave mode, sony mode, left justify 1153 cx231xx_set_field(FLD_AUD_CHAN1_SRC, AUD_CHAN_SRC_PARALLEL);
810 adr 091c, dat 01000000 */ 1154 status =
811 status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, AC97_CTL, 2, &dwval, 4); 1155 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
812 1156 AUD_IO_CTRL, 2, value, 4);
813 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, AC97_CTL, 2, (dwval | FLD_AC97_UP2X_BYPASS), 4); 1157
814 1158 /* setup input to Merlin, SRC2 connect to AC97
815 /* select the parallel1 and SRC3 */ 1159 bypass upsample-by-2, slave mode, sony mode, left justify
816 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, BAND_OUT_SEL, 2, 1160 adr 091c, dat 01000000 */
817 cx231xx_set_field(FLD_SRC3_IN_SEL, 0x0)| 1161 status =
818 cx231xx_set_field(FLD_SRC3_CLK_SEL, 0x0)| 1162 cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, AC97_CTL,
819 cx231xx_set_field(FLD_PARALLEL1_SRC_SEL, 0x0), 4); 1163 2, &dwval, 4);
820 1164
821 /* unmute all, AC97 in, independence mode 1165 status =
822 adr 08d0, data 0x00063073 */ 1166 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
823 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, PATH1_CTL1, 2, 0x00063073, 4); 1167 AC97_CTL, 2,
824 1168 (dwval | FLD_AC97_UP2X_BYPASS), 4);
825 /* set AVC maximum threshold, adr 08d4, dat ffff0024 */ 1169
826 status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, PATH1_VOL_CTL, 2, &dwval, 4); 1170 /* select the parallel1 and SRC3 */
827 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, PATH1_VOL_CTL, 2, 1171 status =
828 (dwval | FLD_PATH1_AVC_THRESHOLD), 4); 1172 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
829 1173 BAND_OUT_SEL, 2,
830 /* set SC maximum threshold, adr 08ec, dat ffffb3a3 */ 1174 cx231xx_set_field(FLD_SRC3_IN_SEL,
831 status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, PATH1_SC_CTL, 2, &dwval, 4); 1175 0x0) |
832 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, PATH1_SC_CTL, 2, 1176 cx231xx_set_field(FLD_SRC3_CLK_SEL,
833 (dwval | FLD_PATH1_SC_THRESHOLD), 4); 1177 0x0) |
834 break; 1178 cx231xx_set_field
835 1179 (FLD_PARALLEL1_SRC_SEL, 0x0), 4);
836 case AUDIO_INPUT_TUNER_TV: 1180
837 default: 1181 /* unmute all, AC97 in, independence mode
838 1182 adr 08d0, data 0x00063073 */
839 /* Setup SRC sources and clocks */ 1183 status =
840 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, BAND_OUT_SEL, 2, 1184 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
841 cx231xx_set_field(FLD_SRC6_IN_SEL, 0x00)| 1185 PATH1_CTL1, 2, 0x00063073, 4);
842 cx231xx_set_field(FLD_SRC6_CLK_SEL, 0x01)| 1186
843 cx231xx_set_field(FLD_SRC5_IN_SEL, 0x00)| 1187 /* set AVC maximum threshold, adr 08d4, dat ffff0024 */
844 cx231xx_set_field(FLD_SRC5_CLK_SEL, 0x02)| 1188 status =
845 cx231xx_set_field(FLD_SRC4_IN_SEL, 0x02)| 1189 cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
846 cx231xx_set_field(FLD_SRC4_CLK_SEL, 0x03)| 1190 PATH1_VOL_CTL, 2, &dwval, 4);
847 cx231xx_set_field(FLD_SRC3_IN_SEL, 0x00)| 1191 status =
848 cx231xx_set_field(FLD_SRC3_CLK_SEL, 0x00)| 1192 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
849 cx231xx_set_field(FLD_BASEBAND_BYPASS_CTL, 0x00)| 1193 PATH1_VOL_CTL, 2,
850 cx231xx_set_field(FLD_AC97_SRC_SEL, 0x03)| 1194 (dwval | FLD_PATH1_AVC_THRESHOLD),
851 cx231xx_set_field(FLD_I2S_SRC_SEL, 0x00)| 1195 4);
852 cx231xx_set_field(FLD_PARALLEL2_SRC_SEL, 0x02)| 1196
853 cx231xx_set_field(FLD_PARALLEL1_SRC_SEL, 0x01) , 4); 1197 /* set SC maximum threshold, adr 08ec, dat ffffb3a3 */
854 1198 status =
855 /* Setup the AUD_IO control */ 1199 cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
856 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, AUD_IO_CTRL, 2, 1200 PATH1_SC_CTL, 2, &dwval, 4);
857 cx231xx_set_field(FLD_I2S_PORT_DIR, 0x00)| 1201 status =
858 cx231xx_set_field(FLD_I2S_OUT_SRC, 0x00)| 1202 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
859 cx231xx_set_field(FLD_AUD_CHAN3_SRC,0x00)| 1203 PATH1_SC_CTL, 2,
860 cx231xx_set_field(FLD_AUD_CHAN2_SRC, 0x00)| 1204 (dwval | FLD_PATH1_SC_THRESHOLD), 4);
861 cx231xx_set_field(FLD_AUD_CHAN1_SRC,0x03 ), 4); 1205 break;
862 1206
863 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, PATH1_CTL1, 2, 0x1F063870, 4); 1207 case AUDIO_INPUT_TUNER_TV:
864 1208 default:
865 /* setAudioStandard(_audio_standard); */ 1209
866 1210 /* Setup SRC sources and clocks */
867 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, PATH1_CTL1, 2, 0x00063870, 4); 1211 status =
868 switch(dev->model) 1212 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
869 { 1213 BAND_OUT_SEL, 2,
870 case CX231XX_BOARD_CNXT_RDE_250: 1214 cx231xx_set_field(FLD_SRC6_IN_SEL,
871 case CX231XX_BOARD_CNXT_RDU_250: 1215 0x00) |
872 status = cx231xx_read_modify_write_i2c_dword(dev, HAMMERHEAD_I2C_ADDRESS, 1216 cx231xx_set_field(FLD_SRC6_CLK_SEL,
873 CHIP_CTRL, FLD_SIF_EN, 1217 0x01) |
874 cx231xx_set_field(FLD_SIF_EN, 1)); 1218 cx231xx_set_field(FLD_SRC5_IN_SEL,
875 break; 1219 0x00) |
876 default: 1220 cx231xx_set_field(FLD_SRC5_CLK_SEL,
877 break; 1221 0x02) |
878 } 1222 cx231xx_set_field(FLD_SRC4_IN_SEL,
879 break; 1223 0x02) |
880 1224 cx231xx_set_field(FLD_SRC4_CLK_SEL,
881 case AUDIO_INPUT_TUNER_FM: 1225 0x03) |
882 /* use SIF for FM radio 1226 cx231xx_set_field(FLD_SRC3_IN_SEL,
883 setupFM(); 1227 0x00) |
884 setAudioStandard(_audio_standard); 1228 cx231xx_set_field(FLD_SRC3_CLK_SEL,
885 */ 1229 0x00) |
886 break; 1230 cx231xx_set_field
887 1231 (FLD_BASEBAND_BYPASS_CTL,
888 case AUDIO_INPUT_MUTE: 1232 0x00) |
889 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, PATH1_CTL1, 2, 0x1F011012, 4); 1233 cx231xx_set_field(FLD_AC97_SRC_SEL,
890 break; 1234 0x03) |
891 } 1235 cx231xx_set_field(FLD_I2S_SRC_SEL,
892 1236 0x00) |
893 /* Take it out of soft reset */ 1237 cx231xx_set_field
894 status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, GENERAL_CTL, 2, &gen_ctrl, 1); 1238 (FLD_PARALLEL2_SRC_SEL,
895 gen_ctrl &= ~1; 1239 0x02) |
896 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, GENERAL_CTL, 2, gen_ctrl, 1); 1240 cx231xx_set_field
897 1241 (FLD_PARALLEL1_SRC_SEL, 0x01), 4);
898 return status; 1242
899} 1243 /* Setup the AUD_IO control */
1244 status =
1245 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1246 AUD_IO_CTRL, 2,
1247 cx231xx_set_field(FLD_I2S_PORT_DIR,
1248 0x00) |
1249 cx231xx_set_field(FLD_I2S_OUT_SRC,
1250 0x00) |
1251 cx231xx_set_field(FLD_AUD_CHAN3_SRC,
1252 0x00) |
1253 cx231xx_set_field(FLD_AUD_CHAN2_SRC,
1254 0x00) |
1255 cx231xx_set_field(FLD_AUD_CHAN1_SRC,
1256 0x03), 4);
1257
1258 status =
1259 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1260 PATH1_CTL1, 2, 0x1F063870, 4);
1261
1262 /* setAudioStandard(_audio_standard); */
1263
1264 status =
1265 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1266 PATH1_CTL1, 2, 0x00063870, 4);
1267 switch (dev->model) {
1268 case CX231XX_BOARD_CNXT_RDE_250:
1269 case CX231XX_BOARD_CNXT_RDU_250:
1270 status =
1271 cx231xx_read_modify_write_i2c_dword(dev,
1272 HAMMERHEAD_I2C_ADDRESS,
1273 CHIP_CTRL,
1274 FLD_SIF_EN,
1275 cx231xx_set_field
1276 (FLD_SIF_EN,
1277 1));
1278 break;
1279 default:
1280 break;
1281 }
1282 break;
1283
1284 case AUDIO_INPUT_TUNER_FM:
1285 /* use SIF for FM radio
1286 setupFM();
1287 setAudioStandard(_audio_standard);
1288 */
1289 break;
1290
1291 case AUDIO_INPUT_MUTE:
1292 status =
1293 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1294 PATH1_CTL1, 2, 0x1F011012, 4);
1295 break;
1296 }
900 1297
1298 /* Take it out of soft reset */
1299 status =
1300 cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, GENERAL_CTL, 2,
1301 &gen_ctrl, 1);
1302 gen_ctrl &= ~1;
1303 status =
1304 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, GENERAL_CTL, 2,
1305 gen_ctrl, 1);
901 1306
1307 return status;
1308}
902 1309
903/* Set resolution of the video */ 1310/* Set resolution of the video */
904int cx231xx_resolution_set(struct cx231xx *dev) 1311int cx231xx_resolution_set(struct cx231xx *dev)
905{ 1312{
906 int width, height; 1313 int width, height;
907 u32 hscale, vscale; 1314 u32 hscale, vscale;
908 int status = 0; 1315 int status = 0;
909 1316
910 width = dev->width; 1317 width = dev->width;
911 height = dev->height; 1318 height = dev->height;
912 1319
913 get_scale(dev,width, height,&hscale, &vscale); 1320 get_scale(dev, width, height, &hscale, &vscale);
914 1321
915 /* set horzontal scale */ 1322 /* set horzontal scale */
916 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, HSCALE_CTRL, 2, hscale, 4); 1323 status =
1324 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, HSCALE_CTRL, 2,
1325 hscale, 4);
917 1326
918 /* set vertical scale */ 1327 /* set vertical scale */
919 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, VSCALE_CTRL, 2, vscale, 4); 1328 status =
1329 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, VSCALE_CTRL, 2,
1330 vscale, 4);
920 1331
921 return status; 1332 return status;
922} 1333}
923 1334
924/************************************************************************************* 1335/*************************************************************************************
@@ -926,397 +1337,697 @@ int cx231xx_resolution_set(struct cx231xx *dev)
926 *************************************************************************************/ 1337 *************************************************************************************/
927int cx231xx_init_ctrl_pin_status(struct cx231xx *dev) 1338int cx231xx_init_ctrl_pin_status(struct cx231xx *dev)
928{ 1339{
929 u32 value; 1340 u32 value;
930 int status = 0; 1341 int status = 0;
931 1342
932 status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, PIN_CTRL, 2, &value, 4); 1343 status =
933 value |=(~dev->board.ctl_pin_status_mask); 1344 cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, PIN_CTRL, 2,
934 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, PIN_CTRL, 2, value, 4); 1345 &value, 4);
1346 value |= (~dev->board.ctl_pin_status_mask);
1347 status =
1348 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, PIN_CTRL, 2,
1349 value, 4);
935 1350
936 return status; 1351 return status;
937} 1352}
938 1353
939int cx231xx_set_agc_analog_digital_mux_select(struct cx231xx *dev, u8 analog_or_digital) 1354int cx231xx_set_agc_analog_digital_mux_select(struct cx231xx *dev,
1355 u8 analog_or_digital)
940{ 1356{
941 int status = 0; 1357 int status = 0;
942 1358
943 /* first set the direction to output */ 1359 /* first set the direction to output */
944 status = cx231xx_set_gpio_direction(dev, dev->board.agc_analog_digital_select_gpio, 1); 1360 status =
1361 cx231xx_set_gpio_direction(dev,
1362 dev->board.
1363 agc_analog_digital_select_gpio, 1);
945 1364
946 /* 0 - demod ; 1 - Analog mode */ 1365 /* 0 - demod ; 1 - Analog mode */
947 status = cx231xx_set_gpio_value(dev, dev->board.agc_analog_digital_select_gpio, 1366 status =
948 analog_or_digital); 1367 cx231xx_set_gpio_value(dev,
1368 dev->board.agc_analog_digital_select_gpio,
1369 analog_or_digital);
949 1370
950 return status; 1371 return status;
951} 1372}
952 1373
953int cx231xx_enable_i2c_for_tuner(struct cx231xx *dev, u8 I2CIndex) 1374int cx231xx_enable_i2c_for_tuner(struct cx231xx *dev, u8 I2CIndex)
954{ 1375{
955 u8 value[4] ={0,0,0,0}; 1376 u8 value[4] = { 0, 0, 0, 0 };
956 int status = 0; 1377 int status = 0;
957 1378
958 cx231xx_info("Changing the i2c port for tuner to %d\n",I2CIndex); 1379 cx231xx_info("Changing the i2c port for tuner to %d\n", I2CIndex);
959 1380
960 status = cx231xx_read_ctrl_reg(dev,VRT_GET_REGISTER, PWR_CTL_EN, value, 4); 1381 status =
961 if(status < 0) 1382 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN, value, 4);
962 return status; 1383 if (status < 0)
1384 return status;
963 1385
964 if(I2CIndex==I2C_1) { 1386 if (I2CIndex == I2C_1) {
965 if(value[0] & I2C_DEMOD_EN) { 1387 if (value[0] & I2C_DEMOD_EN) {
966 value[0] &= ~I2C_DEMOD_EN; 1388 value[0] &= ~I2C_DEMOD_EN;
967 status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, PWR_CTL_EN,value,4); 1389 status =
968 } 1390 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
969 } else { 1391 PWR_CTL_EN, value, 4);
970 if(!(value[0] & I2C_DEMOD_EN)) { 1392 }
971 value[0] |= I2C_DEMOD_EN; 1393 } else {
972 status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, PWR_CTL_EN,value,4); 1394 if (!(value[0] & I2C_DEMOD_EN)) {
973 } 1395 value[0] |= I2C_DEMOD_EN;
974 } 1396 status =
1397 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
1398 PWR_CTL_EN, value, 4);
1399 }
1400 }
975 1401
976 return status; 1402 return status;
977 1403
978} 1404}
979 1405
980
981/************************************************************************************* 1406/*************************************************************************************
982 * D I F - B L O C K C O N T R O L functions * 1407 * D I F - B L O C K C O N T R O L functions *
983 *************************************************************************************/ 1408 *************************************************************************************/
984int cx231xx_dif_configure_C2HH_for_low_IF(struct cx231xx *dev, u32 mode, 1409int cx231xx_dif_configure_C2HH_for_low_IF(struct cx231xx *dev, u32 mode,
985 u32 function_mode, u32 standard) 1410 u32 function_mode, u32 standard)
986{ 1411{
987 int status = 0; 1412 int status = 0;
988 1413
989 if(mode == V4L2_TUNER_RADIO) { 1414 if (mode == V4L2_TUNER_RADIO) {
990 /* C2HH */ 1415 /* C2HH */
991 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, 1416 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, AFE_CTRL_C2HH_SRC_CTRL, 30, 31, 0x1); /* lo if big signal */
992 AFE_CTRL_C2HH_SRC_CTRL, 30, 31, 0x1); /* lo if big signal */ 1417 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, AFE_CTRL_C2HH_SRC_CTRL, 23, 24, function_mode); /* FUNC_MODE = DIF */
993 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, 1418 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, AFE_CTRL_C2HH_SRC_CTRL, 15, 22, 0xFF); /* IF_MODE */
994 AFE_CTRL_C2HH_SRC_CTRL, 23, 24, function_mode); /* FUNC_MODE = DIF */ 1419 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, AFE_CTRL_C2HH_SRC_CTRL, 9, 9, 0x1); /* no inv */
995 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, 1420 } else {
996 AFE_CTRL_C2HH_SRC_CTRL, 15, 22, 0xFF); /* IF_MODE */ 1421 switch (standard) {
997 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, 1422 case V4L2_STD_NTSC_M: /* 75 IRE Setup */
998 AFE_CTRL_C2HH_SRC_CTRL, 9, 9, 0x1); /* no inv */ 1423 case V4L2_STD_NTSC_M_JP: /* Japan, 0 IRE Setup */
999 } 1424 case V4L2_STD_PAL_M:
1000 else { 1425 case V4L2_STD_PAL_N:
1001 switch(standard) { 1426 case V4L2_STD_PAL_Nc:
1002 case V4L2_STD_NTSC_M: /* 75 IRE Setup */ 1427 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, AFE_CTRL_C2HH_SRC_CTRL, 30, 31, 0x1); /* lo if big signal */
1003 case V4L2_STD_NTSC_M_JP: /* Japan, 0 IRE Setup */ 1428 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, AFE_CTRL_C2HH_SRC_CTRL, 23, 24, function_mode); /* FUNC_MODE = DIF */
1004 case V4L2_STD_PAL_M: 1429 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, AFE_CTRL_C2HH_SRC_CTRL, 15, 22, 0xb); /* IF_MODE */
1005 case V4L2_STD_PAL_N: 1430 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, AFE_CTRL_C2HH_SRC_CTRL, 9, 9, 0x1); /* no inv */
1006 case V4L2_STD_PAL_Nc: 1431 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, AUD_IO_CTRL, 0, 31, 0x00000003); /* 0x124, AUD_CHAN1_SRC = 0x3 */
1007 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, 1432 break;
1008 AFE_CTRL_C2HH_SRC_CTRL, 30, 31, 0x1); /* lo if big signal */ 1433
1009 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, 1434 case V4L2_STD_PAL_B:
1010 AFE_CTRL_C2HH_SRC_CTRL, 23, 24, function_mode); /* FUNC_MODE = DIF */ 1435 case V4L2_STD_PAL_G:
1011 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, 1436 /* C2HH setup */
1012 AFE_CTRL_C2HH_SRC_CTRL, 15, 22, 0xb); /* IF_MODE */ 1437 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, AFE_CTRL_C2HH_SRC_CTRL, 30, 31, 0x1); /* lo if big signal */
1013 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, 1438 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, AFE_CTRL_C2HH_SRC_CTRL, 23, 24, function_mode); /* FUNC_MODE = DIF */
1014 AFE_CTRL_C2HH_SRC_CTRL, 9, 9, 0x1); /* no inv */ 1439 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, AFE_CTRL_C2HH_SRC_CTRL, 15, 22, 0xE); /* IF_MODE */
1015 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, 1440 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, AFE_CTRL_C2HH_SRC_CTRL, 9, 9, 0x1); /* no inv */
1016 AUD_IO_CTRL, 0, 31, 0x00000003); /* 0x124, AUD_CHAN1_SRC = 0x3 */ 1441 break;
1017 break; 1442
1018 1443 case V4L2_STD_PAL_D:
1019 case V4L2_STD_PAL_B: 1444 case V4L2_STD_PAL_I:
1020 case V4L2_STD_PAL_G: 1445 case V4L2_STD_SECAM_L:
1021 /* C2HH setup */ 1446 case V4L2_STD_SECAM_LC:
1022 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, 1447 case V4L2_STD_SECAM_B:
1023 AFE_CTRL_C2HH_SRC_CTRL, 30, 31, 0x1); /* lo if big signal */ 1448 case V4L2_STD_SECAM_D:
1024 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, 1449 case V4L2_STD_SECAM_G:
1025 AFE_CTRL_C2HH_SRC_CTRL, 23, 24, function_mode); /* FUNC_MODE = DIF */ 1450 case V4L2_STD_SECAM_K:
1026 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, 1451 case V4L2_STD_SECAM_K1:
1027 AFE_CTRL_C2HH_SRC_CTRL, 15, 22, 0xE); /* IF_MODE */ 1452 /* C2HH setup */
1028 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, 1453 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, AFE_CTRL_C2HH_SRC_CTRL, 30, 31, 0x1); /* lo if big signal */
1029 AFE_CTRL_C2HH_SRC_CTRL, 9, 9, 0x1); /* no inv */ 1454 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, AFE_CTRL_C2HH_SRC_CTRL, 23, 24, function_mode); /* FUNC_MODE = DIF */
1030 break; 1455 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, AFE_CTRL_C2HH_SRC_CTRL, 15, 22, 0xF); /* IF_MODE */
1031 1456 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, AFE_CTRL_C2HH_SRC_CTRL, 9, 9, 0x1); /* no inv */
1032 case V4L2_STD_PAL_D: 1457 break;
1033 case V4L2_STD_PAL_I: 1458
1034 case V4L2_STD_SECAM_L: 1459 case DIF_USE_BASEBAND:
1035 case V4L2_STD_SECAM_LC: 1460 default:
1036 case V4L2_STD_SECAM_B: 1461 /* do nothing to config C2HH for baseband */
1037 case V4L2_STD_SECAM_D: 1462 break;
1038 case V4L2_STD_SECAM_G: 1463 }
1039 case V4L2_STD_SECAM_K: 1464 }
1040 case V4L2_STD_SECAM_K1: 1465
1041 /* C2HH setup */ 1466 return status;
1042 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1043 AFE_CTRL_C2HH_SRC_CTRL, 30, 31, 0x1); /* lo if big signal */
1044 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1045 AFE_CTRL_C2HH_SRC_CTRL, 23, 24, function_mode); /* FUNC_MODE = DIF */
1046 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1047 AFE_CTRL_C2HH_SRC_CTRL, 15, 22, 0xF); /* IF_MODE */
1048 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1049 AFE_CTRL_C2HH_SRC_CTRL, 9, 9, 0x1); /* no inv */
1050 break;
1051
1052 case DIF_USE_BASEBAND:
1053 default:
1054 /* do nothing to config C2HH for baseband */
1055 break;
1056 }
1057 }
1058
1059 return status;
1060} 1467}
1061 1468
1062int cx231xx_dif_set_standard(struct cx231xx *dev, u32 standard) 1469int cx231xx_dif_set_standard(struct cx231xx *dev, u32 standard)
1063{ 1470{
1064 int status = 0; 1471 int status = 0;
1065 u32 dif_misc_ctrl_value = 0; 1472 u32 dif_misc_ctrl_value = 0;
1066 u32 func_mode = 0; 1473 u32 func_mode = 0;
1067 1474
1068 cx231xx_info("%s: setStandard to %x\n",__func__,standard); 1475 cx231xx_info("%s: setStandard to %x\n", __func__, standard);
1069 1476
1070 status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, 1477 status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1071 DIF_MISC_CTRL, 2, &dif_misc_ctrl_value, 4); 1478 DIF_MISC_CTRL, 2, &dif_misc_ctrl_value,
1072 if(standard != DIF_USE_BASEBAND ) 1479 4);
1073 dev->norm = standard; 1480 if (standard != DIF_USE_BASEBAND)
1074 1481 dev->norm = standard;
1075 switch (dev->model) { 1482
1076 case CX231XX_BOARD_CNXT_RDE_250: 1483 switch (dev->model) {
1077 case CX231XX_BOARD_CNXT_RDU_250: 1484 case CX231XX_BOARD_CNXT_RDE_250:
1078 func_mode=0x03; 1485 case CX231XX_BOARD_CNXT_RDU_250:
1079 break; 1486 func_mode = 0x03;
1080 default: 1487 break;
1081 func_mode=0x01; 1488 default:
1082 } 1489 func_mode = 0x01;
1083 1490 }
1084 status = cx231xx_dif_configure_C2HH_for_low_IF(dev, dev->active_mode, func_mode, standard); 1491
1085 1492 status =
1086 1493 cx231xx_dif_configure_C2HH_for_low_IF(dev, dev->active_mode,
1087 if(standard == DIF_USE_BASEBAND ) { /* base band */ 1494 func_mode, standard);
1088 1495
1089 /* There is a different SRC_PHASE_INC value for baseband vs. DIF */ 1496 if (standard == DIF_USE_BASEBAND) { /* base band */
1090 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, 1497
1091 DIF_SRC_PHASE_INC, 2, 0xDF7DF83, 4); 1498 /* There is a different SRC_PHASE_INC value for baseband vs. DIF */
1092 status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, 1499 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1093 DIF_MISC_CTRL, 2, &dif_misc_ctrl_value, 4); 1500 DIF_SRC_PHASE_INC, 2, 0xDF7DF83,
1094 dif_misc_ctrl_value |= FLD_DIF_DIF_BYPASS; 1501 4);
1095 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, 1502 status =
1096 DIF_MISC_CTRL, 2, dif_misc_ctrl_value, 4); 1503 cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1097 1504 DIF_MISC_CTRL, 2,
1098 } else if ( standard & (V4L2_STD_PAL_B | V4L2_STD_PAL_G) ) { 1505 &dif_misc_ctrl_value, 4);
1099 1506 dif_misc_ctrl_value |= FLD_DIF_DIF_BYPASS;
1100 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_PLL_CTRL, 0, 31, 0x6503bc0c); 1507 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1101 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_PLL_CTRL1, 0, 31, 0xbd038c85); 1508 DIF_MISC_CTRL, 2,
1102 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_PLL_CTRL2, 0, 31, 0x1db4640a); 1509 dif_misc_ctrl_value, 4);
1103 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_PLL_CTRL3, 0, 31, 0x00008800); 1510
1104 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_AGC_IF_REF, 0, 31, 0x444C1380); 1511 } else if (standard & (V4L2_STD_PAL_B | V4L2_STD_PAL_G)) {
1105 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_AGC_CTRL_IF, 0, 31, 0xDA302600); 1512
1106 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_AGC_CTRL_INT, 0, 31, 0xDA261700); 1513 status =
1107 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_AGC_CTRL_RF, 0, 31, 0xDA262600); 1514 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1108 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_AGC_IF_INT_CURRENT, 0, 31, 0x26001700); 1515 DIF_PLL_CTRL, 0, 31, 0x6503bc0c);
1109 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_AGC_RF_CURRENT, 0, 31, 0x00002660); 1516 status =
1110 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_VIDEO_AGC_CTRL, 0, 31, 0x72500800); 1517 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1111 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_VID_AUD_OVERRIDE, 0, 31, 0x27000100); 1518 DIF_PLL_CTRL1, 0, 31, 0xbd038c85);
1112 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_AV_SEP_CTRL, 0, 31, 0x3F3530EC); 1519 status =
1113 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_COMP_FLT_CTRL, 0, 31, 0x00A653A8); 1520 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1114 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_SRC_PHASE_INC, 0, 31, 0x1befbf06); 1521 DIF_PLL_CTRL2, 0, 31, 0x1db4640a);
1115 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_SRC_GAIN_CONTROL, 0, 31, 0x000035e8); 1522 status =
1116 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_RPT_VARIANCE, 0, 31, 0x00000000); 1523 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1117 /* Save the Spec Inversion value */ 1524 DIF_PLL_CTRL3, 0, 31, 0x00008800);
1118 dif_misc_ctrl_value &= FLD_DIF_SPEC_INV; 1525 status =
1119 dif_misc_ctrl_value |=0x3a013F11; 1526 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1120 1527 DIF_AGC_IF_REF, 0, 31, 0x444C1380);
1121 } else if( standard & V4L2_STD_PAL_D ) { 1528 status =
1122 1529 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1123 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_PLL_CTRL, 0, 31, 0x6503bc0c); 1530 DIF_AGC_CTRL_IF, 0, 31, 0xDA302600);
1124 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_PLL_CTRL1, 0, 31, 0xbd038c85); 1531 status =
1125 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_PLL_CTRL2, 0, 31, 0x1db4640a); 1532 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1126 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_PLL_CTRL3, 0, 31, 0x00008800); 1533 DIF_AGC_CTRL_INT, 0, 31, 0xDA261700);
1127 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_AGC_IF_REF, 0, 31, 0x444C1380); 1534 status =
1128 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_AGC_CTRL_IF, 0, 31, 0xDA302600); 1535 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1129 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_AGC_CTRL_INT, 0, 31, 0xDA261700); 1536 DIF_AGC_CTRL_RF, 0, 31, 0xDA262600);
1130 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_AGC_CTRL_RF, 0, 31, 0xDA262600); 1537 status =
1131 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_AGC_IF_INT_CURRENT, 0, 31, 0x26001700); 1538 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1132 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_AGC_RF_CURRENT, 0, 31, 0x00002660); 1539 DIF_AGC_IF_INT_CURRENT, 0, 31,
1133 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_VIDEO_AGC_CTRL, 0, 31, 0x72500800); 1540 0x26001700);
1134 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_VID_AUD_OVERRIDE, 0, 31, 0x27000100); 1541 status =
1135 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_AV_SEP_CTRL, 0, 31, 0x3F3934EA); 1542 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1136 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_COMP_FLT_CTRL, 0, 31, 0x00000000); 1543 DIF_AGC_RF_CURRENT, 0, 31,
1137 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_SRC_PHASE_INC, 0, 31, 0x1befbf06); 1544 0x00002660);
1138 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_SRC_GAIN_CONTROL, 0, 31, 0x000035e8); 1545 status =
1139 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_RPT_VARIANCE, 0, 31, 0x00000000); 1546 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1140 /* Save the Spec Inversion value */ 1547 DIF_VIDEO_AGC_CTRL, 0, 31,
1141 dif_misc_ctrl_value &= FLD_DIF_SPEC_INV; 1548 0x72500800);
1142 dif_misc_ctrl_value |=0x3a023F11; 1549 status =
1143 1550 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1144 } else if( standard & V4L2_STD_PAL_I ) { 1551 DIF_VID_AUD_OVERRIDE, 0, 31,
1145 1552 0x27000100);
1146 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_PLL_CTRL, 0, 31, 0x6503bc0c); 1553 status =
1147 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_PLL_CTRL1, 0, 31, 0xbd038c85); 1554 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1148 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_PLL_CTRL2, 0, 31, 0x1db4640a); 1555 DIF_AV_SEP_CTRL, 0, 31, 0x3F3530EC);
1149 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_PLL_CTRL3, 0, 31, 0x00008800); 1556 status =
1150 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_AGC_IF_REF, 0, 31, 0x444C1380); 1557 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1151 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_AGC_CTRL_IF, 0, 31, 0xDA302600); 1558 DIF_COMP_FLT_CTRL, 0, 31,
1152 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_AGC_CTRL_INT, 0, 31, 0xDA261700); 1559 0x00A653A8);
1153 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_AGC_CTRL_RF, 0, 31, 0xDA262600); 1560 status =
1154 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_AGC_IF_INT_CURRENT, 0, 31, 0x26001700); 1561 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1155 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_AGC_RF_CURRENT, 0, 31, 0x00002660); 1562 DIF_SRC_PHASE_INC, 0, 31,
1156 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_VIDEO_AGC_CTRL, 0, 31, 0x72500800); 1563 0x1befbf06);
1157 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_VID_AUD_OVERRIDE, 0, 31, 0x27000100); 1564 status =
1158 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_AV_SEP_CTRL, 0, 31, 0x5F39A934); 1565 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1159 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_COMP_FLT_CTRL, 0, 31, 0x00000000); 1566 DIF_SRC_GAIN_CONTROL, 0, 31,
1160 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_SRC_PHASE_INC, 0, 31, 0x1befbf06); 1567 0x000035e8);
1161 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_SRC_GAIN_CONTROL, 0, 31, 0x000035e8); 1568 status =
1162 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_RPT_VARIANCE, 0, 31, 0x00000000); 1569 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1163 /* Save the Spec Inversion value */ 1570 DIF_RPT_VARIANCE, 0, 31, 0x00000000);
1164 dif_misc_ctrl_value &= FLD_DIF_SPEC_INV; 1571 /* Save the Spec Inversion value */
1165 dif_misc_ctrl_value |=0x3a033F11; 1572 dif_misc_ctrl_value &= FLD_DIF_SPEC_INV;
1166 1573 dif_misc_ctrl_value |= 0x3a013F11;
1167 } else if( standard & V4L2_STD_PAL_M ) { 1574
1168 1575 } else if (standard & V4L2_STD_PAL_D) {
1169 /* improved Low Frequency Phase Noise */ 1576
1170 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, 1577 status =
1171 DIF_PLL_CTRL, 2, 0xFF01FF0C, 4); 1578 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1172 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, 1579 DIF_PLL_CTRL, 0, 31, 0x6503bc0c);
1173 DIF_PLL_CTRL1, 2, 0xbd038c85, 4); 1580 status =
1174 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, 1581 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1175 DIF_PLL_CTRL2, 2, 0x1db4640a, 4); 1582 DIF_PLL_CTRL1, 0, 31, 0xbd038c85);
1176 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, 1583 status =
1177 DIF_PLL_CTRL3, 2, 0x00008800, 4); 1584 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1178 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, 1585 DIF_PLL_CTRL2, 0, 31, 0x1db4640a);
1179 DIF_AGC_IF_REF, 2, 0x444C1380, 4); 1586 status =
1180 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, 1587 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1181 DIF_AGC_IF_INT_CURRENT, 2, 0x26001700, 4); 1588 DIF_PLL_CTRL3, 0, 31, 0x00008800);
1182 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, 1589 status =
1183 DIF_AGC_RF_CURRENT, 2, 0x00002660, 4); 1590 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1184 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, 1591 DIF_AGC_IF_REF, 0, 31, 0x444C1380);
1185 DIF_VIDEO_AGC_CTRL, 2, 0x72500800, 4); 1592 status =
1186 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, 1593 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1187 DIF_VID_AUD_OVERRIDE, 2, 0x27000100, 4); 1594 DIF_AGC_CTRL_IF, 0, 31, 0xDA302600);
1188 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, 1595 status =
1189 DIF_AV_SEP_CTRL, 2, 0x012c405d, 4); 1596 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1190 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, 1597 DIF_AGC_CTRL_INT, 0, 31, 0xDA261700);
1191 DIF_COMP_FLT_CTRL, 2, 0x009f50c1, 4); 1598 status =
1192 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, 1599 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1193 DIF_SRC_PHASE_INC, 2, 0x1befbf06, 4); 1600 DIF_AGC_CTRL_RF, 0, 31, 0xDA262600);
1194 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, 1601 status =
1195 DIF_SRC_GAIN_CONTROL, 2, 0x000035e8, 4); 1602 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1196 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, 1603 DIF_AGC_IF_INT_CURRENT, 0, 31,
1197 DIF_SOFT_RST_CTRL_REVB, 2, 0x00000000, 4); 1604 0x26001700);
1198 1605 status =
1199 /* Save the Spec Inversion value */ 1606 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1200 dif_misc_ctrl_value &= FLD_DIF_SPEC_INV; 1607 DIF_AGC_RF_CURRENT, 0, 31,
1201 dif_misc_ctrl_value |= 0x3A0A3F10; 1608 0x00002660);
1202 1609 status =
1203 } else if( standard & (V4L2_STD_PAL_N | V4L2_STD_PAL_Nc) ) { 1610 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1204 1611 DIF_VIDEO_AGC_CTRL, 0, 31,
1205 /* improved Low Frequency Phase Noise */ 1612 0x72500800);
1206 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_PLL_CTRL, 2, 0xFF01FF0C, 4); 1613 status =
1207 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_PLL_CTRL1, 2, 0xbd038c85, 4); 1614 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1208 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_PLL_CTRL2, 2, 0x1db4640a, 4); 1615 DIF_VID_AUD_OVERRIDE, 0, 31,
1209 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_PLL_CTRL3, 2, 0x00008800, 4); 1616 0x27000100);
1210 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_AGC_IF_REF, 2, 0x444C1380, 4); 1617 status =
1211 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_AGC_IF_INT_CURRENT, 2, 0x26001700, 4); 1618 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1212 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_AGC_RF_CURRENT, 2, 0x00002660, 4); 1619 DIF_AV_SEP_CTRL, 0, 31, 0x3F3934EA);
1213 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_VIDEO_AGC_CTRL, 2, 0x72500800, 4); 1620 status =
1214 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_VID_AUD_OVERRIDE, 2, 0x27000100, 4); 1621 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1215 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_AV_SEP_CTRL, 2, 0x012c405d, 4); 1622 DIF_COMP_FLT_CTRL, 0, 31,
1216 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_COMP_FLT_CTRL, 2, 0x009f50c1, 4); 1623 0x00000000);
1217 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_SRC_PHASE_INC, 2, 0x1befbf06, 4); 1624 status =
1218 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_SRC_GAIN_CONTROL, 2, 0x000035e8, 4); 1625 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1219 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_SOFT_RST_CTRL_REVB, 2, 0x00000000, 4); 1626 DIF_SRC_PHASE_INC, 0, 31,
1220 1627 0x1befbf06);
1221 /* Save the Spec Inversion value */ 1628 status =
1222 dif_misc_ctrl_value &= FLD_DIF_SPEC_INV; 1629 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1223 dif_misc_ctrl_value = 0x3A093F10; 1630 DIF_SRC_GAIN_CONTROL, 0, 31,
1224 1631 0x000035e8);
1225 } else if( standard & ( V4L2_STD_SECAM_B | V4L2_STD_SECAM_D | V4L2_STD_SECAM_G | 1632 status =
1226 V4L2_STD_SECAM_K | V4L2_STD_SECAM_K1) ) { 1633 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1227 1634 DIF_RPT_VARIANCE, 0, 31, 0x00000000);
1228 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_PLL_CTRL, 0, 31, 0x6503bc0c); 1635 /* Save the Spec Inversion value */
1229 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_PLL_CTRL1, 0, 31, 0xbd038c85); 1636 dif_misc_ctrl_value &= FLD_DIF_SPEC_INV;
1230 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_PLL_CTRL2, 0, 31, 0x1db4640a); 1637 dif_misc_ctrl_value |= 0x3a023F11;
1231 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_PLL_CTRL3, 0, 31, 0x00008800); 1638
1232 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_AGC_IF_REF, 0, 31, 0x888C0380); 1639 } else if (standard & V4L2_STD_PAL_I) {
1233 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_AGC_CTRL_IF, 0, 31, 0xe0262600); 1640
1234 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_AGC_CTRL_INT, 0, 31, 0xc2171700); 1641 status =
1235 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_AGC_CTRL_RF, 0, 31, 0xc2262600); 1642 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1236 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_AGC_IF_INT_CURRENT, 0, 31, 0x26001700); 1643 DIF_PLL_CTRL, 0, 31, 0x6503bc0c);
1237 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_AGC_RF_CURRENT, 0, 31, 0x00002660); 1644 status =
1238 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_VID_AUD_OVERRIDE, 0, 31, 0x27000100); 1645 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1239 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_AV_SEP_CTRL, 0, 31, 0x3F3530ec); 1646 DIF_PLL_CTRL1, 0, 31, 0xbd038c85);
1240 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_COMP_FLT_CTRL, 0, 31, 0x00000000); 1647 status =
1241 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_SRC_PHASE_INC, 0, 31, 0x1befbf06); 1648 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1242 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_SRC_GAIN_CONTROL, 0, 31, 0x000035e8); 1649 DIF_PLL_CTRL2, 0, 31, 0x1db4640a);
1243 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_RPT_VARIANCE, 0, 31, 0x00000000); 1650 status =
1244 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_VIDEO_AGC_CTRL, 0, 31, 0xf4000000); 1651 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1245 1652 DIF_PLL_CTRL3, 0, 31, 0x00008800);
1246 /* Save the Spec Inversion value */ 1653 status =
1247 dif_misc_ctrl_value &= FLD_DIF_SPEC_INV; 1654 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1248 dif_misc_ctrl_value |=0x3a023F11; 1655 DIF_AGC_IF_REF, 0, 31, 0x444C1380);
1249 1656 status =
1250 } else if( standard & (V4L2_STD_SECAM_L | V4L2_STD_SECAM_LC) ) { 1657 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1251 1658 DIF_AGC_CTRL_IF, 0, 31, 0xDA302600);
1252 /* Is it SECAM_L1? */ 1659 status =
1253 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_PLL_CTRL, 0, 31, 0x6503bc0c); 1660 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1254 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_PLL_CTRL1, 0, 31, 0xbd038c85); 1661 DIF_AGC_CTRL_INT, 0, 31, 0xDA261700);
1255 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_PLL_CTRL2, 0, 31, 0x1db4640a); 1662 status =
1256 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_PLL_CTRL3, 0, 31, 0x00008800); 1663 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1257 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_AGC_IF_REF, 0, 31, 0x888C0380); 1664 DIF_AGC_CTRL_RF, 0, 31, 0xDA262600);
1258 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_AGC_CTRL_IF, 0, 31, 0xe0262600); 1665 status =
1259 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_AGC_CTRL_INT, 0, 31, 0xc2171700); 1666 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1260 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_AGC_CTRL_RF, 0, 31, 0xc2262600); 1667 DIF_AGC_IF_INT_CURRENT, 0, 31,
1261 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_AGC_IF_INT_CURRENT, 0, 31, 0x26001700); 1668 0x26001700);
1262 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_AGC_RF_CURRENT, 0, 31, 0x00002660); 1669 status =
1263 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_VID_AUD_OVERRIDE, 0, 31, 0x27000100); 1670 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1264 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_AV_SEP_CTRL, 0, 31, 0x3F3530ec); 1671 DIF_AGC_RF_CURRENT, 0, 31,
1265 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_COMP_FLT_CTRL, 0, 31, 0x00000000); 1672 0x00002660);
1266 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_SRC_PHASE_INC, 0, 31, 0x1befbf06); 1673 status =
1267 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_SRC_GAIN_CONTROL, 0, 31, 0x000035e8); 1674 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1268 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_RPT_VARIANCE, 0, 31, 0x00000000); 1675 DIF_VIDEO_AGC_CTRL, 0, 31,
1269 status = cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32, DIF_VIDEO_AGC_CTRL, 0, 31, 0xf2560000); 1676 0x72500800);
1270 1677 status =
1271 /* Save the Spec Inversion value */ 1678 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1272 dif_misc_ctrl_value &= FLD_DIF_SPEC_INV; 1679 DIF_VID_AUD_OVERRIDE, 0, 31,
1273 dif_misc_ctrl_value |=0x3a023F11; 1680 0x27000100);
1274 1681 status =
1275 } else { /* V4L2_STD_NTSC_M (75 IRE Setup) Or V4L2_STD_NTSC_M_JP (Japan, 0 IRE Setup) */ 1682 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1276 1683 DIF_AV_SEP_CTRL, 0, 31, 0x5F39A934);
1277 /* For NTSC the centre frequency of video coming out of sidewinder is 1684 status =
1278 around 7.1MHz or 3.6MHz depending on the spectral inversion. 1685 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1279 so for a non spectrally inverted channel the pll freq word is 0x03420c49 1686 DIF_COMP_FLT_CTRL, 0, 31,
1280 */ 1687 0x00000000);
1281 1688 status =
1282 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_PLL_CTRL, 2, 0x6503BC0C, 4); 1689 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1283 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_PLL_CTRL1, 2, 0xBD038C85, 4); 1690 DIF_SRC_PHASE_INC, 0, 31,
1284 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_PLL_CTRL2, 2, 0x1DB4640A, 4); 1691 0x1befbf06);
1285 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_PLL_CTRL3, 2, 0x00008800, 4); 1692 status =
1286 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_AGC_IF_REF, 2, 0x444C0380, 4); 1693 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1287 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_AGC_IF_INT_CURRENT, 2, 0x26001700, 4); 1694 DIF_SRC_GAIN_CONTROL, 0, 31,
1288 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_AGC_RF_CURRENT, 2, 0x00002660, 4); 1695 0x000035e8);
1289 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_VIDEO_AGC_CTRL, 2, 0x04000800, 4); 1696 status =
1290 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_VID_AUD_OVERRIDE, 2, 0x27000100, 4); 1697 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1291 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_AV_SEP_CTRL, 2, 0x01296e1f, 4); 1698 DIF_RPT_VARIANCE, 0, 31, 0x00000000);
1292 1699 /* Save the Spec Inversion value */
1293 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_COMP_FLT_CTRL, 2, 0x009f50c1, 4); 1700 dif_misc_ctrl_value &= FLD_DIF_SPEC_INV;
1294 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_SRC_PHASE_INC, 2, 0x1befbf06, 4); 1701 dif_misc_ctrl_value |= 0x3a033F11;
1295 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_SRC_GAIN_CONTROL, 2, 0x000035e8, 4); 1702
1296 1703 } else if (standard & V4L2_STD_PAL_M) {
1297 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_AGC_CTRL_IF, 2, 0xC2262600, 4); 1704
1298 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_AGC_CTRL_INT, 2, 0xC2262600, 4); 1705 /* improved Low Frequency Phase Noise */
1299 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_AGC_CTRL_RF, 2, 0xC2262600, 4); 1706 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1300 1707 DIF_PLL_CTRL, 2, 0xFF01FF0C, 4);
1301 /* Save the Spec Inversion value */ 1708 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1302 dif_misc_ctrl_value &= FLD_DIF_SPEC_INV; 1709 DIF_PLL_CTRL1, 2, 0xbd038c85,
1303 dif_misc_ctrl_value |= 0x3a003F10; 1710 4);
1304 1711 status =
1305 } 1712 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1306 1713 DIF_PLL_CTRL2, 2, 0x1db4640a, 4);
1307 /* The AGC values should be the same for all standards, 1714 status =
1308 AUD_SRC_SEL[19] should always be disabled */ 1715 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1309 dif_misc_ctrl_value &= ~FLD_DIF_AUD_SRC_SEL; 1716 DIF_PLL_CTRL3, 2, 0x00008800, 4);
1310 1717 status =
1311 /* It is still possible to get Set Standard calls even when we are in FM mode 1718 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1312 This is done to override the value for FM. */ 1719 DIF_AGC_IF_REF, 2, 0x444C1380, 4);
1313 if (dev->active_mode == V4L2_TUNER_RADIO) 1720 status =
1314 dif_misc_ctrl_value = 0x7a080000; 1721 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1315 1722 DIF_AGC_IF_INT_CURRENT, 2,
1316 /* Write the calculated value for misc ontrol register */ 1723 0x26001700, 4);
1317 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_MISC_CTRL, 2, dif_misc_ctrl_value, 4); 1724 status =
1318 1725 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1319 return status; 1726 DIF_AGC_RF_CURRENT, 2, 0x00002660,
1727 4);
1728 status =
1729 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1730 DIF_VIDEO_AGC_CTRL, 2, 0x72500800,
1731 4);
1732 status =
1733 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1734 DIF_VID_AUD_OVERRIDE, 2, 0x27000100,
1735 4);
1736 status =
1737 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1738 DIF_AV_SEP_CTRL, 2, 0x012c405d, 4);
1739 status =
1740 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1741 DIF_COMP_FLT_CTRL, 2, 0x009f50c1, 4);
1742 status =
1743 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1744 DIF_SRC_PHASE_INC, 2, 0x1befbf06, 4);
1745 status =
1746 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1747 DIF_SRC_GAIN_CONTROL, 2, 0x000035e8,
1748 4);
1749 status =
1750 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1751 DIF_SOFT_RST_CTRL_REVB, 2,
1752 0x00000000, 4);
1753
1754 /* Save the Spec Inversion value */
1755 dif_misc_ctrl_value &= FLD_DIF_SPEC_INV;
1756 dif_misc_ctrl_value |= 0x3A0A3F10;
1757
1758 } else if (standard & (V4L2_STD_PAL_N | V4L2_STD_PAL_Nc)) {
1759
1760 /* improved Low Frequency Phase Noise */
1761 status =
1762 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1763 DIF_PLL_CTRL, 2, 0xFF01FF0C, 4);
1764 status =
1765 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1766 DIF_PLL_CTRL1, 2, 0xbd038c85, 4);
1767 status =
1768 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1769 DIF_PLL_CTRL2, 2, 0x1db4640a, 4);
1770 status =
1771 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1772 DIF_PLL_CTRL3, 2, 0x00008800, 4);
1773 status =
1774 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1775 DIF_AGC_IF_REF, 2, 0x444C1380, 4);
1776 status =
1777 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1778 DIF_AGC_IF_INT_CURRENT, 2,
1779 0x26001700, 4);
1780 status =
1781 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1782 DIF_AGC_RF_CURRENT, 2, 0x00002660,
1783 4);
1784 status =
1785 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1786 DIF_VIDEO_AGC_CTRL, 2, 0x72500800,
1787 4);
1788 status =
1789 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1790 DIF_VID_AUD_OVERRIDE, 2, 0x27000100,
1791 4);
1792 status =
1793 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1794 DIF_AV_SEP_CTRL, 2, 0x012c405d, 4);
1795 status =
1796 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1797 DIF_COMP_FLT_CTRL, 2, 0x009f50c1, 4);
1798 status =
1799 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1800 DIF_SRC_PHASE_INC, 2, 0x1befbf06, 4);
1801 status =
1802 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1803 DIF_SRC_GAIN_CONTROL, 2, 0x000035e8,
1804 4);
1805 status =
1806 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1807 DIF_SOFT_RST_CTRL_REVB, 2,
1808 0x00000000, 4);
1809
1810 /* Save the Spec Inversion value */
1811 dif_misc_ctrl_value &= FLD_DIF_SPEC_INV;
1812 dif_misc_ctrl_value = 0x3A093F10;
1813
1814 } else if (standard &
1815 (V4L2_STD_SECAM_B | V4L2_STD_SECAM_D | V4L2_STD_SECAM_G |
1816 V4L2_STD_SECAM_K | V4L2_STD_SECAM_K1)) {
1817
1818 status =
1819 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1820 DIF_PLL_CTRL, 0, 31, 0x6503bc0c);
1821 status =
1822 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1823 DIF_PLL_CTRL1, 0, 31, 0xbd038c85);
1824 status =
1825 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1826 DIF_PLL_CTRL2, 0, 31, 0x1db4640a);
1827 status =
1828 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1829 DIF_PLL_CTRL3, 0, 31, 0x00008800);
1830 status =
1831 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1832 DIF_AGC_IF_REF, 0, 31, 0x888C0380);
1833 status =
1834 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1835 DIF_AGC_CTRL_IF, 0, 31, 0xe0262600);
1836 status =
1837 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1838 DIF_AGC_CTRL_INT, 0, 31, 0xc2171700);
1839 status =
1840 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1841 DIF_AGC_CTRL_RF, 0, 31, 0xc2262600);
1842 status =
1843 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1844 DIF_AGC_IF_INT_CURRENT, 0, 31,
1845 0x26001700);
1846 status =
1847 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1848 DIF_AGC_RF_CURRENT, 0, 31,
1849 0x00002660);
1850 status =
1851 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1852 DIF_VID_AUD_OVERRIDE, 0, 31,
1853 0x27000100);
1854 status =
1855 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1856 DIF_AV_SEP_CTRL, 0, 31, 0x3F3530ec);
1857 status =
1858 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1859 DIF_COMP_FLT_CTRL, 0, 31,
1860 0x00000000);
1861 status =
1862 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1863 DIF_SRC_PHASE_INC, 0, 31,
1864 0x1befbf06);
1865 status =
1866 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1867 DIF_SRC_GAIN_CONTROL, 0, 31,
1868 0x000035e8);
1869 status =
1870 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1871 DIF_RPT_VARIANCE, 0, 31, 0x00000000);
1872 status =
1873 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1874 DIF_VIDEO_AGC_CTRL, 0, 31,
1875 0xf4000000);
1876
1877 /* Save the Spec Inversion value */
1878 dif_misc_ctrl_value &= FLD_DIF_SPEC_INV;
1879 dif_misc_ctrl_value |= 0x3a023F11;
1880
1881 } else if (standard & (V4L2_STD_SECAM_L | V4L2_STD_SECAM_LC)) {
1882
1883 /* Is it SECAM_L1? */
1884 status =
1885 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1886 DIF_PLL_CTRL, 0, 31, 0x6503bc0c);
1887 status =
1888 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1889 DIF_PLL_CTRL1, 0, 31, 0xbd038c85);
1890 status =
1891 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1892 DIF_PLL_CTRL2, 0, 31, 0x1db4640a);
1893 status =
1894 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1895 DIF_PLL_CTRL3, 0, 31, 0x00008800);
1896 status =
1897 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1898 DIF_AGC_IF_REF, 0, 31, 0x888C0380);
1899 status =
1900 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1901 DIF_AGC_CTRL_IF, 0, 31, 0xe0262600);
1902 status =
1903 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1904 DIF_AGC_CTRL_INT, 0, 31, 0xc2171700);
1905 status =
1906 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1907 DIF_AGC_CTRL_RF, 0, 31, 0xc2262600);
1908 status =
1909 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1910 DIF_AGC_IF_INT_CURRENT, 0, 31,
1911 0x26001700);
1912 status =
1913 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1914 DIF_AGC_RF_CURRENT, 0, 31,
1915 0x00002660);
1916 status =
1917 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1918 DIF_VID_AUD_OVERRIDE, 0, 31,
1919 0x27000100);
1920 status =
1921 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1922 DIF_AV_SEP_CTRL, 0, 31, 0x3F3530ec);
1923 status =
1924 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1925 DIF_COMP_FLT_CTRL, 0, 31,
1926 0x00000000);
1927 status =
1928 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1929 DIF_SRC_PHASE_INC, 0, 31,
1930 0x1befbf06);
1931 status =
1932 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1933 DIF_SRC_GAIN_CONTROL, 0, 31,
1934 0x000035e8);
1935 status =
1936 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1937 DIF_RPT_VARIANCE, 0, 31, 0x00000000);
1938 status =
1939 cx231xx_reg_mask_write(dev, HAMMERHEAD_I2C_ADDRESS, 32,
1940 DIF_VIDEO_AGC_CTRL, 0, 31,
1941 0xf2560000);
1942
1943 /* Save the Spec Inversion value */
1944 dif_misc_ctrl_value &= FLD_DIF_SPEC_INV;
1945 dif_misc_ctrl_value |= 0x3a023F11;
1946
1947 } else { /* V4L2_STD_NTSC_M (75 IRE Setup) Or V4L2_STD_NTSC_M_JP (Japan, 0 IRE Setup) */
1948
1949 /* For NTSC the centre frequency of video coming out of sidewinder is
1950 around 7.1MHz or 3.6MHz depending on the spectral inversion.
1951 so for a non spectrally inverted channel the pll freq word is 0x03420c49
1952 */
1953
1954 status =
1955 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1956 DIF_PLL_CTRL, 2, 0x6503BC0C, 4);
1957 status =
1958 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1959 DIF_PLL_CTRL1, 2, 0xBD038C85, 4);
1960 status =
1961 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1962 DIF_PLL_CTRL2, 2, 0x1DB4640A, 4);
1963 status =
1964 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1965 DIF_PLL_CTRL3, 2, 0x00008800, 4);
1966 status =
1967 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1968 DIF_AGC_IF_REF, 2, 0x444C0380, 4);
1969 status =
1970 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1971 DIF_AGC_IF_INT_CURRENT, 2,
1972 0x26001700, 4);
1973 status =
1974 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1975 DIF_AGC_RF_CURRENT, 2, 0x00002660,
1976 4);
1977 status =
1978 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1979 DIF_VIDEO_AGC_CTRL, 2, 0x04000800,
1980 4);
1981 status =
1982 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1983 DIF_VID_AUD_OVERRIDE, 2, 0x27000100,
1984 4);
1985 status =
1986 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1987 DIF_AV_SEP_CTRL, 2, 0x01296e1f, 4);
1988
1989 status =
1990 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1991 DIF_COMP_FLT_CTRL, 2, 0x009f50c1, 4);
1992 status =
1993 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1994 DIF_SRC_PHASE_INC, 2, 0x1befbf06, 4);
1995 status =
1996 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1997 DIF_SRC_GAIN_CONTROL, 2, 0x000035e8,
1998 4);
1999
2000 status =
2001 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
2002 DIF_AGC_CTRL_IF, 2, 0xC2262600, 4);
2003 status =
2004 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
2005 DIF_AGC_CTRL_INT, 2, 0xC2262600, 4);
2006 status =
2007 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
2008 DIF_AGC_CTRL_RF, 2, 0xC2262600, 4);
2009
2010 /* Save the Spec Inversion value */
2011 dif_misc_ctrl_value &= FLD_DIF_SPEC_INV;
2012 dif_misc_ctrl_value |= 0x3a003F10;
2013
2014 }
2015
2016 /* The AGC values should be the same for all standards,
2017 AUD_SRC_SEL[19] should always be disabled */
2018 dif_misc_ctrl_value &= ~FLD_DIF_AUD_SRC_SEL;
2019
2020 /* It is still possible to get Set Standard calls even when we are in FM mode
2021 This is done to override the value for FM. */
2022 if (dev->active_mode == V4L2_TUNER_RADIO)
2023 dif_misc_ctrl_value = 0x7a080000;
2024
2025 /* Write the calculated value for misc ontrol register */
2026 status =
2027 cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, DIF_MISC_CTRL,
2028 2, dif_misc_ctrl_value, 4);
2029
2030 return status;
1320} 2031}
1321 2032
1322int cx231xx_tuner_pre_channel_change(struct cx231xx *dev) 2033int cx231xx_tuner_pre_channel_change(struct cx231xx *dev)
@@ -1325,101 +2036,103 @@ int cx231xx_tuner_pre_channel_change(struct cx231xx *dev)
1325 u32 dwval; 2036 u32 dwval;
1326 2037
1327 /* Set the RF and IF k_agc values to 3 */ 2038 /* Set the RF and IF k_agc values to 3 */
1328 status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, 2039 status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1329 DIF_AGC_IF_REF, 2, &dwval, 4); 2040 DIF_AGC_IF_REF, 2, &dwval, 4);
1330 dwval &= ~(FLD_DIF_K_AGC_RF | FLD_DIF_K_AGC_IF); 2041 dwval &= ~(FLD_DIF_K_AGC_RF | FLD_DIF_K_AGC_IF);
1331 dwval |= 0x33000000; 2042 dwval |= 0x33000000;
1332 2043
1333 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, 2044 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1334 DIF_AGC_IF_REF, 2, dwval, 4); 2045 DIF_AGC_IF_REF, 2, dwval, 4);
1335 2046
1336 return status; 2047 return status;
1337} 2048}
1338 2049
1339int cx231xx_tuner_post_channel_change(struct cx231xx *dev) 2050int cx231xx_tuner_post_channel_change(struct cx231xx *dev)
1340{ 2051{
1341 int status = 0; 2052 int status = 0;
1342 u32 dwval; 2053 u32 dwval;
1343 2054
1344 /* Set the RF and IF k_agc values to 4 for PAL/NTSC and 8 for SECAM */ 2055 /* Set the RF and IF k_agc values to 4 for PAL/NTSC and 8 for SECAM */
1345 status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, 2056 status = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1346 DIF_AGC_IF_REF, 2, &dwval, 4); 2057 DIF_AGC_IF_REF, 2, &dwval, 4);
1347 dwval &= ~(FLD_DIF_K_AGC_RF | FLD_DIF_K_AGC_IF); 2058 dwval &= ~(FLD_DIF_K_AGC_RF | FLD_DIF_K_AGC_IF);
1348 2059
1349 if(dev->norm & ( V4L2_STD_SECAM_L | V4L2_STD_SECAM_B | V4L2_STD_SECAM_D) ) { 2060 if (dev->
1350 dwval |= 0x88000000; 2061 norm & (V4L2_STD_SECAM_L | V4L2_STD_SECAM_B | V4L2_STD_SECAM_D)) {
1351 } else { 2062 dwval |= 0x88000000;
1352 dwval |= 0x44000000; 2063 } else {
1353 } 2064 dwval |= 0x44000000;
2065 }
1354 2066
1355 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, 2067 status = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1356 DIF_AGC_IF_REF, 2, dwval, 4); 2068 DIF_AGC_IF_REF, 2, dwval, 4);
1357 2069
1358 return status; 2070 return status;
1359} 2071}
1360 2072
1361
1362
1363/************************************************************************************* 2073/*************************************************************************************
1364 * F L A T I R O N - B L O C K C O N T R O L functions * 2074 * F L A T I R O N - B L O C K C O N T R O L functions *
1365 *************************************************************************************/ 2075 *************************************************************************************/
1366int cx231xx_flatiron_initialize(struct cx231xx *dev) 2076int cx231xx_flatiron_initialize(struct cx231xx *dev)
1367{ 2077{
1368 int status = 0; 2078 int status = 0;
1369 u32 value; 2079 u32 value;
1370 2080
1371 status = cx231xx_read_i2c_data(dev, Flatrion_DEVICE_ADDRESS, CH_PWR_CTRL1, 1, &value, 1); 2081 status =
1372 /* enables clock to delta-sigma and decimation filter */ 2082 cx231xx_read_i2c_data(dev, Flatrion_DEVICE_ADDRESS, CH_PWR_CTRL1, 1,
1373 value |= 0x80; 2083 &value, 1);
1374 status = cx231xx_write_i2c_data(dev, Flatrion_DEVICE_ADDRESS, 2084 /* enables clock to delta-sigma and decimation filter */
1375 CH_PWR_CTRL1, 1, value, 1); 2085 value |= 0x80;
1376 /* power up all channel */ 2086 status = cx231xx_write_i2c_data(dev, Flatrion_DEVICE_ADDRESS,
1377 status = cx231xx_write_i2c_data(dev, Flatrion_DEVICE_ADDRESS, 2087 CH_PWR_CTRL1, 1, value, 1);
1378 CH_PWR_CTRL2, 1, 0x00, 1); 2088 /* power up all channel */
1379 2089 status = cx231xx_write_i2c_data(dev, Flatrion_DEVICE_ADDRESS,
1380 return status; 2090 CH_PWR_CTRL2, 1, 0x00, 1);
2091
2092 return status;
1381} 2093}
1382 2094
1383int cx231xx_flatiron_update_power_control(struct cx231xx *dev, AV_MODE avmode) 2095int cx231xx_flatiron_update_power_control(struct cx231xx *dev, AV_MODE avmode)
1384{ 2096{
1385 int status = 0; 2097 int status = 0;
1386 u32 value=0; 2098 u32 value = 0;
1387 2099
1388 if(avmode!=POLARIS_AVMODE_ENXTERNAL_AV) { 2100 if (avmode != POLARIS_AVMODE_ENXTERNAL_AV) {
1389 status = cx231xx_read_i2c_data(dev, Flatrion_DEVICE_ADDRESS, CH_PWR_CTRL2, 1, &value, 1); 2101 status =
1390 value |= 0xfe; 2102 cx231xx_read_i2c_data(dev, Flatrion_DEVICE_ADDRESS,
1391 status = cx231xx_write_i2c_data(dev, Flatrion_DEVICE_ADDRESS, 2103 CH_PWR_CTRL2, 1, &value, 1);
1392 CH_PWR_CTRL2, 1, value, 1); 2104 value |= 0xfe;
1393 } 2105 status = cx231xx_write_i2c_data(dev, Flatrion_DEVICE_ADDRESS,
1394 else { 2106 CH_PWR_CTRL2, 1, value, 1);
1395 status = cx231xx_write_i2c_data(dev, Flatrion_DEVICE_ADDRESS, 2107 } else {
1396 CH_PWR_CTRL2, 1, 0x00, 1); 2108 status = cx231xx_write_i2c_data(dev, Flatrion_DEVICE_ADDRESS,
1397 } 2109 CH_PWR_CTRL2, 1, 0x00, 1);
1398 2110 }
1399 return status; 2111
2112 return status;
1400} 2113}
1401 2114
1402/* set flatiron for audio input types */ 2115/* set flatiron for audio input types */
1403int cx231xx_flatiron_set_audio_input(struct cx231xx *dev, u8 audio_input) 2116int cx231xx_flatiron_set_audio_input(struct cx231xx *dev, u8 audio_input)
1404{ 2117{
1405 int status = 0; 2118 int status = 0;
1406
1407 switch(audio_input) {
1408 case CX231XX_AMUX_LINE_IN:
1409 2119
1410 status = cx231xx_write_i2c_data(dev, Flatrion_DEVICE_ADDRESS, 2120 switch (audio_input) {
1411 CH_PWR_CTRL2, 1, 0x00, 1); 2121 case CX231XX_AMUX_LINE_IN:
1412 status = cx231xx_write_i2c_data(dev, Flatrion_DEVICE_ADDRESS, 2122
1413 CH_PWR_CTRL1, 1, 0x80, 1); 2123 status = cx231xx_write_i2c_data(dev, Flatrion_DEVICE_ADDRESS,
1414 break; 2124 CH_PWR_CTRL2, 1, 0x00, 1);
1415 case CX231XX_AMUX_VIDEO: 2125 status = cx231xx_write_i2c_data(dev, Flatrion_DEVICE_ADDRESS,
1416 default: 2126 CH_PWR_CTRL1, 1, 0x80, 1);
1417 break; 2127 break;
1418 } 2128 case CX231XX_AMUX_VIDEO:
2129 default:
2130 break;
2131 }
1419 2132
1420 dev->ctl_ainput = audio_input; 2133 dev->ctl_ainput = audio_input;
1421 2134
1422 return status; 2135 return status;
1423} 2136}
1424 2137
1425/************************************************************************************* 2138/*************************************************************************************
@@ -1427,438 +2140,467 @@ int cx231xx_flatiron_set_audio_input(struct cx231xx *dev, u8 audio_input)
1427 *************************************************************************************/ 2140 *************************************************************************************/
1428int cx231xx_set_power_mode(struct cx231xx *dev, AV_MODE mode) 2141int cx231xx_set_power_mode(struct cx231xx *dev, AV_MODE mode)
1429{ 2142{
1430 u8 value[4] ={0,0,0,0}; 2143 u8 value[4] = { 0, 0, 0, 0 };
1431 u32 tmp = 0; 2144 u32 tmp = 0;
1432 int status = 0; 2145 int status = 0;
1433 2146
1434 if(dev->power_mode != mode) 2147 if (dev->power_mode != mode)
1435 dev->power_mode = mode; 2148 dev->power_mode = mode;
1436 else { 2149 else {
1437 cx231xx_info(" setPowerMode::mode = %d, No Change req.\n",mode); 2150 cx231xx_info(" setPowerMode::mode = %d, No Change req.\n",
1438 return 0; 2151 mode);
1439 } 2152 return 0;
1440 2153 }
1441 cx231xx_info(" setPowerMode::mode = %d\n",mode); 2154
1442 2155 cx231xx_info(" setPowerMode::mode = %d\n", mode);
1443 status = cx231xx_read_ctrl_reg(dev,VRT_GET_REGISTER, PWR_CTL_EN, value, 4); 2156
1444 if(status < 0) 2157 status =
1445 return status; 2158 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN, value, 4);
1446 2159 if (status < 0)
1447 tmp = *((u32 *)value); 2160 return status;
1448 2161
1449 switch(mode) { 2162 tmp = *((u32 *) value);
1450 case POLARIS_AVMODE_ENXTERNAL_AV: 2163
1451 2164 switch (mode) {
1452 tmp &= (~PWR_MODE_MASK); 2165 case POLARIS_AVMODE_ENXTERNAL_AV:
1453 2166
1454 tmp |= PWR_AV_EN; 2167 tmp &= (~PWR_MODE_MASK);
1455 value[0]=(u8)tmp; 2168
1456 value[1]=(u8)(tmp>>8); 2169 tmp |= PWR_AV_EN;
1457 value[2]=(u8)(tmp>>16); 2170 value[0] = (u8) tmp;
1458 value[3]=(u8)(tmp>>24); 2171 value[1] = (u8) (tmp >> 8);
1459 status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, PWR_CTL_EN,value,4); 2172 value[2] = (u8) (tmp >> 16);
1460 msleep(PWR_SLEEP_INTERVAL); 2173 value[3] = (u8) (tmp >> 24);
1461 2174 status =
1462 tmp |= PWR_ISO_EN; 2175 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, PWR_CTL_EN,
1463 value[0]=(u8)tmp; 2176 value, 4);
1464 value[1]=(u8)(tmp>>8); 2177 msleep(PWR_SLEEP_INTERVAL);
1465 value[2]=(u8)(tmp>>16); 2178
1466 value[3]=(u8)(tmp>>24); 2179 tmp |= PWR_ISO_EN;
1467 status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, PWR_CTL_EN,value,4); 2180 value[0] = (u8) tmp;
1468 msleep(PWR_SLEEP_INTERVAL); 2181 value[1] = (u8) (tmp >> 8);
1469 2182 value[2] = (u8) (tmp >> 16);
1470 tmp |=POLARIS_AVMODE_ENXTERNAL_AV; 2183 value[3] = (u8) (tmp >> 24);
1471 value[0]=(u8)tmp; 2184 status =
1472 value[1]=(u8)(tmp>>8); 2185 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, PWR_CTL_EN,
1473 value[2]=(u8)(tmp>>16); 2186 value, 4);
1474 value[3]=(u8)(tmp>>24); 2187 msleep(PWR_SLEEP_INTERVAL);
1475 status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, PWR_CTL_EN,value,4); 2188
1476 2189 tmp |= POLARIS_AVMODE_ENXTERNAL_AV;
1477 dev->xc_fw_load_done = 0; /* reset state of xceive tuner */ 2190 value[0] = (u8) tmp;
1478 break; 2191 value[1] = (u8) (tmp >> 8);
1479 2192 value[2] = (u8) (tmp >> 16);
1480 case POLARIS_AVMODE_ANALOGT_TV: 2193 value[3] = (u8) (tmp >> 24);
1481 2194 status =
1482 tmp &= (~PWR_DEMOD_EN); 2195 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, PWR_CTL_EN,
1483 tmp |= (I2C_DEMOD_EN); 2196 value, 4);
1484 value[0]=(u8)tmp; 2197
1485 value[1]=(u8)(tmp>>8); 2198 dev->xc_fw_load_done = 0; /* reset state of xceive tuner */
1486 value[2]=(u8)(tmp>>16); 2199 break;
1487 value[3]=(u8)(tmp>>24); 2200
1488 status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, PWR_CTL_EN,value,4); 2201 case POLARIS_AVMODE_ANALOGT_TV:
1489 msleep(PWR_SLEEP_INTERVAL); 2202
1490 2203 tmp &= (~PWR_DEMOD_EN);
1491 if(!(tmp & PWR_TUNER_EN)) { 2204 tmp |= (I2C_DEMOD_EN);
1492 tmp |= (PWR_TUNER_EN); 2205 value[0] = (u8) tmp;
1493 value[0]=(u8)tmp; 2206 value[1] = (u8) (tmp >> 8);
1494 value[1]=(u8)(tmp>>8); 2207 value[2] = (u8) (tmp >> 16);
1495 value[2]=(u8)(tmp>>16); 2208 value[3] = (u8) (tmp >> 24);
1496 value[3]=(u8)(tmp>>24); 2209 status =
1497 status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, PWR_CTL_EN,value,4); 2210 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, PWR_CTL_EN,
1498 msleep(PWR_SLEEP_INTERVAL); 2211 value, 4);
1499 } 2212 msleep(PWR_SLEEP_INTERVAL);
1500 2213
1501 if(!(tmp & PWR_AV_EN)) { 2214 if (!(tmp & PWR_TUNER_EN)) {
1502 tmp |= PWR_AV_EN; 2215 tmp |= (PWR_TUNER_EN);
1503 value[0]=(u8)tmp; 2216 value[0] = (u8) tmp;
1504 value[1]=(u8)(tmp>>8); 2217 value[1] = (u8) (tmp >> 8);
1505 value[2]=(u8)(tmp>>16); 2218 value[2] = (u8) (tmp >> 16);
1506 value[3]=(u8)(tmp>>24); 2219 value[3] = (u8) (tmp >> 24);
1507 status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, PWR_CTL_EN,value,4); 2220 status =
1508 msleep(PWR_SLEEP_INTERVAL); 2221 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
1509 } 2222 PWR_CTL_EN, value, 4);
1510 if(!(tmp & PWR_ISO_EN )) { 2223 msleep(PWR_SLEEP_INTERVAL);
1511 tmp |= PWR_ISO_EN; 2224 }
1512 value[0]=(u8)tmp; 2225
1513 value[1]=(u8)(tmp>>8); 2226 if (!(tmp & PWR_AV_EN)) {
1514 value[2]=(u8)(tmp>>16); 2227 tmp |= PWR_AV_EN;
1515 value[3]=(u8)(tmp>>24); 2228 value[0] = (u8) tmp;
1516 status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, PWR_CTL_EN,value,4); 2229 value[1] = (u8) (tmp >> 8);
1517 msleep(PWR_SLEEP_INTERVAL); 2230 value[2] = (u8) (tmp >> 16);
1518 } 2231 value[3] = (u8) (tmp >> 24);
1519 2232 status =
1520 if(!(tmp & POLARIS_AVMODE_ANALOGT_TV )) { 2233 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
1521 tmp |= POLARIS_AVMODE_ANALOGT_TV; 2234 PWR_CTL_EN, value, 4);
1522 value[0]=(u8)tmp; 2235 msleep(PWR_SLEEP_INTERVAL);
1523 value[1]=(u8)(tmp>>8); 2236 }
1524 value[2]=(u8)(tmp>>16); 2237 if (!(tmp & PWR_ISO_EN)) {
1525 value[3]=(u8)(tmp>>24); 2238 tmp |= PWR_ISO_EN;
1526 status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, PWR_CTL_EN,value,4); 2239 value[0] = (u8) tmp;
1527 msleep(PWR_SLEEP_INTERVAL); 2240 value[1] = (u8) (tmp >> 8);
1528 } 2241 value[2] = (u8) (tmp >> 16);
1529 2242 value[3] = (u8) (tmp >> 24);
1530 if( (dev->model == CX231XX_BOARD_CNXT_RDE_250) || 2243 status =
1531 (dev->model == CX231XX_BOARD_CNXT_RDU_250)) { 2244 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
1532 2245 PWR_CTL_EN, value, 4);
1533 /* tuner path to channel 1 from port 3 */ 2246 msleep(PWR_SLEEP_INTERVAL);
1534 cx231xx_enable_i2c_for_tuner(dev, I2C_3); 2247 }
1535 2248
1536 if(dev->cx231xx_reset_analog_tuner) 2249 if (!(tmp & POLARIS_AVMODE_ANALOGT_TV)) {
1537 dev->cx231xx_reset_analog_tuner(dev); 2250 tmp |= POLARIS_AVMODE_ANALOGT_TV;
1538 } 2251 value[0] = (u8) tmp;
1539 break; 2252 value[1] = (u8) (tmp >> 8);
1540 2253 value[2] = (u8) (tmp >> 16);
1541 case POLARIS_AVMODE_DIGITAL: 2254 value[3] = (u8) (tmp >> 24);
1542 2255 status =
1543 if(!(tmp & PWR_TUNER_EN)) { 2256 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
1544 tmp |= (PWR_TUNER_EN); 2257 PWR_CTL_EN, value, 4);
1545 value[0]=(u8)tmp; 2258 msleep(PWR_SLEEP_INTERVAL);
1546 value[1]=(u8)(tmp>>8); 2259 }
1547 value[2]=(u8)(tmp>>16); 2260
1548 value[3]=(u8)(tmp>>24); 2261 if ((dev->model == CX231XX_BOARD_CNXT_RDE_250) ||
1549 status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, PWR_CTL_EN,value,4); 2262 (dev->model == CX231XX_BOARD_CNXT_RDU_250)) {
1550 msleep(PWR_SLEEP_INTERVAL); 2263
1551 } 2264 /* tuner path to channel 1 from port 3 */
1552 if(!(tmp & PWR_AV_EN)) { 2265 cx231xx_enable_i2c_for_tuner(dev, I2C_3);
1553 tmp |= PWR_AV_EN; 2266
1554 value[0]=(u8)tmp; 2267 if (dev->cx231xx_reset_analog_tuner)
1555 value[1]=(u8)(tmp>>8); 2268 dev->cx231xx_reset_analog_tuner(dev);
1556 value[2]=(u8)(tmp>>16); 2269 }
1557 value[3]=(u8)(tmp>>24); 2270 break;
1558 status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, PWR_CTL_EN,value,4); 2271
1559 msleep(PWR_SLEEP_INTERVAL); 2272 case POLARIS_AVMODE_DIGITAL:
1560 } 2273
1561 if(!(tmp & PWR_ISO_EN)) { 2274 if (!(tmp & PWR_TUNER_EN)) {
1562 tmp |= PWR_ISO_EN; 2275 tmp |= (PWR_TUNER_EN);
1563 value[0]=(u8)tmp; 2276 value[0] = (u8) tmp;
1564 value[1]=(u8)(tmp>>8); 2277 value[1] = (u8) (tmp >> 8);
1565 value[2]=(u8)(tmp>>16); 2278 value[2] = (u8) (tmp >> 16);
1566 value[3]=(u8)(tmp>>24); 2279 value[3] = (u8) (tmp >> 24);
1567 status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, PWR_CTL_EN,value,4); 2280 status =
1568 msleep(PWR_SLEEP_INTERVAL); 2281 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
1569 } 2282 PWR_CTL_EN, value, 4);
1570 2283 msleep(PWR_SLEEP_INTERVAL);
1571 tmp |= POLARIS_AVMODE_DIGITAL|I2C_DEMOD_EN; 2284 }
1572 value[0]=(u8)tmp; 2285 if (!(tmp & PWR_AV_EN)) {
1573 value[1]=(u8)(tmp>>8); 2286 tmp |= PWR_AV_EN;
1574 value[2]=(u8)(tmp>>16); 2287 value[0] = (u8) tmp;
1575 value[3]=(u8)(tmp>>24); 2288 value[1] = (u8) (tmp >> 8);
1576 status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, PWR_CTL_EN,value,4); 2289 value[2] = (u8) (tmp >> 16);
1577 msleep(PWR_SLEEP_INTERVAL); 2290 value[3] = (u8) (tmp >> 24);
1578 2291 status =
1579 if(!(tmp & PWR_DEMOD_EN)) { 2292 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
1580 tmp |= PWR_DEMOD_EN; 2293 PWR_CTL_EN, value, 4);
1581 value[0]=(u8)tmp; 2294 msleep(PWR_SLEEP_INTERVAL);
1582 value[1]=(u8)(tmp>>8); 2295 }
1583 value[2]=(u8)(tmp>>16); 2296 if (!(tmp & PWR_ISO_EN)) {
1584 value[3]=(u8)(tmp>>24); 2297 tmp |= PWR_ISO_EN;
1585 status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, PWR_CTL_EN,value,4); 2298 value[0] = (u8) tmp;
1586 msleep(PWR_SLEEP_INTERVAL); 2299 value[1] = (u8) (tmp >> 8);
1587 } 2300 value[2] = (u8) (tmp >> 16);
1588 2301 value[3] = (u8) (tmp >> 24);
1589 if( (dev->model == CX231XX_BOARD_CNXT_RDE_250) || 2302 status =
1590 (dev->model == CX231XX_BOARD_CNXT_RDU_250)) { 2303 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
1591 2304 PWR_CTL_EN, value, 4);
1592 /* tuner path to channel 1 from port 3 */ 2305 msleep(PWR_SLEEP_INTERVAL);
1593 cx231xx_enable_i2c_for_tuner(dev, I2C_3); 2306 }
1594 2307
1595 if(dev->cx231xx_reset_analog_tuner) 2308 tmp |= POLARIS_AVMODE_DIGITAL | I2C_DEMOD_EN;
1596 dev->cx231xx_reset_analog_tuner(dev); 2309 value[0] = (u8) tmp;
1597 } 2310 value[1] = (u8) (tmp >> 8);
1598 break; 2311 value[2] = (u8) (tmp >> 16);
1599 2312 value[3] = (u8) (tmp >> 24);
1600 default: 2313 status =
1601 break; 2314 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, PWR_CTL_EN,
1602 } 2315 value, 4);
1603 2316 msleep(PWR_SLEEP_INTERVAL);
1604 msleep(PWR_SLEEP_INTERVAL); 2317
1605 2318 if (!(tmp & PWR_DEMOD_EN)) {
1606 /* For power saving, only enable Pwr_resetout_n when digital TV is selected. */ 2319 tmp |= PWR_DEMOD_EN;
1607 if(mode == POLARIS_AVMODE_DIGITAL) { 2320 value[0] = (u8) tmp;
1608 tmp |= PWR_RESETOUT_EN; 2321 value[1] = (u8) (tmp >> 8);
1609 value[0]=(u8)tmp; 2322 value[2] = (u8) (tmp >> 16);
1610 value[1]=(u8)(tmp>>8); 2323 value[3] = (u8) (tmp >> 24);
1611 value[2]=(u8)(tmp>>16); 2324 status =
1612 value[3]=(u8)(tmp>>24); 2325 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
1613 status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, PWR_CTL_EN,value,4); 2326 PWR_CTL_EN, value, 4);
1614 msleep(PWR_SLEEP_INTERVAL); 2327 msleep(PWR_SLEEP_INTERVAL);
1615 } 2328 }
1616 2329
1617 /* update power control for colibri */ 2330 if ((dev->model == CX231XX_BOARD_CNXT_RDE_250) ||
1618 status = cx231xx_colibri_update_power_control(dev, mode); 2331 (dev->model == CX231XX_BOARD_CNXT_RDU_250)) {
1619 2332
1620 /* update power control for flatiron */ 2333 /* tuner path to channel 1 from port 3 */
1621 status = cx231xx_flatiron_update_power_control(dev, mode); 2334 cx231xx_enable_i2c_for_tuner(dev, I2C_3);
1622 2335
1623 status = cx231xx_read_ctrl_reg(dev,VRT_GET_REGISTER, PWR_CTL_EN, value, 4); 2336 if (dev->cx231xx_reset_analog_tuner)
1624 cx231xx_info(" The data of PWR_CTL_EN register 0x74=0x%0x,0x%0x,0x%0x,0x%0x\n",value[0],value[1],value[2],value[3]); 2337 dev->cx231xx_reset_analog_tuner(dev);
1625 2338 }
1626 return status; 2339 break;
2340
2341 default:
2342 break;
2343 }
2344
2345 msleep(PWR_SLEEP_INTERVAL);
2346
2347 /* For power saving, only enable Pwr_resetout_n when digital TV is selected. */
2348 if (mode == POLARIS_AVMODE_DIGITAL) {
2349 tmp |= PWR_RESETOUT_EN;
2350 value[0] = (u8) tmp;
2351 value[1] = (u8) (tmp >> 8);
2352 value[2] = (u8) (tmp >> 16);
2353 value[3] = (u8) (tmp >> 24);
2354 status =
2355 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, PWR_CTL_EN,
2356 value, 4);
2357 msleep(PWR_SLEEP_INTERVAL);
2358 }
2359
2360 /* update power control for colibri */
2361 status = cx231xx_colibri_update_power_control(dev, mode);
2362
2363 /* update power control for flatiron */
2364 status = cx231xx_flatiron_update_power_control(dev, mode);
2365
2366 status =
2367 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN, value, 4);
2368 cx231xx_info
2369 (" The data of PWR_CTL_EN register 0x74=0x%0x,0x%0x,0x%0x,0x%0x\n",
2370 value[0], value[1], value[2], value[3]);
2371
2372 return status;
1627} 2373}
1628 2374
1629int cx231xx_power_suspend(struct cx231xx *dev) 2375int cx231xx_power_suspend(struct cx231xx *dev)
1630{ 2376{
1631 u8 value[4] ={0,0,0,0}; 2377 u8 value[4] = { 0, 0, 0, 0 };
1632 u32 tmp = 0; 2378 u32 tmp = 0;
1633 int status = 0; 2379 int status = 0;
1634 2380
1635 status = cx231xx_read_ctrl_reg(dev,VRT_GET_REGISTER, PWR_CTL_EN, value, 4); 2381 status =
1636 if(status > 0) 2382 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN, value, 4);
1637 return status; 2383 if (status > 0)
2384 return status;
1638 2385
1639 tmp = *((u32 *)value); 2386 tmp = *((u32 *) value);
1640 tmp &= (~PWR_MODE_MASK); 2387 tmp &= (~PWR_MODE_MASK);
1641 2388
1642 value[0]=(u8)tmp; 2389 value[0] = (u8) tmp;
1643 value[1]=(u8)(tmp>>8); 2390 value[1] = (u8) (tmp >> 8);
1644 value[2]=(u8)(tmp>>16); 2391 value[2] = (u8) (tmp >> 16);
1645 value[3]=(u8)(tmp>>24); 2392 value[3] = (u8) (tmp >> 24);
1646 status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, PWR_CTL_EN,value,4); 2393 status =
2394 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, PWR_CTL_EN, value, 4);
1647 2395
1648 return status; 2396 return status;
1649} 2397}
1650 2398
1651
1652/************************************************************************************* 2399/*************************************************************************************
1653 * S T R E A M C O N T R O L functions * 2400 * S T R E A M C O N T R O L functions *
1654 *************************************************************************************/ 2401 *************************************************************************************/
1655int cx231xx_start_stream(struct cx231xx *dev, u32 ep_mask) 2402int cx231xx_start_stream(struct cx231xx *dev, u32 ep_mask)
1656{ 2403{
1657 u8 value[4] = {0x0, 0x0, 0x0, 0x0}; 2404 u8 value[4] = { 0x0, 0x0, 0x0, 0x0 };
1658 u32 tmp =0; 2405 u32 tmp = 0;
1659 int status = 0; 2406 int status = 0;
1660 2407
1661 cx231xx_info("cx231xx_start_stream():: ep_mask = %x\n", ep_mask); 2408 cx231xx_info("cx231xx_start_stream():: ep_mask = %x\n", ep_mask);
1662 status = cx231xx_read_ctrl_reg(dev,VRT_GET_REGISTER, EP_MODE_SET,value,4); 2409 status =
1663 if(status < 0) 2410 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, EP_MODE_SET, value, 4);
1664 return status; 2411 if (status < 0)
2412 return status;
1665 2413
1666 tmp = *((u32 *)value); 2414 tmp = *((u32 *) value);
1667 tmp |= ep_mask; 2415 tmp |= ep_mask;
1668 value[0]=(u8) tmp; 2416 value[0] = (u8) tmp;
1669 value[1]=(u8)(tmp>>8); 2417 value[1] = (u8) (tmp >> 8);
1670 value[2]=(u8)(tmp>>16); 2418 value[2] = (u8) (tmp >> 16);
1671 value[3]=(u8)(tmp>>24); 2419 value[3] = (u8) (tmp >> 24);
1672 2420
1673 status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, EP_MODE_SET,value,4); 2421 status =
2422 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, EP_MODE_SET, value,
2423 4);
1674 2424
1675 return status; 2425 return status;
1676} 2426}
1677 2427
1678int cx231xx_stop_stream(struct cx231xx *dev, u32 ep_mask) 2428int cx231xx_stop_stream(struct cx231xx *dev, u32 ep_mask)
1679{ 2429{
1680 u8 value[4] = {0x0, 0x0, 0x0, 0x0}; 2430 u8 value[4] = { 0x0, 0x0, 0x0, 0x0 };
1681 u32 tmp =0; 2431 u32 tmp = 0;
1682 int status = 0; 2432 int status = 0;
1683 2433
1684 cx231xx_info("cx231xx_stop_stream():: ep_mask = %x\n", ep_mask); 2434 cx231xx_info("cx231xx_stop_stream():: ep_mask = %x\n", ep_mask);
1685 status = cx231xx_read_ctrl_reg(dev,VRT_GET_REGISTER, EP_MODE_SET,value,4); 2435 status =
1686 if(status < 0) 2436 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, EP_MODE_SET, value, 4);
1687 return status; 2437 if (status < 0)
2438 return status;
1688 2439
1689 tmp = *((u32 *)value); 2440 tmp = *((u32 *) value);
1690 tmp&= (~ep_mask); 2441 tmp &= (~ep_mask);
1691 value[0]=(u8) tmp; 2442 value[0] = (u8) tmp;
1692 value[1]=(u8)(tmp>>8); 2443 value[1] = (u8) (tmp >> 8);
1693 value[2]=(u8)(tmp>>16); 2444 value[2] = (u8) (tmp >> 16);
1694 value[3]=(u8)(tmp>>24); 2445 value[3] = (u8) (tmp >> 24);
1695 2446
1696 status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, EP_MODE_SET,value,4); 2447 status =
2448 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, EP_MODE_SET, value,
2449 4);
1697 2450
1698 return status; 2451 return status;
1699} 2452}
1700 2453
1701int cx231xx_initialize_stream_xfer(struct cx231xx *dev, u32 media_type) 2454int cx231xx_initialize_stream_xfer(struct cx231xx *dev, u32 media_type)
1702{ 2455{
1703 int status = 0; 2456 int status = 0;
1704
1705 if(dev->udev->speed == USB_SPEED_HIGH)
1706 {
1707 switch(media_type)
1708 {
1709 case 81: /* audio */
1710 cx231xx_info("%s: Audio enter HANC\n",__func__);
1711 status = cx231xx_mode_register(dev, TS_MODE_REG, 0x9300);
1712 break;
1713
1714 case 2: /* vbi */
1715 cx231xx_info("%s: set vanc registers\n",__func__);
1716 status = cx231xx_mode_register(dev, TS_MODE_REG, 0x300);
1717 break;
1718
1719 case 3: /* sliced cc */
1720 cx231xx_info("%s: set hanc registers\n",__func__);
1721 status = cx231xx_mode_register(dev, TS_MODE_REG, 0x1300);
1722 break;
1723
1724 case 0: /* video */
1725 cx231xx_info("%s: set video registers\n",__func__);
1726 status = cx231xx_mode_register(dev, TS_MODE_REG, 0x100);
1727 break;
1728
1729 case 4: /* ts1 */
1730 cx231xx_info("%s: set ts1 registers\n",__func__);
1731 status = cx231xx_mode_register(dev, TS_MODE_REG, 0x101);
1732 status = cx231xx_mode_register(dev, TS1_CFG_REG, 0x400);
1733 break;
1734 case 6: /* ts1 parallel mode */
1735 cx231xx_info("%s: set ts1 parrallel mode registers\n",__func__);
1736 status = cx231xx_mode_register(dev, TS_MODE_REG, 0x100);
1737 status = cx231xx_mode_register(dev, TS1_CFG_REG, 0x400);
1738 break;
1739 }
1740 }
1741 else
1742 {
1743 status = cx231xx_mode_register(dev, TS_MODE_REG, 0x101);
1744 }
1745
1746 return status;
1747}
1748
1749 2457
2458 if (dev->udev->speed == USB_SPEED_HIGH) {
2459 switch (media_type) {
2460 case 81: /* audio */
2461 cx231xx_info("%s: Audio enter HANC\n", __func__);
2462 status =
2463 cx231xx_mode_register(dev, TS_MODE_REG, 0x9300);
2464 break;
2465
2466 case 2: /* vbi */
2467 cx231xx_info("%s: set vanc registers\n", __func__);
2468 status = cx231xx_mode_register(dev, TS_MODE_REG, 0x300);
2469 break;
2470
2471 case 3: /* sliced cc */
2472 cx231xx_info("%s: set hanc registers\n", __func__);
2473 status =
2474 cx231xx_mode_register(dev, TS_MODE_REG, 0x1300);
2475 break;
2476
2477 case 0: /* video */
2478 cx231xx_info("%s: set video registers\n", __func__);
2479 status = cx231xx_mode_register(dev, TS_MODE_REG, 0x100);
2480 break;
2481
2482 case 4: /* ts1 */
2483 cx231xx_info("%s: set ts1 registers\n", __func__);
2484 status = cx231xx_mode_register(dev, TS_MODE_REG, 0x101);
2485 status = cx231xx_mode_register(dev, TS1_CFG_REG, 0x400);
2486 break;
2487 case 6: /* ts1 parallel mode */
2488 cx231xx_info("%s: set ts1 parrallel mode registers\n",
2489 __func__);
2490 status = cx231xx_mode_register(dev, TS_MODE_REG, 0x100);
2491 status = cx231xx_mode_register(dev, TS1_CFG_REG, 0x400);
2492 break;
2493 }
2494 } else {
2495 status = cx231xx_mode_register(dev, TS_MODE_REG, 0x101);
2496 }
1750 2497
2498 return status;
2499}
1751 2500
1752int cx231xx_capture_start(struct cx231xx *dev, int start, u8 media_type) 2501int cx231xx_capture_start(struct cx231xx *dev, int start, u8 media_type)
1753{ 2502{
1754 int rc; 2503 int rc;
1755 u32 ep_mask = -1; 2504 u32 ep_mask = -1;
1756 PPCB_CONFIG pcb_config; 2505 PPCB_CONFIG pcb_config;
1757 2506
1758 /* get EP for media type */ 2507 /* get EP for media type */
1759 pcb_config = &dev->current_pcb_config; 2508 pcb_config = &dev->current_pcb_config;
1760 2509
1761 if(pcb_config->config_num==1) 2510 if (pcb_config->config_num == 1) {
1762 { 2511 switch (media_type) {
1763 switch (media_type) 2512 case 0: /* Video */
1764 { 2513 ep_mask = ENABLE_EP4; /* ep4 [00:1000] */
1765 case 0: /* Video */ 2514 break;
1766 ep_mask =ENABLE_EP4; /* ep4 [00:1000] */ 2515 case 1: /* Audio */
1767 break; 2516 ep_mask = ENABLE_EP3; /* ep3 [00:0100] */
1768 case 1: /* Audio */ 2517 break;
1769 ep_mask =ENABLE_EP3; /* ep3 [00:0100] */ 2518 case 2: /* Vbi */
1770 break; 2519 ep_mask = ENABLE_EP5; /* ep5 [01:0000] */
1771 case 2: /* Vbi */ 2520 break;
1772 ep_mask = ENABLE_EP5; /* ep5 [01:0000] */ 2521 case 3: /* Sliced_cc */
1773 break; 2522 ep_mask = ENABLE_EP6; /* ep6 [10:0000] */
1774 case 3: /* Sliced_cc */ 2523 break;
1775 ep_mask = ENABLE_EP6; /* ep6 [10:0000] */ 2524 case 4: /* ts1 */
1776 break; 2525 case 6: /* ts1 parallel mode */
1777 case 4: /* ts1 */ 2526 ep_mask = ENABLE_EP1; /* ep1 [00:0001] */
1778 case 6: /* ts1 parallel mode */ 2527 break;
1779 ep_mask = ENABLE_EP1; /* ep1 [00:0001] */ 2528 case 5: /* ts2 */
1780 break; 2529 ep_mask = ENABLE_EP2; /* ep2 [00:0010] */
1781 case 5: /* ts2 */ 2530 break;
1782 ep_mask = ENABLE_EP2; /* ep2 [00:0010] */ 2531 }
1783 break; 2532
1784 } 2533 } else if (pcb_config->config_num > 1) {
1785 2534 switch (media_type) {
1786 } 2535 case 0: /* Video */
1787 else if(pcb_config->config_num>1) 2536 ep_mask = ENABLE_EP4; /* ep4 [00:1000] */
1788 { 2537 break;
1789 switch (media_type) 2538 case 1: /* Audio */
1790 { 2539 ep_mask = ENABLE_EP3; /* ep3 [00:0100] */
1791 case 0: /* Video */ 2540 break;
1792 ep_mask = ENABLE_EP4; /* ep4 [00:1000] */ 2541 case 2: /* Vbi */
1793 break; 2542 ep_mask = ENABLE_EP5; /* ep5 [01:0000] */
1794 case 1: /* Audio */ 2543 break;
1795 ep_mask = ENABLE_EP3; /* ep3 [00:0100] */ 2544 case 3: /* Sliced_cc */
1796 break; 2545 ep_mask = ENABLE_EP6; /* ep6 [10:0000] */
1797 case 2: /* Vbi */ 2546 break;
1798 ep_mask = ENABLE_EP5; /* ep5 [01:0000] */ 2547 case 4: /* ts1 */
1799 break; 2548 case 6: /* ts1 parallel mode */
1800 case 3: /* Sliced_cc */ 2549 ep_mask = ENABLE_EP1; /* ep1 [00:0001] */
1801 ep_mask = ENABLE_EP6; /* ep6 [10:0000] */ 2550 break;
1802 break; 2551 case 5: /* ts2 */
1803 case 4: /* ts1 */ 2552 ep_mask = ENABLE_EP2; /* ep2 [00:0010] */
1804 case 6: /* ts1 parallel mode */ 2553 break;
1805 ep_mask = ENABLE_EP1; /* ep1 [00:0001] */ 2554 }
1806 break; 2555
1807 case 5: /* ts2 */ 2556 }
1808 ep_mask = ENABLE_EP2; /* ep2 [00:0010] */ 2557
1809 break; 2558 if (start) {
1810 } 2559 rc = cx231xx_initialize_stream_xfer(dev, media_type);
1811 2560
1812 } 2561 if (rc < 0) {
1813 2562 return rc;
1814 if(start) { 2563 }
1815 rc = cx231xx_initialize_stream_xfer(dev, media_type); 2564
1816 2565 /* enable video capture */
1817 if(rc < 0) { 2566 if (ep_mask > 0)
1818 return rc; 2567 rc = cx231xx_start_stream(dev, ep_mask);
1819 } 2568 } else {
1820 2569 /* disable video capture */
1821 /* enable video capture */ 2570 if (ep_mask > 0)
1822 if(ep_mask > 0 ) 2571 rc = cx231xx_stop_stream(dev, ep_mask);
1823 rc = cx231xx_start_stream(dev, ep_mask); 2572 }
1824 } 2573
1825 else { 2574 if (dev->mode == CX231XX_ANALOG_MODE) {
1826 /* disable video capture */ 2575 /* do any in Analog mode */
1827 if(ep_mask > 0 ) 2576 } else {
1828 rc = cx231xx_stop_stream(dev, ep_mask); 2577 /* do any in digital mode */
1829 } 2578 }
1830
1831 if (dev->mode == CX231XX_ANALOG_MODE){
1832 /* do any in Analog mode */
1833 }
1834 else {
1835 /* do any in digital mode */
1836 }
1837 2579
1838 return rc; 2580 return rc;
1839} 2581}
1840EXPORT_SYMBOL_GPL(cx231xx_capture_start);
1841 2582
2583EXPORT_SYMBOL_GPL(cx231xx_capture_start);
1842 2584
1843/************************************************************************************ 2585/************************************************************************************
1844* G P I O B I T control functions * 2586* G P I O B I T control functions *
1845*************************************************************************************/ 2587*************************************************************************************/
1846int cx231xx_set_gpio_bit(struct cx231xx *dev, u32 gpio_bit, u8* gpio_val) 2588int cx231xx_set_gpio_bit(struct cx231xx *dev, u32 gpio_bit, u8 * gpio_val)
1847{ 2589{
1848 int status = 0; 2590 int status = 0;
1849 2591
1850 status = cx231xx_send_gpio_cmd(dev, gpio_bit, gpio_val, 4, 0, 0); 2592 status = cx231xx_send_gpio_cmd(dev, gpio_bit, gpio_val, 4, 0, 0);
1851 2593
1852 return status; 2594 return status;
1853} 2595}
1854 2596
1855int cx231xx_get_gpio_bit(struct cx231xx *dev, u32 gpio_bit, u8* gpio_val) 2597int cx231xx_get_gpio_bit(struct cx231xx *dev, u32 gpio_bit, u8 * gpio_val)
1856{ 2598{
1857 int status = 0; 2599 int status = 0;
1858 2600
1859 status = cx231xx_send_gpio_cmd(dev, gpio_bit, gpio_val, 4, 0, 1); 2601 status = cx231xx_send_gpio_cmd(dev, gpio_bit, gpio_val, 4, 0, 1);
1860 2602
1861 return status; 2603 return status;
1862} 2604}
1863 2605
1864/* 2606/*
@@ -1873,32 +2615,30 @@ int cx231xx_get_gpio_bit(struct cx231xx *dev, u32 gpio_bit, u8* gpio_val)
1873* 1 = Output direction 2615* 1 = Output direction
1874*/ 2616*/
1875int cx231xx_set_gpio_direction(struct cx231xx *dev, 2617int cx231xx_set_gpio_direction(struct cx231xx *dev,
1876 int pin_number, 2618 int pin_number, int pin_value)
1877 int pin_value)
1878{ 2619{
1879 int status = 0; 2620 int status = 0;
1880 u32 value = 0; 2621 u32 value = 0;
1881 2622
1882 /* Check for valid pin_number - if 32 , bail out */ 2623 /* Check for valid pin_number - if 32 , bail out */
1883 if (pin_number >= 32) { 2624 if (pin_number >= 32) {
1884 return -EINVAL; 2625 return -EINVAL;
1885 } 2626 }
1886 2627
1887 if (pin_value == 0) { /* input */ 2628 if (pin_value == 0) { /* input */
1888 value = dev->gpio_dir &(~(1<<pin_number)) ; /* clear */ 2629 value = dev->gpio_dir & (~(1 << pin_number)); /* clear */
1889 } else { 2630 } else {
1890 value = dev->gpio_dir | (1<<pin_number) ; 2631 value = dev->gpio_dir | (1 << pin_number);
1891 } 2632 }
1892 2633
1893 status = cx231xx_set_gpio_bit(dev, value, (u8*) & dev->gpio_val); 2634 status = cx231xx_set_gpio_bit(dev, value, (u8 *) & dev->gpio_val);
1894 2635
1895 /* cache the value for future */ 2636 /* cache the value for future */
1896 dev->gpio_dir = value; 2637 dev->gpio_dir = value;
1897 2638
1898 return status; 2639 return status;
1899} 2640}
1900 2641
1901
1902/* 2642/*
1903* SetGpioPinLogicValue 2643* SetGpioPinLogicValue
1904* Sets the value of the GPIO pin to Logic high or low. The Pin under 2644* Sets the value of the GPIO pin to Logic high or low. The Pin under
@@ -1910,43 +2650,42 @@ int cx231xx_set_gpio_direction(struct cx231xx *dev,
1910* 0 = set it to 0 2650* 0 = set it to 0
1911* 1 = set it to 1 2651* 1 = set it to 1
1912*/ 2652*/
1913int cx231xx_set_gpio_value(struct cx231xx *dev, 2653int cx231xx_set_gpio_value(struct cx231xx *dev, int pin_number, int pin_value)
1914 int pin_number,
1915 int pin_value)
1916{ 2654{
1917 int status = 0; 2655 int status = 0;
1918 u32 value = 0; 2656 u32 value = 0;
1919 2657
1920 /* Check for valid pin_number - if 0xFF , bail out */ 2658 /* Check for valid pin_number - if 0xFF , bail out */
1921 if (pin_number >= 32) 2659 if (pin_number >= 32)
1922 return -EINVAL; 2660 return -EINVAL;
1923 2661
1924 /* first do a sanity check - if the Pin is not output, make it output */ 2662 /* first do a sanity check - if the Pin is not output, make it output */
1925 if ((dev->gpio_dir & (1<<pin_number)) == 0x00) 2663 if ((dev->gpio_dir & (1 << pin_number)) == 0x00) {
1926 { 2664 /* It was in input mode */
1927 /* It was in input mode */ 2665 value = dev->gpio_dir | (1 << pin_number);
1928 value = dev->gpio_dir | (1<<pin_number) ; 2666 dev->gpio_dir = value;
1929 dev->gpio_dir = value; 2667 status =
1930 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val); 2668 cx231xx_set_gpio_bit(dev, dev->gpio_dir,
2669 (u8 *) & dev->gpio_val);
1931 value = 0; 2670 value = 0;
1932 } 2671 }
1933 2672
1934 if (pin_value == 0) { 2673 if (pin_value == 0) {
1935 value = dev->gpio_val & (~(1<<pin_number)); 2674 value = dev->gpio_val & (~(1 << pin_number));
1936 } else { 2675 } else {
1937 value = dev->gpio_val | (1<<pin_number); 2676 value = dev->gpio_val | (1 << pin_number);
1938 } 2677 }
1939 2678
1940 /* store the value */ 2679 /* store the value */
1941 dev->gpio_val=value; 2680 dev->gpio_val = value;
1942 2681
1943 /* toggle bit0 of GP_IO */ 2682 /* toggle bit0 of GP_IO */
1944 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val); 2683 status =
2684 cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
1945 2685
1946 return status; 2686 return status;
1947} 2687}
1948 2688
1949
1950/************************************************************************************ 2689/************************************************************************************
1951* G P I O I2C related functions * 2690* G P I O I2C related functions *
1952*************************************************************************************/ 2691*************************************************************************************/
@@ -1955,140 +2694,162 @@ int cx231xx_gpio_i2c_start(struct cx231xx *dev)
1955 int status = 0; 2694 int status = 0;
1956 2695
1957 /* set SCL to output 1 ; set SDA to output 1 */ 2696 /* set SCL to output 1 ; set SDA to output 1 */
1958 dev->gpio_dir |= 1<< dev->board.tuner_scl_gpio; 2697 dev->gpio_dir |= 1 << dev->board.tuner_scl_gpio;
1959 dev->gpio_dir |= 1<<dev->board.tuner_sda_gpio; 2698 dev->gpio_dir |= 1 << dev->board.tuner_sda_gpio;
1960 dev->gpio_val |= 1<<dev->board.tuner_scl_gpio; 2699 dev->gpio_val |= 1 << dev->board.tuner_scl_gpio;
1961 dev->gpio_val |= 1<<dev->board.tuner_sda_gpio; 2700 dev->gpio_val |= 1 << dev->board.tuner_sda_gpio;
1962 2701
1963 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val); 2702 status =
1964 if(status < 0){ 2703 cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
2704 if (status < 0) {
1965 return -EINVAL; 2705 return -EINVAL;
1966 } 2706 }
1967 2707
1968 /* set SCL to output 1; set SDA to output 0 */ 2708 /* set SCL to output 1; set SDA to output 0 */
1969 dev->gpio_val |= 1<<dev->board.tuner_scl_gpio; 2709 dev->gpio_val |= 1 << dev->board.tuner_scl_gpio;
1970 dev->gpio_val &= ~(1<<dev->board.tuner_sda_gpio); 2710 dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio);
1971 2711
1972 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val); 2712 status =
1973 if(status < 0){ 2713 cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
2714 if (status < 0) {
1974 return -EINVAL; 2715 return -EINVAL;
1975 } 2716 }
1976 2717
1977 /* set SCL to output 0; set SDA to output 0 */ 2718 /* set SCL to output 0; set SDA to output 0 */
1978 dev->gpio_val &= ~(1<<dev->board.tuner_scl_gpio); 2719 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio);
1979 dev->gpio_val &= ~(1<<dev->board.tuner_sda_gpio); 2720 dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio);
1980 2721
1981 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val); 2722 status =
1982 if(status < 0){ 2723 cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
2724 if (status < 0) {
1983 return -EINVAL; 2725 return -EINVAL;
1984 } 2726 }
1985 2727
1986 return status; 2728 return status;
1987} 2729}
1988 2730
1989
1990int cx231xx_gpio_i2c_end(struct cx231xx *dev) 2731int cx231xx_gpio_i2c_end(struct cx231xx *dev)
1991{ 2732{
1992 int status = 0; 2733 int status = 0;
1993 2734
1994 /* set SCL to output 0; set SDA to output 0 */ 2735 /* set SCL to output 0; set SDA to output 0 */
1995 dev->gpio_dir |= 1<<dev->board.tuner_scl_gpio; 2736 dev->gpio_dir |= 1 << dev->board.tuner_scl_gpio;
1996 dev->gpio_dir |= 1<<dev->board.tuner_sda_gpio; 2737 dev->gpio_dir |= 1 << dev->board.tuner_sda_gpio;
1997 2738
1998 dev->gpio_val &= ~(1<<dev->board.tuner_scl_gpio); 2739 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio);
1999 dev->gpio_val &= ~(1<<dev->board.tuner_sda_gpio); 2740 dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio);
2000 2741
2001 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val); 2742 status =
2002 if(status < 0){ 2743 cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
2744 if (status < 0) {
2003 return -EINVAL; 2745 return -EINVAL;
2004 } 2746 }
2005 2747
2006 /* set SCL to output 1; set SDA to output 0 */ 2748 /* set SCL to output 1; set SDA to output 0 */
2007 dev->gpio_val |= 1<<dev->board.tuner_scl_gpio; 2749 dev->gpio_val |= 1 << dev->board.tuner_scl_gpio;
2008 dev->gpio_val &= ~(1<<dev->board.tuner_sda_gpio); 2750 dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio);
2009 2751
2010 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val); 2752 status =
2011 if(status < 0){ 2753 cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
2754 if (status < 0) {
2012 return -EINVAL; 2755 return -EINVAL;
2013 } 2756 }
2014 2757
2015 /* set SCL to input ,release SCL cable control 2758 /* set SCL to input ,release SCL cable control
2016 set SDA to input ,release SDA cable control */ 2759 set SDA to input ,release SDA cable control */
2017 dev->gpio_dir &= ~(1<<dev->board.tuner_scl_gpio); 2760 dev->gpio_dir &= ~(1 << dev->board.tuner_scl_gpio);
2018 dev->gpio_dir &= ~(1<<dev->board.tuner_sda_gpio); 2761 dev->gpio_dir &= ~(1 << dev->board.tuner_sda_gpio);
2019 2762
2020 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val); 2763 status =
2021 if(status < 0){ 2764 cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
2765 if (status < 0) {
2022 return -EINVAL; 2766 return -EINVAL;
2023 } 2767 }
2024 return status; 2768 return status;
2025} 2769}
2026 2770
2027
2028int cx231xx_gpio_i2c_write_byte(struct cx231xx *dev, u8 data) 2771int cx231xx_gpio_i2c_write_byte(struct cx231xx *dev, u8 data)
2029{ 2772{
2030 int status = 0; 2773 int status = 0;
2031 u8 i; 2774 u8 i;
2032 2775
2033 /* set SCL to output ; set SDA to output */ 2776 /* set SCL to output ; set SDA to output */
2034 dev->gpio_dir |= 1<<dev->board.tuner_scl_gpio; 2777 dev->gpio_dir |= 1 << dev->board.tuner_scl_gpio;
2035 dev->gpio_dir |= 1<<dev->board.tuner_sda_gpio; 2778 dev->gpio_dir |= 1 << dev->board.tuner_sda_gpio;
2036 2779
2037 for(i = 0;i<8;i++) { 2780 for (i = 0; i < 8; i++) {
2038 if(((data<<i) & 0x80) == 0) { 2781 if (((data << i) & 0x80) == 0) {
2039 /* set SCL to output 0; set SDA to output 0 */ 2782 /* set SCL to output 0; set SDA to output 0 */
2040 dev->gpio_val &= ~(1<<dev->board.tuner_scl_gpio); 2783 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio);
2041 dev->gpio_val &= ~(1<<dev->board.tuner_sda_gpio); 2784 dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio);
2042 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val); 2785 status =
2043 2786 cx231xx_set_gpio_bit(dev, dev->gpio_dir,
2044 /* set SCL to output 1; set SDA to output 0 */ 2787 (u8 *) & dev->gpio_val);
2045 dev->gpio_val |= 1<<dev->board.tuner_scl_gpio; 2788
2046 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val); 2789 /* set SCL to output 1; set SDA to output 0 */
2047 2790 dev->gpio_val |= 1 << dev->board.tuner_scl_gpio;
2048 /* set SCL to output 0; set SDA to output 0 */ 2791 status =
2049 dev->gpio_val &= ~(1<<dev->board.tuner_scl_gpio); 2792 cx231xx_set_gpio_bit(dev, dev->gpio_dir,
2050 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val); 2793 (u8 *) & dev->gpio_val);
2794
2795 /* set SCL to output 0; set SDA to output 0 */
2796 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio);
2797 status =
2798 cx231xx_set_gpio_bit(dev, dev->gpio_dir,
2799 (u8 *) & dev->gpio_val);
2051 } else { 2800 } else {
2052 /* set SCL to output 0; set SDA to output 1 */ 2801 /* set SCL to output 0; set SDA to output 1 */
2053 dev->gpio_val &= ~(1<<dev->board.tuner_scl_gpio); 2802 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio);
2054 dev->gpio_val |= 1<<dev->board.tuner_sda_gpio; 2803 dev->gpio_val |= 1 << dev->board.tuner_sda_gpio;
2055 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val); 2804 status =
2056 2805 cx231xx_set_gpio_bit(dev, dev->gpio_dir,
2057 /* set SCL to output 1; set SDA to output 1 */ 2806 (u8 *) & dev->gpio_val);
2058 dev->gpio_val |= 1<<dev->board.tuner_scl_gpio; 2807
2059 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val); 2808 /* set SCL to output 1; set SDA to output 1 */
2060 2809 dev->gpio_val |= 1 << dev->board.tuner_scl_gpio;
2061 /* set SCL to output 0; set SDA to output 1 */ 2810 status =
2062 dev->gpio_val &= ~(1<<dev->board.tuner_scl_gpio); 2811 cx231xx_set_gpio_bit(dev, dev->gpio_dir,
2063 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val); 2812 (u8 *) & dev->gpio_val);
2064 } 2813
2814 /* set SCL to output 0; set SDA to output 1 */
2815 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio);
2816 status =
2817 cx231xx_set_gpio_bit(dev, dev->gpio_dir,
2818 (u8 *) & dev->gpio_val);
2819 }
2065 } 2820 }
2066 return status; 2821 return status;
2067} 2822}
2068 2823
2069int cx231xx_gpio_i2c_read_byte(struct cx231xx *dev, u8 *buf) 2824int cx231xx_gpio_i2c_read_byte(struct cx231xx *dev, u8 * buf)
2070{ 2825{
2071 u8 value = 0; 2826 u8 value = 0;
2072 int status = 0; 2827 int status = 0;
2073 u32 gpio_logic_value =0; 2828 u32 gpio_logic_value = 0;
2074 u8 i; 2829 u8 i;
2075 2830
2076 /* read byte */ 2831 /* read byte */
2077 for(i=0;i<8;i++) { /* send write I2c addr */ 2832 for (i = 0; i < 8; i++) { /* send write I2c addr */
2078 2833
2079 /* set SCL to output 0; set SDA to input */ 2834 /* set SCL to output 0; set SDA to input */
2080 dev->gpio_val &= ~(1<<dev->board.tuner_scl_gpio); 2835 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio);
2081 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val); 2836 status =
2837 cx231xx_set_gpio_bit(dev, dev->gpio_dir,
2838 (u8 *) & dev->gpio_val);
2082 2839
2083 /* set SCL to output 1; set SDA to input */ 2840 /* set SCL to output 1; set SDA to input */
2084 dev->gpio_val |= 1<<dev->board.tuner_scl_gpio; 2841 dev->gpio_val |= 1 << dev->board.tuner_scl_gpio;
2085 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val); 2842 status =
2843 cx231xx_set_gpio_bit(dev, dev->gpio_dir,
2844 (u8 *) & dev->gpio_val);
2086 2845
2087 /* get SDA data bit */ 2846 /* get SDA data bit */
2088 gpio_logic_value = dev->gpio_val; 2847 gpio_logic_value = dev->gpio_val;
2089 status = cx231xx_get_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val); 2848 status =
2090 if((dev->gpio_val & (1<<dev->board.tuner_sda_gpio)) != 0) { 2849 cx231xx_get_gpio_bit(dev, dev->gpio_dir,
2091 value |= (1<<(8-i-1)); 2850 (u8 *) & dev->gpio_val);
2851 if ((dev->gpio_val & (1 << dev->board.tuner_sda_gpio)) != 0) {
2852 value |= (1 << (8 - i - 1));
2092 } 2853 }
2093 2854
2094 dev->gpio_val = gpio_logic_value; 2855 dev->gpio_val = gpio_logic_value;
@@ -2096,146 +2857,160 @@ int cx231xx_gpio_i2c_read_byte(struct cx231xx *dev, u8 *buf)
2096 2857
2097 /* set SCL to output 0,finish the read latest SCL signal. 2858 /* set SCL to output 0,finish the read latest SCL signal.
2098 !!!set SDA to input,never to modify SDA direction at the same times */ 2859 !!!set SDA to input,never to modify SDA direction at the same times */
2099 dev->gpio_val &= ~(1<<dev->board.tuner_scl_gpio); 2860 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio);
2100 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val); 2861 status =
2862 cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
2101 2863
2102 /* store the value */ 2864 /* store the value */
2103 *buf = value & 0xff; 2865 *buf = value & 0xff;
2104 2866
2105 return status; 2867 return status;
2106} 2868}
2107 2869
2108int cx231xx_gpio_i2c_read_ack(struct cx231xx *dev) 2870int cx231xx_gpio_i2c_read_ack(struct cx231xx *dev)
2109{ 2871{
2110 int status = 0; 2872 int status = 0;
2111 u32 gpio_logic_value = 0; 2873 u32 gpio_logic_value = 0;
2112 int nCnt=10; 2874 int nCnt = 10;
2113 int nInit=nCnt; 2875 int nInit = nCnt;
2114 2876
2115 /* clock stretch; set SCL to input; set SDA to input; get SCL value till SCL = 1 */ 2877 /* clock stretch; set SCL to input; set SDA to input; get SCL value till SCL = 1 */
2116 dev->gpio_dir &= ~(1<<dev->board.tuner_sda_gpio); 2878 dev->gpio_dir &= ~(1 << dev->board.tuner_sda_gpio);
2117 dev->gpio_dir &= ~(1<<dev->board.tuner_scl_gpio); 2879 dev->gpio_dir &= ~(1 << dev->board.tuner_scl_gpio);
2118 2880
2119 gpio_logic_value = dev->gpio_val; 2881 gpio_logic_value = dev->gpio_val;
2120 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val); 2882 status =
2883 cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
2121 2884
2122 do{ 2885 do {
2123 msleep(2); 2886 msleep(2);
2124 status = cx231xx_get_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val); 2887 status =
2125 nCnt--; 2888 cx231xx_get_gpio_bit(dev, dev->gpio_dir,
2126 }while(((dev->gpio_val & (1<<dev->board.tuner_scl_gpio)) == 0) && (nCnt>0)); 2889 (u8 *) & dev->gpio_val);
2127 2890 nCnt--;
2128 if(nCnt==0) { 2891 } while (((dev->gpio_val & (1 << dev->board.tuner_scl_gpio)) == 0)
2129 cx231xx_info("No ACK after %d msec for clock stretch. GPIO I2C operation failed!",nInit*10); 2892 && (nCnt > 0));
2130 } 2893
2894 if (nCnt == 0) {
2895 cx231xx_info
2896 ("No ACK after %d msec for clock stretch. GPIO I2C operation failed!",
2897 nInit * 10);
2898 }
2131 2899
2132 /* readAck 2900 /* readAck
2133 throuth clock stretch ,slave has given a SCL signal,so the SDA data can be directly read. */ 2901 throuth clock stretch ,slave has given a SCL signal,so the SDA data can be directly read. */
2134 status = cx231xx_get_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val); 2902 status =
2903 cx231xx_get_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
2135 2904
2136 if((dev->gpio_val & 1<< dev->board.tuner_sda_gpio) == 0){ 2905 if ((dev->gpio_val & 1 << dev->board.tuner_sda_gpio) == 0) {
2137 dev->gpio_val = gpio_logic_value; 2906 dev->gpio_val = gpio_logic_value;
2138 dev->gpio_val &= ~(1<< dev->board.tuner_sda_gpio); 2907 dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio);
2139 status = 0; 2908 status = 0;
2140 } else { 2909 } else {
2141 dev->gpio_val = gpio_logic_value; 2910 dev->gpio_val = gpio_logic_value;
2142 dev->gpio_val |= (1<< dev->board.tuner_sda_gpio); 2911 dev->gpio_val |= (1 << dev->board.tuner_sda_gpio);
2143 } 2912 }
2144 2913
2145 /* read SDA end, set the SCL to output 0, after this operation, SDA direction can be changed. */ 2914 /* read SDA end, set the SCL to output 0, after this operation, SDA direction can be changed. */
2146 dev->gpio_val = gpio_logic_value; 2915 dev->gpio_val = gpio_logic_value;
2147 dev->gpio_dir |= (1<<dev->board.tuner_scl_gpio); 2916 dev->gpio_dir |= (1 << dev->board.tuner_scl_gpio);
2148 dev->gpio_val &= ~(1<<dev->board.tuner_scl_gpio); 2917 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio);
2149 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val); 2918 status =
2919 cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
2150 2920
2151 return status; 2921 return status;
2152} 2922}
2153 2923
2154
2155int cx231xx_gpio_i2c_write_ack(struct cx231xx *dev) 2924int cx231xx_gpio_i2c_write_ack(struct cx231xx *dev)
2156{ 2925{
2157 int status = 0; 2926 int status = 0;
2158 2927
2159 /* set SDA to ouput */ 2928 /* set SDA to ouput */
2160 dev->gpio_dir |= 1<<dev->board.tuner_sda_gpio; 2929 dev->gpio_dir |= 1 << dev->board.tuner_sda_gpio;
2161 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val); 2930 status =
2931 cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
2162 2932
2163 /* set SCL = 0 (output); set SDA = 0 (output) */ 2933 /* set SCL = 0 (output); set SDA = 0 (output) */
2164 dev->gpio_val &= ~(1<<dev->board.tuner_sda_gpio); 2934 dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio);
2165 dev->gpio_val &= ~(1<<dev->board.tuner_scl_gpio); 2935 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio);
2166 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val); 2936 status =
2937 cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
2167 2938
2168 /* set SCL = 1 (output); set SDA = 0 (output) */ 2939 /* set SCL = 1 (output); set SDA = 0 (output) */
2169 dev->gpio_val |= 1<<dev->board.tuner_scl_gpio; 2940 dev->gpio_val |= 1 << dev->board.tuner_scl_gpio;
2170 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val); 2941 status =
2942 cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
2171 2943
2172 /* set SCL = 0 (output); set SDA = 0 (output) */ 2944 /* set SCL = 0 (output); set SDA = 0 (output) */
2173 dev->gpio_val &= ~(1<<dev->board.tuner_scl_gpio); 2945 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio);
2174 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val); 2946 status =
2947 cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
2175 2948
2176 /* set SDA to input,and then the slave will read data from SDA. */ 2949 /* set SDA to input,and then the slave will read data from SDA. */
2177 dev->gpio_dir &= ~(1<<dev->board.tuner_sda_gpio); 2950 dev->gpio_dir &= ~(1 << dev->board.tuner_sda_gpio);
2178 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val); 2951 status =
2952 cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
2179 2953
2180 return status; 2954 return status;
2181} 2955}
2182 2956
2183int cx231xx_gpio_i2c_write_nak(struct cx231xx *dev) 2957int cx231xx_gpio_i2c_write_nak(struct cx231xx *dev)
2184{ 2958{
2185 int status = 0; 2959 int status = 0;
2186 2960
2187 /* set scl to output ; set sda to input */ 2961 /* set scl to output ; set sda to input */
2188 dev->gpio_dir |= 1<<dev->board.tuner_scl_gpio; 2962 dev->gpio_dir |= 1 << dev->board.tuner_scl_gpio;
2189 dev->gpio_dir &= ~(1<<dev->board.tuner_sda_gpio); 2963 dev->gpio_dir &= ~(1 << dev->board.tuner_sda_gpio);
2190 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val); 2964 status =
2965 cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
2191 2966
2192 /* set scl to output 0; set sda to input */ 2967 /* set scl to output 0; set sda to input */
2193 dev->gpio_val &= ~(1<<dev->board.tuner_scl_gpio); 2968 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio);
2194 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val); 2969 status =
2970 cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
2195 2971
2196 /* set scl to output 1; set sda to input */ 2972 /* set scl to output 1; set sda to input */
2197 dev->gpio_val |= 1<<dev->board.tuner_scl_gpio; 2973 dev->gpio_val |= 1 << dev->board.tuner_scl_gpio;
2198 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8*) &dev->gpio_val); 2974 status =
2975 cx231xx_set_gpio_bit(dev, dev->gpio_dir, (u8 *) & dev->gpio_val);
2199 2976
2200 return status; 2977 return status;
2201} 2978}
2202 2979
2203
2204
2205/************************************************************************************ 2980/************************************************************************************
2206* G P I O I2C related functions * 2981* G P I O I2C related functions *
2207*************************************************************************************/ 2982*************************************************************************************/
2208/* cx231xx_gpio_i2c_read 2983/* cx231xx_gpio_i2c_read
2209 * Function to read data from gpio based I2C interface 2984 * Function to read data from gpio based I2C interface
2210 */ 2985 */
2211int cx231xx_gpio_i2c_read(struct cx231xx *dev, u8 dev_addr, u8 *buf ,u8 len) 2986int cx231xx_gpio_i2c_read(struct cx231xx *dev, u8 dev_addr, u8 * buf, u8 len)
2212{ 2987{
2213 int status = 0; 2988 int status = 0;
2214 int i = 0; 2989 int i = 0;
2215 2990
2216 /* get the lock */ 2991 /* get the lock */
2217 mutex_lock(&dev->gpio_i2c_lock); 2992 mutex_lock(&dev->gpio_i2c_lock);
2218 2993
2219 /* start */ 2994 /* start */
2220 status = cx231xx_gpio_i2c_start(dev); 2995 status = cx231xx_gpio_i2c_start(dev);
2221 2996
2222 /* write dev_addr */ 2997 /* write dev_addr */
2223 status = cx231xx_gpio_i2c_write_byte(dev, (dev_addr << 1) +1); 2998 status = cx231xx_gpio_i2c_write_byte(dev, (dev_addr << 1) + 1);
2224 2999
2225 /* readAck */ 3000 /* readAck */
2226 status = cx231xx_gpio_i2c_read_ack(dev); 3001 status = cx231xx_gpio_i2c_read_ack(dev);
2227 3002
2228 /* read data */ 3003 /* read data */
2229 for(i = 0; i < len; i++ ) { 3004 for (i = 0; i < len; i++) {
2230 /* read data */ 3005 /* read data */
2231 buf[i] = 0; 3006 buf[i] = 0;
2232 status = cx231xx_gpio_i2c_read_byte(dev, & buf[i]); 3007 status = cx231xx_gpio_i2c_read_byte(dev, &buf[i]);
2233 3008
2234 if( (i+1) != len) { 3009 if ((i + 1) != len) {
2235 /* only do write ack if we more length */ 3010 /* only do write ack if we more length */
2236 status = cx231xx_gpio_i2c_write_ack(dev); 3011 status = cx231xx_gpio_i2c_write_ack(dev);
2237 } 3012 }
2238 } 3013 }
2239 3014
2240 /* write NAK - inform reads are complete */ 3015 /* write NAK - inform reads are complete */
2241 status = cx231xx_gpio_i2c_write_nak(dev); 3016 status = cx231xx_gpio_i2c_write_nak(dev);
@@ -2249,14 +3024,13 @@ int cx231xx_gpio_i2c_read(struct cx231xx *dev, u8 dev_addr, u8 *buf ,u8 len)
2249 return status; 3024 return status;
2250} 3025}
2251 3026
2252
2253/* cx231xx_gpio_i2c_write 3027/* cx231xx_gpio_i2c_write
2254 * Function to write data to gpio based I2C interface 3028 * Function to write data to gpio based I2C interface
2255 */ 3029 */
2256int cx231xx_gpio_i2c_write(struct cx231xx *dev, u8 dev_addr, u8 *buf ,u8 len) 3030int cx231xx_gpio_i2c_write(struct cx231xx *dev, u8 dev_addr, u8 * buf, u8 len)
2257{ 3031{
2258 int status = 0; 3032 int status = 0;
2259 int i=0; 3033 int i = 0;
2260 3034
2261 /* get the lock */ 3035 /* get the lock */
2262 mutex_lock(&dev->gpio_i2c_lock); 3036 mutex_lock(&dev->gpio_i2c_lock);
@@ -2268,17 +3042,17 @@ int cx231xx_gpio_i2c_write(struct cx231xx *dev, u8 dev_addr, u8 *buf ,u8 len)
2268 status = cx231xx_gpio_i2c_write_byte(dev, dev_addr << 1); 3042 status = cx231xx_gpio_i2c_write_byte(dev, dev_addr << 1);
2269 3043
2270 /* read Ack */ 3044 /* read Ack */
2271 status = cx231xx_gpio_i2c_read_ack(dev); 3045 status = cx231xx_gpio_i2c_read_ack(dev);
2272 3046
2273 for(i = 0; i < len; i++ ) { 3047 for (i = 0; i < len; i++) {
2274 /* Write data */ 3048 /* Write data */
2275 status = cx231xx_gpio_i2c_write_byte(dev, buf[i]); 3049 status = cx231xx_gpio_i2c_write_byte(dev, buf[i]);
2276 3050
2277 /* read Ack */ 3051 /* read Ack */
2278 status = cx231xx_gpio_i2c_read_ack(dev); 3052 status = cx231xx_gpio_i2c_read_ack(dev);
2279 } 3053 }
2280 3054
2281 /* write End */ 3055 /* write End */
2282 status = cx231xx_gpio_i2c_end(dev); 3056 status = cx231xx_gpio_i2c_end(dev);
2283 3057
2284 /* release the lock */ 3058 /* release the lock */
@@ -2286,4 +3060,3 @@ int cx231xx_gpio_i2c_write(struct cx231xx *dev, u8 dev_addr, u8 *buf ,u8 len)
2286 3060
2287 return 0; 3061 return 0;
2288} 3062}
2289
diff --git a/drivers/media/video/cx231xx/cx231xx-cards.c b/drivers/media/video/cx231xx/cx231xx-cards.c
index c567e5a9eec8..a1f6ed645add 100644
--- a/drivers/media/video/cx231xx/cx231xx-cards.c
+++ b/drivers/media/video/cx231xx/cx231xx-cards.c
@@ -2,7 +2,7 @@
2 cx231xx-cards.c - driver for Conexant Cx23100/101/102 USB video capture devices 2 cx231xx-cards.c - driver for Conexant Cx23100/101/102 USB video capture devices
3 3
4 Copyright (C) 2008 <srinivasa.deevi at conexant dot com> 4 Copyright (C) 2008 <srinivasa.deevi at conexant dot com>
5 Based on em28xx driver 5 Based on em28xx driver
6 6
7 This program is free software; you can redistribute it and/or modify 7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by 8 it under the terms of the GNU General Public License as published by
@@ -50,131 +50,151 @@ static unsigned long cx231xx_devused;
50 */ 50 */
51 51
52static struct cx231xx_reg_seq RDE250_XCV_TUNER[] = { 52static struct cx231xx_reg_seq RDE250_XCV_TUNER[] = {
53 { 0x03, 0x01, 10 }, 53 {0x03, 0x01, 10},
54 { 0x03, 0x00, 30 }, 54 {0x03, 0x00, 30},
55 { 0x03, 0x01, 10 }, 55 {0x03, 0x01, 10},
56 { -1, -1, -1 }, 56 {-1, -1, -1},
57}; 57};
58 58
59
60
61/* 59/*
62 * Board definitions 60 * Board definitions
63 */ 61 */
64struct cx231xx_board cx231xx_boards[] = { 62struct cx231xx_board cx231xx_boards[] = {
65 63
66 [CX231XX_BOARD_UNKNOWN] = { 64 [CX231XX_BOARD_UNKNOWN] = {
67 .name = "Unknown CX231xx video grabber", 65 .name = "Unknown CX231xx video grabber",
68 .tuner_type = TUNER_ABSENT, 66 .tuner_type = TUNER_ABSENT,
69 .input = { { 67 .input = {{
70 .type = CX231XX_VMUX_TELEVISION, 68 .type = CX231XX_VMUX_TELEVISION,
71 .vmux = CX231XX_VIN_3_1, 69 .vmux = CX231XX_VIN_3_1,
72 .amux = CX231XX_AMUX_VIDEO, 70 .amux = CX231XX_AMUX_VIDEO,
73 .gpio = 0, 71 .gpio = 0,
74 }, { 72 }, {
75 .type = CX231XX_VMUX_COMPOSITE1, 73 .type =
76 .vmux = CX231XX_VIN_2_1, 74 CX231XX_VMUX_COMPOSITE1,
77 .amux = CX231XX_AMUX_LINE_IN, 75 .vmux = CX231XX_VIN_2_1,
78 .gpio = 0, 76 .amux = CX231XX_AMUX_LINE_IN,
79 }, { 77 .gpio = 0,
80 .type = CX231XX_VMUX_SVIDEO, 78 }, {
81 .vmux = CX231XX_VIN_1_1 | (CX231XX_VIN_1_2 << 8 ) | 79 .type =
82 CX25840_SVIDEO_ON, 80 CX231XX_VMUX_SVIDEO,
83 .amux = CX231XX_AMUX_LINE_IN, 81 .vmux =
84 .gpio = 0, 82 CX231XX_VIN_1_1 |
85 } }, 83 (CX231XX_VIN_1_2 << 8) |
86 }, 84 CX25840_SVIDEO_ON,
85 .amux =
86 CX231XX_AMUX_LINE_IN,
87 .gpio = 0,
88 }},
89 },
87 90
88 [CX231XX_BOARD_CNXT_RDE_250] = { 91 [CX231XX_BOARD_CNXT_RDE_250] = {
89 .name = "Conexant Hybrid TV - RDE250", 92 .name = "Conexant Hybrid TV - RDE250",
90 .valid = CX231XX_BOARD_VALIDATED, 93 .valid = CX231XX_BOARD_VALIDATED,
91 .tuner_type = TUNER_XC5000, 94 .tuner_type = TUNER_XC5000,
92 .tuner_addr = 0x61, 95 .tuner_addr = 0x61,
93 .tuner_gpio = RDE250_XCV_TUNER, 96 .tuner_gpio = RDE250_XCV_TUNER,
94 .tuner_sif_gpio = 0x05, 97 .tuner_sif_gpio = 0x05,
95 .tuner_scl_gpio = 0x1a, 98 .tuner_scl_gpio = 0x1a,
96 .tuner_sda_gpio = 0x1b, 99 .tuner_sda_gpio = 0x1b,
97 .decoder = CX231XX_AVDECODER, 100 .decoder = CX231XX_AVDECODER,
98 .demod_xfer_mode = 0, 101 .demod_xfer_mode = 0,
99 .ctl_pin_status_mask = 0xFFFFFFC4, 102 .ctl_pin_status_mask = 0xFFFFFFC4,
100 .agc_analog_digital_select_gpio = 0x0c, 103 .agc_analog_digital_select_gpio = 0x0c,
101 .gpio_pin_status_mask = 0x4001000, 104 .gpio_pin_status_mask = 0x4001000,
102 .tuner_i2c_master = 1, 105 .tuner_i2c_master = 1,
103 .demod_i2c_master = 2, 106 .demod_i2c_master = 2,
104 .has_dvb = 1, 107 .has_dvb = 1,
105 .demod_addr = 0x02, 108 .demod_addr = 0x02,
106 .norm = V4L2_STD_PAL, 109 .norm = V4L2_STD_PAL,
107 110
108 .input = { { 111 .input = {{
109 .type = CX231XX_VMUX_TELEVISION, 112 .type =
110 .vmux = CX231XX_VIN_3_1, 113 CX231XX_VMUX_TELEVISION,
111 .amux = CX231XX_AMUX_VIDEO, 114 .vmux = CX231XX_VIN_3_1,
112 .gpio = 0, 115 .amux = CX231XX_AMUX_VIDEO,
113 }, { 116 .gpio = 0,
114 .type = CX231XX_VMUX_COMPOSITE1, 117 }, {
115 .vmux = CX231XX_VIN_2_1, 118 .type =
116 .amux = CX231XX_AMUX_LINE_IN, 119 CX231XX_VMUX_COMPOSITE1,
117 .gpio = 0, 120 .vmux = CX231XX_VIN_2_1,
118 }, { 121 .amux =
119 .type = CX231XX_VMUX_SVIDEO, 122 CX231XX_AMUX_LINE_IN,
120 .vmux = CX231XX_VIN_1_1 | (CX231XX_VIN_1_2 << 8 ) | 123 .gpio = 0,
121 CX25840_SVIDEO_ON, 124 }, {
122 .amux = CX231XX_AMUX_LINE_IN, 125 .type =
123 .gpio = 0, 126 CX231XX_VMUX_SVIDEO,
124 } }, 127 .vmux =
125 }, 128 CX231XX_VIN_1_1 |
126 129 (CX231XX_VIN_1_2 <<
127 [CX231XX_BOARD_CNXT_RDU_250] = { 130 8) |
128 .name = "Conexant Hybrid TV - RDU250", 131 CX25840_SVIDEO_ON,
129 .valid = CX231XX_BOARD_VALIDATED, 132 .amux =
130 .tuner_type = TUNER_XC5000, 133 CX231XX_AMUX_LINE_IN,
131 .tuner_addr = 0x61, 134 .gpio = 0,
132 .tuner_gpio = RDE250_XCV_TUNER, 135 }},
133 .tuner_sif_gpio = 0x05, 136 },
134 .tuner_scl_gpio = 0x1a, 137
135 .tuner_sda_gpio = 0x1b, 138 [CX231XX_BOARD_CNXT_RDU_250] = {
136 .decoder = CX231XX_AVDECODER, 139 .name = "Conexant Hybrid TV - RDU250",
137 .demod_xfer_mode = 0, 140 .valid = CX231XX_BOARD_VALIDATED,
138 .ctl_pin_status_mask = 0xFFFFFFC4, 141 .tuner_type = TUNER_XC5000,
139 .agc_analog_digital_select_gpio = 0x0c, 142 .tuner_addr = 0x61,
140 .gpio_pin_status_mask = 0x4001000, 143 .tuner_gpio = RDE250_XCV_TUNER,
141 .tuner_i2c_master = 1, 144 .tuner_sif_gpio = 0x05,
142 .demod_i2c_master = 2, 145 .tuner_scl_gpio = 0x1a,
143 .has_dvb = 1, 146 .tuner_sda_gpio = 0x1b,
144 .demod_addr = 0x32, 147 .decoder = CX231XX_AVDECODER,
145 .norm = V4L2_STD_NTSC, 148 .demod_xfer_mode = 0,
146 149 .ctl_pin_status_mask = 0xFFFFFFC4,
147 .input = { { 150 .agc_analog_digital_select_gpio = 0x0c,
148 .type = CX231XX_VMUX_TELEVISION, 151 .gpio_pin_status_mask = 0x4001000,
149 .vmux = CX231XX_VIN_3_1, 152 .tuner_i2c_master = 1,
150 .amux = CX231XX_AMUX_VIDEO, 153 .demod_i2c_master = 2,
151 .gpio = 0, 154 .has_dvb = 1,
152 }, { 155 .demod_addr = 0x32,
153 .type = CX231XX_VMUX_COMPOSITE1, 156 .norm = V4L2_STD_NTSC,
154 .vmux = CX231XX_VIN_2_1, 157
155 .amux = CX231XX_AMUX_LINE_IN, 158 .input = {{
156 .gpio = 0, 159 .type =
157 }, { 160 CX231XX_VMUX_TELEVISION,
158 .type = CX231XX_VMUX_SVIDEO, 161 .vmux = CX231XX_VIN_3_1,
159 .vmux = CX231XX_VIN_1_1 | (CX231XX_VIN_1_2 << 8 ) | 162 .amux = CX231XX_AMUX_VIDEO,
160 CX25840_SVIDEO_ON, 163 .gpio = 0,
161 .amux = CX231XX_AMUX_LINE_IN, 164 }, {
162 .gpio = 0, 165 .type =
163 } }, 166 CX231XX_VMUX_COMPOSITE1,
164 }, 167 .vmux = CX231XX_VIN_2_1,
168 .amux =
169 CX231XX_AMUX_LINE_IN,
170 .gpio = 0,
171 }, {
172 .type =
173 CX231XX_VMUX_SVIDEO,
174 .vmux =
175 CX231XX_VIN_1_1 |
176 (CX231XX_VIN_1_2 <<
177 8) |
178 CX25840_SVIDEO_ON,
179 .amux =
180 CX231XX_AMUX_LINE_IN,
181 .gpio = 0,
182 }},
183 },
165}; 184};
166const unsigned int cx231xx_bcount = ARRAY_SIZE(cx231xx_boards); 185const unsigned int cx231xx_bcount = ARRAY_SIZE(cx231xx_boards);
167 186
168/* table of devices that work with this driver */ 187/* table of devices that work with this driver */
169struct usb_device_id cx231xx_id_table [] = { 188struct usb_device_id cx231xx_id_table[] = {
170 { USB_DEVICE(0x0572, 0x58A0), 189 {USB_DEVICE(0x0572, 0x58A0),
171 .driver_info = CX231XX_BOARD_UNKNOWN }, 190 .driver_info = CX231XX_BOARD_UNKNOWN},
172 { USB_DEVICE(0x0572, 0x58A2), 191 {USB_DEVICE(0x0572, 0x58A2),
173 .driver_info = CX231XX_BOARD_CNXT_RDE_250 }, 192 .driver_info = CX231XX_BOARD_CNXT_RDE_250},
174 { USB_DEVICE(0x0572, 0x5A3C), 193 {USB_DEVICE(0x0572, 0x5A3C),
175 .driver_info = CX231XX_BOARD_CNXT_RDU_250 }, 194 .driver_info = CX231XX_BOARD_CNXT_RDU_250},
176 { }, 195 {},
177}; 196};
197
178MODULE_DEVICE_TABLE(usb, cx231xx_id_table); 198MODULE_DEVICE_TABLE(usb, cx231xx_id_table);
179 199
180/* cx231xx_tuner_callback 200/* cx231xx_tuner_callback
@@ -186,21 +206,26 @@ int cx231xx_tuner_callback(void *ptr, int component, int command, int arg)
186 int rc = 0; 206 int rc = 0;
187 struct cx231xx *dev = ptr; 207 struct cx231xx *dev = ptr;
188 208
189 if (dev->tuner_type == TUNER_XC5000) { 209 if (dev->tuner_type == TUNER_XC5000) {
190 if (command == XC5000_TUNER_RESET) { 210 if (command == XC5000_TUNER_RESET) {
191 cx231xx_info("Tuner Call back : RESET : command %d : tuner type %d \n", 211 cx231xx_info
192 command, dev->tuner_type); 212 ("Tuner Call back : RESET : command %d : tuner type %d \n",
193 213 command, dev->tuner_type);
194 cx231xx_set_gpio_value(dev, dev->board.tuner_gpio->bit,1); 214
195 msleep(10); 215 cx231xx_set_gpio_value(dev, dev->board.tuner_gpio->bit,
196 cx231xx_set_gpio_value(dev, dev->board.tuner_gpio->bit,0); 216 1);
197 msleep(330); 217 msleep(10);
198 cx231xx_set_gpio_value(dev, dev->board.tuner_gpio->bit,1); 218 cx231xx_set_gpio_value(dev, dev->board.tuner_gpio->bit,
199 msleep(10); 219 0);
200 } 220 msleep(330);
201 } 221 cx231xx_set_gpio_value(dev, dev->board.tuner_gpio->bit,
222 1);
223 msleep(10);
224 }
225 }
202 return rc; 226 return rc;
203} 227}
228
204EXPORT_SYMBOL_GPL(cx231xx_tuner_callback); 229EXPORT_SYMBOL_GPL(cx231xx_tuner_callback);
205 230
206static void inline cx231xx_set_model(struct cx231xx *dev) 231static void inline cx231xx_set_model(struct cx231xx *dev)
@@ -217,34 +242,34 @@ void cx231xx_pre_card_setup(struct cx231xx *dev)
217 cx231xx_set_model(dev); 242 cx231xx_set_model(dev);
218 243
219 cx231xx_info("Identified as %s (card=%d)\n", 244 cx231xx_info("Identified as %s (card=%d)\n",
220 dev->board.name, dev->model); 245 dev->board.name, dev->model);
221 246
222 /* Do card specific if any */ 247 /* Do card specific if any */
223 switch (dev->model) { 248 switch (dev->model) {
224 case CX231XX_BOARD_CNXT_RDE_250: 249 case CX231XX_BOARD_CNXT_RDE_250:
225 /* do card specific GPIO settings if required */ 250 /* do card specific GPIO settings if required */
226 cx231xx_info("Precard: Board is Conexnat RDE 250\n"); 251 cx231xx_info("Precard: Board is Conexnat RDE 250\n");
227 /* set the direction for GPIO pins */ 252 /* set the direction for GPIO pins */
228 cx231xx_set_gpio_direction(dev, dev->board.tuner_gpio->bit,1); 253 cx231xx_set_gpio_direction(dev, dev->board.tuner_gpio->bit, 1);
229 cx231xx_set_gpio_value(dev, dev->board.tuner_gpio->bit,1); 254 cx231xx_set_gpio_value(dev, dev->board.tuner_gpio->bit, 1);
230 cx231xx_set_gpio_direction(dev, dev->board.tuner_sif_gpio,1); 255 cx231xx_set_gpio_direction(dev, dev->board.tuner_sif_gpio, 1);
231 break; 256 break;
232 case CX231XX_BOARD_CNXT_RDU_250: 257 case CX231XX_BOARD_CNXT_RDU_250:
233 /* do card specific GPIO settings if required */ 258 /* do card specific GPIO settings if required */
234 cx231xx_info("Precard: Board is Conexnat RDU 250\n"); 259 cx231xx_info("Precard: Board is Conexnat RDU 250\n");
235 /* set the direction for GPIO pins */ 260 /* set the direction for GPIO pins */
236 cx231xx_set_gpio_direction(dev, dev->board.tuner_gpio->bit,1); 261 cx231xx_set_gpio_direction(dev, dev->board.tuner_gpio->bit, 1);
237 cx231xx_set_gpio_value(dev, dev->board.tuner_gpio->bit,1); 262 cx231xx_set_gpio_value(dev, dev->board.tuner_gpio->bit, 1);
238 cx231xx_set_gpio_direction(dev, dev->board.tuner_sif_gpio,1); 263 cx231xx_set_gpio_direction(dev, dev->board.tuner_sif_gpio, 1);
239 break; 264 break;
240 } 265 }
241 266
242 /* request some modules if any required */ 267 /* request some modules if any required */
243 268
244 /* reset the Tuner */ 269 /* reset the Tuner */
245 cx231xx_gpio_set(dev, dev->board.tuner_gpio); 270 cx231xx_gpio_set(dev, dev->board.tuner_gpio);
246 271
247 /* set the mode to Analog mode initially */ 272 /* set the mode to Analog mode initially */
248 cx231xx_set_mode(dev, CX231XX_ANALOG_MODE); 273 cx231xx_set_mode(dev, CX231XX_ANALOG_MODE);
249 274
250 /* Unlock device */ 275 /* Unlock device */
@@ -256,8 +281,8 @@ void cx231xx_pre_card_setup(struct cx231xx *dev)
256 281
257static void cx231xx_config_tuner(struct cx231xx *dev) 282static void cx231xx_config_tuner(struct cx231xx *dev)
258{ 283{
259 struct tuner_setup tun_setup; 284 struct tuner_setup tun_setup;
260 struct v4l2_frequency f; 285 struct v4l2_frequency f;
261 286
262 if (dev->tuner_type == TUNER_ABSENT) 287 if (dev->tuner_type == TUNER_ABSENT)
263 return; 288 return;
@@ -267,26 +292,28 @@ static void cx231xx_config_tuner(struct cx231xx *dev)
267 tun_setup.addr = dev->tuner_addr; 292 tun_setup.addr = dev->tuner_addr;
268 tun_setup.tuner_callback = cx231xx_tuner_callback; 293 tun_setup.tuner_callback = cx231xx_tuner_callback;
269 294
270 cx231xx_i2c_call_clients(&dev->i2c_bus[1], TUNER_SET_TYPE_ADDR, &tun_setup); 295 cx231xx_i2c_call_clients(&dev->i2c_bus[1], TUNER_SET_TYPE_ADDR,
296 &tun_setup);
271#if 0 297#if 0
272 if (tun_setup.type == TUNER_XC5000) { 298 if (tun_setup.type == TUNER_XC5000) {
273 static struct xc2028_ctrl ctrl = { 299 static struct xc2028_ctrl ctrl = {
274 .fname = XC5000_DEFAULT_FIRMWARE, 300 .fname = XC5000_DEFAULT_FIRMWARE,
275 .max_len = 64, 301 .max_len = 64,
276 .demod = 0; 302 .demod = 0;
277 }; 303 };
278 struct v4l2_priv_tun_config cfg = { 304 struct v4l2_priv_tun_config cfg = {
279 .tuner = dev->tuner_type, 305 .tuner = dev->tuner_type,
280 .priv = &ctrl, 306 .priv = &ctrl,
281 }; 307 };
282 cx231xx_i2c_call_clients(&dev->i2c_bus[1], TUNER_SET_CONFIG, &cfg); 308 cx231xx_i2c_call_clients(&dev->i2c_bus[1], TUNER_SET_CONFIG,
309 &cfg);
283 } 310 }
284#endif 311#endif
285 312
286 /* configure tuner */ 313 /* configure tuner */
287 f.tuner = 0; 314 f.tuner = 0;
288 f.type = V4L2_TUNER_ANALOG_TV; 315 f.type = V4L2_TUNER_ANALOG_TV;
289 f.frequency = 9076; /* just a magic number */ 316 f.frequency = 9076; /* just a magic number */
290 dev->ctl_freq = f.frequency; 317 dev->ctl_freq = f.frequency;
291 cx231xx_i2c_call_clients(&dev->i2c_bus[1], VIDIOC_S_FREQUENCY, &f); 318 cx231xx_i2c_call_clients(&dev->i2c_bus[1], VIDIOC_S_FREQUENCY, &f);
292} 319}
@@ -298,18 +325,18 @@ void cx231xx_set_ir(struct cx231xx *dev, struct IR_i2c *ir)
298{ 325{
299 if (disable_ir) { 326 if (disable_ir) {
300 ir->get_key = NULL; 327 ir->get_key = NULL;
301 return ; 328 return;
302 } 329 }
303 330
304 /* detect & configure */ 331 /* detect & configure */
305 switch (dev->model) { 332 switch (dev->model) {
306 333
307 case CX231XX_BOARD_CNXT_RDE_250: 334 case CX231XX_BOARD_CNXT_RDE_250:
308 break; 335 break;
309 case CX231XX_BOARD_CNXT_RDU_250: 336 case CX231XX_BOARD_CNXT_RDU_250:
310 break; 337 break;
311 default: 338 default:
312 break; 339 break;
313 } 340 }
314} 341}
315 342
@@ -321,58 +348,55 @@ void cx231xx_card_setup(struct cx231xx *dev)
321 if (cx231xx_boards[dev->model].tuner_addr) 348 if (cx231xx_boards[dev->model].tuner_addr)
322 dev->tuner_addr = cx231xx_boards[dev->model].tuner_addr; 349 dev->tuner_addr = cx231xx_boards[dev->model].tuner_addr;
323 350
324 cx231xx_info(": tuner type %d, tuner address %d \n", 351 cx231xx_info(": tuner type %d, tuner address %d \n",
325 dev->tuner_type, dev->tuner_addr); 352 dev->tuner_type, dev->tuner_addr);
326 353
327 /* Do card specific if any */ 354 /* Do card specific if any */
328 switch (dev->model) { 355 switch (dev->model) {
329 case CX231XX_BOARD_CNXT_RDE_250: 356 case CX231XX_BOARD_CNXT_RDE_250:
330 /* do card specific GPIO settings if required */ 357 /* do card specific GPIO settings if required */
331 cx231xx_info("Board is Conexnat RDE 250\n"); 358 cx231xx_info("Board is Conexnat RDE 250\n");
332 break; 359 break;
333 case CX231XX_BOARD_CNXT_RDU_250: 360 case CX231XX_BOARD_CNXT_RDU_250:
334 /* do card specific GPIO settings if required */ 361 /* do card specific GPIO settings if required */
335 cx231xx_info("Board is Conexnat RDU 250\n"); 362 cx231xx_info("Board is Conexnat RDU 250\n");
336 break; 363 break;
337 } 364 }
338 365
339 if (dev->board.valid == CX231XX_BOARD_NOT_VALIDATED) { 366 if (dev->board.valid == CX231XX_BOARD_NOT_VALIDATED) {
340 cx231xx_errdev("\n\n"); 367 cx231xx_errdev("\n\n");
341 cx231xx_errdev("The support for this board weren't " 368 cx231xx_errdev("The support for this board weren't "
342 "valid yet.\n"); 369 "valid yet.\n");
343 cx231xx_errdev("Please send a report of having this working\n"); 370 cx231xx_errdev("Please send a report of having this working\n");
344 cx231xx_errdev("not to V4L mailing list (and/or to other " 371 cx231xx_errdev("not to V4L mailing list (and/or to other "
345 "addresses)\n\n"); 372 "addresses)\n\n");
346 } 373 }
347 374
348
349 /* request some modules */ 375 /* request some modules */
350 if (dev->board.decoder == CX231XX_AVDECODER) { 376 if (dev->board.decoder == CX231XX_AVDECODER) {
351 cx231xx_info(": Requesting cx25840 module\n"); 377 cx231xx_info(": Requesting cx25840 module\n");
352 request_module("cx25840"); 378 request_module("cx25840");
353 } 379 }
354#if 0 380#if 0
355 if (dev->board.tuner_type != TUNER_ABSENT) { 381 if (dev->board.tuner_type != TUNER_ABSENT) {
356 cx231xx_info(": Requesting Tuner module\n"); 382 cx231xx_info(": Requesting Tuner module\n");
357 request_module("tuner"); 383 request_module("tuner");
358 } 384 }
359 385
360 cx231xx_config_tuner(dev); 386 cx231xx_config_tuner(dev);
361 387
362 /* TBD IR will be added later */ 388 /* TBD IR will be added later */
363 cx231xx_ir_init(dev); 389 cx231xx_ir_init(dev);
364#endif 390#endif
365} 391}
366 392
367
368
369/* 393/*
370 * cx231xx_config() 394 * cx231xx_config()
371 * inits registers with sane defaults 395 * inits registers with sane defaults
372 */ 396 */
373int cx231xx_config(struct cx231xx *dev) 397int cx231xx_config(struct cx231xx *dev)
374{ 398{
375 /* TBD need to add cx231xx specific code */ 399 /* TBD need to add cx231xx specific code */
376 dev->mute = 1; /* maybe not the right place... */ 400 dev->mute = 1; /* maybe not the right place... */
377 dev->volume = 0x1f; 401 dev->volume = 0x1f;
378 402
@@ -401,30 +425,29 @@ void cx231xx_config_i2c(struct cx231xx *dev)
401void cx231xx_release_resources(struct cx231xx *dev) 425void cx231xx_release_resources(struct cx231xx *dev)
402{ 426{
403 427
404#if 0 /* TBD IR related */ 428#if 0 /* TBD IR related */
405 if (dev->ir) 429 if (dev->ir)
406 cx231xx_ir_fini(dev); 430 cx231xx_ir_fini(dev);
407#endif 431#endif
408 432
409 cx231xx_release_analog_resources(dev); 433 cx231xx_release_analog_resources(dev);
410 434
411 cx231xx_remove_from_devlist(dev); 435 cx231xx_remove_from_devlist(dev);
412 436
413 cx231xx_dev_uninit(dev); 437 cx231xx_dev_uninit(dev);
414 438
415 usb_put_dev(dev->udev); 439 usb_put_dev(dev->udev);
416 440
417 /* Mark device as unused */ 441 /* Mark device as unused */
418 cx231xx_devused &= ~(1<<dev->devno); 442 cx231xx_devused &= ~(1 << dev->devno);
419} 443}
420 444
421
422/* 445/*
423 * cx231xx_init_dev() 446 * cx231xx_init_dev()
424 * allocates and inits the device structs, registers i2c bus and v4l device 447 * allocates and inits the device structs, registers i2c bus and v4l device
425 */ 448 */
426static int cx231xx_init_dev(struct cx231xx **devhandle, struct usb_device *udev, 449static int cx231xx_init_dev(struct cx231xx **devhandle, struct usb_device *udev,
427 int minor) 450 int minor)
428{ 451{
429 struct cx231xx *dev = *devhandle; 452 struct cx231xx *dev = *devhandle;
430 int retval = -ENOMEM; 453 int retval = -ENOMEM;
@@ -434,26 +457,26 @@ static int cx231xx_init_dev(struct cx231xx **devhandle, struct usb_device *udev,
434 dev->udev = udev; 457 dev->udev = udev;
435 mutex_init(&dev->lock); 458 mutex_init(&dev->lock);
436 mutex_init(&dev->ctrl_urb_lock); 459 mutex_init(&dev->ctrl_urb_lock);
437 mutex_init(&dev->gpio_i2c_lock); 460 mutex_init(&dev->gpio_i2c_lock);
438 461
439 spin_lock_init(&dev->video_mode.slock); 462 spin_lock_init(&dev->video_mode.slock);
440 spin_lock_init(&dev->vbi_mode.slock); 463 spin_lock_init(&dev->vbi_mode.slock);
441 spin_lock_init(&dev->sliced_cc_mode.slock); 464 spin_lock_init(&dev->sliced_cc_mode.slock);
442 465
443 init_waitqueue_head(&dev->open); 466 init_waitqueue_head(&dev->open);
444 init_waitqueue_head(&dev->wait_frame); 467 init_waitqueue_head(&dev->wait_frame);
445 init_waitqueue_head(&dev->wait_stream); 468 init_waitqueue_head(&dev->wait_stream);
446 469
447 dev->cx231xx_read_ctrl_reg = cx231xx_read_ctrl_reg; 470 dev->cx231xx_read_ctrl_reg = cx231xx_read_ctrl_reg;
448 dev->cx231xx_write_ctrl_reg = cx231xx_write_ctrl_reg; 471 dev->cx231xx_write_ctrl_reg = cx231xx_write_ctrl_reg;
449 dev->cx231xx_send_usb_command = cx231xx_send_usb_command; 472 dev->cx231xx_send_usb_command = cx231xx_send_usb_command;
450 dev->cx231xx_gpio_i2c_read = cx231xx_gpio_i2c_read; 473 dev->cx231xx_gpio_i2c_read = cx231xx_gpio_i2c_read;
451 dev->cx231xx_gpio_i2c_write = cx231xx_gpio_i2c_write; 474 dev->cx231xx_gpio_i2c_write = cx231xx_gpio_i2c_write;
452 475
453 /* Query cx231xx to find what pcb config it is related to */ 476 /* Query cx231xx to find what pcb config it is related to */
454 initialize_cx231xx(dev); 477 initialize_cx231xx(dev);
455 478
456 /* Cx231xx pre card setup */ 479 /* Cx231xx pre card setup */
457 cx231xx_pre_card_setup(dev); 480 cx231xx_pre_card_setup(dev);
458 481
459 errCode = cx231xx_config(dev); 482 errCode = cx231xx_config(dev);
@@ -462,14 +485,14 @@ static int cx231xx_init_dev(struct cx231xx **devhandle, struct usb_device *udev,
462 return -ENOMEM; 485 return -ENOMEM;
463 } 486 }
464 487
465 /* set default norm */ 488 /* set default norm */
466 dev->norm = dev->board.norm; 489 dev->norm = dev->board.norm;
467 490
468 /* register i2c bus */ 491 /* register i2c bus */
469 errCode = cx231xx_dev_init(dev); 492 errCode = cx231xx_dev_init(dev);
470 if (errCode < 0) { 493 if (errCode < 0) {
471 cx231xx_errdev("%s: cx231xx_i2c_register - errCode [%d]!\n", 494 cx231xx_errdev("%s: cx231xx_i2c_register - errCode [%d]!\n",
472 __func__, errCode); 495 __func__, errCode);
473 return errCode; 496 return errCode;
474 } 497 }
475 498
@@ -493,7 +516,7 @@ static int cx231xx_init_dev(struct cx231xx **devhandle, struct usb_device *udev,
493 errCode = cx231xx_config(dev); 516 errCode = cx231xx_config(dev);
494 if (errCode < 0) { 517 if (errCode < 0) {
495 cx231xx_errdev("%s: cx231xx_config - errCode [%d]!\n", 518 cx231xx_errdev("%s: cx231xx_config - errCode [%d]!\n",
496 __func__, errCode); 519 __func__, errCode);
497 return errCode; 520 return errCode;
498 } 521 }
499 522
@@ -501,13 +524,13 @@ static int cx231xx_init_dev(struct cx231xx **devhandle, struct usb_device *udev,
501 INIT_LIST_HEAD(&dev->video_mode.vidq.active); 524 INIT_LIST_HEAD(&dev->video_mode.vidq.active);
502 INIT_LIST_HEAD(&dev->video_mode.vidq.queued); 525 INIT_LIST_HEAD(&dev->video_mode.vidq.queued);
503 526
504 /* init vbi dma queues */ 527 /* init vbi dma queues */
505 INIT_LIST_HEAD(&dev->vbi_mode.vidq.active); 528 INIT_LIST_HEAD(&dev->vbi_mode.vidq.active);
506 INIT_LIST_HEAD(&dev->vbi_mode.vidq.queued); 529 INIT_LIST_HEAD(&dev->vbi_mode.vidq.queued);
507 530
508 /* Reset other chips required if they are tied up with GPIO pins */ 531 /* Reset other chips required if they are tied up with GPIO pins */
509 532
510 cx231xx_add_into_devlist(dev); 533 cx231xx_add_into_devlist(dev);
511 534
512 retval = cx231xx_register_analog_devices(dev); 535 retval = cx231xx_register_analog_devices(dev);
513 if (retval < 0) { 536 if (retval < 0) {
@@ -519,7 +542,7 @@ static int cx231xx_init_dev(struct cx231xx **devhandle, struct usb_device *udev,
519 542
520 return 0; 543 return 0;
521 544
522fail_reg_devices: 545 fail_reg_devices:
523 mutex_unlock(&dev->lock); 546 mutex_unlock(&dev->lock);
524 return retval; 547 return retval;
525} 548}
@@ -528,8 +551,7 @@ fail_reg_devices:
528static void request_module_async(struct work_struct *work) 551static void request_module_async(struct work_struct *work)
529{ 552{
530 struct cx231xx *dev = container_of(work, 553 struct cx231xx *dev = container_of(work,
531 struct cx231xx, request_module_wk); 554 struct cx231xx, request_module_wk);
532
533 555
534 if (dev->has_alsa_audio) 556 if (dev->has_alsa_audio)
535 request_module("cx231xx-alsa"); 557 request_module("cx231xx-alsa");
@@ -548,130 +570,130 @@ static void request_modules(struct cx231xx *dev)
548#define request_modules(dev) 570#define request_modules(dev)
549#endif /* CONFIG_MODULES */ 571#endif /* CONFIG_MODULES */
550 572
551
552
553/* 573/*
554 * cx231xx_usb_probe() 574 * cx231xx_usb_probe()
555 * checks for supported devices 575 * checks for supported devices
556 */ 576 */
557static int cx231xx_usb_probe(struct usb_interface *interface, 577static int cx231xx_usb_probe(struct usb_interface *interface,
558 const struct usb_device_id *id) 578 const struct usb_device_id *id)
559{ 579{
560 struct usb_device *udev; 580 struct usb_device *udev;
561 struct usb_interface *uif; 581 struct usb_interface *uif;
562 struct cx231xx *dev = NULL; 582 struct cx231xx *dev = NULL;
563 int retval = -ENODEV; 583 int retval = -ENODEV;
564 int nr, ifnum; 584 int nr, ifnum;
565 int i, isoc_pipe = 0; 585 int i, isoc_pipe = 0;
566 char *speed; 586 char *speed;
567 char descr[255] = ""; 587 char descr[255] = "";
568 struct usb_interface *lif = NULL; 588 struct usb_interface *lif = NULL;
569 int skip_interface = 0; 589 int skip_interface = 0;
570 struct usb_interface_assoc_descriptor *assoc_desc; 590 struct usb_interface_assoc_descriptor *assoc_desc;
571 591
572 udev = usb_get_dev(interface_to_usbdev(interface)); 592 udev = usb_get_dev(interface_to_usbdev(interface));
573 ifnum = interface->altsetting[0].desc.bInterfaceNumber; 593 ifnum = interface->altsetting[0].desc.bInterfaceNumber;
574 594
575 cx231xx_info(": Interface Number %d\n", ifnum); 595 cx231xx_info(": Interface Number %d\n", ifnum);
576 596
577 /* Interface number 0 - IR interface */ 597 /* Interface number 0 - IR interface */
578 if(ifnum == 0 ){ 598 if (ifnum == 0) {
579 /* Check to see next free device and mark as used */ 599 /* Check to see next free device and mark as used */
580 nr = find_first_zero_bit(&cx231xx_devused, CX231XX_MAXBOARDS); 600 nr = find_first_zero_bit(&cx231xx_devused, CX231XX_MAXBOARDS);
581 cx231xx_devused |= 1<<nr; 601 cx231xx_devused |= 1 << nr;
582 602
583 if (nr >= CX231XX_MAXBOARDS) { 603 if (nr >= CX231XX_MAXBOARDS) {
584 cx231xx_info(": Supports only %i cx231xx boards.\n", 604 cx231xx_info(": Supports only %i cx231xx boards.\n",
585 CX231XX_MAXBOARDS); 605 CX231XX_MAXBOARDS);
586 cx231xx_devused &= ~(1<<nr); 606 cx231xx_devused &= ~(1 << nr);
587 return -ENOMEM; 607 return -ENOMEM;
588 } 608 }
589 609
590 /* allocate memory for our device state and initialize it */ 610 /* allocate memory for our device state and initialize it */
591 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 611 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
592 if (dev == NULL) { 612 if (dev == NULL) {
593 cx231xx_err(DRIVER_NAME ": out of memory!\n"); 613 cx231xx_err(DRIVER_NAME ": out of memory!\n");
594 cx231xx_devused &= ~(1<<nr); 614 cx231xx_devused &= ~(1 << nr);
595 return -ENOMEM; 615 return -ENOMEM;
596 } 616 }
597 617
598 snprintf(dev->name, 29, "cx231xx #%d", nr); 618 snprintf(dev->name, 29, "cx231xx #%d", nr);
599 dev->devno = nr; 619 dev->devno = nr;
600 dev->model = id->driver_info; 620 dev->model = id->driver_info;
601 dev->video_mode.alt = -1; 621 dev->video_mode.alt = -1;
602 dev->interface_count++; 622 dev->interface_count++;
603 623
604 /* reset gpio dir and value */ 624 /* reset gpio dir and value */
605 dev->gpio_dir = 0; 625 dev->gpio_dir = 0;
606 dev->gpio_val = 0; 626 dev->gpio_val = 0;
607 dev->xc_fw_load_done = 0; 627 dev->xc_fw_load_done = 0;
608 dev->has_alsa_audio = 1; 628 dev->has_alsa_audio = 1;
609 dev->power_mode = -1; 629 dev->power_mode = -1;
610 630
611 dev->vbi_or_sliced_cc_mode = 0; /* 0 - vbi ; 1 -sliced cc mode */ 631 dev->vbi_or_sliced_cc_mode = 0; /* 0 - vbi ; 1 -sliced cc mode */
612 632
613 /* get maximum no.of IAD interfaces */ 633 /* get maximum no.of IAD interfaces */
614 assoc_desc = udev->actconfig->intf_assoc[0]; 634 assoc_desc = udev->actconfig->intf_assoc[0];
615 dev->max_iad_interface_count = assoc_desc->bInterfaceCount; 635 dev->max_iad_interface_count = assoc_desc->bInterfaceCount;
616 cx231xx_info(": Found IAD interface count %d\n", dev->max_iad_interface_count); 636 cx231xx_info(": Found IAD interface count %d\n",
617 637 dev->max_iad_interface_count);
618 /* init CIR module TBD */ 638
619 639 /* init CIR module TBD */
620 /* store the current interface */ 640
621 lif = interface; 641 /* store the current interface */
622 642 lif = interface;
623 } 643
624 else if(ifnum == 1 ){ 644 } else if (ifnum == 1) {
625 645
626 /* Get dev structure first */ 646 /* Get dev structure first */
627 dev = usb_get_intfdata(udev->actconfig->interface[0]); 647 dev = usb_get_intfdata(udev->actconfig->interface[0]);
628 if(dev == NULL){ 648 if (dev == NULL) {
629 cx231xx_err(DRIVER_NAME ": out of first interface!\n"); 649 cx231xx_err(DRIVER_NAME ": out of first interface!\n");
630 return -ENODEV; 650 return -ENODEV;
631 } 651 }
632 652
633 /* store the interface 0 back */ 653 /* store the interface 0 back */
634 lif = udev->actconfig->interface[0]; 654 lif = udev->actconfig->interface[0];
635 655
636 /* increment interface count */ 656 /* increment interface count */
637 dev->interface_count++; 657 dev->interface_count++;
638 658
639 /* get device number */ 659 /* get device number */
640 nr = dev->devno; 660 nr = dev->devno;
641 661
642 assoc_desc = udev->actconfig->intf_assoc[0]; 662 assoc_desc = udev->actconfig->intf_assoc[0];
643 if(assoc_desc->bFirstInterface == ifnum){ 663 if (assoc_desc->bFirstInterface == ifnum) {
644 cx231xx_info(": Found IAD interface match: AV Descriptor Start!! \n"); 664 cx231xx_info
645 } else { 665 (": Found IAD interface match: AV Descriptor Start!! \n");
646 cx231xx_err(DRIVER_NAME " Not found matching interface\n"); 666 } else {
647 return -ENODEV; 667 cx231xx_err(DRIVER_NAME
648 } 668 " Not found matching interface\n");
649 669 return -ENODEV;
650 } 670 }
651 else if(ifnum >= 2) { 671
652 /* Get dev structure first */ 672 } else if (ifnum >= 2) {
653 dev = usb_get_intfdata(udev->actconfig->interface[0]); 673 /* Get dev structure first */
654 if(dev == NULL){ 674 dev = usb_get_intfdata(udev->actconfig->interface[0]);
655 cx231xx_err(DRIVER_NAME ": out of first interface!\n"); 675 if (dev == NULL) {
656 return -ENODEV; 676 cx231xx_err(DRIVER_NAME ": out of first interface!\n");
657 } 677 return -ENODEV;
658 678 }
659 /* store the interface 0 back */ 679
660 lif = udev->actconfig->interface[0]; 680 /* store the interface 0 back */
661 681 lif = udev->actconfig->interface[0];
662 /* increment interface count */ 682
663 dev->interface_count++; 683 /* increment interface count */
664 684 dev->interface_count++;
665 /* get device number */ 685
666 nr = dev->devno; 686 /* get device number */
667 687 nr = dev->devno;
668 /* set skip interface */ 688
669 if((dev->interface_count -1) != dev->max_iad_interface_count ) 689 /* set skip interface */
670 skip_interface = 1; /* set skipping */ 690 if ((dev->interface_count - 1) != dev->max_iad_interface_count)
671 else{ 691 skip_interface = 1; /* set skipping */
672 cx231xx_info(": Found IAD interface number match with AV Device number!! \n"); 692 else {
673 } 693 cx231xx_info
674 } 694 (": Found IAD interface number match with AV Device number!! \n");
695 }
696 }
675 697
676 switch (udev->speed) { 698 switch (udev->speed) {
677 case USB_SPEED_LOW: 699 case USB_SPEED_LOW:
@@ -700,153 +722,184 @@ static int cx231xx_usb_probe(struct usb_interface *interface,
700 strlcat(descr, " ", sizeof(descr)); 722 strlcat(descr, " ", sizeof(descr));
701 723
702 cx231xx_info("New device %s@ %s Mbps " 724 cx231xx_info("New device %s@ %s Mbps "
703 "(%04x:%04x, interface %d, class %d)\n", 725 "(%04x:%04x, interface %d, class %d)\n",
704 descr, 726 descr,
705 speed, 727 speed,
706 le16_to_cpu(udev->descriptor.idVendor), 728 le16_to_cpu(udev->descriptor.idVendor),
707 le16_to_cpu(udev->descriptor.idProduct), 729 le16_to_cpu(udev->descriptor.idProduct),
708 ifnum, 730 ifnum, interface->altsetting->desc.bInterfaceNumber);
709 interface->altsetting->desc.bInterfaceNumber); 731
710 732 /* AV device initialization */
711 /* AV device initialization */ 733 if ((dev->interface_count - 1) == dev->max_iad_interface_count) {
712 if((dev->interface_count -1) == dev->max_iad_interface_count ) { 734 cx231xx_info(" Calling init_dev\n");
713 cx231xx_info(" Calling init_dev\n"); 735 /* allocate device struct */
714 /* allocate device struct */ 736 retval = cx231xx_init_dev(&dev, udev, nr);
715 retval = cx231xx_init_dev(&dev, udev, nr); 737 if (retval) {
716 if (retval) { 738 cx231xx_devused &= ~(1 << dev->devno);
717 cx231xx_devused &= ~(1<<dev->devno); 739 kfree(dev);
718 kfree(dev); 740
719 741 return retval;
720 return retval; 742 }
721 } 743
722 744 /* compute alternate max packet sizes for video */
723 /* compute alternate max packet sizes for video */ 745 uif =
724 uif = udev->actconfig->interface[dev->current_pcb_config.hs_config_info[0].interface_info.video_index+1]; 746 udev->actconfig->interface[dev->current_pcb_config.
725 747 hs_config_info[0].interface_info.
726 dev->video_mode.end_point_addr = le16_to_cpu(uif->altsetting[0].endpoint[isoc_pipe].desc.bEndpointAddress); 748 video_index + 1];
727 749
728 dev->video_mode.num_alt = uif->num_altsetting; 750 dev->video_mode.end_point_addr =
729 cx231xx_info(": EndPoint Addr 0x%x, Alternate settings: %i\n", dev->video_mode.end_point_addr, 751 le16_to_cpu(uif->altsetting[0].endpoint[isoc_pipe].desc.
730 dev->video_mode.num_alt); 752 bEndpointAddress);
731 dev->video_mode.alt_max_pkt_size = kmalloc(32 * dev->video_mode.num_alt, GFP_KERNEL); 753
732 754 dev->video_mode.num_alt = uif->num_altsetting;
733 if (dev->video_mode.alt_max_pkt_size == NULL) { 755 cx231xx_info(": EndPoint Addr 0x%x, Alternate settings: %i\n",
734 cx231xx_errdev("out of memory!\n"); 756 dev->video_mode.end_point_addr,
735 cx231xx_devused &= ~(1<<nr); 757 dev->video_mode.num_alt);
736 kfree(dev); 758 dev->video_mode.alt_max_pkt_size =
737 return -ENOMEM; 759 kmalloc(32 * dev->video_mode.num_alt, GFP_KERNEL);
738 } 760
739 761 if (dev->video_mode.alt_max_pkt_size == NULL) {
740 for (i = 0; i < dev->video_mode.num_alt ; i++) { 762 cx231xx_errdev("out of memory!\n");
741 u16 tmp = le16_to_cpu(uif->altsetting[i].endpoint[isoc_pipe].desc. 763 cx231xx_devused &= ~(1 << nr);
742 wMaxPacketSize); 764 kfree(dev);
743 dev->video_mode.alt_max_pkt_size[i] = 765 return -ENOMEM;
744 (tmp & 0x07ff) * (((tmp & 0x1800) >> 11) + 1); 766 }
745 cx231xx_info("Alternate setting %i, max size= %i\n", i, 767
746 dev->video_mode.alt_max_pkt_size[i]); 768 for (i = 0; i < dev->video_mode.num_alt; i++) {
747 } 769 u16 tmp =
748 770 le16_to_cpu(uif->altsetting[i].endpoint[isoc_pipe].
749 771 desc.wMaxPacketSize);
750 /* compute alternate max packet sizes for vbi */ 772 dev->video_mode.alt_max_pkt_size[i] =
751 uif = udev->actconfig->interface[dev->current_pcb_config.hs_config_info[0].interface_info.vanc_index+1]; 773 (tmp & 0x07ff) * (((tmp & 0x1800) >> 11) + 1);
752 774 cx231xx_info("Alternate setting %i, max size= %i\n", i,
753 dev->vbi_mode.end_point_addr = 775 dev->video_mode.alt_max_pkt_size[i]);
754 le16_to_cpu(uif->altsetting[0].endpoint[isoc_pipe].desc.bEndpointAddress); 776 }
755 777
756 dev->vbi_mode.num_alt = uif->num_altsetting; 778 /* compute alternate max packet sizes for vbi */
757 cx231xx_info(": EndPoint Addr 0x%x, Alternate settings: %i\n", dev->vbi_mode.end_point_addr, 779 uif =
758 dev->vbi_mode.num_alt); 780 udev->actconfig->interface[dev->current_pcb_config.
759 dev->vbi_mode.alt_max_pkt_size = kmalloc(32 * dev->vbi_mode.num_alt, GFP_KERNEL); 781 hs_config_info[0].interface_info.
760 782 vanc_index + 1];
761 if (dev->vbi_mode.alt_max_pkt_size == NULL) { 783
762 cx231xx_errdev("out of memory!\n"); 784 dev->vbi_mode.end_point_addr =
763 cx231xx_devused &= ~(1<<nr); 785 le16_to_cpu(uif->altsetting[0].endpoint[isoc_pipe].desc.
764 kfree(dev); 786 bEndpointAddress);
765 return -ENOMEM; 787
766 } 788 dev->vbi_mode.num_alt = uif->num_altsetting;
767 789 cx231xx_info(": EndPoint Addr 0x%x, Alternate settings: %i\n",
768 for (i = 0; i < dev->vbi_mode.num_alt ; i++) { 790 dev->vbi_mode.end_point_addr,
769 u16 tmp = le16_to_cpu(uif->altsetting[i].endpoint[isoc_pipe].desc. 791 dev->vbi_mode.num_alt);
770 wMaxPacketSize); 792 dev->vbi_mode.alt_max_pkt_size =
771 dev->vbi_mode.alt_max_pkt_size[i] = 793 kmalloc(32 * dev->vbi_mode.num_alt, GFP_KERNEL);
772 (tmp & 0x07ff) * (((tmp & 0x1800) >> 11) + 1); 794
773 cx231xx_info("Alternate setting %i, max size= %i\n", i, 795 if (dev->vbi_mode.alt_max_pkt_size == NULL) {
774 dev->vbi_mode.alt_max_pkt_size[i]); 796 cx231xx_errdev("out of memory!\n");
775 } 797 cx231xx_devused &= ~(1 << nr);
776 798 kfree(dev);
777 /* compute alternate max packet sizes for sliced CC */ 799 return -ENOMEM;
778 uif = udev->actconfig->interface[dev->current_pcb_config.hs_config_info[0].interface_info.hanc_index+1]; 800 }
779 801
780 dev->sliced_cc_mode.end_point_addr = 802 for (i = 0; i < dev->vbi_mode.num_alt; i++) {
781 le16_to_cpu(uif->altsetting[0].endpoint[isoc_pipe].desc.bEndpointAddress); 803 u16 tmp =
782 804 le16_to_cpu(uif->altsetting[i].endpoint[isoc_pipe].
783 dev->sliced_cc_mode.num_alt = uif->num_altsetting; 805 desc.wMaxPacketSize);
784 cx231xx_info(": EndPoint Addr 0x%x, Alternate settings: %i\n", dev->sliced_cc_mode.end_point_addr, 806 dev->vbi_mode.alt_max_pkt_size[i] =
785 dev->sliced_cc_mode.num_alt); 807 (tmp & 0x07ff) * (((tmp & 0x1800) >> 11) + 1);
786 dev->sliced_cc_mode.alt_max_pkt_size = kmalloc(32 * dev->sliced_cc_mode.num_alt, GFP_KERNEL); 808 cx231xx_info("Alternate setting %i, max size= %i\n", i,
787 809 dev->vbi_mode.alt_max_pkt_size[i]);
788 if (dev->sliced_cc_mode.alt_max_pkt_size == NULL) { 810 }
789 cx231xx_errdev("out of memory!\n"); 811
790 cx231xx_devused &= ~(1<<nr); 812 /* compute alternate max packet sizes for sliced CC */
791 kfree(dev); 813 uif =
792 return -ENOMEM; 814 udev->actconfig->interface[dev->current_pcb_config.
793 } 815 hs_config_info[0].interface_info.
794 816 hanc_index + 1];
795 for (i = 0; i < dev->sliced_cc_mode.num_alt ; i++) { 817
796 u16 tmp = le16_to_cpu(uif->altsetting[i].endpoint[isoc_pipe].desc. 818 dev->sliced_cc_mode.end_point_addr =
797 wMaxPacketSize); 819 le16_to_cpu(uif->altsetting[0].endpoint[isoc_pipe].desc.
798 dev->sliced_cc_mode.alt_max_pkt_size[i] = 820 bEndpointAddress);
799 (tmp & 0x07ff) * (((tmp & 0x1800) >> 11) + 1); 821
800 cx231xx_info("Alternate setting %i, max size= %i\n", i, 822 dev->sliced_cc_mode.num_alt = uif->num_altsetting;
801 dev->sliced_cc_mode.alt_max_pkt_size[i]); 823 cx231xx_info(": EndPoint Addr 0x%x, Alternate settings: %i\n",
802 } 824 dev->sliced_cc_mode.end_point_addr,
803 825 dev->sliced_cc_mode.num_alt);
804 if(dev->current_pcb_config.ts1_source != 0xff ) { 826 dev->sliced_cc_mode.alt_max_pkt_size =
805 827 kmalloc(32 * dev->sliced_cc_mode.num_alt, GFP_KERNEL);
806 /* compute alternate max packet sizes for TS1 */ 828
807 uif = udev->actconfig->interface[dev->current_pcb_config.hs_config_info[0].interface_info.ts1_index+1]; 829 if (dev->sliced_cc_mode.alt_max_pkt_size == NULL) {
808 830 cx231xx_errdev("out of memory!\n");
809 dev->ts1_mode.end_point_addr = 831 cx231xx_devused &= ~(1 << nr);
810 le16_to_cpu(uif->altsetting[0].endpoint[isoc_pipe].desc.bEndpointAddress); 832 kfree(dev);
811 833 return -ENOMEM;
812 dev->ts1_mode.num_alt = uif->num_altsetting; 834 }
813 cx231xx_info(": EndPoint Addr 0x%x, Alternate settings: %i\n", dev->ts1_mode.end_point_addr, 835
814 dev->ts1_mode.num_alt); 836 for (i = 0; i < dev->sliced_cc_mode.num_alt; i++) {
815 dev->ts1_mode.alt_max_pkt_size = kmalloc(32 * dev->ts1_mode.num_alt, GFP_KERNEL); 837 u16 tmp =
816 838 le16_to_cpu(uif->altsetting[i].endpoint[isoc_pipe].
817 if (dev->ts1_mode.alt_max_pkt_size == NULL) { 839 desc.wMaxPacketSize);
818 cx231xx_errdev("out of memory!\n"); 840 dev->sliced_cc_mode.alt_max_pkt_size[i] =
819 cx231xx_devused &= ~(1<<nr); 841 (tmp & 0x07ff) * (((tmp & 0x1800) >> 11) + 1);
820 kfree(dev); 842 cx231xx_info("Alternate setting %i, max size= %i\n", i,
821 return -ENOMEM; 843 dev->sliced_cc_mode.alt_max_pkt_size[i]);
822 } 844 }
823 845
824 for (i = 0; i < dev->ts1_mode.num_alt ; i++) { 846 if (dev->current_pcb_config.ts1_source != 0xff) {
825 u16 tmp = le16_to_cpu(uif->altsetting[i].endpoint[isoc_pipe].desc. 847
826 wMaxPacketSize); 848 /* compute alternate max packet sizes for TS1 */
827 dev->ts1_mode.alt_max_pkt_size[i] = 849 uif =
828 (tmp & 0x07ff) * (((tmp & 0x1800) >> 11) + 1); 850 udev->actconfig->interface[dev->current_pcb_config.
829 cx231xx_info("Alternate setting %i, max size= %i\n", i, 851 hs_config_info[0].
830 dev->ts1_mode.alt_max_pkt_size[i]); 852 interface_info.
831 } 853 ts1_index + 1];
832 } 854
833 855 dev->ts1_mode.end_point_addr =
834 } 856 le16_to_cpu(uif->altsetting[0].endpoint[isoc_pipe].
857 desc.bEndpointAddress);
858
859 dev->ts1_mode.num_alt = uif->num_altsetting;
860 cx231xx_info
861 (": EndPoint Addr 0x%x, Alternate settings: %i\n",
862 dev->ts1_mode.end_point_addr,
863 dev->ts1_mode.num_alt);
864 dev->ts1_mode.alt_max_pkt_size =
865 kmalloc(32 * dev->ts1_mode.num_alt, GFP_KERNEL);
866
867 if (dev->ts1_mode.alt_max_pkt_size == NULL) {
868 cx231xx_errdev("out of memory!\n");
869 cx231xx_devused &= ~(1 << nr);
870 kfree(dev);
871 return -ENOMEM;
872 }
873
874 for (i = 0; i < dev->ts1_mode.num_alt; i++) {
875 u16 tmp =
876 le16_to_cpu(uif->altsetting[i].
877 endpoint[isoc_pipe].desc.
878 wMaxPacketSize);
879 dev->ts1_mode.alt_max_pkt_size[i] =
880 (tmp & 0x07ff) * (((tmp & 0x1800) >> 11) +
881 1);
882 cx231xx_info
883 ("Alternate setting %i, max size= %i\n", i,
884 dev->ts1_mode.alt_max_pkt_size[i]);
885 }
886 }
887
888 }
835 889
836 /* save our data pointer in this interface device */ 890 /* save our data pointer in this interface device */
837 usb_set_intfdata(lif, dev); 891 usb_set_intfdata(lif, dev);
838 892
839 /* load other modules required */ 893 /* load other modules required */
840 if((dev->interface_count -1) == dev->max_iad_interface_count ) 894 if ((dev->interface_count - 1) == dev->max_iad_interface_count) {
841 { 895 cx231xx_info("Calling request modules\n");
842 cx231xx_info("Calling request modules\n"); 896 request_modules(dev);
843 request_modules(dev); 897 }
844 }
845 898
846 if(skip_interface ) { 899 if (skip_interface) {
847 cx231xx_info("Skipping the interface\n"); 900 cx231xx_info("Skipping the interface\n");
848 return -ENODEV; 901 return -ENODEV;
849 } 902 }
850 903
851 return 0; 904 return 0;
852} 905}
@@ -860,7 +913,7 @@ static void cx231xx_usb_disconnect(struct usb_interface *interface)
860{ 913{
861 struct cx231xx *dev; 914 struct cx231xx *dev;
862 915
863 dev = usb_get_intfdata(interface); 916 dev = usb_get_intfdata(interface);
864 usb_set_intfdata(interface, NULL); 917 usb_set_intfdata(interface, NULL);
865 918
866 if (!dev) 919 if (!dev)
@@ -875,8 +928,7 @@ static void cx231xx_usb_disconnect(struct usb_interface *interface)
875 if (dev->users) { 928 if (dev->users) {
876 cx231xx_warn 929 cx231xx_warn
877 ("device /dev/video%d is open! Deregistration and memory " 930 ("device /dev/video%d is open! Deregistration and memory "
878 "deallocation are deferred on close.\n", 931 "deallocation are deferred on close.\n", dev->vdev->num);
879 dev->vdev->num);
880 932
881 dev->state |= DEV_MISCONFIGURED; 933 dev->state |= DEV_MISCONFIGURED;
882 cx231xx_uninit_isoc(dev); 934 cx231xx_uninit_isoc(dev);
@@ -888,15 +940,15 @@ static void cx231xx_usb_disconnect(struct usb_interface *interface)
888 cx231xx_release_resources(dev); 940 cx231xx_release_resources(dev);
889 } 941 }
890 942
891 cx231xx_close_extension(dev); 943 cx231xx_close_extension(dev);
892 944
893 mutex_unlock(&dev->lock); 945 mutex_unlock(&dev->lock);
894 946
895 if (!dev->users) { 947 if (!dev->users) {
896 kfree(dev->video_mode.alt_max_pkt_size); 948 kfree(dev->video_mode.alt_max_pkt_size);
897 kfree(dev->vbi_mode.alt_max_pkt_size); 949 kfree(dev->vbi_mode.alt_max_pkt_size);
898 kfree(dev->sliced_cc_mode.alt_max_pkt_size); 950 kfree(dev->sliced_cc_mode.alt_max_pkt_size);
899 kfree(dev->ts1_mode.alt_max_pkt_size); 951 kfree(dev->ts1_mode.alt_max_pkt_size);
900 kfree(dev); 952 kfree(dev);
901 } 953 }
902} 954}
@@ -920,7 +972,7 @@ static int __init cx231xx_module_init(void)
920 result = usb_register(&cx231xx_usb_driver); 972 result = usb_register(&cx231xx_usb_driver);
921 if (result) 973 if (result)
922 cx231xx_err(DRIVER_NAME 974 cx231xx_err(DRIVER_NAME
923 " usb_register failed. Error number %d.\n", result); 975 " usb_register failed. Error number %d.\n", result);
924 976
925 return result; 977 return result;
926} 978}
diff --git a/drivers/media/video/cx231xx/cx231xx-conf-reg.h b/drivers/media/video/cx231xx/cx231xx-conf-reg.h
index 5ccf6bdfe579..a65f99ba109b 100644
--- a/drivers/media/video/cx231xx/cx231xx-conf-reg.h
+++ b/drivers/media/video/cx231xx/cx231xx-conf-reg.h
@@ -1,6 +1,6 @@
1/* 1/*
2 cx231xx_conf-reg.h - driver for Conexant Cx23100/101/102 USB 2 cx231xx_conf-reg.h - driver for Conexant Cx23100/101/102 USB
3 video capture devices 3 video capture devices
4 4
5 Copyright (C) 2008 <srinivasa.deevi at conexant dot com> 5 Copyright (C) 2008 <srinivasa.deevi at conexant dot com>
6 6
@@ -19,7 +19,6 @@
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */ 20 */
21 21
22
23#ifndef _POLARIS_REG_H_ 22#ifndef _POLARIS_REG_H_
24#define _POLARIS_REG_H_ 23#define _POLARIS_REG_H_
25 24
@@ -43,30 +42,30 @@
43#define PWR_CTL_EN 0x74 42#define PWR_CTL_EN 0x74
44 43
45/* Polaris Endpoints capture mask for register EP_MODE_SET */ 44/* Polaris Endpoints capture mask for register EP_MODE_SET */
46#define ENABLE_EP1 0x01 /* Bit[0]=1 */ 45#define ENABLE_EP1 0x01 /* Bit[0]=1 */
47#define ENABLE_EP2 0x02 /* Bit[1]=1 */ 46#define ENABLE_EP2 0x02 /* Bit[1]=1 */
48#define ENABLE_EP3 0x04 /* Bit[2]=1 */ 47#define ENABLE_EP3 0x04 /* Bit[2]=1 */
49#define ENABLE_EP4 0x08 /* Bit[3]=1 */ 48#define ENABLE_EP4 0x08 /* Bit[3]=1 */
50#define ENABLE_EP5 0x10 /* Bit[4]=1 */ 49#define ENABLE_EP5 0x10 /* Bit[4]=1 */
51#define ENABLE_EP6 0x20 /* Bit[5]=1 */ 50#define ENABLE_EP6 0x20 /* Bit[5]=1 */
52 51
53/* Bit definition for register PWR_CTL_EN */ 52/* Bit definition for register PWR_CTL_EN */
54#define PWR_MODE_MASK 0x17f 53#define PWR_MODE_MASK 0x17f
55#define PWR_AV_EN 0x08 /* bit3 */ 54#define PWR_AV_EN 0x08 /* bit3 */
56#define PWR_ISO_EN 0x40 /* bit6 */ 55#define PWR_ISO_EN 0x40 /* bit6 */
57#define PWR_AV_MODE 0x30 /* bit4,5 */ 56#define PWR_AV_MODE 0x30 /* bit4,5 */
58#define PWR_TUNER_EN 0x04 /* bit2 */ 57#define PWR_TUNER_EN 0x04 /* bit2 */
59#define PWR_DEMOD_EN 0x02 /* bit1 */ 58#define PWR_DEMOD_EN 0x02 /* bit1 */
60#define I2C_DEMOD_EN 0x01 /* bit0 */ 59#define I2C_DEMOD_EN 0x01 /* bit0 */
61#define PWR_RESETOUT_EN 0x100 /* bit8 */ 60#define PWR_RESETOUT_EN 0x100 /* bit8 */
62 61
63typedef enum{ 62typedef enum {
64 POLARIS_AVMODE_DEFAULT = 0, 63 POLARIS_AVMODE_DEFAULT = 0,
65 POLARIS_AVMODE_DIGITAL = 0x10, 64 POLARIS_AVMODE_DIGITAL = 0x10,
66 POLARIS_AVMODE_ANALOGT_TV = 0x20, 65 POLARIS_AVMODE_ANALOGT_TV = 0x20,
67 POLARIS_AVMODE_ENXTERNAL_AV = 0x30, 66 POLARIS_AVMODE_ENXTERNAL_AV = 0x30,
68 67
69}AV_MODE; 68} AV_MODE;
70 69
71/* Colibri Registers */ 70/* Colibri Registers */
72 71
@@ -75,8 +74,6 @@ typedef enum{
75#define EU_IF 0x9 74#define EU_IF 0x9
76#define US_IF 0xa 75#define US_IF 0xa
77 76
78
79
80#define SUP_BLK_TUNE1 0x00 77#define SUP_BLK_TUNE1 0x00
81#define SUP_BLK_TUNE2 0x01 78#define SUP_BLK_TUNE2 0x01
82#define SUP_BLK_TUNE3 0x02 79#define SUP_BLK_TUNE3 0x02
@@ -129,7 +126,7 @@ typedef enum{
129#define ADC_INPUT_CH1 0x28 126#define ADC_INPUT_CH1 0x28
130#define ADC_INPUT_CH2 0x48 127#define ADC_INPUT_CH2 0x48
131#define ADC_INPUT_CH3 0x68 128#define ADC_INPUT_CH3 0x68
132#define INPUT_SEL_MASK 0x30 /* [5:4] in_sel */ 129#define INPUT_SEL_MASK 0x30 /* [5:4] in_sel */
133 130
134#define ADC_NTF_PRECLMP_EN_CH1 0x29 131#define ADC_NTF_PRECLMP_EN_CH1 0x29
135#define ADC_NTF_PRECLMP_EN_CH2 0x49 132#define ADC_NTF_PRECLMP_EN_CH2 0x49
@@ -148,12 +145,12 @@ typedef enum{
148#define TESTBUS_CTRL_CH3 0x72 145#define TESTBUS_CTRL_CH3 0x72
149 146
150/****************************************************************************** 147/******************************************************************************
151 * DIF registers * 148 * DIF registers *
152 ******************************************************************************/ 149 ******************************************************************************/
153#define DIRECT_IF_REVB_BASE 0x00300 150#define DIRECT_IF_REVB_BASE 0x00300
154 151
155/*****************************************************************************/ 152/*****************************************************************************/
156#define DIF_PLL_FREQ_WORD (DIRECT_IF_REVB_BASE + 0x00000000) /* Reg Size 32 */ 153#define DIF_PLL_FREQ_WORD (DIRECT_IF_REVB_BASE + 0x00000000) /* Reg Size 32 */
157/*****************************************************************************/ 154/*****************************************************************************/
158#define FLD_DIF_PLL_LOCK 0x80000000 155#define FLD_DIF_PLL_LOCK 0x80000000
159/* Reserved [30:29] */ 156/* Reserved [30:29] */
@@ -161,7 +158,7 @@ typedef enum{
161#define FLD_DIF_PLL_FREQ 0x0FFFFFFF 158#define FLD_DIF_PLL_FREQ 0x0FFFFFFF
162 159
163/*****************************************************************************/ 160/*****************************************************************************/
164#define DIF_PLL_CTRL (DIRECT_IF_REVB_BASE + 0x00000004) /* Reg Size 32 */ 161#define DIF_PLL_CTRL (DIRECT_IF_REVB_BASE + 0x00000004) /* Reg Size 32 */
165/*****************************************************************************/ 162/*****************************************************************************/
166#define FLD_DIF_KD_PD 0xFF000000 163#define FLD_DIF_KD_PD 0xFF000000
167/* Reserved [23:20] */ 164/* Reserved [23:20] */
@@ -171,7 +168,7 @@ typedef enum{
171#define FLD_DIF_KIS_PD 0x0000000F 168#define FLD_DIF_KIS_PD 0x0000000F
172 169
173/*****************************************************************************/ 170/*****************************************************************************/
174#define DIF_PLL_CTRL1 (DIRECT_IF_REVB_BASE + 0x00000008) /* Reg Size 32 */ 171#define DIF_PLL_CTRL1 (DIRECT_IF_REVB_BASE + 0x00000008) /* Reg Size 32 */
175/*****************************************************************************/ 172/*****************************************************************************/
176#define FLD_DIF_KD_FD 0xFF000000 173#define FLD_DIF_KD_FD 0xFF000000
177/* Reserved [23:20] */ 174/* Reserved [23:20] */
@@ -181,7 +178,7 @@ typedef enum{
181#define FLD_DIF_KIS_FD 0x0000000F 178#define FLD_DIF_KIS_FD 0x0000000F
182 179
183/*****************************************************************************/ 180/*****************************************************************************/
184#define DIF_PLL_CTRL2 (DIRECT_IF_REVB_BASE + 0x0000000C) /* Reg Size 32 */ 181#define DIF_PLL_CTRL2 (DIRECT_IF_REVB_BASE + 0x0000000C) /* Reg Size 32 */
185/*****************************************************************************/ 182/*****************************************************************************/
186#define FLD_DIF_PLL_AGC_REF 0xFFF00000 183#define FLD_DIF_PLL_AGC_REF 0xFFF00000
187#define FLD_DIF_PLL_AGC_KI 0x000F0000 184#define FLD_DIF_PLL_AGC_KI 0x000F0000
@@ -191,7 +188,7 @@ typedef enum{
191#define FLD_DIF_DOWNSMPL_FD 0x000000FF 188#define FLD_DIF_DOWNSMPL_FD 0x000000FF
192 189
193/*****************************************************************************/ 190/*****************************************************************************/
194#define DIF_PLL_CTRL3 (DIRECT_IF_REVB_BASE + 0x00000010) /* Reg Size 32 */ 191#define DIF_PLL_CTRL3 (DIRECT_IF_REVB_BASE + 0x00000010) /* Reg Size 32 */
195/*****************************************************************************/ 192/*****************************************************************************/
196/* Reserved [31:16] */ 193/* Reserved [31:16] */
197#define FLD_DIF_PLL_AGC_EN 0x00008000 194#define FLD_DIF_PLL_AGC_EN 0x00008000
@@ -199,7 +196,7 @@ typedef enum{
199#define FLD_DIF_PLL_MAN_GAIN 0x00000FFF 196#define FLD_DIF_PLL_MAN_GAIN 0x00000FFF
200 197
201/*****************************************************************************/ 198/*****************************************************************************/
202#define DIF_AGC_IF_REF (DIRECT_IF_REVB_BASE + 0x00000014) /* Reg Size 32 */ 199#define DIF_AGC_IF_REF (DIRECT_IF_REVB_BASE + 0x00000014) /* Reg Size 32 */
203/*****************************************************************************/ 200/*****************************************************************************/
204#define FLD_DIF_K_AGC_RF 0xF0000000 201#define FLD_DIF_K_AGC_RF 0xF0000000
205#define FLD_DIF_K_AGC_IF 0x0F000000 202#define FLD_DIF_K_AGC_IF 0x0F000000
@@ -208,40 +205,40 @@ typedef enum{
208#define FLD_DIF_IF_REF 0x00000FFF 205#define FLD_DIF_IF_REF 0x00000FFF
209 206
210/*****************************************************************************/ 207/*****************************************************************************/
211#define DIF_AGC_CTRL_IF (DIRECT_IF_REVB_BASE + 0x00000018) /* Reg Size 32 */ 208#define DIF_AGC_CTRL_IF (DIRECT_IF_REVB_BASE + 0x00000018) /* Reg Size 32 */
212/*****************************************************************************/ 209/*****************************************************************************/
213#define FLD_DIF_IF_MAX 0xFF000000 210#define FLD_DIF_IF_MAX 0xFF000000
214#define FLD_DIF_IF_MIN 0x00FF0000 211#define FLD_DIF_IF_MIN 0x00FF0000
215#define FLD_DIF_IF_AGC 0x0000FFFF 212#define FLD_DIF_IF_AGC 0x0000FFFF
216 213
217/*****************************************************************************/ 214/*****************************************************************************/
218#define DIF_AGC_CTRL_INT (DIRECT_IF_REVB_BASE + 0x0000001C) /* Reg Size 32 */ 215#define DIF_AGC_CTRL_INT (DIRECT_IF_REVB_BASE + 0x0000001C) /* Reg Size 32 */
219/*****************************************************************************/ 216/*****************************************************************************/
220#define FLD_DIF_INT_MAX 0xFF000000 217#define FLD_DIF_INT_MAX 0xFF000000
221#define FLD_DIF_INT_MIN 0x00FF0000 218#define FLD_DIF_INT_MIN 0x00FF0000
222#define FLD_DIF_INT_AGC 0x0000FFFF 219#define FLD_DIF_INT_AGC 0x0000FFFF
223 220
224/*****************************************************************************/ 221/*****************************************************************************/
225#define DIF_AGC_CTRL_RF (DIRECT_IF_REVB_BASE + 0x00000020) /* Reg Size 32 */ 222#define DIF_AGC_CTRL_RF (DIRECT_IF_REVB_BASE + 0x00000020) /* Reg Size 32 */
226/*****************************************************************************/ 223/*****************************************************************************/
227#define FLD_DIF_RF_MAX 0xFF000000 224#define FLD_DIF_RF_MAX 0xFF000000
228#define FLD_DIF_RF_MIN 0x00FF0000 225#define FLD_DIF_RF_MIN 0x00FF0000
229#define FLD_DIF_RF_AGC 0x0000FFFF 226#define FLD_DIF_RF_AGC 0x0000FFFF
230 227
231/*****************************************************************************/ 228/*****************************************************************************/
232#define DIF_AGC_IF_INT_CURRENT (DIRECT_IF_REVB_BASE + 0x00000024) /* Reg Size 32 */ 229#define DIF_AGC_IF_INT_CURRENT (DIRECT_IF_REVB_BASE + 0x00000024) /* Reg Size 32 */
233/*****************************************************************************/ 230/*****************************************************************************/
234#define FLD_DIF_IF_AGC_IN 0xFFFF0000 231#define FLD_DIF_IF_AGC_IN 0xFFFF0000
235#define FLD_DIF_INT_AGC_IN 0x0000FFFF 232#define FLD_DIF_INT_AGC_IN 0x0000FFFF
236 233
237/*****************************************************************************/ 234/*****************************************************************************/
238#define DIF_AGC_RF_CURRENT (DIRECT_IF_REVB_BASE + 0x00000028) /* Reg Size 32 */ 235#define DIF_AGC_RF_CURRENT (DIRECT_IF_REVB_BASE + 0x00000028) /* Reg Size 32 */
239/*****************************************************************************/ 236/*****************************************************************************/
240/* Reserved [31:16] */ 237/* Reserved [31:16] */
241#define FLD_DIF_RF_AGC_IN 0x0000FFFF 238#define FLD_DIF_RF_AGC_IN 0x0000FFFF
242 239
243/*****************************************************************************/ 240/*****************************************************************************/
244#define DIF_VIDEO_AGC_CTRL (DIRECT_IF_REVB_BASE + 0x0000002C) /* Reg Size 32 */ 241#define DIF_VIDEO_AGC_CTRL (DIRECT_IF_REVB_BASE + 0x0000002C) /* Reg Size 32 */
245/*****************************************************************************/ 242/*****************************************************************************/
246#define FLD_DIF_AFD 0xC0000000 243#define FLD_DIF_AFD 0xC0000000
247#define FLD_DIF_K_VID_AGC 0x30000000 244#define FLD_DIF_K_VID_AGC 0x30000000
@@ -249,7 +246,7 @@ typedef enum{
249#define FLD_DIF_AGC_GAIN 0x0000FFFF 246#define FLD_DIF_AGC_GAIN 0x0000FFFF
250 247
251/*****************************************************************************/ 248/*****************************************************************************/
252#define DIF_VID_AUD_OVERRIDE (DIRECT_IF_REVB_BASE + 0x00000030) /* Reg Size 32 */ 249#define DIF_VID_AUD_OVERRIDE (DIRECT_IF_REVB_BASE + 0x00000030) /* Reg Size 32 */
253/*****************************************************************************/ 250/*****************************************************************************/
254#define FLD_DIF_AUDIO_AGC_OVERRIDE 0x80000000 251#define FLD_DIF_AUDIO_AGC_OVERRIDE 0x80000000
255/* Reserved [30:30] */ 252/* Reserved [30:30] */
@@ -259,14 +256,14 @@ typedef enum{
259#define FLD_DIF_VID_MAN_GAIN 0x0000FFFF 256#define FLD_DIF_VID_MAN_GAIN 0x0000FFFF
260 257
261/*****************************************************************************/ 258/*****************************************************************************/
262#define DIF_AV_SEP_CTRL (DIRECT_IF_REVB_BASE + 0x00000034) /* Reg Size 32 */ 259#define DIF_AV_SEP_CTRL (DIRECT_IF_REVB_BASE + 0x00000034) /* Reg Size 32 */
263/*****************************************************************************/ 260/*****************************************************************************/
264#define FLD_DIF_LPF_FREQ 0xC0000000 261#define FLD_DIF_LPF_FREQ 0xC0000000
265#define FLD_DIF_AV_PHASE_INC 0x3F000000 262#define FLD_DIF_AV_PHASE_INC 0x3F000000
266#define FLD_DIF_AUDIO_FREQ 0x00FFFFFF 263#define FLD_DIF_AUDIO_FREQ 0x00FFFFFF
267 264
268/*****************************************************************************/ 265/*****************************************************************************/
269#define DIF_COMP_FLT_CTRL (DIRECT_IF_REVB_BASE + 0x00000038) /* Reg Size 32 */ 266#define DIF_COMP_FLT_CTRL (DIRECT_IF_REVB_BASE + 0x00000038) /* Reg Size 32 */
270/*****************************************************************************/ 267/*****************************************************************************/
271/* Reserved [31:24] */ 268/* Reserved [31:24] */
272#define FLD_DIF_IIR23_R2 0x00FF0000 269#define FLD_DIF_IIR23_R2 0x00FF0000
@@ -274,7 +271,7 @@ typedef enum{
274#define FLD_DIF_IIR1_R1 0x000000FF 271#define FLD_DIF_IIR1_R1 0x000000FF
275 272
276/*****************************************************************************/ 273/*****************************************************************************/
277#define DIF_MISC_CTRL (DIRECT_IF_REVB_BASE + 0x0000003C) /* Reg Size 32 */ 274#define DIF_MISC_CTRL (DIRECT_IF_REVB_BASE + 0x0000003C) /* Reg Size 32 */
278/*****************************************************************************/ 275/*****************************************************************************/
279#define FLD_DIF_DIF_BYPASS 0x80000000 276#define FLD_DIF_DIF_BYPASS 0x80000000
280#define FLD_DIF_FM_NYQ_GAIN 0x40000000 277#define FLD_DIF_FM_NYQ_GAIN 0x40000000
@@ -299,20 +296,20 @@ typedef enum{
299#define FLD_DIF_RF_IF_LOCK 0x00000001 296#define FLD_DIF_RF_IF_LOCK 0x00000001
300 297
301/*****************************************************************************/ 298/*****************************************************************************/
302#define DIF_SRC_PHASE_INC (DIRECT_IF_REVB_BASE + 0x00000040) /* Reg Size 32 */ 299#define DIF_SRC_PHASE_INC (DIRECT_IF_REVB_BASE + 0x00000040) /* Reg Size 32 */
303/*****************************************************************************/ 300/*****************************************************************************/
304/* Reserved [31:29] */ 301/* Reserved [31:29] */
305#define FLD_DIF_PHASE_INC 0x1FFFFFFF 302#define FLD_DIF_PHASE_INC 0x1FFFFFFF
306 303
307/*****************************************************************************/ 304/*****************************************************************************/
308#define DIF_SRC_GAIN_CONTROL (DIRECT_IF_REVB_BASE + 0x00000044) /* Reg Size 32 */ 305#define DIF_SRC_GAIN_CONTROL (DIRECT_IF_REVB_BASE + 0x00000044) /* Reg Size 32 */
309/*****************************************************************************/ 306/*****************************************************************************/
310/* Reserved [31:16] */ 307/* Reserved [31:16] */
311#define FLD_DIF_SRC_KI 0x0000FF00 308#define FLD_DIF_SRC_KI 0x0000FF00
312#define FLD_DIF_SRC_KD 0x000000FF 309#define FLD_DIF_SRC_KD 0x000000FF
313 310
314/*****************************************************************************/ 311/*****************************************************************************/
315#define DIF_BPF_COEFF01 (DIRECT_IF_REVB_BASE + 0x00000048) /* Reg Size 32 */ 312#define DIF_BPF_COEFF01 (DIRECT_IF_REVB_BASE + 0x00000048) /* Reg Size 32 */
316/*****************************************************************************/ 313/*****************************************************************************/
317/* Reserved [31:19] */ 314/* Reserved [31:19] */
318#define FLD_DIF_BPF_COEFF_0 0x00070000 315#define FLD_DIF_BPF_COEFF_0 0x00070000
@@ -320,7 +317,7 @@ typedef enum{
320#define FLD_DIF_BPF_COEFF_1 0x0000000F 317#define FLD_DIF_BPF_COEFF_1 0x0000000F
321 318
322/*****************************************************************************/ 319/*****************************************************************************/
323#define DIF_BPF_COEFF23 (DIRECT_IF_REVB_BASE + 0x0000004c) /* Reg Size 32 */ 320#define DIF_BPF_COEFF23 (DIRECT_IF_REVB_BASE + 0x0000004c) /* Reg Size 32 */
324/*****************************************************************************/ 321/*****************************************************************************/
325/* Reserved [31:22] */ 322/* Reserved [31:22] */
326#define FLD_DIF_BPF_COEFF_2 0x003F0000 323#define FLD_DIF_BPF_COEFF_2 0x003F0000
@@ -328,7 +325,7 @@ typedef enum{
328#define FLD_DIF_BPF_COEFF_3 0x0000007F 325#define FLD_DIF_BPF_COEFF_3 0x0000007F
329 326
330/*****************************************************************************/ 327/*****************************************************************************/
331#define DIF_BPF_COEFF45 (DIRECT_IF_REVB_BASE + 0x00000050) /* Reg Size 32 */ 328#define DIF_BPF_COEFF45 (DIRECT_IF_REVB_BASE + 0x00000050) /* Reg Size 32 */
332/*****************************************************************************/ 329/*****************************************************************************/
333/* Reserved [31:24] */ 330/* Reserved [31:24] */
334#define FLD_DIF_BPF_COEFF_4 0x00FF0000 331#define FLD_DIF_BPF_COEFF_4 0x00FF0000
@@ -336,7 +333,7 @@ typedef enum{
336#define FLD_DIF_BPF_COEFF_5 0x000000FF 333#define FLD_DIF_BPF_COEFF_5 0x000000FF
337 334
338/*****************************************************************************/ 335/*****************************************************************************/
339#define DIF_BPF_COEFF67 (DIRECT_IF_REVB_BASE + 0x00000054) /* Reg Size 32 */ 336#define DIF_BPF_COEFF67 (DIRECT_IF_REVB_BASE + 0x00000054) /* Reg Size 32 */
340/*****************************************************************************/ 337/*****************************************************************************/
341/* Reserved [31:25] */ 338/* Reserved [31:25] */
342#define FLD_DIF_BPF_COEFF_6 0x01FF0000 339#define FLD_DIF_BPF_COEFF_6 0x01FF0000
@@ -344,7 +341,7 @@ typedef enum{
344#define FLD_DIF_BPF_COEFF_7 0x000001FF 341#define FLD_DIF_BPF_COEFF_7 0x000001FF
345 342
346/*****************************************************************************/ 343/*****************************************************************************/
347#define DIF_BPF_COEFF89 (DIRECT_IF_REVB_BASE + 0x00000058) /* Reg Size 32 */ 344#define DIF_BPF_COEFF89 (DIRECT_IF_REVB_BASE + 0x00000058) /* Reg Size 32 */
348/*****************************************************************************/ 345/*****************************************************************************/
349/* Reserved [31:26] */ 346/* Reserved [31:26] */
350#define FLD_DIF_BPF_COEFF_8 0x03FF0000 347#define FLD_DIF_BPF_COEFF_8 0x03FF0000
@@ -352,7 +349,7 @@ typedef enum{
352#define FLD_DIF_BPF_COEFF_9 0x000003FF 349#define FLD_DIF_BPF_COEFF_9 0x000003FF
353 350
354/*****************************************************************************/ 351/*****************************************************************************/
355#define DIF_BPF_COEFF1011 (DIRECT_IF_REVB_BASE + 0x0000005C) /* Reg Size 32 */ 352#define DIF_BPF_COEFF1011 (DIRECT_IF_REVB_BASE + 0x0000005C) /* Reg Size 32 */
356/*****************************************************************************/ 353/*****************************************************************************/
357/* Reserved [31:27] */ 354/* Reserved [31:27] */
358#define FLD_DIF_BPF_COEFF_10 0x07FF0000 355#define FLD_DIF_BPF_COEFF_10 0x07FF0000
@@ -360,7 +357,7 @@ typedef enum{
360#define FLD_DIF_BPF_COEFF_11 0x000007FF 357#define FLD_DIF_BPF_COEFF_11 0x000007FF
361 358
362/*****************************************************************************/ 359/*****************************************************************************/
363#define DIF_BPF_COEFF1213 (DIRECT_IF_REVB_BASE + 0x00000060) /* Reg Size 32 */ 360#define DIF_BPF_COEFF1213 (DIRECT_IF_REVB_BASE + 0x00000060) /* Reg Size 32 */
364/*****************************************************************************/ 361/*****************************************************************************/
365/* Reserved [31:27] */ 362/* Reserved [31:27] */
366#define FLD_DIF_BPF_COEFF_12 0x07FF0000 363#define FLD_DIF_BPF_COEFF_12 0x07FF0000
@@ -368,7 +365,7 @@ typedef enum{
368#define FLD_DIF_BPF_COEFF_13 0x00000FFF 365#define FLD_DIF_BPF_COEFF_13 0x00000FFF
369 366
370/*****************************************************************************/ 367/*****************************************************************************/
371#define DIF_BPF_COEFF1415 (DIRECT_IF_REVB_BASE + 0x00000064) /* Reg Size 32 */ 368#define DIF_BPF_COEFF1415 (DIRECT_IF_REVB_BASE + 0x00000064) /* Reg Size 32 */
372/*****************************************************************************/ 369/*****************************************************************************/
373/* Reserved [31:28] */ 370/* Reserved [31:28] */
374#define FLD_DIF_BPF_COEFF_14 0x0FFF0000 371#define FLD_DIF_BPF_COEFF_14 0x0FFF0000
@@ -376,7 +373,7 @@ typedef enum{
376#define FLD_DIF_BPF_COEFF_15 0x00000FFF 373#define FLD_DIF_BPF_COEFF_15 0x00000FFF
377 374
378/*****************************************************************************/ 375/*****************************************************************************/
379#define DIF_BPF_COEFF1617 (DIRECT_IF_REVB_BASE + 0x00000068) /* Reg Size 32 */ 376#define DIF_BPF_COEFF1617 (DIRECT_IF_REVB_BASE + 0x00000068) /* Reg Size 32 */
380/*****************************************************************************/ 377/*****************************************************************************/
381/* Reserved [31:29] */ 378/* Reserved [31:29] */
382#define FLD_DIF_BPF_COEFF_16 0x1FFF0000 379#define FLD_DIF_BPF_COEFF_16 0x1FFF0000
@@ -384,7 +381,7 @@ typedef enum{
384#define FLD_DIF_BPF_COEFF_17 0x00001FFF 381#define FLD_DIF_BPF_COEFF_17 0x00001FFF
385 382
386/*****************************************************************************/ 383/*****************************************************************************/
387#define DIF_BPF_COEFF1819 (DIRECT_IF_REVB_BASE + 0x0000006C) /* Reg Size 32 */ 384#define DIF_BPF_COEFF1819 (DIRECT_IF_REVB_BASE + 0x0000006C) /* Reg Size 32 */
388/*****************************************************************************/ 385/*****************************************************************************/
389/* Reserved [31:29] */ 386/* Reserved [31:29] */
390#define FLD_DIF_BPF_COEFF_18 0x1FFF0000 387#define FLD_DIF_BPF_COEFF_18 0x1FFF0000
@@ -392,7 +389,7 @@ typedef enum{
392#define FLD_DIF_BPF_COEFF_19 0x00001FFF 389#define FLD_DIF_BPF_COEFF_19 0x00001FFF
393 390
394/*****************************************************************************/ 391/*****************************************************************************/
395#define DIF_BPF_COEFF2021 (DIRECT_IF_REVB_BASE + 0x00000070) /* Reg Size 32 */ 392#define DIF_BPF_COEFF2021 (DIRECT_IF_REVB_BASE + 0x00000070) /* Reg Size 32 */
396/*****************************************************************************/ 393/*****************************************************************************/
397/* Reserved [31:29] */ 394/* Reserved [31:29] */
398#define FLD_DIF_BPF_COEFF_20 0x1FFF0000 395#define FLD_DIF_BPF_COEFF_20 0x1FFF0000
@@ -400,7 +397,7 @@ typedef enum{
400#define FLD_DIF_BPF_COEFF_21 0x00003FFF 397#define FLD_DIF_BPF_COEFF_21 0x00003FFF
401 398
402/*****************************************************************************/ 399/*****************************************************************************/
403#define DIF_BPF_COEFF2223 (DIRECT_IF_REVB_BASE + 0x00000074) /* Reg Size 32 */ 400#define DIF_BPF_COEFF2223 (DIRECT_IF_REVB_BASE + 0x00000074) /* Reg Size 32 */
404/*****************************************************************************/ 401/*****************************************************************************/
405/* Reserved [31:30] */ 402/* Reserved [31:30] */
406#define FLD_DIF_BPF_COEFF_22 0x3FFF0000 403#define FLD_DIF_BPF_COEFF_22 0x3FFF0000
@@ -408,7 +405,7 @@ typedef enum{
408#define FLD_DIF_BPF_COEFF_23 0x00003FFF 405#define FLD_DIF_BPF_COEFF_23 0x00003FFF
409 406
410/*****************************************************************************/ 407/*****************************************************************************/
411#define DIF_BPF_COEFF2425 (DIRECT_IF_REVB_BASE + 0x00000078) /* Reg Size 32 */ 408#define DIF_BPF_COEFF2425 (DIRECT_IF_REVB_BASE + 0x00000078) /* Reg Size 32 */
412/*****************************************************************************/ 409/*****************************************************************************/
413/* Reserved [31:30] */ 410/* Reserved [31:30] */
414#define FLD_DIF_BPF_COEFF_24 0x3FFF0000 411#define FLD_DIF_BPF_COEFF_24 0x3FFF0000
@@ -416,7 +413,7 @@ typedef enum{
416#define FLD_DIF_BPF_COEFF_25 0x00003FFF 413#define FLD_DIF_BPF_COEFF_25 0x00003FFF
417 414
418/*****************************************************************************/ 415/*****************************************************************************/
419#define DIF_BPF_COEFF2627 (DIRECT_IF_REVB_BASE + 0x0000007C) /* Reg Size 32 */ 416#define DIF_BPF_COEFF2627 (DIRECT_IF_REVB_BASE + 0x0000007C) /* Reg Size 32 */
420/*****************************************************************************/ 417/*****************************************************************************/
421/* Reserved [31:30] */ 418/* Reserved [31:30] */
422#define FLD_DIF_BPF_COEFF_26 0x3FFF0000 419#define FLD_DIF_BPF_COEFF_26 0x3FFF0000
@@ -424,7 +421,7 @@ typedef enum{
424#define FLD_DIF_BPF_COEFF_27 0x00003FFF 421#define FLD_DIF_BPF_COEFF_27 0x00003FFF
425 422
426/*****************************************************************************/ 423/*****************************************************************************/
427#define DIF_BPF_COEFF2829 (DIRECT_IF_REVB_BASE + 0x00000080) /* Reg Size 32 */ 424#define DIF_BPF_COEFF2829 (DIRECT_IF_REVB_BASE + 0x00000080) /* Reg Size 32 */
428/*****************************************************************************/ 425/*****************************************************************************/
429/* Reserved [31:30] */ 426/* Reserved [31:30] */
430#define FLD_DIF_BPF_COEFF_28 0x3FFF0000 427#define FLD_DIF_BPF_COEFF_28 0x3FFF0000
@@ -432,7 +429,7 @@ typedef enum{
432#define FLD_DIF_BPF_COEFF_29 0x00003FFF 429#define FLD_DIF_BPF_COEFF_29 0x00003FFF
433 430
434/*****************************************************************************/ 431/*****************************************************************************/
435#define DIF_BPF_COEFF3031 (DIRECT_IF_REVB_BASE + 0x00000084) /* Reg Size 32 */ 432#define DIF_BPF_COEFF3031 (DIRECT_IF_REVB_BASE + 0x00000084) /* Reg Size 32 */
436/*****************************************************************************/ 433/*****************************************************************************/
437/* Reserved [31:30] */ 434/* Reserved [31:30] */
438#define FLD_DIF_BPF_COEFF_30 0x3FFF0000 435#define FLD_DIF_BPF_COEFF_30 0x3FFF0000
@@ -440,7 +437,7 @@ typedef enum{
440#define FLD_DIF_BPF_COEFF_31 0x00003FFF 437#define FLD_DIF_BPF_COEFF_31 0x00003FFF
441 438
442/*****************************************************************************/ 439/*****************************************************************************/
443#define DIF_BPF_COEFF3233 (DIRECT_IF_REVB_BASE + 0x00000088) /* Reg Size 32 */ 440#define DIF_BPF_COEFF3233 (DIRECT_IF_REVB_BASE + 0x00000088) /* Reg Size 32 */
444/*****************************************************************************/ 441/*****************************************************************************/
445/* Reserved [31:30] */ 442/* Reserved [31:30] */
446#define FLD_DIF_BPF_COEFF_32 0x3FFF0000 443#define FLD_DIF_BPF_COEFF_32 0x3FFF0000
@@ -448,7 +445,7 @@ typedef enum{
448#define FLD_DIF_BPF_COEFF_33 0x00003FFF 445#define FLD_DIF_BPF_COEFF_33 0x00003FFF
449 446
450/*****************************************************************************/ 447/*****************************************************************************/
451#define DIF_BPF_COEFF3435 (DIRECT_IF_REVB_BASE + 0x0000008C) /* Reg Size 32 */ 448#define DIF_BPF_COEFF3435 (DIRECT_IF_REVB_BASE + 0x0000008C) /* Reg Size 32 */
452/*****************************************************************************/ 449/*****************************************************************************/
453/* Reserved [31:30] */ 450/* Reserved [31:30] */
454#define FLD_DIF_BPF_COEFF_34 0x3FFF0000 451#define FLD_DIF_BPF_COEFF_34 0x3FFF0000
@@ -456,20 +453,20 @@ typedef enum{
456#define FLD_DIF_BPF_COEFF_35 0x00003FFF 453#define FLD_DIF_BPF_COEFF_35 0x00003FFF
457 454
458/*****************************************************************************/ 455/*****************************************************************************/
459#define DIF_BPF_COEFF36 (DIRECT_IF_REVB_BASE + 0x00000090) /* Reg Size 32 */ 456#define DIF_BPF_COEFF36 (DIRECT_IF_REVB_BASE + 0x00000090) /* Reg Size 32 */
460/*****************************************************************************/ 457/*****************************************************************************/
461/* Reserved [31:30] */ 458/* Reserved [31:30] */
462#define FLD_DIF_BPF_COEFF_36 0x3FFF0000 459#define FLD_DIF_BPF_COEFF_36 0x3FFF0000
463/* Reserved [15:0] */ 460/* Reserved [15:0] */
464 461
465/*****************************************************************************/ 462/*****************************************************************************/
466#define DIF_RPT_VARIANCE (DIRECT_IF_REVB_BASE + 0x00000094) /* Reg Size 32 */ 463#define DIF_RPT_VARIANCE (DIRECT_IF_REVB_BASE + 0x00000094) /* Reg Size 32 */
467/*****************************************************************************/ 464/*****************************************************************************/
468/* Reserved [31:20] */ 465/* Reserved [31:20] */
469#define FLD_DIF_RPT_VARIANCE 0x000FFFFF 466#define FLD_DIF_RPT_VARIANCE 0x000FFFFF
470 467
471/*****************************************************************************/ 468/*****************************************************************************/
472#define DIF_SOFT_RST_CTRL_REVB (DIRECT_IF_REVB_BASE + 0x00000098) /* Reg Size 32 */ 469#define DIF_SOFT_RST_CTRL_REVB (DIRECT_IF_REVB_BASE + 0x00000098) /* Reg Size 32 */
473/*****************************************************************************/ 470/*****************************************************************************/
474/* Reserved [31:8] */ 471/* Reserved [31:8] */
475#define FLD_DIF_DIF_SOFT_RST 0x00000080 472#define FLD_DIF_DIF_SOFT_RST 0x00000080
@@ -482,10 +479,9 @@ typedef enum{
482#define FLD_DIF_PLL_RST_MSK 0x00000001 479#define FLD_DIF_PLL_RST_MSK 0x00000001
483 480
484/*****************************************************************************/ 481/*****************************************************************************/
485#define DIF_PLL_FREQ_ERR (DIRECT_IF_REVB_BASE + 0x0000009C) /* Reg Size 32 */ 482#define DIF_PLL_FREQ_ERR (DIRECT_IF_REVB_BASE + 0x0000009C) /* Reg Size 32 */
486/*****************************************************************************/ 483/*****************************************************************************/
487/* Reserved [31:25] */ 484/* Reserved [31:25] */
488#define FLD_DIF_CTL_IP 0x01FFFFFF 485#define FLD_DIF_CTL_IP 0x01FFFFFF
489 486
490
491#endif 487#endif
diff --git a/drivers/media/video/cx231xx/cx231xx-core.c b/drivers/media/video/cx231xx/cx231xx-core.c
index efe0c666043a..874fc5b39863 100644
--- a/drivers/media/video/cx231xx/cx231xx-core.c
+++ b/drivers/media/video/cx231xx/cx231xx-core.c
@@ -2,7 +2,7 @@
2 cx231xx-core.c - driver for Conexant Cx23100/101/102 USB video capture devices 2 cx231xx-core.c - driver for Conexant Cx23100/101/102 USB video capture devices
3 3
4 Copyright (C) 2008 <srinivasa.deevi at conexant dot com> 4 Copyright (C) 2008 <srinivasa.deevi at conexant dot com>
5 Based on em28xx driver 5 Based on em28xx driver
6 6
7 This program is free software; you can redistribute it and/or modify 7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by 8 it under the terms of the GNU General Public License as published by
@@ -32,8 +32,8 @@
32/* #define ENABLE_DEBUG_ISOC_FRAMES */ 32/* #define ENABLE_DEBUG_ISOC_FRAMES */
33 33
34static unsigned int core_debug; 34static unsigned int core_debug;
35module_param(core_debug,int,0644); 35module_param(core_debug, int, 0644);
36MODULE_PARM_DESC(core_debug,"enable debug messages [core]"); 36MODULE_PARM_DESC(core_debug, "enable debug messages [core]");
37 37
38#define cx231xx_coredbg(fmt, arg...) do {\ 38#define cx231xx_coredbg(fmt, arg...) do {\
39 if (core_debug) \ 39 if (core_debug) \
@@ -41,8 +41,8 @@ MODULE_PARM_DESC(core_debug,"enable debug messages [core]");
41 dev->name, __func__ , ##arg); } while (0) 41 dev->name, __func__ , ##arg); } while (0)
42 42
43static unsigned int reg_debug; 43static unsigned int reg_debug;
44module_param(reg_debug,int,0644); 44module_param(reg_debug, int, 0644);
45MODULE_PARM_DESC(reg_debug,"enable debug messages [URB reg]"); 45MODULE_PARM_DESC(reg_debug, "enable debug messages [URB reg]");
46 46
47#define cx231xx_regdbg(fmt, arg...) do {\ 47#define cx231xx_regdbg(fmt, arg...) do {\
48 if (reg_debug) \ 48 if (reg_debug) \
@@ -59,8 +59,6 @@ MODULE_PARM_DESC(alt, "alternate setting to use for video endpoint");
59 printk(KERN_INFO "%s %s :"fmt, \ 59 printk(KERN_INFO "%s %s :"fmt, \
60 dev->name, __func__ , ##arg); } while (0) 60 dev->name, __func__ , ##arg); } while (0)
61 61
62
63
64/************************************************************************************ 62/************************************************************************************
65* Device control list functions * 63* Device control list functions *
66*************************************************************************************/ 64*************************************************************************************/
@@ -69,8 +67,7 @@ static LIST_HEAD(cx231xx_devlist);
69static DEFINE_MUTEX(cx231xx_devlist_mutex); 67static DEFINE_MUTEX(cx231xx_devlist_mutex);
70 68
71struct cx231xx *cx231xx_get_device(int minor, 69struct cx231xx *cx231xx_get_device(int minor,
72 enum v4l2_buf_type *fh_type, 70 enum v4l2_buf_type *fh_type, int *has_radio)
73 int *has_radio)
74{ 71{
75 struct cx231xx *h, *dev = NULL; 72 struct cx231xx *h, *dev = NULL;
76 73
@@ -85,8 +82,7 @@ struct cx231xx *cx231xx_get_device(int minor,
85 dev = h; 82 dev = h;
86 *fh_type = V4L2_BUF_TYPE_VBI_CAPTURE; 83 *fh_type = V4L2_BUF_TYPE_VBI_CAPTURE;
87 } 84 }
88 if (h->radio_dev && 85 if (h->radio_dev && h->radio_dev->minor == minor) {
89 h->radio_dev->minor == minor) {
90 dev = h; 86 dev = h;
91 *has_radio = 1; 87 *has_radio = 1;
92 } 88 }
@@ -115,9 +111,6 @@ void cx231xx_add_into_devlist(struct cx231xx *dev)
115 mutex_unlock(&cx231xx_devlist_mutex); 111 mutex_unlock(&cx231xx_devlist_mutex);
116}; 112};
117 113
118
119
120
121static LIST_HEAD(cx231xx_extension_devlist); 114static LIST_HEAD(cx231xx_extension_devlist);
122static DEFINE_MUTEX(cx231xx_extension_devlist_lock); 115static DEFINE_MUTEX(cx231xx_extension_devlist_lock);
123 116
@@ -137,6 +130,7 @@ int cx231xx_register_extension(struct cx231xx_ops *ops)
137 mutex_unlock(&cx231xx_devlist_mutex); 130 mutex_unlock(&cx231xx_devlist_mutex);
138 return 0; 131 return 0;
139} 132}
133
140EXPORT_SYMBOL(cx231xx_register_extension); 134EXPORT_SYMBOL(cx231xx_register_extension);
141 135
142void cx231xx_unregister_extension(struct cx231xx_ops *ops) 136void cx231xx_unregister_extension(struct cx231xx_ops *ops)
@@ -155,8 +149,8 @@ void cx231xx_unregister_extension(struct cx231xx_ops *ops)
155 mutex_unlock(&cx231xx_extension_devlist_lock); 149 mutex_unlock(&cx231xx_extension_devlist_lock);
156 mutex_unlock(&cx231xx_devlist_mutex); 150 mutex_unlock(&cx231xx_devlist_mutex);
157} 151}
158EXPORT_SYMBOL(cx231xx_unregister_extension);
159 152
153EXPORT_SYMBOL(cx231xx_unregister_extension);
160 154
161void cx231xx_init_extension(struct cx231xx *dev) 155void cx231xx_init_extension(struct cx231xx *dev)
162{ 156{
@@ -190,78 +184,82 @@ void cx231xx_close_extension(struct cx231xx *dev)
190* U S B related functions * 184* U S B related functions *
191*************************************************************************************/ 185*************************************************************************************/
192int cx231xx_send_usb_command(struct cx231xx_i2c *i2c_bus, 186int cx231xx_send_usb_command(struct cx231xx_i2c *i2c_bus,
193 struct cx231xx_i2c_xfer_data *req_data) 187 struct cx231xx_i2c_xfer_data *req_data)
194{ 188{
195 int status = 0; 189 int status = 0;
196 struct cx231xx *dev = i2c_bus->dev; 190 struct cx231xx *dev = i2c_bus->dev;
197 VENDOR_REQUEST_IN ven_req; 191 VENDOR_REQUEST_IN ven_req;
198 192
199 u8 saddr_len = 0; 193 u8 saddr_len = 0;
200 u8 _i2c_period = 0; 194 u8 _i2c_period = 0;
201 u8 _i2c_nostop = 0; 195 u8 _i2c_nostop = 0;
202 u8 _i2c_reserve = 0; 196 u8 _i2c_reserve = 0;
203 197
204 /* Get the I2C period, nostop and reserve parameters */ 198 /* Get the I2C period, nostop and reserve parameters */
205 _i2c_period = i2c_bus->i2c_period; 199 _i2c_period = i2c_bus->i2c_period;
206 _i2c_nostop = i2c_bus->i2c_nostop; 200 _i2c_nostop = i2c_bus->i2c_nostop;
207 _i2c_reserve = i2c_bus->i2c_reserve; 201 _i2c_reserve = i2c_bus->i2c_reserve;
208 202
209 saddr_len = req_data->saddr_len; 203 saddr_len = req_data->saddr_len;
210 204
211 /* Set wValue */ 205 /* Set wValue */
212 if(saddr_len == 1) /* need check saddr_len == 0 */ 206 if (saddr_len == 1) /* need check saddr_len == 0 */
213 ven_req.wValue = req_data->dev_addr<<9|_i2c_period<<4|saddr_len<<2| 207 ven_req.wValue =
214 _i2c_nostop<<1|I2C_SYNC|_i2c_reserve<<6; 208 req_data->
215 else 209 dev_addr << 9 | _i2c_period << 4 | saddr_len << 2 |
216 ven_req.wValue = req_data->dev_addr<<9|_i2c_period<<4|saddr_len<<2| 210 _i2c_nostop << 1 | I2C_SYNC | _i2c_reserve << 6;
217 _i2c_nostop<<1|I2C_SYNC|_i2c_reserve<<6; 211 else
218 212 ven_req.wValue =
219 /* set channel number */ 213 req_data->
220 if(req_data->direction & I2C_M_RD) 214 dev_addr << 9 | _i2c_period << 4 | saddr_len << 2 |
221 ven_req.bRequest = i2c_bus->nr + 4; /* channel number, for read, 215 _i2c_nostop << 1 | I2C_SYNC | _i2c_reserve << 6;
222 spec required channel_num +4 */ 216
223 else 217 /* set channel number */
224 ven_req.bRequest = i2c_bus->nr; /* channel number, */ 218 if (req_data->direction & I2C_M_RD)
225 219 ven_req.bRequest = i2c_bus->nr + 4; /* channel number, for read,
226 /* set index value */ 220 spec required channel_num +4 */
227 switch(saddr_len){ 221 else
228 case 0: 222 ven_req.bRequest = i2c_bus->nr; /* channel number, */
229 ven_req.wIndex = 0; /* need check */ 223
230 break; 224 /* set index value */
231 case 1: 225 switch (saddr_len) {
232 ven_req.wIndex = (req_data->saddr_dat & 0xff); 226 case 0:
233 break; 227 ven_req.wIndex = 0; /* need check */
234 case 2: 228 break;
235 ven_req.wIndex = req_data->saddr_dat; 229 case 1:
236 break; 230 ven_req.wIndex = (req_data->saddr_dat & 0xff);
237 } 231 break;
238 232 case 2:
239 /* set wLength value */ 233 ven_req.wIndex = req_data->saddr_dat;
240 ven_req.wLength = req_data->buf_size; 234 break;
241 235 }
242 /* set bData value */ 236
243 ven_req.bData = 0; 237 /* set wLength value */
244 238 ven_req.wLength = req_data->buf_size;
245 /* set the direction */ 239
246 if(req_data->direction){ 240 /* set bData value */
247 ven_req.direction = USB_DIR_IN; 241 ven_req.bData = 0;
248 memset(req_data->p_buffer, 0x00, ven_req.wLength); 242
249 } 243 /* set the direction */
250 else 244 if (req_data->direction) {
251 ven_req.direction = USB_DIR_OUT; 245 ven_req.direction = USB_DIR_IN;
252 246 memset(req_data->p_buffer, 0x00, ven_req.wLength);
253 /* set the buffer for read / write */ 247 } else
254 ven_req.pBuff = req_data->p_buffer; 248 ven_req.direction = USB_DIR_OUT;
255 249
256 250 /* set the buffer for read / write */
257 251 ven_req.pBuff = req_data->p_buffer;
258 /* call common vendor command request */ 252
259 status = cx231xx_send_vendor_cmd(dev, &ven_req); 253
260 if (status < 0) { 254 /* call common vendor command request */
261 cx231xx_info("UsbInterface::sendCommand, output buffer failed with status -%d\n", status); 255 status = cx231xx_send_vendor_cmd(dev, &ven_req);
262 } 256 if (status < 0) {
263 257 cx231xx_info
264 return status; 258 ("UsbInterface::sendCommand, output buffer failed with status -%d\n",
259 status);
260 }
261
262 return status;
265} 263}
266 264
267EXPORT_SYMBOL_GPL(cx231xx_send_usb_command); 265EXPORT_SYMBOL_GPL(cx231xx_send_usb_command);
@@ -270,9 +268,9 @@ EXPORT_SYMBOL_GPL(cx231xx_send_usb_command);
270 * reads data from the usb device specifying bRequest and wValue 268 * reads data from the usb device specifying bRequest and wValue
271 */ 269 */
272int cx231xx_read_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg, 270int cx231xx_read_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg,
273 char *buf, int len) 271 char *buf, int len)
274{ 272{
275 u8 val = 0; 273 u8 val = 0;
276 int ret; 274 int ret;
277 int pipe = usb_rcvctrlpipe(dev->udev, 0); 275 int pipe = usb_rcvctrlpipe(dev->udev, 0);
278 276
@@ -282,35 +280,33 @@ int cx231xx_read_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg,
282 if (len > URB_MAX_CTRL_SIZE) 280 if (len > URB_MAX_CTRL_SIZE)
283 return -EINVAL; 281 return -EINVAL;
284 282
285 switch(len) 283 switch (len) {
286 { 284 case 1:
287 case 1: 285 val = ENABLE_ONE_BYTE;
288 val = ENABLE_ONE_BYTE; 286 break;
289 break; 287 case 2:
290 case 2: 288 val = ENABLE_TWE_BYTE;
291 val = ENABLE_TWE_BYTE; 289 break;
292 break; 290 case 3:
293 case 3: 291 val = ENABLE_THREE_BYTE;
294 val = ENABLE_THREE_BYTE; 292 break;
295 break; 293 case 4:
296 case 4: 294 val = ENABLE_FOUR_BYTE;
297 val = ENABLE_FOUR_BYTE; 295 break;
298 break; 296 default:
299 default: 297 val = 0xFF; /* invalid option */
300 val = 0xFF; /* invalid option */ 298 }
301 } 299
302 300 if (val == 0xFF)
303 if(val == 0xFF) 301 return -EINVAL;
304 return -EINVAL;
305 302
306 if (reg_debug) { 303 if (reg_debug) {
307 cx231xx_isocdbg("(pipe 0x%08x): " 304 cx231xx_isocdbg("(pipe 0x%08x): "
308 "IN: %02x %02x %02x %02x %02x %02x %02x %02x ", 305 "IN: %02x %02x %02x %02x %02x %02x %02x %02x ",
309 pipe, 306 pipe,
310 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 307 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
311 req, 0, val, 308 req, 0, val,
312 reg & 0xff, reg >> 8, 309 reg & 0xff, reg >> 8, len & 0xff, len >> 8);
313 len & 0xff, len >> 8);
314 } 310 }
315 311
316 /* mutex_lock(&dev->ctrl_urb_lock); */ 312 /* mutex_lock(&dev->ctrl_urb_lock); */
@@ -340,10 +336,9 @@ int cx231xx_read_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg,
340 return ret; 336 return ret;
341} 337}
342 338
343 339int cx231xx_send_vendor_cmd(struct cx231xx *dev, VENDOR_REQUEST_IN * ven_req)
344int cx231xx_send_vendor_cmd(struct cx231xx *dev, VENDOR_REQUEST_IN *ven_req)
345{ 340{
346 int ret; 341 int ret;
347 int pipe = 0; 342 int pipe = 0;
348 343
349 if (dev->state & DEV_DISCONNECTED) 344 if (dev->state & DEV_DISCONNECTED)
@@ -352,32 +347,34 @@ int cx231xx_send_vendor_cmd(struct cx231xx *dev, VENDOR_REQUEST_IN *ven_req)
352 if ((ven_req->wLength > URB_MAX_CTRL_SIZE)) 347 if ((ven_req->wLength > URB_MAX_CTRL_SIZE))
353 return -EINVAL; 348 return -EINVAL;
354 349
355 if(ven_req->direction) 350 if (ven_req->direction)
356 pipe = usb_rcvctrlpipe(dev->udev, 0); 351 pipe = usb_rcvctrlpipe(dev->udev, 0);
357 else 352 else
358 pipe = usb_sndctrlpipe(dev->udev, 0); 353 pipe = usb_sndctrlpipe(dev->udev, 0);
359
360 354
361 if (reg_debug) { 355 if (reg_debug) {
362 int byte; 356 int byte;
363 357
364 cx231xx_isocdbg("(pipe 0x%08x): " 358 cx231xx_isocdbg("(pipe 0x%08x): "
365 "OUT: %02x %02x %02x %04x %04x %04x >>>", 359 "OUT: %02x %02x %02x %04x %04x %04x >>>",
366 pipe, 360 pipe,
367 ven_req->direction | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 361 ven_req->
368 ven_req->bRequest, 0, ven_req->wValue, 362 direction | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
369 ven_req->wIndex, 363 ven_req->bRequest, 0, ven_req->wValue,
370 ven_req->wLength); 364 ven_req->wIndex, ven_req->wLength);
371 365
372 for (byte = 0; byte < ven_req->wLength; byte++) 366 for (byte = 0; byte < ven_req->wLength; byte++)
373 cx231xx_isocdbg(" %02x", (unsigned char)ven_req->pBuff[byte]); 367 cx231xx_isocdbg(" %02x",
368 (unsigned char)ven_req->pBuff[byte]);
374 cx231xx_isocdbg("\n"); 369 cx231xx_isocdbg("\n");
375 } 370 }
376 371
377 /* mutex_lock(&dev->ctrl_urb_lock); */ 372 /* mutex_lock(&dev->ctrl_urb_lock); */
378 ret = usb_control_msg(dev->udev, pipe, ven_req->bRequest, 373 ret = usb_control_msg(dev->udev, pipe, ven_req->bRequest,
379 ven_req->direction | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 374 ven_req->
380 ven_req->wValue, ven_req->wIndex, ven_req->pBuff, ven_req->wLength, HZ); 375 direction | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
376 ven_req->wValue, ven_req->wIndex, ven_req->pBuff,
377 ven_req->wLength, HZ);
381 /* mutex_unlock(&dev->ctrl_urb_lock); */ 378 /* mutex_unlock(&dev->ctrl_urb_lock); */
382 379
383 return ret; 380 return ret;
@@ -388,9 +385,9 @@ int cx231xx_send_vendor_cmd(struct cx231xx *dev, VENDOR_REQUEST_IN *ven_req)
388 * sends data to the usb device, specifying bRequest 385 * sends data to the usb device, specifying bRequest
389 */ 386 */
390int cx231xx_write_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg, char *buf, 387int cx231xx_write_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg, char *buf,
391 int len) 388 int len)
392{ 389{
393 u8 val = 0; 390 u8 val = 0;
394 int ret; 391 int ret;
395 int pipe = usb_sndctrlpipe(dev->udev, 0); 392 int pipe = usb_sndctrlpipe(dev->udev, 0);
396 393
@@ -400,37 +397,35 @@ int cx231xx_write_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg, char *buf,
400 if ((len < 1) || (len > URB_MAX_CTRL_SIZE)) 397 if ((len < 1) || (len > URB_MAX_CTRL_SIZE))
401 return -EINVAL; 398 return -EINVAL;
402 399
403 switch(len) 400 switch (len) {
404 { 401 case 1:
405 case 1: 402 val = ENABLE_ONE_BYTE;
406 val = ENABLE_ONE_BYTE; 403 break;
407 break; 404 case 2:
408 case 2: 405 val = ENABLE_TWE_BYTE;
409 val = ENABLE_TWE_BYTE; 406 break;
410 break; 407 case 3:
411 case 3: 408 val = ENABLE_THREE_BYTE;
412 val = ENABLE_THREE_BYTE; 409 break;
413 break; 410 case 4:
414 case 4: 411 val = ENABLE_FOUR_BYTE;
415 val = ENABLE_FOUR_BYTE; 412 break;
416 break; 413 default:
417 default: 414 val = 0xFF; /* invalid option */
418 val = 0xFF; /* invalid option */ 415 }
419 } 416
420 417 if (val == 0xFF)
421 if(val == 0xFF) 418 return -EINVAL;
422 return -EINVAL;
423 419
424 if (reg_debug) { 420 if (reg_debug) {
425 int byte; 421 int byte;
426 422
427 cx231xx_isocdbg("(pipe 0x%08x): " 423 cx231xx_isocdbg("(pipe 0x%08x): "
428 "OUT: %02x %02x %02x %02x %02x %02x %02x %02x >>>", 424 "OUT: %02x %02x %02x %02x %02x %02x %02x %02x >>>",
429 pipe, 425 pipe,
430 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 426 USB_DIR_OUT | USB_TYPE_VENDOR |
431 req, 0, val, 427 USB_RECIP_DEVICE, req, 0, val, reg & 0xff,
432 reg & 0xff, reg >> 8, 428 reg >> 8, len & 0xff, len >> 8);
433 len & 0xff, len >> 8);
434 429
435 for (byte = 0; byte < len; byte++) 430 for (byte = 0; byte < len; byte++)
436 cx231xx_isocdbg(" %02x", (unsigned char)buf[byte]); 431 cx231xx_isocdbg(" %02x", (unsigned char)buf[byte]);
@@ -447,7 +442,6 @@ int cx231xx_write_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg, char *buf,
447 return ret; 442 return ret;
448} 443}
449 444
450
451/************************************************************************************ 445/************************************************************************************
452* USB Alternate Setting functions * 446* USB Alternate Setting functions *
453*************************************************************************************/ 447*************************************************************************************/
@@ -456,7 +450,7 @@ int cx231xx_set_video_alternate(struct cx231xx *dev)
456{ 450{
457 int errCode, prev_alt = dev->video_mode.alt; 451 int errCode, prev_alt = dev->video_mode.alt;
458 unsigned int min_pkt_size = dev->width * 2 + 4; 452 unsigned int min_pkt_size = dev->width * 2 + 4;
459 u32 usb_interface_index = 0; 453 u32 usb_interface_index = 0;
460 454
461 /* When image size is bigger than a certain value, 455 /* When image size is bigger than a certain value,
462 the frame size should be increased, otherwise, only 456 the frame size should be increased, otherwise, only
@@ -465,35 +459,44 @@ int cx231xx_set_video_alternate(struct cx231xx *dev)
465 if (dev->width * 2 * dev->height > 720 * 240 * 2) 459 if (dev->width * 2 * dev->height > 720 * 240 * 2)
466 min_pkt_size *= 2; 460 min_pkt_size *= 2;
467 461
468 if(dev->width > 360) { 462 if (dev->width > 360) {
469 /* resolutions: 720,704,640 */ 463 /* resolutions: 720,704,640 */
470 dev->video_mode.alt = 3; 464 dev->video_mode.alt = 3;
471 } else if(dev->width > 180) { 465 } else if (dev->width > 180) {
472 /* resolutions: 360,352,320,240 */ 466 /* resolutions: 360,352,320,240 */
473 dev->video_mode.alt = 2; 467 dev->video_mode.alt = 2;
474 } else if(dev->width > 0) { 468 } else if (dev->width > 0) {
475 /* resolutions: 180,176,160,128,88 */ 469 /* resolutions: 180,176,160,128,88 */
476 dev->video_mode.alt = 1; 470 dev->video_mode.alt = 1;
477 } else { 471 } else {
478 /* Change to alt0 BULK to release USB bandwidth */ 472 /* Change to alt0 BULK to release USB bandwidth */
479 dev->video_mode.alt = 0; 473 dev->video_mode.alt = 0;
480 } 474 }
481 475
482 /* Get the correct video interface Index */ 476 /* Get the correct video interface Index */
483 usb_interface_index = dev->current_pcb_config.hs_config_info[0].interface_info.video_index+1; 477 usb_interface_index =
478 dev->current_pcb_config.hs_config_info[0].interface_info.
479 video_index + 1;
484 480
485 if (dev->video_mode.alt != prev_alt) { 481 if (dev->video_mode.alt != prev_alt) {
486 cx231xx_coredbg("minimum isoc packet size: %u (alt=%d)\n", 482 cx231xx_coredbg("minimum isoc packet size: %u (alt=%d)\n",
487 min_pkt_size, dev->video_mode.alt); 483 min_pkt_size, dev->video_mode.alt);
488 dev->video_mode.max_pkt_size = dev->video_mode.alt_max_pkt_size[dev->video_mode.alt]; 484 dev->video_mode.max_pkt_size =
485 dev->video_mode.alt_max_pkt_size[dev->video_mode.alt];
489 cx231xx_coredbg("setting alternate %d with wMaxPacketSize=%u\n", 486 cx231xx_coredbg("setting alternate %d with wMaxPacketSize=%u\n",
490 dev->video_mode.alt, dev->video_mode.max_pkt_size); 487 dev->video_mode.alt,
491 cx231xx_info(" setting alternate %d with wMaxPacketSize=%u , Interface = %d\n", 488 dev->video_mode.max_pkt_size);
492 dev->video_mode.alt, dev->video_mode.max_pkt_size, usb_interface_index); 489 cx231xx_info
493 errCode = usb_set_interface(dev->udev, usb_interface_index, dev->video_mode.alt); 490 (" setting alternate %d with wMaxPacketSize=%u , Interface = %d\n",
491 dev->video_mode.alt, dev->video_mode.max_pkt_size,
492 usb_interface_index);
493 errCode =
494 usb_set_interface(dev->udev, usb_interface_index,
495 dev->video_mode.alt);
494 if (errCode < 0) { 496 if (errCode < 0) {
495 cx231xx_errdev("cannot change alternate number to %d (error=%i)\n", 497 cx231xx_errdev
496 dev->video_mode.alt, errCode); 498 ("cannot change alternate number to %d (error=%i)\n",
499 dev->video_mode.alt, errCode);
497 return errCode; 500 return errCode;
498 } 501 }
499 } 502 }
@@ -502,68 +505,92 @@ int cx231xx_set_video_alternate(struct cx231xx *dev)
502 505
503int cx231xx_set_alt_setting(struct cx231xx *dev, u8 index, u8 alt) 506int cx231xx_set_alt_setting(struct cx231xx *dev, u8 index, u8 alt)
504{ 507{
505 int status = 0; 508 int status = 0;
506 u32 usb_interface_index = 0; 509 u32 usb_interface_index = 0;
507 u32 max_pkt_size = 0; 510 u32 max_pkt_size = 0;
508 511
509 switch(index) { 512 switch (index) {
510 case INDEX_TS1: 513 case INDEX_TS1:
511 usb_interface_index = dev->current_pcb_config.hs_config_info[0].interface_info.ts1_index+1; 514 usb_interface_index =
512 dev->video_mode.alt = alt; 515 dev->current_pcb_config.hs_config_info[0].interface_info.
513 if(dev->ts1_mode.alt_max_pkt_size != NULL) 516 ts1_index + 1;
514 max_pkt_size = dev->ts1_mode.max_pkt_size = dev->ts1_mode.alt_max_pkt_size[dev->ts1_mode.alt]; 517 dev->video_mode.alt = alt;
515 break; 518 if (dev->ts1_mode.alt_max_pkt_size != NULL)
516 case INDEX_TS2: 519 max_pkt_size = dev->ts1_mode.max_pkt_size =
517 usb_interface_index = dev->current_pcb_config.hs_config_info[0].interface_info.ts2_index+1; 520 dev->ts1_mode.alt_max_pkt_size[dev->ts1_mode.alt];
518 break; 521 break;
519 case INDEX_AUDIO: 522 case INDEX_TS2:
520 usb_interface_index = dev->current_pcb_config.hs_config_info[0].interface_info.audio_index+1; 523 usb_interface_index =
521 dev->adev.alt = alt; 524 dev->current_pcb_config.hs_config_info[0].interface_info.
522 if( dev->adev.alt_max_pkt_size != NULL) 525 ts2_index + 1;
523 max_pkt_size = dev->adev.max_pkt_size = dev->adev.alt_max_pkt_size[dev->adev.alt]; 526 break;
524 break; 527 case INDEX_AUDIO:
525 case INDEX_VIDEO: 528 usb_interface_index =
526 usb_interface_index = dev->current_pcb_config.hs_config_info[0].interface_info.video_index+1; 529 dev->current_pcb_config.hs_config_info[0].interface_info.
527 dev->video_mode.alt = alt; 530 audio_index + 1;
528 if(dev->video_mode.alt_max_pkt_size != NULL) 531 dev->adev.alt = alt;
529 max_pkt_size = dev->video_mode.max_pkt_size = dev->video_mode.alt_max_pkt_size[dev->video_mode.alt]; 532 if (dev->adev.alt_max_pkt_size != NULL)
530 break; 533 max_pkt_size = dev->adev.max_pkt_size =
531 case INDEX_VANC: 534 dev->adev.alt_max_pkt_size[dev->adev.alt];
532 usb_interface_index = dev->current_pcb_config.hs_config_info[0].interface_info.vanc_index+1; 535 break;
533 dev->vbi_mode.alt = alt; 536 case INDEX_VIDEO:
534 if(dev->vbi_mode.alt_max_pkt_size != NULL) 537 usb_interface_index =
535 max_pkt_size = dev->vbi_mode.max_pkt_size = dev->vbi_mode.alt_max_pkt_size[dev->vbi_mode.alt]; 538 dev->current_pcb_config.hs_config_info[0].interface_info.
536 break; 539 video_index + 1;
537 case INDEX_HANC: 540 dev->video_mode.alt = alt;
538 usb_interface_index = dev->current_pcb_config.hs_config_info[0].interface_info.hanc_index+1; 541 if (dev->video_mode.alt_max_pkt_size != NULL)
539 dev->sliced_cc_mode.alt = alt; 542 max_pkt_size = dev->video_mode.max_pkt_size =
540 if(dev->sliced_cc_mode.alt_max_pkt_size != NULL) 543 dev->video_mode.alt_max_pkt_size[dev->video_mode.
541 max_pkt_size = dev->sliced_cc_mode.max_pkt_size = dev->sliced_cc_mode.alt_max_pkt_size[dev->sliced_cc_mode.alt]; 544 alt];
542 break; 545 break;
543 default: 546 case INDEX_VANC:
544 break; 547 usb_interface_index =
545 } 548 dev->current_pcb_config.hs_config_info[0].interface_info.
546 549 vanc_index + 1;
547 if(alt > 0 && max_pkt_size == 0 ) { 550 dev->vbi_mode.alt = alt;
548 cx231xx_errdev("cannot change interface %d alternate number to %d : Max. Pkt size is ZERO\n", 551 if (dev->vbi_mode.alt_max_pkt_size != NULL)
549 usb_interface_index, alt); 552 max_pkt_size = dev->vbi_mode.max_pkt_size =
550 return -1; 553 dev->vbi_mode.alt_max_pkt_size[dev->vbi_mode.alt];
551 } 554 break;
552 555 case INDEX_HANC:
553 cx231xx_info(" setting alternate %d with wMaxPacketSize=%u , Interface = %d\n", 556 usb_interface_index =
554 alt, max_pkt_size, usb_interface_index); 557 dev->current_pcb_config.hs_config_info[0].interface_info.
555 558 hanc_index + 1;
556 if(usb_interface_index > 0 ) { 559 dev->sliced_cc_mode.alt = alt;
557 status = usb_set_interface(dev->udev, usb_interface_index, alt); 560 if (dev->sliced_cc_mode.alt_max_pkt_size != NULL)
561 max_pkt_size = dev->sliced_cc_mode.max_pkt_size =
562 dev->sliced_cc_mode.alt_max_pkt_size[dev->
563 sliced_cc_mode.
564 alt];
565 break;
566 default:
567 break;
568 }
569
570 if (alt > 0 && max_pkt_size == 0) {
571 cx231xx_errdev
572 ("cannot change interface %d alternate number to %d : Max. Pkt size is ZERO\n",
573 usb_interface_index, alt);
574 return -1;
575 }
576
577 cx231xx_info
578 (" setting alternate %d with wMaxPacketSize=%u , Interface = %d\n",
579 alt, max_pkt_size, usb_interface_index);
580
581 if (usb_interface_index > 0) {
582 status = usb_set_interface(dev->udev, usb_interface_index, alt);
558 if (status < 0) { 583 if (status < 0) {
559 cx231xx_errdev("cannot change interface %d alternate number to %d (error=%i)\n", 584 cx231xx_errdev
560 usb_interface_index, alt, status); 585 ("cannot change interface %d alternate number to %d (error=%i)\n",
586 usb_interface_index, alt, status);
561 return status; 587 return status;
562 } 588 }
563 } 589 }
564 590
565 return status; 591 return status;
566} 592}
593
567EXPORT_SYMBOL_GPL(cx231xx_set_alt_setting); 594EXPORT_SYMBOL_GPL(cx231xx_set_alt_setting);
568 595
569int cx231xx_gpio_set(struct cx231xx *dev, struct cx231xx_reg_seq *gpio) 596int cx231xx_gpio_set(struct cx231xx *dev, struct cx231xx_reg_seq *gpio)
@@ -575,10 +602,9 @@ int cx231xx_gpio_set(struct cx231xx *dev, struct cx231xx_reg_seq *gpio)
575 602
576 /* Send GPIO reset sequences specified at board entry */ 603 /* Send GPIO reset sequences specified at board entry */
577 while (gpio->sleep >= 0) { 604 while (gpio->sleep >= 0) {
578 rc = cx231xx_set_gpio_value(dev, gpio->bit, 605 rc = cx231xx_set_gpio_value(dev, gpio->bit, gpio->val);
579 gpio->val); 606 if (rc < 0)
580 if (rc < 0) 607 return rc;
581 return rc;
582 608
583 if (gpio->sleep > 0) 609 if (gpio->sleep > 0)
584 msleep(gpio->sleep); 610 msleep(gpio->sleep);
@@ -594,7 +620,7 @@ int cx231xx_set_mode(struct cx231xx *dev, enum cx231xx_mode set_mode)
594 return 0; 620 return 0;
595 621
596 if (set_mode == CX231XX_SUSPEND) { 622 if (set_mode == CX231XX_SUSPEND) {
597 /* Set the chip in power saving mode */ 623 /* Set the chip in power saving mode */
598 dev->mode = set_mode; 624 dev->mode = set_mode;
599 } 625 }
600 626
@@ -604,13 +630,14 @@ int cx231xx_set_mode(struct cx231xx *dev, enum cx231xx_mode set_mode)
604 630
605 dev->mode = set_mode; 631 dev->mode = set_mode;
606 632
607 if (dev->mode == CX231XX_DIGITAL_MODE) { 633 if (dev->mode == CX231XX_DIGITAL_MODE) {
608 /* Set Digital power mode */ 634 /* Set Digital power mode */
609 } else { 635 } else {
610 /* Set Analog Power mode*/ 636 /* Set Analog Power mode */
611 } 637 }
612 return 0; 638 return 0;
613} 639}
640
614EXPORT_SYMBOL_GPL(cx231xx_set_mode); 641EXPORT_SYMBOL_GPL(cx231xx_set_mode);
615 642
616/************************************************************************************ 643/************************************************************************************
@@ -622,23 +649,23 @@ EXPORT_SYMBOL_GPL(cx231xx_set_mode);
622 */ 649 */
623static void cx231xx_irq_callback(struct urb *urb) 650static void cx231xx_irq_callback(struct urb *urb)
624{ 651{
625 struct cx231xx_dmaqueue *dma_q = urb->context; 652 struct cx231xx_dmaqueue *dma_q = urb->context;
626 struct cx231xx_video_mode *vmode = container_of(dma_q, struct cx231xx_video_mode, vidq); 653 struct cx231xx_video_mode *vmode =
627 struct cx231xx *dev = container_of(vmode, struct cx231xx, video_mode); 654 container_of(dma_q, struct cx231xx_video_mode, vidq);
655 struct cx231xx *dev = container_of(vmode, struct cx231xx, video_mode);
628 int rc, i; 656 int rc, i;
629 657
630 658 switch (urb->status) {
631 switch (urb->status) { 659 case 0: /* success */
632 case 0: /* success */ 660 case -ETIMEDOUT: /* NAK */
633 case -ETIMEDOUT: /* NAK */ 661 break;
634 break; 662 case -ECONNRESET: /* kill */
635 case -ECONNRESET: /* kill */ 663 case -ENOENT:
636 case -ENOENT: 664 case -ESHUTDOWN:
637 case -ESHUTDOWN: 665 return;
638 return; 666 default: /* error */
639 default: /* error */ 667 cx231xx_isocdbg("urb completition error %d.\n", urb->status);
640 cx231xx_isocdbg("urb completition error %d.\n", urb->status); 668 break;
641 break;
642 } 669 }
643 670
644 /* Copy data from URB */ 671 /* Copy data from URB */
@@ -656,7 +683,7 @@ static void cx231xx_irq_callback(struct urb *urb)
656 urb->status = usb_submit_urb(urb, GFP_ATOMIC); 683 urb->status = usb_submit_urb(urb, GFP_ATOMIC);
657 if (urb->status) { 684 if (urb->status) {
658 cx231xx_isocdbg("urb resubmit failed (error=%i)\n", 685 cx231xx_isocdbg("urb resubmit failed (error=%i)\n",
659 urb->status); 686 urb->status);
660 } 687 }
661} 688}
662 689
@@ -674,16 +701,17 @@ void cx231xx_uninit_isoc(struct cx231xx *dev)
674 for (i = 0; i < dev->video_mode.isoc_ctl.num_bufs; i++) { 701 for (i = 0; i < dev->video_mode.isoc_ctl.num_bufs; i++) {
675 urb = dev->video_mode.isoc_ctl.urb[i]; 702 urb = dev->video_mode.isoc_ctl.urb[i];
676 if (urb) { 703 if (urb) {
677 if (!irqs_disabled()) 704 if (!irqs_disabled())
678 usb_kill_urb(urb); 705 usb_kill_urb(urb);
679 else 706 else
680 usb_unlink_urb(urb); 707 usb_unlink_urb(urb);
681 708
682 if (dev->video_mode.isoc_ctl.transfer_buffer[i]) { 709 if (dev->video_mode.isoc_ctl.transfer_buffer[i]) {
683 usb_buffer_free(dev->udev, 710 usb_buffer_free(dev->udev,
684 urb->transfer_buffer_length, 711 urb->transfer_buffer_length,
685 dev->video_mode.isoc_ctl.transfer_buffer[i], 712 dev->video_mode.isoc_ctl.
686 urb->transfer_dma); 713 transfer_buffer[i],
714 urb->transfer_dma);
687 } 715 }
688 usb_free_urb(urb); 716 usb_free_urb(urb);
689 dev->video_mode.isoc_ctl.urb[i] = NULL; 717 dev->video_mode.isoc_ctl.urb[i] = NULL;
@@ -700,14 +728,15 @@ void cx231xx_uninit_isoc(struct cx231xx *dev)
700 728
701 cx231xx_capture_start(dev, 0, Raw_Video); 729 cx231xx_capture_start(dev, 0, Raw_Video);
702} 730}
731
703EXPORT_SYMBOL_GPL(cx231xx_uninit_isoc); 732EXPORT_SYMBOL_GPL(cx231xx_uninit_isoc);
704 733
705/* 734/*
706 * Allocate URBs and start IRQ 735 * Allocate URBs and start IRQ
707 */ 736 */
708int cx231xx_init_isoc(struct cx231xx *dev, int max_packets, 737int cx231xx_init_isoc(struct cx231xx *dev, int max_packets,
709 int num_bufs, int max_pkt_size, 738 int num_bufs, int max_pkt_size,
710 int (*isoc_copy) (struct cx231xx *dev, struct urb *urb)) 739 int (*isoc_copy) (struct cx231xx * dev, struct urb * urb))
711{ 740{
712 struct cx231xx_dmaqueue *dma_q = &dev->video_mode.vidq; 741 struct cx231xx_dmaqueue *dma_q = &dev->video_mode.vidq;
713 int i; 742 int i;
@@ -718,36 +747,36 @@ int cx231xx_init_isoc(struct cx231xx *dev, int max_packets,
718 747
719 cx231xx_isocdbg("cx231xx: called cx231xx_prepare_isoc\n"); 748 cx231xx_isocdbg("cx231xx: called cx231xx_prepare_isoc\n");
720 749
721 dev->video_input = dev->video_input > 2?2:dev->video_input; 750 dev->video_input = dev->video_input > 2 ? 2 : dev->video_input;
722
723 cx231xx_info("Setting Video mux to %d\n",dev->video_input);
724 video_mux(dev, dev->video_input);
725 751
752 cx231xx_info("Setting Video mux to %d\n", dev->video_input);
753 video_mux(dev, dev->video_input);
726 754
727 /* De-allocates all pending stuff */ 755 /* De-allocates all pending stuff */
728 cx231xx_uninit_isoc(dev); 756 cx231xx_uninit_isoc(dev);
729 757
730 dev->video_mode.isoc_ctl.isoc_copy = isoc_copy; 758 dev->video_mode.isoc_ctl.isoc_copy = isoc_copy;
731 dev->video_mode.isoc_ctl.num_bufs = num_bufs; 759 dev->video_mode.isoc_ctl.num_bufs = num_bufs;
732 dma_q->pos = 0; 760 dma_q->pos = 0;
733 dma_q->is_partial_line = 0; 761 dma_q->is_partial_line = 0;
734 dma_q->last_sav = 0; 762 dma_q->last_sav = 0;
735 dma_q->current_field = -1; 763 dma_q->current_field = -1;
736 dma_q->field1_done = 0; 764 dma_q->field1_done = 0;
737 dma_q->lines_per_field = dev->height/2; 765 dma_q->lines_per_field = dev->height / 2;
738 dma_q->bytes_left_in_line = dev->width << 1; 766 dma_q->bytes_left_in_line = dev->width << 1;
739 dma_q->lines_completed = 0; 767 dma_q->lines_completed = 0;
740 for(i = 0; i < 8 ; i++) 768 for (i = 0; i < 8; i++)
741 dma_q->partial_buf[i] = 0; 769 dma_q->partial_buf[i] = 0;
742 770
743 dev->video_mode.isoc_ctl.urb = kzalloc(sizeof(void *)*num_bufs, GFP_KERNEL); 771 dev->video_mode.isoc_ctl.urb =
772 kzalloc(sizeof(void *) * num_bufs, GFP_KERNEL);
744 if (!dev->video_mode.isoc_ctl.urb) { 773 if (!dev->video_mode.isoc_ctl.urb) {
745 cx231xx_errdev("cannot alloc memory for usb buffers\n"); 774 cx231xx_errdev("cannot alloc memory for usb buffers\n");
746 return -ENOMEM; 775 return -ENOMEM;
747 } 776 }
748 777
749 dev->video_mode.isoc_ctl.transfer_buffer = kzalloc(sizeof(void *)*num_bufs, 778 dev->video_mode.isoc_ctl.transfer_buffer =
750 GFP_KERNEL); 779 kzalloc(sizeof(void *) * num_bufs, GFP_KERNEL);
751 if (!dev->video_mode.isoc_ctl.transfer_buffer) { 780 if (!dev->video_mode.isoc_ctl.transfer_buffer) {
752 cx231xx_errdev("cannot allocate memory for usbtransfer\n"); 781 cx231xx_errdev("cannot allocate memory for usbtransfer\n");
753 kfree(dev->video_mode.isoc_ctl.urb); 782 kfree(dev->video_mode.isoc_ctl.urb);
@@ -769,23 +798,25 @@ int cx231xx_init_isoc(struct cx231xx *dev, int max_packets,
769 } 798 }
770 dev->video_mode.isoc_ctl.urb[i] = urb; 799 dev->video_mode.isoc_ctl.urb[i] = urb;
771 800
772 dev->video_mode.isoc_ctl.transfer_buffer[i] = usb_buffer_alloc(dev->udev, 801 dev->video_mode.isoc_ctl.transfer_buffer[i] =
773 sb_size, GFP_KERNEL, &urb->transfer_dma); 802 usb_buffer_alloc(dev->udev, sb_size, GFP_KERNEL,
803 &urb->transfer_dma);
774 if (!dev->video_mode.isoc_ctl.transfer_buffer[i]) { 804 if (!dev->video_mode.isoc_ctl.transfer_buffer[i]) {
775 cx231xx_err("unable to allocate %i bytes for transfer" 805 cx231xx_err("unable to allocate %i bytes for transfer"
776 " buffer %i%s\n", 806 " buffer %i%s\n",
777 sb_size, i, 807 sb_size, i,
778 in_interrupt()?" while in int":""); 808 in_interrupt()? " while in int" : "");
779 cx231xx_uninit_isoc(dev); 809 cx231xx_uninit_isoc(dev);
780 return -ENOMEM; 810 return -ENOMEM;
781 } 811 }
782 memset(dev->video_mode.isoc_ctl.transfer_buffer[i], 0, sb_size); 812 memset(dev->video_mode.isoc_ctl.transfer_buffer[i], 0, sb_size);
783 813
784 pipe = usb_rcvisocpipe(dev->udev, dev->video_mode.end_point_addr); 814 pipe =
815 usb_rcvisocpipe(dev->udev, dev->video_mode.end_point_addr);
785 816
786 usb_fill_int_urb(urb, dev->udev, pipe, 817 usb_fill_int_urb(urb, dev->udev, pipe,
787 dev->video_mode.isoc_ctl.transfer_buffer[i], sb_size, 818 dev->video_mode.isoc_ctl.transfer_buffer[i],
788 cx231xx_irq_callback, dma_q, 1); 819 sb_size, cx231xx_irq_callback, dma_q, 1);
789 820
790 urb->number_of_packets = max_packets; 821 urb->number_of_packets = max_packets;
791 urb->transfer_flags = URB_ISO_ASAP; 822 urb->transfer_flags = URB_ISO_ASAP;
@@ -794,29 +825,30 @@ int cx231xx_init_isoc(struct cx231xx *dev, int max_packets,
794 for (j = 0; j < max_packets; j++) { 825 for (j = 0; j < max_packets; j++) {
795 urb->iso_frame_desc[j].offset = k; 826 urb->iso_frame_desc[j].offset = k;
796 urb->iso_frame_desc[j].length = 827 urb->iso_frame_desc[j].length =
797 dev->video_mode.isoc_ctl.max_pkt_size; 828 dev->video_mode.isoc_ctl.max_pkt_size;
798 k += dev->video_mode.isoc_ctl.max_pkt_size; 829 k += dev->video_mode.isoc_ctl.max_pkt_size;
799 } 830 }
800 } 831 }
801 832
802 init_waitqueue_head(&dma_q->wq); 833 init_waitqueue_head(&dma_q->wq);
803 834
804
805 /* submit urbs and enables IRQ */ 835 /* submit urbs and enables IRQ */
806 for (i = 0; i < dev->video_mode.isoc_ctl.num_bufs; i++) { 836 for (i = 0; i < dev->video_mode.isoc_ctl.num_bufs; i++) {
807 rc = usb_submit_urb(dev->video_mode.isoc_ctl.urb[i], GFP_ATOMIC); 837 rc = usb_submit_urb(dev->video_mode.isoc_ctl.urb[i],
838 GFP_ATOMIC);
808 if (rc) { 839 if (rc) {
809 cx231xx_err("submit of urb %i failed (error=%i)\n", i, 840 cx231xx_err("submit of urb %i failed (error=%i)\n", i,
810 rc); 841 rc);
811 cx231xx_uninit_isoc(dev); 842 cx231xx_uninit_isoc(dev);
812 return rc; 843 return rc;
813 } 844 }
814 } 845 }
815 846
816 cx231xx_capture_start(dev, 1, Raw_Video); 847 cx231xx_capture_start(dev, 1, Raw_Video);
817 848
818 return 0; 849 return 0;
819} 850}
851
820EXPORT_SYMBOL_GPL(cx231xx_init_isoc); 852EXPORT_SYMBOL_GPL(cx231xx_init_isoc);
821 853
822/************************************************************************************ 854/************************************************************************************
@@ -824,171 +856,176 @@ EXPORT_SYMBOL_GPL(cx231xx_init_isoc);
824*************************************************************************************/ 856*************************************************************************************/
825int cx231xx_dev_init(struct cx231xx *dev) 857int cx231xx_dev_init(struct cx231xx *dev)
826{ 858{
827 int errCode = 0; 859 int errCode = 0;
828 860
829 /* Initialize I2C bus */ 861 /* Initialize I2C bus */
830 862
831 /* External Master 1 Bus */ 863 /* External Master 1 Bus */
832 dev->i2c_bus[0].nr = 0; 864 dev->i2c_bus[0].nr = 0;
833 dev->i2c_bus[0].dev = dev; 865 dev->i2c_bus[0].dev = dev;
834 dev->i2c_bus[0].i2c_period = I2C_SPEED_1M; /* 1MHz */ 866 dev->i2c_bus[0].i2c_period = I2C_SPEED_1M; /* 1MHz */
835 dev->i2c_bus[0].i2c_nostop = 0; 867 dev->i2c_bus[0].i2c_nostop = 0;
836 dev->i2c_bus[0].i2c_reserve = 0; 868 dev->i2c_bus[0].i2c_reserve = 0;
837 869
838 /* External Master 2 Bus */ 870 /* External Master 2 Bus */
839 dev->i2c_bus[1].nr = 1; 871 dev->i2c_bus[1].nr = 1;
840 dev->i2c_bus[1].dev = dev; 872 dev->i2c_bus[1].dev = dev;
841 dev->i2c_bus[1].i2c_period = I2C_SPEED_1M; /* 1MHz */ 873 dev->i2c_bus[1].i2c_period = I2C_SPEED_1M; /* 1MHz */
842 dev->i2c_bus[1].i2c_nostop = 0; 874 dev->i2c_bus[1].i2c_nostop = 0;
843 dev->i2c_bus[1].i2c_reserve = 0; 875 dev->i2c_bus[1].i2c_reserve = 0;
844 876
845 /* Internal Master 3 Bus */ 877 /* Internal Master 3 Bus */
846 dev->i2c_bus[2].nr = 2; 878 dev->i2c_bus[2].nr = 2;
847 dev->i2c_bus[2].dev = dev; 879 dev->i2c_bus[2].dev = dev;
848 dev->i2c_bus[2].i2c_period = I2C_SPEED_400K; /* 400kHz */ 880 dev->i2c_bus[2].i2c_period = I2C_SPEED_400K; /* 400kHz */
849 dev->i2c_bus[2].i2c_nostop = 0; 881 dev->i2c_bus[2].i2c_nostop = 0;
850 dev->i2c_bus[2].i2c_reserve = 0; 882 dev->i2c_bus[2].i2c_reserve = 0;
851 883
852 /* register I2C buses */ 884 /* register I2C buses */
853 cx231xx_i2c_register(&dev->i2c_bus[0]); 885 cx231xx_i2c_register(&dev->i2c_bus[0]);
854 cx231xx_i2c_register(&dev->i2c_bus[1]); 886 cx231xx_i2c_register(&dev->i2c_bus[1]);
855 cx231xx_i2c_register(&dev->i2c_bus[2]); 887 cx231xx_i2c_register(&dev->i2c_bus[2]);
856 888
857 /* init hardware */ 889 /* init hardware */
858 /* Note : with out calling set power mode function, colibri can not be set up correctly */ 890 /* Note : with out calling set power mode function, colibri can not be set up correctly */
859 errCode = cx231xx_set_power_mode(dev, POLARIS_AVMODE_ANALOGT_TV); 891 errCode = cx231xx_set_power_mode(dev, POLARIS_AVMODE_ANALOGT_TV);
860 if (errCode < 0) { 892 if (errCode < 0) {
861 cx231xx_errdev("%s: cx231xx_set_power_mode : Failed to set Power - errCode [%d]!\n", 893 cx231xx_errdev
862 __func__, errCode); 894 ("%s: cx231xx_set_power_mode : Failed to set Power - errCode [%d]!\n",
895 __func__, errCode);
863 return errCode; 896 return errCode;
864 } 897 }
865 898
866 /* initialize Colibri block */ 899 /* initialize Colibri block */
867 errCode = cx231xx_colibri_init_super_block(dev, 0x23c); 900 errCode = cx231xx_colibri_init_super_block(dev, 0x23c);
868 if (errCode < 0) { 901 if (errCode < 0) {
869 cx231xx_errdev("%s: cx231xx_colibri init super block - errCode [%d]!\n", 902 cx231xx_errdev
870 __func__, errCode); 903 ("%s: cx231xx_colibri init super block - errCode [%d]!\n",
904 __func__, errCode);
871 return errCode; 905 return errCode;
872 } 906 }
873 errCode = cx231xx_colibri_init_channels(dev); 907 errCode = cx231xx_colibri_init_channels(dev);
874 if (errCode < 0) { 908 if (errCode < 0) {
875 cx231xx_errdev("%s: cx231xx_colibri init channels - errCode [%d]!\n", 909 cx231xx_errdev
876 __func__, errCode); 910 ("%s: cx231xx_colibri init channels - errCode [%d]!\n",
911 __func__, errCode);
877 return errCode; 912 return errCode;
878 } 913 }
879 914
880 /* Set DIF in By pass mode */ 915 /* Set DIF in By pass mode */
881 errCode = cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND); 916 errCode = cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND);
882 if (errCode < 0) { 917 if (errCode < 0) {
883 cx231xx_errdev("%s: cx231xx_dif set to By pass mode - errCode [%d]!\n", 918 cx231xx_errdev
884 __func__, errCode); 919 ("%s: cx231xx_dif set to By pass mode - errCode [%d]!\n",
920 __func__, errCode);
885 return errCode; 921 return errCode;
886 } 922 }
887 923
888 /* flatiron related functions */ 924 /* flatiron related functions */
889 errCode = cx231xx_flatiron_initialize(dev); 925 errCode = cx231xx_flatiron_initialize(dev);
890 if (errCode < 0) { 926 if (errCode < 0) {
891 cx231xx_errdev("%s: cx231xx_flatiron initialize - errCode [%d]!\n", 927 cx231xx_errdev
892 __func__, errCode); 928 ("%s: cx231xx_flatiron initialize - errCode [%d]!\n",
929 __func__, errCode);
893 return errCode; 930 return errCode;
894 } 931 }
895 932
896 /* init control pins */ 933 /* init control pins */
897 errCode = cx231xx_init_ctrl_pin_status(dev); 934 errCode = cx231xx_init_ctrl_pin_status(dev);
898 if (errCode < 0) { 935 if (errCode < 0) {
899 cx231xx_errdev("%s: cx231xx_init ctrl pins - errCode [%d]!\n", 936 cx231xx_errdev("%s: cx231xx_init ctrl pins - errCode [%d]!\n",
900 __func__, errCode); 937 __func__, errCode);
901 return errCode; 938 return errCode;
902 } 939 }
903 940
904 /* set AGC mode to Analog */ 941 /* set AGC mode to Analog */
905 errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 1); 942 errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 1);
906 if (errCode < 0) { 943 if (errCode < 0) {
907 cx231xx_errdev("%s: cx231xx_AGC mode to Analog - errCode [%d]!\n", 944 cx231xx_errdev
908 __func__, errCode); 945 ("%s: cx231xx_AGC mode to Analog - errCode [%d]!\n",
946 __func__, errCode);
909 return errCode; 947 return errCode;
910 } 948 }
911 949
912 /* set all alternate settings to zero initially */ 950 /* set all alternate settings to zero initially */
913 cx231xx_set_alt_setting(dev, INDEX_VIDEO, 0); 951 cx231xx_set_alt_setting(dev, INDEX_VIDEO, 0);
914 cx231xx_set_alt_setting(dev, INDEX_VANC, 0); 952 cx231xx_set_alt_setting(dev, INDEX_VANC, 0);
915 cx231xx_set_alt_setting(dev, INDEX_HANC, 0); 953 cx231xx_set_alt_setting(dev, INDEX_HANC, 0);
916 if(dev->board.has_dvb) 954 if (dev->board.has_dvb)
917 cx231xx_set_alt_setting(dev, INDEX_TS1, 0); 955 cx231xx_set_alt_setting(dev, INDEX_TS1, 0);
918 956
919 /* set the I2C master port to 3 on channel 1 */ 957 /* set the I2C master port to 3 on channel 1 */
920 errCode = cx231xx_enable_i2c_for_tuner(dev, I2C_3); 958 errCode = cx231xx_enable_i2c_for_tuner(dev, I2C_3);
921 959
922 return errCode; 960 return errCode;
923} 961}
962
924EXPORT_SYMBOL_GPL(cx231xx_dev_init); 963EXPORT_SYMBOL_GPL(cx231xx_dev_init);
925 964
926void cx231xx_dev_uninit(struct cx231xx *dev) 965void cx231xx_dev_uninit(struct cx231xx *dev)
927{ 966{
928 /* Un Initialize I2C bus */ 967 /* Un Initialize I2C bus */
929 cx231xx_i2c_unregister(&dev->i2c_bus[2]); 968 cx231xx_i2c_unregister(&dev->i2c_bus[2]);
930 cx231xx_i2c_unregister(&dev->i2c_bus[1]); 969 cx231xx_i2c_unregister(&dev->i2c_bus[1]);
931 cx231xx_i2c_unregister(&dev->i2c_bus[0]); 970 cx231xx_i2c_unregister(&dev->i2c_bus[0]);
932} 971}
933EXPORT_SYMBOL_GPL(cx231xx_dev_uninit);
934 972
973EXPORT_SYMBOL_GPL(cx231xx_dev_uninit);
935 974
936/************************************************************************************ 975/************************************************************************************
937* G P I O related functions * 976* G P I O related functions *
938*************************************************************************************/ 977*************************************************************************************/
939int cx231xx_send_gpio_cmd(struct cx231xx *dev, u32 gpio_bit, u8* gpio_val, 978int cx231xx_send_gpio_cmd(struct cx231xx *dev, u32 gpio_bit, u8 * gpio_val,
940 u8 len, u8 request, u8 direction) 979 u8 len, u8 request, u8 direction)
941{ 980{
942 int status = 0; 981 int status = 0;
943 VENDOR_REQUEST_IN ven_req; 982 VENDOR_REQUEST_IN ven_req;
944 983
945 /* Set wValue */ 984 /* Set wValue */
946 ven_req.wValue = (u16)(gpio_bit>>16 & 0xffff); 985 ven_req.wValue = (u16) (gpio_bit >> 16 & 0xffff);
947 986
948 /* set request */ 987 /* set request */
949 if(!request){ 988 if (!request) {
950 if(direction) 989 if (direction)
951 ven_req.bRequest = VRT_GET_GPIO; /* 0x8 gpio */ 990 ven_req.bRequest = VRT_GET_GPIO; /* 0x8 gpio */
952 else 991 else
953 ven_req.bRequest = VRT_SET_GPIO; /* 0x9 gpio */ 992 ven_req.bRequest = VRT_SET_GPIO; /* 0x9 gpio */
954 } 993 } else {
955 else { 994 if (direction)
956 if(direction) 995 ven_req.bRequest = VRT_GET_GPIE; /* 0xa gpie */
957 ven_req.bRequest = VRT_GET_GPIE; /* 0xa gpie */ 996 else
958 else 997 ven_req.bRequest = VRT_SET_GPIE; /* 0xb gpie */
959 ven_req.bRequest = VRT_SET_GPIE; /* 0xb gpie */ 998 }
960 }
961
962 /* set index value */
963 ven_req.wIndex = (u16)(gpio_bit & 0xffff);
964
965 /* set wLength value */
966 ven_req.wLength = len;
967
968 /* set bData value */
969 ven_req.bData = 0;
970
971 /* set the buffer for read / write */
972 ven_req.pBuff = gpio_val;
973 999
974 /* set the direction */ 1000 /* set index value */
975 if(direction){ 1001 ven_req.wIndex = (u16) (gpio_bit & 0xffff);
976 ven_req.direction = USB_DIR_IN;
977 memset(ven_req.pBuff, 0x00, ven_req.wLength);
978 }
979 else
980 ven_req.direction = USB_DIR_OUT;
981 1002
1003 /* set wLength value */
1004 ven_req.wLength = len;
982 1005
1006 /* set bData value */
1007 ven_req.bData = 0;
983 1008
984 /* call common vendor command request */ 1009 /* set the buffer for read / write */
985 status = cx231xx_send_vendor_cmd(dev, &ven_req); 1010 ven_req.pBuff = gpio_val;
986 if (status < 0) 1011
987 { 1012 /* set the direction */
988 cx231xx_info("UsbInterface::sendCommand, output buffer failed with status -%d\n", status); 1013 if (direction) {
989 } 1014 ven_req.direction = USB_DIR_IN;
1015 memset(ven_req.pBuff, 0x00, ven_req.wLength);
1016 } else
1017 ven_req.direction = USB_DIR_OUT;
1018
1019
1020 /* call common vendor command request */
1021 status = cx231xx_send_vendor_cmd(dev, &ven_req);
1022 if (status < 0) {
1023 cx231xx_info
1024 ("UsbInterface::sendCommand, output buffer failed with status -%d\n",
1025 status);
1026 }
990 1027
991 return status; 1028 return status;
992} 1029}
993 1030
994EXPORT_SYMBOL_GPL(cx231xx_send_gpio_cmd); 1031EXPORT_SYMBOL_GPL(cx231xx_send_gpio_cmd);
@@ -998,170 +1035,177 @@ EXPORT_SYMBOL_GPL(cx231xx_send_gpio_cmd);
998 *************************************************************************************/ 1035 *************************************************************************************/
999int cx231xx_mode_register(struct cx231xx *dev, u16 address, u32 mode) 1036int cx231xx_mode_register(struct cx231xx *dev, u16 address, u32 mode)
1000{ 1037{
1001 u8 value[4] = {0x0, 0x0, 0x0, 0x0}; 1038 u8 value[4] = { 0x0, 0x0, 0x0, 0x0 };
1002 u32 tmp =0; 1039 u32 tmp = 0;
1003 int status = 0; 1040 int status = 0;
1004 1041
1005 status = cx231xx_read_ctrl_reg(dev,VRT_GET_REGISTER, address,value,4); 1042 status =
1006 if(status < 0) 1043 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, address, value, 4);
1007 return status; 1044 if (status < 0)
1045 return status;
1008 1046
1009 tmp = *((u32 *)value); 1047 tmp = *((u32 *) value);
1010 tmp |= mode; 1048 tmp |= mode;
1011 1049
1012 value[0]=(u8) tmp; 1050 value[0] = (u8) tmp;
1013 value[1]=(u8)(tmp>>8); 1051 value[1] = (u8) (tmp >> 8);
1014 value[2]=(u8)(tmp>>16); 1052 value[2] = (u8) (tmp >> 16);
1015 value[3]=(u8)(tmp>>24); 1053 value[3] = (u8) (tmp >> 24);
1016 1054
1017 status = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, address,value,4); 1055 status =
1056 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, address, value, 4);
1018 1057
1019 return status; 1058 return status;
1020} 1059}
1021 1060
1022/************************************************************************************* 1061/*************************************************************************************
1023 * I 2 C Internal C O N T R O L functions * 1062 * I 2 C Internal C O N T R O L functions *
1024 *************************************************************************************/ 1063 *************************************************************************************/
1025int cx231xx_read_i2c_data(struct cx231xx *dev, u8 dev_addr, u16 saddr, 1064int cx231xx_read_i2c_data(struct cx231xx *dev, u8 dev_addr, u16 saddr,
1026 u8 saddr_len, u32 *data, u8 data_len) 1065 u8 saddr_len, u32 * data, u8 data_len)
1027{ 1066{
1028 int status = 0; 1067 int status = 0;
1029 struct cx231xx_i2c_xfer_data req_data; 1068 struct cx231xx_i2c_xfer_data req_data;
1030 u8 value[4] ={0,0,0,0}; 1069 u8 value[4] = { 0, 0, 0, 0 };
1031 1070
1032 if(saddr_len == 0) 1071 if (saddr_len == 0)
1033 saddr = 0; 1072 saddr = 0;
1034 else if(saddr_len == 0) 1073 else if (saddr_len == 0)
1035 saddr &= 0xff; 1074 saddr &= 0xff;
1036 1075
1037 /* prepare xfer_data struct */ 1076 /* prepare xfer_data struct */
1038 req_data.dev_addr = dev_addr >> 1; 1077 req_data.dev_addr = dev_addr >> 1;
1039 req_data.direction = I2C_M_RD; 1078 req_data.direction = I2C_M_RD;
1040 req_data.saddr_len = saddr_len; 1079 req_data.saddr_len = saddr_len;
1041 req_data.saddr_dat = saddr; 1080 req_data.saddr_dat = saddr;
1042 req_data.buf_size = data_len; 1081 req_data.buf_size = data_len;
1043 req_data.p_buffer = (u8*)value; 1082 req_data.p_buffer = (u8 *) value;
1044 1083
1045 /* usb send command */ 1084 /* usb send command */
1046 status = dev->cx231xx_send_usb_command(&dev->i2c_bus[0], &req_data); 1085 status = dev->cx231xx_send_usb_command(&dev->i2c_bus[0], &req_data);
1047 1086
1048 if(status >= 0) 1087 if (status >= 0) {
1049 { 1088 /* Copy the data read back to main buffer */
1050 /* Copy the data read back to main buffer */ 1089 if (data_len == 1)
1051 if(data_len == 1) 1090 *data = value[0];
1052 *data = value[0]; 1091 else
1053 else 1092 *data =
1054 *data = value[0] | value[1] << 8 | value[2] << 16 | value[3] << 24; 1093 value[0] | value[1] << 8 | value[2] << 16 | value[3]
1055 } 1094 << 24;
1056 1095 }
1057 return status; 1096
1097 return status;
1058} 1098}
1059 1099
1060int cx231xx_write_i2c_data(struct cx231xx *dev, u8 dev_addr, u16 saddr, 1100int cx231xx_write_i2c_data(struct cx231xx *dev, u8 dev_addr, u16 saddr,
1061 u8 saddr_len, u32 data, u8 data_len) 1101 u8 saddr_len, u32 data, u8 data_len)
1062{ 1102{
1063 int status = 0; 1103 int status = 0;
1064 u8 value[4] ={0,0,0,0}; 1104 u8 value[4] = { 0, 0, 0, 0 };
1065 struct cx231xx_i2c_xfer_data req_data; 1105 struct cx231xx_i2c_xfer_data req_data;
1066 1106
1067 value[0]=(u8)data; 1107 value[0] = (u8) data;
1068 value[1]=(u8)(data>>8); 1108 value[1] = (u8) (data >> 8);
1069 value[2]=(u8)(data>>16); 1109 value[2] = (u8) (data >> 16);
1070 value[3]=(u8)(data>>24); 1110 value[3] = (u8) (data >> 24);
1071 1111
1072 if(saddr_len == 0) 1112 if (saddr_len == 0)
1073 saddr = 0; 1113 saddr = 0;
1074 else if(saddr_len == 0) 1114 else if (saddr_len == 0)
1075 saddr &= 0xff; 1115 saddr &= 0xff;
1076 1116
1077 /* prepare xfer_data struct */ 1117 /* prepare xfer_data struct */
1078 req_data.dev_addr = dev_addr >> 1; 1118 req_data.dev_addr = dev_addr >> 1;
1079 req_data.direction = 0; 1119 req_data.direction = 0;
1080 req_data.saddr_len = saddr_len; 1120 req_data.saddr_len = saddr_len;
1081 req_data.saddr_dat = saddr; 1121 req_data.saddr_dat = saddr;
1082 req_data.buf_size = data_len; 1122 req_data.buf_size = data_len;
1083 req_data.p_buffer = value; 1123 req_data.p_buffer = value;
1084 1124
1085 /* usb send command */ 1125 /* usb send command */
1086 status = dev->cx231xx_send_usb_command(&dev->i2c_bus[0], &req_data); 1126 status = dev->cx231xx_send_usb_command(&dev->i2c_bus[0], &req_data);
1087 1127
1088 return status; 1128 return status;
1089} 1129}
1090 1130
1091int cx231xx_reg_mask_write(struct cx231xx *dev, u8 dev_addr, u8 size, u16 register_address, 1131int cx231xx_reg_mask_write(struct cx231xx *dev, u8 dev_addr, u8 size,
1092 u8 bit_start,u8 bit_end, u32 value) 1132 u16 register_address, u8 bit_start, u8 bit_end,
1133 u32 value)
1093{ 1134{
1094 int status = 0; 1135 int status = 0;
1095 u32 tmp; 1136 u32 tmp;
1096 u32 mask = 0; 1137 u32 mask = 0;
1097 int i; 1138 int i;
1098 1139
1099 if (bit_start>(size-1) || bit_end>(size-1)) { 1140 if (bit_start > (size - 1) || bit_end > (size - 1)) {
1100 return -1; 1141 return -1;
1101 } 1142 }
1102
1103 if (size==8){
1104 status = cx231xx_read_i2c_data(dev, dev_addr, register_address, 2, &tmp, 1);
1105 } else {
1106 status = cx231xx_read_i2c_data(dev, dev_addr, register_address, 2, &tmp, 4);
1107 }
1108
1109 if (status < 0) {
1110 return status;
1111 }
1112
1113 mask = 1<<bit_end;
1114 for (i=bit_end; i>bit_start&&i>0; i--) {
1115 mask = mask + (1<<(i-1));
1116 }
1117
1118 value <<= bit_start;
1119
1120 if (size==8)
1121 {
1122 tmp &= ~mask;
1123 tmp |= value;
1124 tmp &= 0xff;
1125 status = cx231xx_write_i2c_data(dev, dev_addr, register_address, 2, tmp, 1);
1126 }
1127 else
1128 {
1129 tmp &= ~mask;
1130 tmp |= value;
1131 status = cx231xx_write_i2c_data(dev, dev_addr, register_address, 2, tmp, 4);
1132 }
1133
1134 return status;
1135}
1136 1143
1144 if (size == 8) {
1145 status =
1146 cx231xx_read_i2c_data(dev, dev_addr, register_address, 2,
1147 &tmp, 1);
1148 } else {
1149 status =
1150 cx231xx_read_i2c_data(dev, dev_addr, register_address, 2,
1151 &tmp, 4);
1152 }
1137 1153
1154 if (status < 0) {
1155 return status;
1156 }
1157
1158 mask = 1 << bit_end;
1159 for (i = bit_end; i > bit_start && i > 0; i--) {
1160 mask = mask + (1 << (i - 1));
1161 }
1162
1163 value <<= bit_start;
1164
1165 if (size == 8) {
1166 tmp &= ~mask;
1167 tmp |= value;
1168 tmp &= 0xff;
1169 status =
1170 cx231xx_write_i2c_data(dev, dev_addr, register_address, 2,
1171 tmp, 1);
1172 } else {
1173 tmp &= ~mask;
1174 tmp |= value;
1175 status =
1176 cx231xx_write_i2c_data(dev, dev_addr, register_address, 2,
1177 tmp, 4);
1178 }
1179
1180 return status;
1181}
1138 1182
1139int cx231xx_read_modify_write_i2c_dword(struct cx231xx *dev, u8 dev_addr, 1183int cx231xx_read_modify_write_i2c_dword(struct cx231xx *dev, u8 dev_addr,
1140 u16 saddr, u32 mask, u32 value) 1184 u16 saddr, u32 mask, u32 value)
1141{ 1185{
1142 u32 temp; 1186 u32 temp;
1143 int status = 0; 1187 int status = 0;
1144 1188
1145 status = cx231xx_read_i2c_data(dev, dev_addr, saddr, 2, &temp, 4); 1189 status = cx231xx_read_i2c_data(dev, dev_addr, saddr, 2, &temp, 4);
1146 1190
1147 if(status < 0) 1191 if (status < 0)
1148 return status; 1192 return status;
1149 1193
1150 temp &= ~mask; 1194 temp &= ~mask;
1151 temp |= value; 1195 temp |= value;
1152 1196
1153 status = cx231xx_write_i2c_data(dev, dev_addr, saddr, 2, temp, 4); 1197 status = cx231xx_write_i2c_data(dev, dev_addr, saddr, 2, temp, 4);
1154 1198
1155 return status; 1199 return status;
1156} 1200}
1157 1201
1158u32 cx231xx_set_field(u32 field_mask, u32 data) 1202u32 cx231xx_set_field(u32 field_mask, u32 data)
1159{ 1203{
1160 u32 temp; 1204 u32 temp;
1161 1205
1162 for (temp = field_mask; (temp & 1) == 0; temp >>= 1) { 1206 for (temp = field_mask; (temp & 1) == 0; temp >>= 1) {
1163 data <<= 1; 1207 data <<= 1;
1164 } 1208 }
1165 1209
1166 return data; 1210 return data;
1167} 1211}
diff --git a/drivers/media/video/cx231xx/cx231xx-dvb.c b/drivers/media/video/cx231xx/cx231xx-dvb.c
index 46bdcecb4055..85bee8c35e0e 100644
--- a/drivers/media/video/cx231xx/cx231xx-dvb.c
+++ b/drivers/media/video/cx231xx/cx231xx-dvb.c
@@ -2,7 +2,7 @@
2 DVB device driver for cx231xx 2 DVB device driver for cx231xx
3 3
4 Copyright (C) 2008 <srinivasa.deevi at conexant dot com> 4 Copyright (C) 2008 <srinivasa.deevi at conexant dot com>
5 Based on em28xx driver 5 Based on em28xx driver
6 6
7 This program is free software; you can redistribute it and/or modify 7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by 8 it under the terms of the GNU General Public License as published by
@@ -29,7 +29,6 @@
29#include "xc5000.h" 29#include "xc5000.h"
30#include "dvb_dummy_fe.h" 30#include "dvb_dummy_fe.h"
31 31
32
33MODULE_DESCRIPTION("driver for cx231xx based DVB cards"); 32MODULE_DESCRIPTION("driver for cx231xx based DVB cards");
34MODULE_AUTHOR("Srinivasa Deevi <srinivasa.deevi@conexant.com>"); 33MODULE_AUTHOR("Srinivasa Deevi <srinivasa.deevi@conexant.com>");
35MODULE_LICENSE("GPL"); 34MODULE_LICENSE("GPL");
@@ -50,24 +49,22 @@ if (debug >= level) \
50#define CX231XX_DVB_MAX_PACKETS 64 49#define CX231XX_DVB_MAX_PACKETS 64
51 50
52struct cx231xx_dvb { 51struct cx231xx_dvb {
53 struct dvb_frontend *frontend; 52 struct dvb_frontend *frontend;
54 53
55 /* feed count management */ 54 /* feed count management */
56 struct mutex lock; 55 struct mutex lock;
57 int nfeeds; 56 int nfeeds;
58 57
59 /* general boilerplate stuff */ 58 /* general boilerplate stuff */
60 struct dvb_adapter adapter; 59 struct dvb_adapter adapter;
61 struct dvb_demux demux; 60 struct dvb_demux demux;
62 struct dmxdev dmxdev; 61 struct dmxdev dmxdev;
63 struct dmx_frontend fe_hw; 62 struct dmx_frontend fe_hw;
64 struct dmx_frontend fe_mem; 63 struct dmx_frontend fe_mem;
65 struct dvb_net net; 64 struct dvb_net net;
66}; 65};
67 66
68 67static inline void print_err_status(struct cx231xx *dev, int packet, int status)
69static inline void print_err_status(struct cx231xx *dev,
70 int packet, int status)
71{ 68{
72 char *errmsg = "Unknown"; 69 char *errmsg = "Unknown";
73 70
@@ -149,8 +146,8 @@ static int start_streaming(struct cx231xx_dvb *dvb)
149 return rc; 146 return rc;
150 147
151 return cx231xx_init_isoc(dev, CX231XX_DVB_MAX_PACKETS, 148 return cx231xx_init_isoc(dev, CX231XX_DVB_MAX_PACKETS,
152 CX231XX_DVB_NUM_BUFS, CX231XX_DVB_MAX_PACKETSIZE, 149 CX231XX_DVB_NUM_BUFS,
153 dvb_isoc_copy); 150 CX231XX_DVB_MAX_PACKETSIZE, dvb_isoc_copy);
154} 151}
155 152
156static int stop_streaming(struct cx231xx_dvb *dvb) 153static int stop_streaming(struct cx231xx_dvb *dvb)
@@ -166,7 +163,7 @@ static int stop_streaming(struct cx231xx_dvb *dvb)
166 163
167static int start_feed(struct dvb_demux_feed *feed) 164static int start_feed(struct dvb_demux_feed *feed)
168{ 165{
169 struct dvb_demux *demux = feed->demux; 166 struct dvb_demux *demux = feed->demux;
170 struct cx231xx_dvb *dvb = demux->priv; 167 struct cx231xx_dvb *dvb = demux->priv;
171 int rc, ret; 168 int rc, ret;
172 169
@@ -189,7 +186,7 @@ static int start_feed(struct dvb_demux_feed *feed)
189 186
190static int stop_feed(struct dvb_demux_feed *feed) 187static int stop_feed(struct dvb_demux_feed *feed)
191{ 188{
192 struct dvb_demux *demux = feed->demux; 189 struct dvb_demux *demux = feed->demux;
193 struct cx231xx_dvb *dvb = demux->priv; 190 struct cx231xx_dvb *dvb = demux->priv;
194 int err = 0; 191 int err = 0;
195 192
@@ -203,8 +200,6 @@ static int stop_feed(struct dvb_demux_feed *feed)
203 return err; 200 return err;
204} 201}
205 202
206
207
208/* ------------------------------------------------------------------ */ 203/* ------------------------------------------------------------------ */
209static int cx231xx_dvb_bus_ctrl(struct dvb_frontend *fe, int acquire) 204static int cx231xx_dvb_bus_ctrl(struct dvb_frontend *fe, int acquire)
210{ 205{
@@ -218,13 +213,11 @@ static int cx231xx_dvb_bus_ctrl(struct dvb_frontend *fe, int acquire)
218 213
219/* ------------------------------------------------------------------ */ 214/* ------------------------------------------------------------------ */
220 215
221
222static struct xc5000_config cnxt_rde250_tunerconfig = { 216static struct xc5000_config cnxt_rde250_tunerconfig = {
223 .i2c_address = 0x61, 217 .i2c_address = 0x61,
224 .if_khz = 5380, 218 .if_khz = 5380,
225}; 219};
226 220
227
228/* ------------------------------------------------------------------ */ 221/* ------------------------------------------------------------------ */
229#if 0 222#if 0
230static int attach_xc5000(u8 addr, struct cx231xx *dev) 223static int attach_xc5000(u8 addr, struct cx231xx *dev)
@@ -234,13 +227,12 @@ static int attach_xc5000(u8 addr, struct cx231xx *dev)
234 struct xc5000_config cfg; 227 struct xc5000_config cfg;
235 228
236 memset(&cfg, 0, sizeof(cfg)); 229 memset(&cfg, 0, sizeof(cfg));
237 cfg.i2c_adap = &dev->i2c_bus[1].i2c_adap; 230 cfg.i2c_adap = &dev->i2c_bus[1].i2c_adap;
238 cfg.i2c_addr = addr; 231 cfg.i2c_addr = addr;
239 232
240 if (!dev->dvb->frontend) { 233 if (!dev->dvb->frontend) {
241 printk(KERN_ERR "%s/2: dvb frontend not attached. " 234 printk(KERN_ERR "%s/2: dvb frontend not attached. "
242 "Can't attach xc5000\n", 235 "Can't attach xc5000\n", dev->name);
243 dev->name);
244 return -EINVAL; 236 return -EINVAL;
245 } 237 }
246 238
@@ -258,65 +250,65 @@ static int attach_xc5000(u8 addr, struct cx231xx *dev)
258} 250}
259#endif 251#endif
260 252
261int cx231xx_set_analog_freq(struct cx231xx *dev, u32 freq ) 253int cx231xx_set_analog_freq(struct cx231xx *dev, u32 freq)
262{ 254{
263 int status = 0; 255 int status = 0;
264 256
265 if( (dev->dvb != NULL) && (dev->dvb->frontend != NULL) ){ 257 if ((dev->dvb != NULL) && (dev->dvb->frontend != NULL)) {
266 258
267 struct dvb_tuner_ops *dops = &dev->dvb->frontend->ops.tuner_ops; 259 struct dvb_tuner_ops *dops = &dev->dvb->frontend->ops.tuner_ops;
268 260
269 if(dops->set_analog_params != NULL) { 261 if (dops->set_analog_params != NULL) {
270 struct analog_parameters params; 262 struct analog_parameters params;
271 263
272 params.frequency = freq; 264 params.frequency = freq;
273 params.std = dev->norm; 265 params.std = dev->norm;
274 params.mode = 0 ; /* 0- Air; 1 - cable */ 266 params.mode = 0; /* 0- Air; 1 - cable */
275 /*params.audmode = ; */ 267 /*params.audmode = ; */
276
277 /* Set the analog parameters to set the frequency */
278 cx231xx_info("Setting Frequency for XC5000\n");
279 dops->set_analog_params(dev->dvb->frontend, &params);
280 }
281 268
269 /* Set the analog parameters to set the frequency */
270 cx231xx_info("Setting Frequency for XC5000\n");
271 dops->set_analog_params(dev->dvb->frontend, &params);
282 } 272 }
283 273
274 }
275
284 return status; 276 return status;
285} 277}
286 278
287int cx231xx_reset_analog_tuner(struct cx231xx *dev) 279int cx231xx_reset_analog_tuner(struct cx231xx *dev)
288{ 280{
289 int status = 0; 281 int status = 0;
290 282
291 if( (dev->dvb != NULL) && (dev->dvb->frontend != NULL) ){ 283 if ((dev->dvb != NULL) && (dev->dvb->frontend != NULL)) {
292 284
293 struct dvb_tuner_ops *dops = &dev->dvb->frontend->ops.tuner_ops; 285 struct dvb_tuner_ops *dops = &dev->dvb->frontend->ops.tuner_ops;
294 286
295 if(dops->init != NULL && !dev->xc_fw_load_done) { 287 if (dops->init != NULL && !dev->xc_fw_load_done) {
296 288
297 cx231xx_info("Reloading firmware for XC5000\n"); 289 cx231xx_info("Reloading firmware for XC5000\n");
298 status = dops->init(dev->dvb->frontend); 290 status = dops->init(dev->dvb->frontend);
299 if(status == 0 ) { 291 if (status == 0) {
300 dev->xc_fw_load_done = 1; 292 dev->xc_fw_load_done = 1;
301 cx231xx_info("XC5000 firmware download completed\n"); 293 cx231xx_info
302 } else { 294 ("XC5000 firmware download completed\n");
303 dev->xc_fw_load_done = 0; 295 } else {
304 cx231xx_info("XC5000 firmware download failed !!!\n"); 296 dev->xc_fw_load_done = 0;
305 } 297 cx231xx_info
298 ("XC5000 firmware download failed !!!\n");
306 } 299 }
307
308 } 300 }
309 301
302 }
303
310 return status; 304 return status;
311} 305}
312 306
313
314/* ------------------------------------------------------------------ */ 307/* ------------------------------------------------------------------ */
315 308
316static int register_dvb(struct cx231xx_dvb *dvb, 309static int register_dvb(struct cx231xx_dvb *dvb,
317 struct module *module, 310 struct module *module,
318 struct cx231xx *dev, 311 struct cx231xx *dev, struct device *device)
319 struct device *device)
320{ 312{
321 int result; 313 int result;
322 314
@@ -326,7 +318,8 @@ static int register_dvb(struct cx231xx_dvb *dvb,
326 result = dvb_register_adapter(&dvb->adapter, dev->name, module, device, 318 result = dvb_register_adapter(&dvb->adapter, dev->name, module, device,
327 adapter_nr); 319 adapter_nr);
328 if (result < 0) { 320 if (result < 0) {
329 printk(KERN_WARNING "%s: dvb_register_adapter failed (errno = %d)\n", 321 printk(KERN_WARNING
322 "%s: dvb_register_adapter failed (errno = %d)\n",
330 dev->name, result); 323 dev->name, result);
331 goto fail_adapter; 324 goto fail_adapter;
332 } 325 }
@@ -339,20 +332,21 @@ static int register_dvb(struct cx231xx_dvb *dvb,
339 /* register frontend */ 332 /* register frontend */
340 result = dvb_register_frontend(&dvb->adapter, dvb->frontend); 333 result = dvb_register_frontend(&dvb->adapter, dvb->frontend);
341 if (result < 0) { 334 if (result < 0) {
342 printk(KERN_WARNING "%s: dvb_register_frontend failed (errno = %d)\n", 335 printk(KERN_WARNING
336 "%s: dvb_register_frontend failed (errno = %d)\n",
343 dev->name, result); 337 dev->name, result);
344 goto fail_frontend; 338 goto fail_frontend;
345 } 339 }
346 340
347 /* register demux stuff */ 341 /* register demux stuff */
348 dvb->demux.dmx.capabilities = 342 dvb->demux.dmx.capabilities =
349 DMX_TS_FILTERING | DMX_SECTION_FILTERING | 343 DMX_TS_FILTERING | DMX_SECTION_FILTERING |
350 DMX_MEMORY_BASED_FILTERING; 344 DMX_MEMORY_BASED_FILTERING;
351 dvb->demux.priv = dvb; 345 dvb->demux.priv = dvb;
352 dvb->demux.filternum = 256; 346 dvb->demux.filternum = 256;
353 dvb->demux.feednum = 256; 347 dvb->demux.feednum = 256;
354 dvb->demux.start_feed = start_feed; 348 dvb->demux.start_feed = start_feed;
355 dvb->demux.stop_feed = stop_feed; 349 dvb->demux.stop_feed = stop_feed;
356 350
357 result = dvb_dmx_init(&dvb->demux); 351 result = dvb_dmx_init(&dvb->demux);
358 if (result < 0) { 352 if (result < 0) {
@@ -361,8 +355,8 @@ static int register_dvb(struct cx231xx_dvb *dvb,
361 goto fail_dmx; 355 goto fail_dmx;
362 } 356 }
363 357
364 dvb->dmxdev.filternum = 256; 358 dvb->dmxdev.filternum = 256;
365 dvb->dmxdev.demux = &dvb->demux.dmx; 359 dvb->dmxdev.demux = &dvb->demux.dmx;
366 dvb->dmxdev.capabilities = 0; 360 dvb->dmxdev.capabilities = 0;
367 result = dvb_dmxdev_init(&dvb->dmxdev, &dvb->adapter); 361 result = dvb_dmxdev_init(&dvb->dmxdev, &dvb->adapter);
368 if (result < 0) { 362 if (result < 0) {
@@ -374,7 +368,8 @@ static int register_dvb(struct cx231xx_dvb *dvb,
374 dvb->fe_hw.source = DMX_FRONTEND_0; 368 dvb->fe_hw.source = DMX_FRONTEND_0;
375 result = dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->fe_hw); 369 result = dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->fe_hw);
376 if (result < 0) { 370 if (result < 0) {
377 printk(KERN_WARNING "%s: add_frontend failed (DMX_FRONTEND_0, errno = %d)\n", 371 printk(KERN_WARNING
372 "%s: add_frontend failed (DMX_FRONTEND_0, errno = %d)\n",
378 dev->name, result); 373 dev->name, result);
379 goto fail_fe_hw; 374 goto fail_fe_hw;
380 } 375 }
@@ -382,15 +377,17 @@ static int register_dvb(struct cx231xx_dvb *dvb,
382 dvb->fe_mem.source = DMX_MEMORY_FE; 377 dvb->fe_mem.source = DMX_MEMORY_FE;
383 result = dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->fe_mem); 378 result = dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->fe_mem);
384 if (result < 0) { 379 if (result < 0) {
385 printk(KERN_WARNING "%s: add_frontend failed (DMX_MEMORY_FE, errno = %d)\n", 380 printk(KERN_WARNING
381 "%s: add_frontend failed (DMX_MEMORY_FE, errno = %d)\n",
386 dev->name, result); 382 dev->name, result);
387 goto fail_fe_mem; 383 goto fail_fe_mem;
388 } 384 }
389 385
390 result = dvb->demux.dmx.connect_frontend(&dvb->demux.dmx, &dvb->fe_hw); 386 result = dvb->demux.dmx.connect_frontend(&dvb->demux.dmx, &dvb->fe_hw);
391 if (result < 0) { 387 if (result < 0) {
392 printk(KERN_WARNING "%s: connect_frontend failed (errno = %d)\n", 388 printk(KERN_WARNING
393 dev->name, result); 389 "%s: connect_frontend failed (errno = %d)\n", dev->name,
390 result);
394 goto fail_fe_conn; 391 goto fail_fe_conn;
395 } 392 }
396 393
@@ -398,20 +395,20 @@ static int register_dvb(struct cx231xx_dvb *dvb,
398 dvb_net_init(&dvb->adapter, &dvb->net, &dvb->demux.dmx); 395 dvb_net_init(&dvb->adapter, &dvb->net, &dvb->demux.dmx);
399 return 0; 396 return 0;
400 397
401fail_fe_conn: 398 fail_fe_conn:
402 dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_mem); 399 dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_mem);
403fail_fe_mem: 400 fail_fe_mem:
404 dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_hw); 401 dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_hw);
405fail_fe_hw: 402 fail_fe_hw:
406 dvb_dmxdev_release(&dvb->dmxdev); 403 dvb_dmxdev_release(&dvb->dmxdev);
407fail_dmxdev: 404 fail_dmxdev:
408 dvb_dmx_release(&dvb->demux); 405 dvb_dmx_release(&dvb->demux);
409fail_dmx: 406 fail_dmx:
410 dvb_unregister_frontend(dvb->frontend); 407 dvb_unregister_frontend(dvb->frontend);
411fail_frontend: 408 fail_frontend:
412 dvb_frontend_detach(dvb->frontend); 409 dvb_frontend_detach(dvb->frontend);
413 dvb_unregister_adapter(&dvb->adapter); 410 dvb_unregister_adapter(&dvb->adapter);
414fail_adapter: 411 fail_adapter:
415 return result; 412 return result;
416} 413}
417 414
@@ -427,7 +424,6 @@ static void unregister_dvb(struct cx231xx_dvb *dvb)
427 dvb_unregister_adapter(&dvb->adapter); 424 dvb_unregister_adapter(&dvb->adapter);
428} 425}
429 426
430
431static int dvb_init(struct cx231xx *dev) 427static int dvb_init(struct cx231xx *dev)
432{ 428{
433 int result = 0; 429 int result = 0;
@@ -446,71 +442,70 @@ static int dvb_init(struct cx231xx *dev)
446 } 442 }
447 dev->dvb = dvb; 443 dev->dvb = dvb;
448 dev->cx231xx_set_analog_freq = cx231xx_set_analog_freq; 444 dev->cx231xx_set_analog_freq = cx231xx_set_analog_freq;
449 dev->cx231xx_reset_analog_tuner = cx231xx_reset_analog_tuner; 445 dev->cx231xx_reset_analog_tuner = cx231xx_reset_analog_tuner;
450 446
451 cx231xx_set_mode(dev, CX231XX_DIGITAL_MODE); 447 cx231xx_set_mode(dev, CX231XX_DIGITAL_MODE);
452 /* init frontend */ 448 /* init frontend */
453 switch (dev->model) { 449 switch (dev->model) {
454 case CX231XX_BOARD_CNXT_RDE_250: 450 case CX231XX_BOARD_CNXT_RDE_250:
455 451
456 /* dev->dvb->frontend = dvb_attach(s5h1411_attach, 452 /* dev->dvb->frontend = dvb_attach(s5h1411_attach,
457 &dvico_s5h1411_config, 453 &dvico_s5h1411_config,
458 &dev->i2c_bus[1].i2c_adap);*/ 454 &dev->i2c_bus[1].i2c_adap); */
459 dev->dvb->frontend = dvb_attach(dvb_dummy_fe_ofdm_attach); 455 dev->dvb->frontend = dvb_attach(dvb_dummy_fe_ofdm_attach);
460 456
461 if(dev->dvb->frontend == NULL) { 457 if (dev->dvb->frontend == NULL) {
462 printk(DRIVER_NAME ": Failed to attach dummy front end\n"); 458 printk(DRIVER_NAME
463 result = -EINVAL; 459 ": Failed to attach dummy front end\n");
464 goto out_free; 460 result = -EINVAL;
465 } 461 goto out_free;
466 462 }
467 /* define general-purpose callback pointer */ 463
468 dvb->frontend->callback = cx231xx_tuner_callback; 464 /* define general-purpose callback pointer */
469 465 dvb->frontend->callback = cx231xx_tuner_callback;
470 if(dvb_attach(xc5000_attach, dev->dvb->frontend, 466
471 &dev->i2c_bus[1].i2c_adap, 467 if (dvb_attach(xc5000_attach, dev->dvb->frontend,
472 &cnxt_rde250_tunerconfig) < 0) { 468 &dev->i2c_bus[1].i2c_adap,
473 result = -EINVAL; 469 &cnxt_rde250_tunerconfig) < 0) {
474 goto out_free; 470 result = -EINVAL;
475 } 471 goto out_free;
476 472 }
477 break; 473
478 case CX231XX_BOARD_CNXT_RDU_250: 474 break;
479 475 case CX231XX_BOARD_CNXT_RDU_250:
480 dev->dvb->frontend = dvb_attach(dvb_dummy_fe_ofdm_attach); 476
481 477 dev->dvb->frontend = dvb_attach(dvb_dummy_fe_ofdm_attach);
482 if(dev->dvb->frontend == NULL) { 478
483 printk(DRIVER_NAME ": Failed to attach dummy front end\n"); 479 if (dev->dvb->frontend == NULL) {
484 result = -EINVAL; 480 printk(DRIVER_NAME
485 goto out_free; 481 ": Failed to attach dummy front end\n");
486 } 482 result = -EINVAL;
487 483 goto out_free;
488 /* define general-purpose callback pointer */ 484 }
489 dvb->frontend->callback = cx231xx_tuner_callback; 485
490 486 /* define general-purpose callback pointer */
491 if(dvb_attach(xc5000_attach, dev->dvb->frontend, 487 dvb->frontend->callback = cx231xx_tuner_callback;
492 &dev->i2c_bus[1].i2c_adap, 488
493 &cnxt_rde250_tunerconfig) < 0) { 489 if (dvb_attach(xc5000_attach, dev->dvb->frontend,
494 result = -EINVAL; 490 &dev->i2c_bus[1].i2c_adap,
495 goto out_free; 491 &cnxt_rde250_tunerconfig) < 0) {
496 } 492 result = -EINVAL;
497 break; 493 goto out_free;
494 }
495 break;
498 496
499 default: 497 default:
500 printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card" 498 printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card"
501 " isn't supported yet\n", 499 " isn't supported yet\n", dev->name);
502 dev->name);
503 break; 500 break;
504 } 501 }
505 if (NULL == dvb->frontend) { 502 if (NULL == dvb->frontend) {
506 printk(KERN_ERR 503 printk(KERN_ERR
507 "%s/2: frontend initialization failed\n", 504 "%s/2: frontend initialization failed\n", dev->name);
508 dev->name);
509 result = -EINVAL; 505 result = -EINVAL;
510 goto out_free; 506 goto out_free;
511 } 507 }
512 508
513
514 /* register everything */ 509 /* register everything */
515 result = register_dvb(dvb, THIS_MODULE, dev, &dev->udev->dev); 510 result = register_dvb(dvb, THIS_MODULE, dev, &dev->udev->dev);
516 511
@@ -521,7 +516,7 @@ static int dvb_init(struct cx231xx *dev)
521 printk(KERN_INFO "Successfully loaded cx231xx-dvb\n"); 516 printk(KERN_INFO "Successfully loaded cx231xx-dvb\n");
522 return 0; 517 return 0;
523 518
524out_free: 519 out_free:
525 cx231xx_set_mode(dev, CX231XX_SUSPEND); 520 cx231xx_set_mode(dev, CX231XX_SUSPEND);
526 kfree(dvb); 521 kfree(dvb);
527 dev->dvb = NULL; 522 dev->dvb = NULL;
@@ -544,7 +539,7 @@ static int dvb_fini(struct cx231xx *dev)
544} 539}
545 540
546static struct cx231xx_ops dvb_ops = { 541static struct cx231xx_ops dvb_ops = {
547 .id = CX231XX_DVB, 542 .id = CX231XX_DVB,
548 .name = "Cx231xx dvb Extension", 543 .name = "Cx231xx dvb Extension",
549 .init = dvb_init, 544 .init = dvb_init,
550 .fini = dvb_fini, 545 .fini = dvb_fini,
@@ -562,4 +557,3 @@ static void __exit cx231xx_dvb_unregister(void)
562 557
563module_init(cx231xx_dvb_register); 558module_init(cx231xx_dvb_register);
564module_exit(cx231xx_dvb_unregister); 559module_exit(cx231xx_dvb_unregister);
565
diff --git a/drivers/media/video/cx231xx/cx231xx-i2c.c b/drivers/media/video/cx231xx/cx231xx-i2c.c
index d75ed6c3c8d7..c250ad27e1d2 100644
--- a/drivers/media/video/cx231xx/cx231xx-i2c.c
+++ b/drivers/media/video/cx231xx/cx231xx-i2c.c
@@ -2,8 +2,8 @@
2 cx231xx-i2c.c - driver for Conexant Cx23100/101/102 USB video capture devices 2 cx231xx-i2c.c - driver for Conexant Cx23100/101/102 USB video capture devices
3 3
4 Copyright (C) 2008 <srinivasa.deevi at conexant dot com> 4 Copyright (C) 2008 <srinivasa.deevi at conexant dot com>
5 Based on em28xx driver 5 Based on em28xx driver
6 Based on Cx23885 driver 6 Based on Cx23885 driver
7 7
8 This program is free software; you can redistribute it and/or modify 8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by 9 it under the terms of the GNU General Public License as published by
@@ -29,7 +29,6 @@
29 29
30#include "cx231xx.h" 30#include "cx231xx.h"
31 31
32
33/* ----------------------------------------------------------- */ 32/* ----------------------------------------------------------- */
34 33
35static unsigned int i2c_scan; 34static unsigned int i2c_scan;
@@ -40,7 +39,6 @@ static unsigned int i2c_debug;
40module_param(i2c_debug, int, 0644); 39module_param(i2c_debug, int, 0644);
41MODULE_PARM_DESC(i2c_debug, "enable debug messages [i2c]"); 40MODULE_PARM_DESC(i2c_debug, "enable debug messages [i2c]");
42 41
43
44#define dprintk1(lvl, fmt, args...) \ 42#define dprintk1(lvl, fmt, args...) \
45do { \ 43do { \
46 if (i2c_debug >= lvl) { \ 44 if (i2c_debug >= lvl) { \
@@ -56,116 +54,119 @@ do { \
56 } \ 54 } \
57} while (0) 55} while (0)
58 56
59
60/* 57/*
61 * cx231xx_i2c_send_bytes() 58 * cx231xx_i2c_send_bytes()
62 */ 59 */
63int cx231xx_i2c_send_bytes(struct i2c_adapter *i2c_adap, 60int cx231xx_i2c_send_bytes(struct i2c_adapter *i2c_adap,
64 const struct i2c_msg *msg) 61 const struct i2c_msg *msg)
65{ 62{
66 struct cx231xx_i2c *bus = i2c_adap->algo_data; 63 struct cx231xx_i2c *bus = i2c_adap->algo_data;
67 struct cx231xx *dev = bus->dev; 64 struct cx231xx *dev = bus->dev;
68 struct cx231xx_i2c_xfer_data req_data; 65 struct cx231xx_i2c_xfer_data req_data;
69 int status = 0; 66 int status = 0;
70 u16 size = 0; 67 u16 size = 0;
71 u8 loop = 0; 68 u8 loop = 0;
72 u8 saddr_len = 1; 69 u8 saddr_len = 1;
73 u8 *buf_ptr = NULL; 70 u8 *buf_ptr = NULL;
74 u16 saddr = 0; 71 u16 saddr = 0;
75 u8 need_gpio = 0; 72 u8 need_gpio = 0;
76 73
77 74 if ((bus->nr == 1) && (msg->addr == 0x61)
78 if( (bus->nr ==1) && (msg->addr == 0x61) && (dev->tuner_type == TUNER_XC5000) ) { 75 && (dev->tuner_type == TUNER_XC5000)) {
79 76
80 size = msg->len; 77 size = msg->len;
81 78
82 if( size == 2 ) { /* register write sub addr*/ 79 if (size == 2) { /* register write sub addr */
83 80
84 /* Just writing sub address will cause problem to XC5000 81 /* Just writing sub address will cause problem to XC5000
85 So ignore the request */ 82 So ignore the request */
86 return 0; 83 return 0;
87 84
88 } else if( size == 4 ) { /* register write with sub addr*/ 85 } else if (size == 4) { /* register write with sub addr */
89 86
90 if(msg->len >= 2 ) 87 if (msg->len >= 2)
91 saddr = msg->buf[0] << 8 | msg->buf[1]; 88 saddr = msg->buf[0] << 8 | msg->buf[1];
92 else if ( msg->len == 1 ) 89 else if (msg->len == 1)
93 saddr = msg->buf[0]; 90 saddr = msg->buf[0];
94 91
95 switch(saddr) { 92 switch (saddr) {
96 case 0x0000: /* start tuner calibration mode */ 93 case 0x0000: /* start tuner calibration mode */
97 need_gpio = 1; 94 need_gpio = 1;
98 dev->xc_fw_load_done = 1; /* FW Loading is done */ 95 dev->xc_fw_load_done = 1; /* FW Loading is done */
99 break; 96 break;
100 case 0x000D: /* Set signal source */ 97 case 0x000D: /* Set signal source */
101 case 0x0001: /* Set TV standard - Video */ 98 case 0x0001: /* Set TV standard - Video */
102 case 0x0002: /* Set TV standard - Audio */ 99 case 0x0002: /* Set TV standard - Audio */
103 case 0x0003: /* Set RF Frequency */ 100 case 0x0003: /* Set RF Frequency */
104 need_gpio = 1; 101 need_gpio = 1;
105 break; 102 break;
106 default: 103 default:
107 if(dev->xc_fw_load_done) 104 if (dev->xc_fw_load_done)
108 need_gpio = 1; 105 need_gpio = 1;
109 break; 106 break;
110 } 107 }
111 108
112 if(need_gpio ) { 109 if (need_gpio) {
113 dprintk1(1, " GPIO W R I T E : addr 0x%x, len %d, saddr 0x%x\n", 110 dprintk1(1,
114 msg->addr, msg->len, saddr); 111 " GPIO W R I T E : addr 0x%x, len %d, saddr 0x%x\n",
115 112 msg->addr, msg->len, saddr);
116 return dev->cx231xx_gpio_i2c_write(dev, msg->addr, msg->buf, msg->len); 113
117 } 114 return dev->cx231xx_gpio_i2c_write(dev,
118 115 msg->addr,
119 } 116 msg->buf,
120 117 msg->len);
121 /* special case for Xc5000 tuner case */ 118 }
122 saddr_len = 1; 119
123 120 }
124 /* adjust the length to correct length */ 121
125 size -= saddr_len; 122 /* special case for Xc5000 tuner case */
126 buf_ptr = (u8*) (msg->buf + 1 ); 123 saddr_len = 1;
127 124
128 do { 125 /* adjust the length to correct length */
129 /* prepare xfer_data struct */ 126 size -= saddr_len;
130 req_data.dev_addr = msg->addr; 127 buf_ptr = (u8 *) (msg->buf + 1);
131 req_data.direction = msg->flags; 128
132 req_data.saddr_len = saddr_len; 129 do {
133 req_data.saddr_dat = msg->buf[0]; 130 /* prepare xfer_data struct */
134 req_data.buf_size = size > 16 ? 16: size; 131 req_data.dev_addr = msg->addr;
135 req_data.p_buffer = (u8*)(buf_ptr + loop * 16); 132 req_data.direction = msg->flags;
136 133 req_data.saddr_len = saddr_len;
137 bus->i2c_nostop = (size > 16) ? 1: 0; 134 req_data.saddr_dat = msg->buf[0];
138 bus->i2c_reserve = (loop == 0) ? 0: 1; 135 req_data.buf_size = size > 16 ? 16 : size;
139 136 req_data.p_buffer = (u8 *) (buf_ptr + loop * 16);
140 /* usb send command */ 137
141 status = dev->cx231xx_send_usb_command(bus, &req_data); 138 bus->i2c_nostop = (size > 16) ? 1 : 0;
142 loop++; 139 bus->i2c_reserve = (loop == 0) ? 0 : 1;
143 140
144 if( size >= 16 ) 141 /* usb send command */
145 size -= 16; 142 status = dev->cx231xx_send_usb_command(bus, &req_data);
146 else 143 loop++;
147 size = 0; 144
148 145 if (size >= 16)
149 }while( size > 0 ); 146 size -= 16;
150 147 else
151 bus->i2c_nostop = 0; 148 size = 0;
152 bus->i2c_reserve = 0; 149
153 150 } while (size > 0);
154 } else { /* regular case */ 151
155 152 bus->i2c_nostop = 0;
156 /* prepare xfer_data struct */ 153 bus->i2c_reserve = 0;
157 req_data.dev_addr = msg->addr; 154
158 req_data.direction = msg->flags; 155 } else { /* regular case */
159 req_data.saddr_len = 0; 156
160 req_data.saddr_dat = 0; 157 /* prepare xfer_data struct */
161 req_data.buf_size = msg->len; 158 req_data.dev_addr = msg->addr;
162 req_data.p_buffer = msg->buf; 159 req_data.direction = msg->flags;
163 160 req_data.saddr_len = 0;
164 /* usb send command */ 161 req_data.saddr_dat = 0;
165 status = dev->cx231xx_send_usb_command(bus, &req_data); 162 req_data.buf_size = msg->len;
166 } 163 req_data.p_buffer = msg->buf;
167 164
168 return status < 0 ? status: 0; 165 /* usb send command */
166 status = dev->cx231xx_send_usb_command(bus, &req_data);
167 }
168
169 return status < 0 ? status : 0;
169} 170}
170 171
171/* 172/*
@@ -173,75 +174,85 @@ int cx231xx_i2c_send_bytes(struct i2c_adapter *i2c_adap,
173 * read a byte from the i2c device 174 * read a byte from the i2c device
174 */ 175 */
175static int cx231xx_i2c_recv_bytes(struct i2c_adapter *i2c_adap, 176static int cx231xx_i2c_recv_bytes(struct i2c_adapter *i2c_adap,
176 const struct i2c_msg *msg) 177 const struct i2c_msg *msg)
177{ 178{
178 struct cx231xx_i2c *bus = i2c_adap->algo_data; 179 struct cx231xx_i2c *bus = i2c_adap->algo_data;
179 struct cx231xx *dev = bus->dev; 180 struct cx231xx *dev = bus->dev;
180 struct cx231xx_i2c_xfer_data req_data; 181 struct cx231xx_i2c_xfer_data req_data;
181 int status = 0; 182 int status = 0;
182 u16 saddr = 0; 183 u16 saddr = 0;
183 u8 need_gpio = 0; 184 u8 need_gpio = 0;
184 185
185 if((bus->nr ==1) && (msg->addr == 0x61) && dev->tuner_type == TUNER_XC5000) { 186 if ((bus->nr == 1) && (msg->addr == 0x61)
186 187 && dev->tuner_type == TUNER_XC5000) {
187 if(msg->len == 2 ) 188
188 saddr = msg->buf[0] << 8 | msg->buf[1]; 189 if (msg->len == 2)
189 else if ( msg->len == 1 ) 190 saddr = msg->buf[0] << 8 | msg->buf[1];
190 saddr = msg->buf[0]; 191 else if (msg->len == 1)
191 192 saddr = msg->buf[0];
192 if( dev->xc_fw_load_done) { 193
193 194 if (dev->xc_fw_load_done) {
194 switch(saddr) { 195
195 case 0x0009: /* BUSY check */ 196 switch (saddr) {
196 dprintk1(1, " GPIO R E A D : Special case BUSY check \n"); 197 case 0x0009: /* BUSY check */
197 /* Try to read BUSY register, just set it to zero */ 198 dprintk1(1,
198 msg->buf[0] = 0; 199 " GPIO R E A D : Special case BUSY check \n");
199 if(msg->len == 2 ) 200 /* Try to read BUSY register, just set it to zero */
200 msg->buf[1] = 0; 201 msg->buf[0] = 0;
201 return 0; 202 if (msg->len == 2)
202 case 0x0004: /* read Lock status */ 203 msg->buf[1] = 0;
203 need_gpio = 1; 204 return 0;
204 break; 205 case 0x0004: /* read Lock status */
205 206 need_gpio = 1;
206 } 207 break;
207 208
208 if(need_gpio) { 209 }
209 /* this is a special case to handle Xceive tuner clock stretch issue 210
210 with gpio based I2C interface */ 211 if (need_gpio) {
211 dprintk1(1, " GPIO R E A D : addr 0x%x, len %d, saddr 0x%x\n", 212 /* this is a special case to handle Xceive tuner clock stretch issue
212 msg->addr, msg->len, msg->buf[0] << 8| msg->buf[1]); 213 with gpio based I2C interface */
213 status = dev->cx231xx_gpio_i2c_write(dev, msg->addr, msg->buf, msg->len); 214 dprintk1(1,
214 status = dev->cx231xx_gpio_i2c_read(dev, msg->addr, msg->buf, msg->len); 215 " GPIO R E A D : addr 0x%x, len %d, saddr 0x%x\n",
215 return status; 216 msg->addr, msg->len,
216 } 217 msg->buf[0] << 8 | msg->buf[1]);
217 } 218 status =
218 219 dev->cx231xx_gpio_i2c_write(dev, msg->addr,
219 /* prepare xfer_data struct */ 220 msg->buf,
220 req_data.dev_addr = msg->addr; 221 msg->len);
221 req_data.direction = msg->flags; 222 status =
222 req_data.saddr_len = msg->len; 223 dev->cx231xx_gpio_i2c_read(dev, msg->addr,
223 req_data.saddr_dat = msg->buf[0] << 8 | msg->buf[1]; 224 msg->buf,
224 req_data.buf_size = msg->len; 225 msg->len);
225 req_data.p_buffer = msg->buf; 226 return status;
226 227 }
227 /* usb send command */ 228 }
228 status = dev->cx231xx_send_usb_command(bus, &req_data); 229
229 230 /* prepare xfer_data struct */
230 } else { 231 req_data.dev_addr = msg->addr;
231 232 req_data.direction = msg->flags;
232 /* prepare xfer_data struct */ 233 req_data.saddr_len = msg->len;
233 req_data.dev_addr = msg->addr; 234 req_data.saddr_dat = msg->buf[0] << 8 | msg->buf[1];
234 req_data.direction = msg->flags; 235 req_data.buf_size = msg->len;
235 req_data.saddr_len = 0; 236 req_data.p_buffer = msg->buf;
236 req_data.saddr_dat = 0; 237
237 req_data.buf_size = msg->len; 238 /* usb send command */
238 req_data.p_buffer = msg->buf; 239 status = dev->cx231xx_send_usb_command(bus, &req_data);
239 240
240 /* usb send command */ 241 } else {
241 status = dev->cx231xx_send_usb_command(bus, &req_data); 242
242 } 243 /* prepare xfer_data struct */
243 244 req_data.dev_addr = msg->addr;
244 return status < 0 ? status: 0; 245 req_data.direction = msg->flags;
246 req_data.saddr_len = 0;
247 req_data.saddr_dat = 0;
248 req_data.buf_size = msg->len;
249 req_data.p_buffer = msg->buf;
250
251 /* usb send command */
252 status = dev->cx231xx_send_usb_command(bus, &req_data);
253 }
254
255 return status < 0 ? status : 0;
245} 256}
246 257
247/* 258/*
@@ -249,56 +260,65 @@ static int cx231xx_i2c_recv_bytes(struct i2c_adapter *i2c_adap,
249 * read a byte from the i2c device 260 * read a byte from the i2c device
250 */ 261 */
251static int cx231xx_i2c_recv_bytes_with_saddr(struct i2c_adapter *i2c_adap, 262static int cx231xx_i2c_recv_bytes_with_saddr(struct i2c_adapter *i2c_adap,
252 const struct i2c_msg *msg1, const struct i2c_msg *msg2) 263 const struct i2c_msg *msg1,
264 const struct i2c_msg *msg2)
253{ 265{
254 struct cx231xx_i2c *bus = i2c_adap->algo_data; 266 struct cx231xx_i2c *bus = i2c_adap->algo_data;
255 struct cx231xx *dev = bus->dev; 267 struct cx231xx *dev = bus->dev;
256 struct cx231xx_i2c_xfer_data req_data; 268 struct cx231xx_i2c_xfer_data req_data;
257 int status = 0; 269 int status = 0;
258 u16 saddr = 0; 270 u16 saddr = 0;
259 u8 need_gpio = 0; 271 u8 need_gpio = 0;
260 272
261 if(msg1->len == 2 ) 273 if (msg1->len == 2)
262 saddr = msg1->buf[0] << 8 | msg1->buf[1]; 274 saddr = msg1->buf[0] << 8 | msg1->buf[1];
263 else if ( msg1->len == 1 ) 275 else if (msg1->len == 1)
264 saddr = msg1->buf[0]; 276 saddr = msg1->buf[0];
265 277
266 if ( (bus->nr ==1) && (msg2->addr == 0x61) && dev->tuner_type == TUNER_XC5000) { 278 if ((bus->nr == 1) && (msg2->addr == 0x61)
267 279 && dev->tuner_type == TUNER_XC5000) {
268 if( (msg2->len < 16) ) { 280
269 281 if ((msg2->len < 16)) {
270 dprintk1(1, " i2c_read : addr 0x%x, len %d, subaddr 0x%x, leng %d\n", 282
271 msg2->addr, msg2->len, saddr, msg1->len); 283 dprintk1(1,
272 284 " i2c_read : addr 0x%x, len %d, subaddr 0x%x, leng %d\n",
273 switch(saddr) { 285 msg2->addr, msg2->len, saddr, msg1->len);
274 case 0x0008: /* read FW load status */ 286
275 need_gpio = 1; 287 switch (saddr) {
276 break; 288 case 0x0008: /* read FW load status */
277 case 0x0004: /* read Lock status */ 289 need_gpio = 1;
278 need_gpio = 1; 290 break;
279 break; 291 case 0x0004: /* read Lock status */
280 } 292 need_gpio = 1;
281 293 break;
282 if(need_gpio ) { 294 }
283 status = dev->cx231xx_gpio_i2c_write(dev, msg1->addr, msg1->buf, msg1->len); 295
284 status = dev->cx231xx_gpio_i2c_read(dev, msg2->addr, msg2->buf, msg2->len); 296 if (need_gpio) {
285 return status; 297 status =
286 } 298 dev->cx231xx_gpio_i2c_write(dev, msg1->addr,
287 } 299 msg1->buf,
288 } 300 msg1->len);
289 301 status =
290 /* prepare xfer_data struct */ 302 dev->cx231xx_gpio_i2c_read(dev, msg2->addr,
291 req_data.dev_addr = msg2->addr; 303 msg2->buf,
292 req_data.direction = msg2->flags; 304 msg2->len);
293 req_data.saddr_len = msg1->len; 305 return status;
294 req_data.saddr_dat = saddr; 306 }
295 req_data.buf_size = msg2->len; 307 }
296 req_data.p_buffer = msg2->buf; 308 }
297 309
298 /* usb send command */ 310 /* prepare xfer_data struct */
299 status = dev->cx231xx_send_usb_command(bus, &req_data); 311 req_data.dev_addr = msg2->addr;
300 312 req_data.direction = msg2->flags;
301 return status < 0 ? status: 0; 313 req_data.saddr_len = msg1->len;
314 req_data.saddr_dat = saddr;
315 req_data.buf_size = msg2->len;
316 req_data.p_buffer = msg2->buf;
317
318 /* usb send command */
319 status = dev->cx231xx_send_usb_command(bus, &req_data);
320
321 return status < 0 ? status : 0;
302} 322}
303 323
304/* 324/*
@@ -306,25 +326,25 @@ static int cx231xx_i2c_recv_bytes_with_saddr(struct i2c_adapter *i2c_adap,
306 * check if there is a i2c_device at the supplied address 326 * check if there is a i2c_device at the supplied address
307 */ 327 */
308static int cx231xx_i2c_check_for_device(struct i2c_adapter *i2c_adap, 328static int cx231xx_i2c_check_for_device(struct i2c_adapter *i2c_adap,
309 const struct i2c_msg *msg) 329 const struct i2c_msg *msg)
310{ 330{
311 struct cx231xx_i2c *bus = i2c_adap->algo_data; 331 struct cx231xx_i2c *bus = i2c_adap->algo_data;
312 struct cx231xx *dev = bus->dev; 332 struct cx231xx *dev = bus->dev;
313 struct cx231xx_i2c_xfer_data req_data; 333 struct cx231xx_i2c_xfer_data req_data;
314 int status = 0; 334 int status = 0;
315 335
316 /* prepare xfer_data struct */ 336 /* prepare xfer_data struct */
317 req_data.dev_addr = msg->addr; 337 req_data.dev_addr = msg->addr;
318 req_data.direction = msg->flags; 338 req_data.direction = msg->flags;
319 req_data.saddr_len = 0; 339 req_data.saddr_len = 0;
320 req_data.saddr_dat = 0; 340 req_data.saddr_dat = 0;
321 req_data.buf_size = 0; 341 req_data.buf_size = 0;
322 req_data.p_buffer = NULL; 342 req_data.p_buffer = NULL;
323 343
324 /* usb send command */ 344 /* usb send command */
325 status = dev->cx231xx_send_usb_command(bus, &req_data); 345 status = dev->cx231xx_send_usb_command(bus, &req_data);
326 346
327 return status < 0 ? status: 0; 347 return status < 0 ? status : 0;
328} 348}
329 349
330/* 350/*
@@ -332,7 +352,7 @@ static int cx231xx_i2c_check_for_device(struct i2c_adapter *i2c_adap,
332 * the main i2c transfer function 352 * the main i2c transfer function
333 */ 353 */
334static int cx231xx_i2c_xfer(struct i2c_adapter *i2c_adap, 354static int cx231xx_i2c_xfer(struct i2c_adapter *i2c_adap,
335 struct i2c_msg msgs[], int num) 355 struct i2c_msg msgs[], int num)
336{ 356{
337 struct cx231xx_i2c *bus = i2c_adap->algo_data; 357 struct cx231xx_i2c *bus = i2c_adap->algo_data;
338 struct cx231xx *dev = bus->dev; 358 struct cx231xx *dev = bus->dev;
@@ -348,7 +368,7 @@ static int cx231xx_i2c_xfer(struct i2c_adapter *i2c_adap,
348 dprintk2(2, "%s %s addr=%x len=%d:", 368 dprintk2(2, "%s %s addr=%x len=%d:",
349 (msgs[i].flags & I2C_M_RD) ? "read" : "write", 369 (msgs[i].flags & I2C_M_RD) ? "read" : "write",
350 i == num - 1 ? "stop" : "nonstop", addr, msgs[i].len); 370 i == num - 1 ? "stop" : "nonstop", addr, msgs[i].len);
351 if (!msgs[i].len) { /* no len: check only for device presence */ 371 if (!msgs[i].len) { /* no len: check only for device presence */
352 rc = cx231xx_i2c_check_for_device(i2c_adap, &msgs[i]); 372 rc = cx231xx_i2c_check_for_device(i2c_adap, &msgs[i]);
353 if (rc < 0) { 373 if (rc < 0) {
354 dprintk2(2, " no device\n"); 374 dprintk2(2, " no device\n");
@@ -363,21 +383,24 @@ static int cx231xx_i2c_xfer(struct i2c_adapter *i2c_adap,
363 printk(" %02x", msgs[i].buf[byte]); 383 printk(" %02x", msgs[i].buf[byte]);
364 } 384 }
365 } else if (i + 1 < num && (msgs[i + 1].flags & I2C_M_RD) && 385 } else if (i + 1 < num && (msgs[i + 1].flags & I2C_M_RD) &&
366 msgs[i].addr == msgs[i + 1].addr && (msgs[i].len <= 2) && (bus->nr < 2)) { 386 msgs[i].addr == msgs[i + 1].addr
387 && (msgs[i].len <= 2) && (bus->nr < 2)) {
367 /* read bytes */ 388 /* read bytes */
368 rc = cx231xx_i2c_recv_bytes_with_saddr(i2c_adap, &msgs[i], &msgs[i+1]); 389 rc = cx231xx_i2c_recv_bytes_with_saddr(i2c_adap,
390 &msgs[i],
391 &msgs[i + 1]);
369 if (i2c_debug >= 2) { 392 if (i2c_debug >= 2) {
370 for (byte = 0; byte < msgs[i].len; byte++) 393 for (byte = 0; byte < msgs[i].len; byte++)
371 printk(" %02x", msgs[i].buf[byte]); 394 printk(" %02x", msgs[i].buf[byte]);
372 } 395 }
373 i++; 396 i++;
374 } else { 397 } else {
375 /* write bytes */ 398 /* write bytes */
376 if (i2c_debug >= 2) { 399 if (i2c_debug >= 2) {
377 for (byte = 0; byte < msgs[i].len; byte++) 400 for (byte = 0; byte < msgs[i].len; byte++)
378 printk(" %02x", msgs[i].buf[byte]); 401 printk(" %02x", msgs[i].buf[byte]);
379 } 402 }
380 rc = cx231xx_i2c_send_bytes(i2c_adap,&msgs[i]); 403 rc = cx231xx_i2c_send_bytes(i2c_adap, &msgs[i]);
381 } 404 }
382 if (rc < 0) 405 if (rc < 0)
383 goto err; 406 goto err;
@@ -386,7 +409,7 @@ static int cx231xx_i2c_xfer(struct i2c_adapter *i2c_adap,
386 } 409 }
387 410
388 return num; 411 return num;
389err: 412 err:
390 dprintk2(2, " ERROR: %i\n", rc); 413 dprintk2(2, " ERROR: %i\n", rc);
391 return rc; 414 return rc;
392} 415}
@@ -408,7 +431,7 @@ static u32 functionality(struct i2c_adapter *adap)
408 */ 431 */
409static int attach_inform(struct i2c_client *client) 432static int attach_inform(struct i2c_client *client)
410{ 433{
411 struct cx231xx_i2c *bus = i2c_get_adapdata(client->adapter); 434 struct cx231xx_i2c *bus = i2c_get_adapdata(client->adapter);
412 struct cx231xx *dev = bus->dev; 435 struct cx231xx *dev = bus->dev;
413 436
414 switch (client->addr << 1) { 437 switch (client->addr << 1) {
@@ -422,16 +445,16 @@ static int attach_inform(struct i2c_client *client)
422 dprintk1(1, "attach_inform: eeprom detected.\n"); 445 dprintk1(1, "attach_inform: eeprom detected.\n");
423 break; 446 break;
424 case 0x60: 447 case 0x60:
425 dprintk1(1, "attach_inform: Colibri detected.\n"); 448 dprintk1(1, "attach_inform: Colibri detected.\n");
426 break;
427 case 0x8e:
428 {
429 struct IR_i2c *ir = i2c_get_clientdata(client);
430 dprintk1(1, "attach_inform: IR detected (%s).\n",
431 ir->phys);
432 cx231xx_set_ir(dev, ir);
433 break; 449 break;
434 } 450 case 0x8e:
451 {
452 struct IR_i2c *ir = i2c_get_clientdata(client);
453 dprintk1(1, "attach_inform: IR detected (%s).\n",
454 ir->phys);
455 cx231xx_set_ir(dev, ir);
456 break;
457 }
435 case 0x80: 458 case 0x80:
436 case 0x88: 459 case 0x88:
437 dprintk1(1, "attach_inform: Hammerhead detected.\n"); 460 dprintk1(1, "attach_inform: Hammerhead detected.\n");
@@ -442,7 +465,7 @@ static int attach_inform(struct i2c_client *client)
442 dev->tuner_addr = client->addr; 465 dev->tuner_addr = client->addr;
443 466
444 dprintk1(1, "attach inform: detected I2C address %x\n", 467 dprintk1(1, "attach inform: detected I2C address %x\n",
445 client->addr << 1); 468 client->addr << 1);
446 } 469 }
447 470
448 return 0; 471 return 0;
@@ -454,9 +477,8 @@ static int detach_inform(struct i2c_client *client)
454 return 0; 477 return 0;
455} 478}
456 479
457
458static struct i2c_algorithm cx231xx_algo = { 480static struct i2c_algorithm cx231xx_algo = {
459 .master_xfer = cx231xx_i2c_xfer, 481 .master_xfer = cx231xx_i2c_xfer,
460 .functionality = functionality, 482 .functionality = functionality,
461}; 483};
462 484
@@ -466,7 +488,7 @@ static struct i2c_adapter cx231xx_adap_template = {
466 .name = "cx231xx", 488 .name = "cx231xx",
467 .id = I2C_HW_B_CX231XX, 489 .id = I2C_HW_B_CX231XX,
468 .algo = &cx231xx_algo, 490 .algo = &cx231xx_algo,
469 .client_register = attach_inform, 491 .client_register = attach_inform,
470 .client_unregister = detach_inform, 492 .client_unregister = detach_inform,
471}; 493};
472 494
@@ -483,9 +505,9 @@ static struct i2c_client cx231xx_client_template = {
483static char *i2c_devs[128] = { 505static char *i2c_devs[128] = {
484 [0x60 >> 1] = "colibri", 506 [0x60 >> 1] = "colibri",
485 [0x88 >> 1] = "hammerhead", 507 [0x88 >> 1] = "hammerhead",
486 [0x8e >> 1] = "CIR", 508 [0x8e >> 1] = "CIR",
487 [0x32 >> 1] = "GeminiIII", 509 [0x32 >> 1] = "GeminiIII",
488 [0x02 >> 1] = "Aquarius", 510 [0x02 >> 1] = "Aquarius",
489 [0xa0 >> 1] = "eeprom", 511 [0xa0 >> 1] = "eeprom",
490 [0xc0 >> 1] = "tuner/XC3028", 512 [0xc0 >> 1] = "tuner/XC3028",
491 [0xc2 >> 1] = "tuner/XC5000", 513 [0xc2 >> 1] = "tuner/XC5000",
@@ -500,23 +522,25 @@ void cx231xx_do_i2c_scan(struct cx231xx *dev, struct i2c_client *c)
500 unsigned char buf; 522 unsigned char buf;
501 int i, rc; 523 int i, rc;
502 524
503 cx231xx_info(": Checking for I2C devices ..\n"); 525 cx231xx_info(": Checking for I2C devices ..\n");
504 for (i = 0; i < 128; i++) { 526 for (i = 0; i < 128; i++) {
505 c->addr = i; 527 c->addr = i;
506 rc = i2c_master_recv(c, &buf, 0); 528 rc = i2c_master_recv(c, &buf, 0);
507 if (rc < 0) 529 if (rc < 0)
508 continue; 530 continue;
509 cx231xx_info("%s: i2c scan: found device @ 0x%x [%s]\n", 531 cx231xx_info("%s: i2c scan: found device @ 0x%x [%s]\n",
510 dev->name, i << 1, i2c_devs[i] ? i2c_devs[i] : "???"); 532 dev->name, i << 1,
533 i2c_devs[i] ? i2c_devs[i] : "???");
511 } 534 }
512 cx231xx_info(": Completed Checking for I2C devices.\n"); 535 cx231xx_info(": Completed Checking for I2C devices.\n");
513} 536}
514 537
515/* 538/*
516 * cx231xx_i2c_call_clients() 539 * cx231xx_i2c_call_clients()
517 * send commands to all attached i2c devices 540 * send commands to all attached i2c devices
518 */ 541 */
519void cx231xx_i2c_call_clients(struct cx231xx_i2c *bus, unsigned int cmd, void *arg) 542void cx231xx_i2c_call_clients(struct cx231xx_i2c *bus, unsigned int cmd,
543 void *arg)
520{ 544{
521 /* struct cx231xx *dev = bus->dev; */ 545 /* struct cx231xx *dev = bus->dev; */
522 546
@@ -530,23 +554,20 @@ void cx231xx_i2c_call_clients(struct cx231xx_i2c *bus, unsigned int cmd, void *a
530 */ 554 */
531int cx231xx_i2c_register(struct cx231xx_i2c *bus) 555int cx231xx_i2c_register(struct cx231xx_i2c *bus)
532{ 556{
533 struct cx231xx *dev = bus->dev; 557 struct cx231xx *dev = bus->dev;
534 558
535 BUG_ON(!dev->cx231xx_send_usb_command); 559 BUG_ON(!dev->cx231xx_send_usb_command);
536 560
537 cx231xx_info("%s(bus = %d)\n", __func__, bus->nr); 561 cx231xx_info("%s(bus = %d)\n", __func__, bus->nr);
538 562
539 memcpy(&bus->i2c_adap, &cx231xx_adap_template, 563 memcpy(&bus->i2c_adap, &cx231xx_adap_template, sizeof(bus->i2c_adap));
540 sizeof(bus->i2c_adap)); 564 memcpy(&bus->i2c_algo, &cx231xx_algo, sizeof(bus->i2c_algo));
541 memcpy(&bus->i2c_algo, &cx231xx_algo,
542 sizeof(bus->i2c_algo));
543 memcpy(&bus->i2c_client, &cx231xx_client_template, 565 memcpy(&bus->i2c_client, &cx231xx_client_template,
544 sizeof(bus->i2c_client)); 566 sizeof(bus->i2c_client));
545 567
546 bus->i2c_adap.dev.parent = &dev->udev->dev; 568 bus->i2c_adap.dev.parent = &dev->udev->dev;
547 569
548 strlcpy(bus->i2c_adap.name, bus->dev->name, 570 strlcpy(bus->i2c_adap.name, bus->dev->name, sizeof(bus->i2c_adap.name));
549 sizeof(bus->i2c_adap.name));
550 571
551 bus->i2c_algo.data = bus; 572 bus->i2c_algo.data = bus;
552 bus->i2c_adap.algo_data = bus; 573 bus->i2c_adap.algo_data = bus;
@@ -561,7 +582,7 @@ int cx231xx_i2c_register(struct cx231xx_i2c *bus)
561 cx231xx_do_i2c_scan(dev, &bus->i2c_client); 582 cx231xx_do_i2c_scan(dev, &bus->i2c_client);
562 } else 583 } else
563 cx231xx_warn("%s: i2c bus %d register FAILED\n", 584 cx231xx_warn("%s: i2c bus %d register FAILED\n",
564 dev->name, bus->nr); 585 dev->name, bus->nr);
565 586
566 return bus->i2c_rc; 587 return bus->i2c_rc;
567} 588}
diff --git a/drivers/media/video/cx231xx/cx231xx-input.c b/drivers/media/video/cx231xx/cx231xx-input.c
index fdc37a838d10..68e95ea03b17 100644
--- a/drivers/media/video/cx231xx/cx231xx-input.c
+++ b/drivers/media/video/cx231xx/cx231xx-input.c
@@ -2,9 +2,9 @@
2 handle cx231xx IR remotes via linux kernel input layer. 2 handle cx231xx IR remotes via linux kernel input layer.
3 3
4 Copyright (C) 2008 <srinivasa.deevi at conexant dot com> 4 Copyright (C) 2008 <srinivasa.deevi at conexant dot com>
5 Based on em28xx driver 5 Based on em28xx driver
6 6
7 < This is a place holder for IR now.> 7 < This is a place holder for IR now.>
8 8
9 This program is free software; you can redistribute it and/or modify 9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by 10 it under the terms of the GNU General Public License as published by
@@ -30,7 +30,6 @@
30 30
31#include "cx231xx.h" 31#include "cx231xx.h"
32 32
33
34static unsigned int ir_debug; 33static unsigned int ir_debug;
35module_param(ir_debug, int, 0644); 34module_param(ir_debug, int, 0644);
36MODULE_PARM_DESC(ir_debug, "enable debug messages [IR]"); 35MODULE_PARM_DESC(ir_debug, "enable debug messages [IR]");
@@ -71,11 +70,9 @@ struct cx231xx_IR {
71 unsigned int last_readcount; 70 unsigned int last_readcount;
72 unsigned int repeat_interval; 71 unsigned int repeat_interval;
73 72
74 int (*get_key)(struct cx231xx_IR *, struct cx231xx_ir_poll_result *); 73 int (*get_key) (struct cx231xx_IR *, struct cx231xx_ir_poll_result *);
75}; 74};
76 75
77
78
79/********************************************************** 76/**********************************************************
80 Polling code for cx231xx 77 Polling code for cx231xx
81 **********************************************************/ 78 **********************************************************/
@@ -187,17 +184,16 @@ int cx231xx_ir_init(struct cx231xx *dev)
187 184
188 /* Setup the proper handler based on the chip */ 185 /* Setup the proper handler based on the chip */
189 switch (dev->chip_id) { 186 switch (dev->chip_id) {
190 default: 187 default:
191 printk("Unrecognized cx231xx chip id: IR not supported\n"); 188 printk("Unrecognized cx231xx chip id: IR not supported\n");
192 goto err_out_free; 189 goto err_out_free;
193 } 190 }
194 191
195 /* This is how often we ask the chip for IR information */ 192 /* This is how often we ask the chip for IR information */
196 ir->polling = 100; /* ms */ 193 ir->polling = 100; /* ms */
197 194
198 /* init input device */ 195 /* init input device */
199 snprintf(ir->name, sizeof(ir->name), "cx231xx IR (%s)", 196 snprintf(ir->name, sizeof(ir->name), "cx231xx IR (%s)", dev->name);
200 dev->name);
201 197
202 usb_make_path(dev->udev, ir->phys, sizeof(ir->phys)); 198 usb_make_path(dev->udev, ir->phys, sizeof(ir->phys));
203 strlcat(ir->phys, "/input0", sizeof(ir->phys)); 199 strlcat(ir->phys, "/input0", sizeof(ir->phys));
@@ -223,10 +219,10 @@ int cx231xx_ir_init(struct cx231xx *dev)
223 goto err_out_stop; 219 goto err_out_stop;
224 220
225 return 0; 221 return 0;
226 err_out_stop: 222 err_out_stop:
227 cx231xx_ir_stop(ir); 223 cx231xx_ir_stop(ir);
228 dev->ir = NULL; 224 dev->ir = NULL;
229 err_out_free: 225 err_out_free:
230 input_free_device(input_dev); 226 input_free_device(input_dev);
231 kfree(ir); 227 kfree(ir);
232 return err; 228 return err;
diff --git a/drivers/media/video/cx231xx/cx231xx-reg.h b/drivers/media/video/cx231xx/cx231xx-reg.h
index ef24781418e4..7c8ba4e053e7 100644
--- a/drivers/media/video/cx231xx/cx231xx-reg.h
+++ b/drivers/media/video/cx231xx/cx231xx-reg.h
@@ -22,7 +22,7 @@
22#define _CX231XX_REG_H 22#define _CX231XX_REG_H
23 23
24/***************************************************************************** 24/*****************************************************************************
25 * VBI codes * 25 * VBI codes *
26*****************************************************************************/ 26*****************************************************************************/
27 27
28#define SAV_ACTIVE_VIDEO_FIELD1 0x80 28#define SAV_ACTIVE_VIDEO_FIELD1 0x80
@@ -37,16 +37,16 @@
37#define SAV_VBLANK_FIELD2 0xE0 37#define SAV_VBLANK_FIELD2 0xE0
38#define EAV_VBLANK_FIELD2 0xF0 38#define EAV_VBLANK_FIELD2 0xF0
39 39
40#define SAV_VBI_FIELD1 0x20 40#define SAV_VBI_FIELD1 0x20
41#define EAV_VBI_FIELD1 0x30 41#define EAV_VBI_FIELD1 0x30
42 42
43#define SAV_VBI_FIELD2 0x60 43#define SAV_VBI_FIELD2 0x60
44#define EAV_VBI_FIELD2 0x70 44#define EAV_VBI_FIELD2 0x70
45 45
46/*****************************************************************************/ 46/*****************************************************************************/
47/* Audio ADC Registers */ 47/* Audio ADC Registers */
48#define CH_PWR_CTRL1 0x0000000E 48#define CH_PWR_CTRL1 0x0000000E
49#define CH_PWR_CTRL2 0x0000000F 49#define CH_PWR_CTRL2 0x0000000F
50/*****************************************************************************/ 50/*****************************************************************************/
51 51
52#define HOST_REG1 0x000 52#define HOST_REG1 0x000
@@ -60,7 +60,6 @@
60/*****************************************************************************/ 60/*****************************************************************************/
61#define HOST_REG2 0x001 61#define HOST_REG2 0x001
62 62
63
64/*****************************************************************************/ 63/*****************************************************************************/
65#define HOST_REG3 0x002 64#define HOST_REG3 0x002
66 65
@@ -231,7 +230,6 @@
231/* Reserved [3:1] */ 230/* Reserved [3:1] */
232#define FLD_CIR_TEST_DIS 0x00000001 231#define FLD_CIR_TEST_DIS 0x00000001
233 232
234
235/*****************************************************************************/ 233/*****************************************************************************/
236#define TEST_CTRL2 0x148 234#define TEST_CTRL2 0x148
237#define FLD_TSXCLK_POL_CTL 0x80000000 235#define FLD_TSXCLK_POL_CTL 0x80000000
@@ -257,7 +255,6 @@
257#define FLD_FLTRN_BIST_TST_DONE 0x00000008 255#define FLD_FLTRN_BIST_TST_DONE 0x00000008
258#define FLD_VID_BIST_TST_DONE 0x00000007 256#define FLD_VID_BIST_TST_DONE 0x00000007
259 257
260
261/*****************************************************************************/ 258/*****************************************************************************/
262/* DirectIF registers definition have been moved to DIF_reg.h */ 259/* DirectIF registers definition have been moved to DIF_reg.h */
263/*****************************************************************************/ 260/*****************************************************************************/
@@ -268,7 +265,7 @@
268#define FLD_AFD_FORCE_PAL 0x04000000 265#define FLD_AFD_FORCE_PAL 0x04000000
269#define FLD_AFD_PALM_SEL 0x03000000 266#define FLD_AFD_PALM_SEL 0x03000000
270#define FLD_CKILL_MODE 0x00300000 267#define FLD_CKILL_MODE 0x00300000
271#define FLD_COMB_NOTCH_MODE 0x00c00000 /* bit[19:18] */ 268#define FLD_COMB_NOTCH_MODE 0x00c00000 /* bit[19:18] */
272#define FLD_CLR_LOCK_STAT 0x00020000 269#define FLD_CLR_LOCK_STAT 0x00020000
273#define FLD_FAST_LOCK_MD 0x00010000 270#define FLD_FAST_LOCK_MD 0x00010000
274#define FLD_WCEN 0x00008000 271#define FLD_WCEN 0x00008000
@@ -662,7 +659,6 @@
662#define FLD_PLL_KI 0x00FF0000 659#define FLD_PLL_KI 0x00FF0000
663#define FLD_PLL_MAX_OFFSET 0x0000FFFF 660#define FLD_PLL_MAX_OFFSET 0x0000FFFF
664 661
665
666/*****************************************************************************/ 662/*****************************************************************************/
667#define HTL_CTRL 0x498 663#define HTL_CTRL 0x498
668/* Reserved [31:24] */ 664/* Reserved [31:24] */
@@ -771,13 +767,12 @@
771#define FLD_FIELD_PHASE_LIMIT 0x000000F0 767#define FLD_FIELD_PHASE_LIMIT 0x000000F0
772#define FLD_HEAD_SW_DET_LIMIT 0x0000000F 768#define FLD_HEAD_SW_DET_LIMIT 0x0000000F
773 769
774
775/*****************************************************************************/ 770/*****************************************************************************/
776#define DL_CTL 0x800 771#define DL_CTL 0x800
777#define DL_CTL_ADDRESS_LOW 0x800 /* Byte 1 in DL_CTL */ 772#define DL_CTL_ADDRESS_LOW 0x800 /* Byte 1 in DL_CTL */
778#define DL_CTL_ADDRESS_HIGH 0x801 /* Byte 2 in DL_CTL */ 773#define DL_CTL_ADDRESS_HIGH 0x801 /* Byte 2 in DL_CTL */
779#define DL_CTL_DATA 0x802 /* Byte 3 in DL_CTL */ 774#define DL_CTL_DATA 0x802 /* Byte 3 in DL_CTL */
780#define DL_CTL_CONTROL 0x803 /* Byte 4 in DL_CTL */ 775#define DL_CTL_CONTROL 0x803 /* Byte 4 in DL_CTL */
781/* Reserved [31:5] */ 776/* Reserved [31:5] */
782#define FLD_START_8051 0x10000000 777#define FLD_START_8051 0x10000000
783#define FLD_DL_ENABLE 0x08000000 778#define FLD_DL_ENABLE 0x08000000
@@ -795,8 +790,8 @@
795#define AUD_BUILD_NUM 0x806 790#define AUD_BUILD_NUM 0x806
796#define AUD_VER_NUM 0x807 791#define AUD_VER_NUM 0x807
797#define STD_DET_CTL 0x808 792#define STD_DET_CTL 0x808
798#define STD_DET_CTL_AUD_CTL 0x808 /* Byte 1 in STD_DET_CTL */ 793#define STD_DET_CTL_AUD_CTL 0x808 /* Byte 1 in STD_DET_CTL */
799#define STD_DET_CTL_PREF_MODE 0x809 /* Byte 2 in STD_DET_CTL */ 794#define STD_DET_CTL_PREF_MODE 0x809 /* Byte 2 in STD_DET_CTL */
800#define FLD_SPARE_CTL0 0xFF000000 795#define FLD_SPARE_CTL0 0xFF000000
801#define FLD_DIS_DBX 0x00800000 796#define FLD_DIS_DBX 0x00800000
802#define FLD_DIS_BTSC 0x00400000 797#define FLD_DIS_BTSC 0x00400000
@@ -1424,7 +1419,6 @@
1424#define FLD_I2S_OUT_WS_SEL 0x00000020 1419#define FLD_I2S_OUT_WS_SEL 0x00000020
1425#define FLD_I2S_OUT_BCN_DEL 0x0000001F 1420#define FLD_I2S_OUT_BCN_DEL 0x0000001F
1426 1421
1427
1428/*****************************************************************************/ 1422/*****************************************************************************/
1429#define AC97_CTL 0x91C 1423#define AC97_CTL 0x91C
1430/* Reserved [31:26] */ 1424/* Reserved [31:26] */
@@ -1437,7 +1431,6 @@
1437/* Reserved [7:1] */ 1431/* Reserved [7:1] */
1438#define FLD_AC97_SHUTDOWN 0x00000001 1432#define FLD_AC97_SHUTDOWN 0x00000001
1439 1433
1440
1441/* Cx231xx redefine */ 1434/* Cx231xx redefine */
1442#define QPSK_IAGC_CTL1 0x94c 1435#define QPSK_IAGC_CTL1 0x94c
1443#define QPSK_IAGC_CTL2 0x950 1436#define QPSK_IAGC_CTL2 0x950
@@ -1450,7 +1443,6 @@
1450#define QPSK_EQ_CTL 0x96c 1443#define QPSK_EQ_CTL 0x96c
1451#define QPSK_LOCK_CTL 0x970 1444#define QPSK_LOCK_CTL 0x970
1452 1445
1453
1454/*****************************************************************************/ 1446/*****************************************************************************/
1455#define FM1_DFT_CTL 0x9A8 1447#define FM1_DFT_CTL 0x9A8
1456#define FLD_FM1_DFT_THRESHOLD 0xFFFF0000 1448#define FLD_FM1_DFT_THRESHOLD 0xFFFF0000
@@ -1494,8 +1486,6 @@
1494/* Reserved [15:6] */ 1486/* Reserved [15:6] */
1495#define FLD_AFE_VGA_OUT 0x0000003F 1487#define FLD_AFE_VGA_OUT 0x0000003F
1496 1488
1497
1498
1499/*****************************************************************************/ 1489/*****************************************************************************/
1500#define MTS_GAIN_STATUS 0x9BC 1490#define MTS_GAIN_STATUS 0x9BC
1501/* Reserved [31:14] */ 1491/* Reserved [31:14] */
@@ -1538,19 +1528,18 @@
1538#define VID_FMT_SECAM 12 1528#define VID_FMT_SECAM 12
1539#define VID_FMT_SECAM_60 13 1529#define VID_FMT_SECAM_60 13
1540 1530
1541#define INPUT_MODE_CVBS_0 0 /* INPUT_MODE_VALUE(0) */ 1531#define INPUT_MODE_CVBS_0 0 /* INPUT_MODE_VALUE(0) */
1542#define INPUT_MODE_YC_1 1 /* INPUT_MODE_VALUE(1) */ 1532#define INPUT_MODE_YC_1 1 /* INPUT_MODE_VALUE(1) */
1543#define INPUT_MODE_YC2_2 2 /* INPUT_MODE_VALUE(2) */ 1533#define INPUT_MODE_YC2_2 2 /* INPUT_MODE_VALUE(2) */
1544#define INPUT_MODE_YUV_3 3 /* INPUT_MODE_VALUE(3) */ 1534#define INPUT_MODE_YUV_3 3 /* INPUT_MODE_VALUE(3) */
1545
1546 1535
1547#define LUMA_LPF_LOW_BANDPASS 0 /* 0.6Mhz lowpass filter bandwidth */ 1536#define LUMA_LPF_LOW_BANDPASS 0 /* 0.6Mhz lowpass filter bandwidth */
1548#define LUMA_LPF_MEDIUM_BANDPASS 1 /* 1.0Mhz lowpass filter bandwidth */ 1537#define LUMA_LPF_MEDIUM_BANDPASS 1 /* 1.0Mhz lowpass filter bandwidth */
1549#define LUMA_LPF_HIGH_BANDPASS 2 /* 1.5Mhz lowpass filter bandwidth */ 1538#define LUMA_LPF_HIGH_BANDPASS 2 /* 1.5Mhz lowpass filter bandwidth */
1550 1539
1551#define UV_LPF_LOW_BANDPASS 0 /* 0.6Mhz lowpass filter bandwidth */ 1540#define UV_LPF_LOW_BANDPASS 0 /* 0.6Mhz lowpass filter bandwidth */
1552#define UV_LPF_MEDIUM_BANDPASS 1 /* 1.0Mhz lowpass filter bandwidth */ 1541#define UV_LPF_MEDIUM_BANDPASS 1 /* 1.0Mhz lowpass filter bandwidth */
1553#define UV_LPF_HIGH_BANDPASS 2 /* 1.5Mhz lowpass filter bandwidth */ 1542#define UV_LPF_HIGH_BANDPASS 2 /* 1.5Mhz lowpass filter bandwidth */
1554 1543
1555#define TWO_TAP_FILT 0 1544#define TWO_TAP_FILT 0
1556#define THREE_TAP_FILT 1 1545#define THREE_TAP_FILT 1
diff --git a/drivers/media/video/cx231xx/cx231xx-vbi.c b/drivers/media/video/cx231xx/cx231xx-vbi.c
index e370160973f4..87a77d53faa6 100644
--- a/drivers/media/video/cx231xx/cx231xx-vbi.c
+++ b/drivers/media/video/cx231xx/cx231xx-vbi.c
@@ -2,7 +2,7 @@
2 cx231xx_vbi.c - driver for Conexant Cx23100/101/102 USB video capture devices 2 cx231xx_vbi.c - driver for Conexant Cx23100/101/102 USB video capture devices
3 3
4 Copyright (C) 2008 <srinivasa.deevi at conexant dot com> 4 Copyright (C) 2008 <srinivasa.deevi at conexant dot com>
5 Based on cx88 driver 5 Based on cx88 driver
6 6
7 This program is free software; you can redistribute it and/or modify 7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by 8 it under the terms of the GNU General Public License as published by
@@ -39,8 +39,7 @@
39#include "cx231xx.h" 39#include "cx231xx.h"
40#include "cx231xx-vbi.h" 40#include "cx231xx-vbi.h"
41 41
42static inline void print_err_status(struct cx231xx *dev, 42static inline void print_err_status(struct cx231xx *dev, int packet, int status)
43 int packet, int status)
44{ 43{
45 char *errmsg = "Unknown"; 44 char *errmsg = "Unknown";
46 45
@@ -71,10 +70,11 @@ static inline void print_err_status(struct cx231xx *dev,
71 break; 70 break;
72 } 71 }
73 if (packet < 0) { 72 if (packet < 0) {
74 cx231xx_err(DRIVER_NAME "URB status %d [%s].\n", status, errmsg); 73 cx231xx_err(DRIVER_NAME "URB status %d [%s].\n", status,
74 errmsg);
75 } else { 75 } else {
76 cx231xx_err(DRIVER_NAME "URB packet %d, status %d [%s].\n", 76 cx231xx_err(DRIVER_NAME "URB packet %d, status %d [%s].\n",
77 packet, status, errmsg); 77 packet, status, errmsg);
78 } 78 }
79} 79}
80 80
@@ -83,12 +83,12 @@ static inline void print_err_status(struct cx231xx *dev,
83 */ 83 */
84static inline int cx231xx_isoc_vbi_copy(struct cx231xx *dev, struct urb *urb) 84static inline int cx231xx_isoc_vbi_copy(struct cx231xx *dev, struct urb *urb)
85{ 85{
86 struct cx231xx_buffer *buf; 86 struct cx231xx_buffer *buf;
87 struct cx231xx_dmaqueue *dma_q = urb->context; 87 struct cx231xx_dmaqueue *dma_q = urb->context;
88 int rc = 1; 88 int rc = 1;
89 unsigned char *p_buffer; 89 unsigned char *p_buffer;
90 u32 bytes_parsed = 0, buffer_size = 0; 90 u32 bytes_parsed = 0, buffer_size = 0;
91 u8 sav_eav = 0; 91 u8 sav_eav = 0;
92 92
93 if (!dev) 93 if (!dev)
94 return 0; 94 return 0;
@@ -104,60 +104,58 @@ static inline int cx231xx_isoc_vbi_copy(struct cx231xx *dev, struct urb *urb)
104 104
105 buf = dev->vbi_mode.isoc_ctl.buf; 105 buf = dev->vbi_mode.isoc_ctl.buf;
106 106
107 /* get buffer pointer and length */ 107 /* get buffer pointer and length */
108 p_buffer = urb->transfer_buffer; 108 p_buffer = urb->transfer_buffer;
109 buffer_size = urb->actual_length; 109 buffer_size = urb->actual_length;
110 110
111 if (buffer_size > 0) { 111 if (buffer_size > 0) {
112 112
113 bytes_parsed = 0; 113 bytes_parsed = 0;
114 114
115 if(dma_q->is_partial_line) { 115 if (dma_q->is_partial_line) {
116 /* Handle the case where we were working on a partial line */ 116 /* Handle the case where we were working on a partial line */
117 sav_eav = dma_q->last_sav; 117 sav_eav = dma_q->last_sav;
118 } else { 118 } else {
119 /* Check for a SAV/EAV overlapping the buffer boundary */ 119 /* Check for a SAV/EAV overlapping the buffer boundary */
120 sav_eav = cx231xx_find_boundary_SAV_EAV(p_buffer, dma_q->partial_buf, &bytes_parsed); 120 sav_eav =
121 } 121 cx231xx_find_boundary_SAV_EAV(p_buffer,
122 122 dma_q->partial_buf,
123 sav_eav &= 0xF0; 123 &bytes_parsed);
124 /* Get the first line if we have some portion of an SAV/EAV from the last buffer 124 }
125 or a partial line */ 125
126 if(sav_eav) { 126 sav_eav &= 0xF0;
127 bytes_parsed += cx231xx_get_vbi_line(dev, dma_q, 127 /* Get the first line if we have some portion of an SAV/EAV from the last buffer
128 sav_eav, /* SAV/EAV */ 128 or a partial line */
129 p_buffer + bytes_parsed, /* p_buffer */ 129 if (sav_eav) {
130 buffer_size - bytes_parsed); /* buffer size */ 130 bytes_parsed += cx231xx_get_vbi_line(dev, dma_q, sav_eav, /* SAV/EAV */
131 } 131 p_buffer + bytes_parsed, /* p_buffer */
132 132 buffer_size - bytes_parsed); /* buffer size */
133 /* Now parse data that is completely in this buffer */ 133 }
134 dma_q->is_partial_line = 0; 134
135 135 /* Now parse data that is completely in this buffer */
136 while(bytes_parsed < buffer_size) 136 dma_q->is_partial_line = 0;
137 { 137
138 u32 bytes_used = 0; 138 while (bytes_parsed < buffer_size) {
139 139 u32 bytes_used = 0;
140 sav_eav = cx231xx_find_next_SAV_EAV( 140
141 p_buffer + bytes_parsed, /* p_buffer */ 141 sav_eav = cx231xx_find_next_SAV_EAV(p_buffer + bytes_parsed, /* p_buffer */
142 buffer_size - bytes_parsed, /* buffer size */ 142 buffer_size - bytes_parsed, /* buffer size */
143 &bytes_used); /* Receives bytes used to get SAV/EAV */ 143 &bytes_used); /* Receives bytes used to get SAV/EAV */
144 144
145 bytes_parsed += bytes_used; 145 bytes_parsed += bytes_used;
146 146
147 sav_eav &= 0xF0; 147 sav_eav &= 0xF0;
148 if(sav_eav && (bytes_parsed < buffer_size)) 148 if (sav_eav && (bytes_parsed < buffer_size)) {
149 { 149 bytes_parsed += cx231xx_get_vbi_line(dev, dma_q, sav_eav, /* SAV/EAV */
150 bytes_parsed += cx231xx_get_vbi_line(dev, dma_q, 150 p_buffer + bytes_parsed, /* p_buffer */
151 sav_eav, /* SAV/EAV */ 151 buffer_size - bytes_parsed); /* buffer size */
152 p_buffer + bytes_parsed, /* p_buffer */ 152 }
153 buffer_size - bytes_parsed); /* buffer size */ 153 }
154 } 154
155 } 155 /* Save the last four bytes of the buffer so we can check the buffer boundary
156 156 condition next time */
157 /* Save the last four bytes of the buffer so we can check the buffer boundary 157 memcpy(dma_q->partial_buf, p_buffer + buffer_size - 4, 4);
158 condition next time */ 158 bytes_parsed = 0;
159 memcpy(dma_q->partial_buf, p_buffer + buffer_size - 4, 4);
160 bytes_parsed = 0;
161 } 159 }
162 160
163 return rc; 161 return rc;
@@ -168,25 +166,26 @@ static inline int cx231xx_isoc_vbi_copy(struct cx231xx *dev, struct urb *urb)
168 ------------------------------------------------------------------*/ 166 ------------------------------------------------------------------*/
169 167
170static int 168static int
171vbi_buffer_setup(struct videobuf_queue *vq, unsigned int *count, unsigned int *size) 169vbi_buffer_setup(struct videobuf_queue *vq, unsigned int *count,
170 unsigned int *size)
172{ 171{
173 struct cx231xx_fh *fh = vq->priv_data; 172 struct cx231xx_fh *fh = vq->priv_data;
174 struct cx231xx *dev = fh->dev; 173 struct cx231xx *dev = fh->dev;
175 u32 height = 0; 174 u32 height = 0;
176 175
177 height = ((dev->norm & V4L2_STD_625_50) ? 176 height = ((dev->norm & V4L2_STD_625_50) ?
178 PAL_VBI_LINES : NTSC_VBI_LINES) ; 177 PAL_VBI_LINES : NTSC_VBI_LINES);
179 178
180 *size = ( dev->width * height * 2); 179 *size = (dev->width * height * 2);
181 if (0 == *count) 180 if (0 == *count)
182 *count = CX231XX_DEF_VBI_BUF; 181 *count = CX231XX_DEF_VBI_BUF;
183 182
184 if (*count < CX231XX_MIN_BUF) 183 if (*count < CX231XX_MIN_BUF)
185 *count = CX231XX_MIN_BUF; 184 *count = CX231XX_MIN_BUF;
186 185
187 /* call VBI setup if required */ 186 /* call VBI setup if required */
188 /* cx231xx_i2c_call_clients(&dev->i2c_bus[1], VIDIOC_S_FREQUENCY, &f); 187 /* cx231xx_i2c_call_clients(&dev->i2c_bus[1], VIDIOC_S_FREQUENCY, &f);
189 */ 188 */
190 189
191 return 0; 190 return 0;
192} 191}
@@ -194,8 +193,8 @@ vbi_buffer_setup(struct videobuf_queue *vq, unsigned int *count, unsigned int *s
194/* This is called *without* dev->slock held; please keep it that way */ 193/* This is called *without* dev->slock held; please keep it that way */
195static void free_buffer(struct videobuf_queue *vq, struct cx231xx_buffer *buf) 194static void free_buffer(struct videobuf_queue *vq, struct cx231xx_buffer *buf)
196{ 195{
197 struct cx231xx_fh *fh = vq->priv_data; 196 struct cx231xx_fh *fh = vq->priv_data;
198 struct cx231xx *dev = fh->dev; 197 struct cx231xx *dev = fh->dev;
199 unsigned long flags = 0; 198 unsigned long flags = 0;
200 if (in_interrupt()) 199 if (in_interrupt())
201 BUG(); 200 BUG();
@@ -208,7 +207,7 @@ static void free_buffer(struct videobuf_queue *vq, struct cx231xx_buffer *buf)
208 This should be safe; by the time we get here, the buffer isn't 207 This should be safe; by the time we get here, the buffer isn't
209 queued anymore. If we ever start marking the buffers as 208 queued anymore. If we ever start marking the buffers as
210 VIDEOBUF_ACTIVE, it won't be, though. 209 VIDEOBUF_ACTIVE, it won't be, though.
211 */ 210 */
212 spin_lock_irqsave(&dev->vbi_mode.slock, flags); 211 spin_lock_irqsave(&dev->vbi_mode.slock, flags);
213 if (dev->vbi_mode.isoc_ctl.buf == buf) 212 if (dev->vbi_mode.isoc_ctl.buf == buf)
214 dev->vbi_mode.isoc_ctl.buf = NULL; 213 dev->vbi_mode.isoc_ctl.buf = NULL;
@@ -220,25 +219,26 @@ static void free_buffer(struct videobuf_queue *vq, struct cx231xx_buffer *buf)
220 219
221static int 220static int
222vbi_buffer_prepare(struct videobuf_queue *vq, struct videobuf_buffer *vb, 221vbi_buffer_prepare(struct videobuf_queue *vq, struct videobuf_buffer *vb,
223 enum v4l2_field field) 222 enum v4l2_field field)
224{ 223{
225 struct cx231xx_fh *fh = vq->priv_data; 224 struct cx231xx_fh *fh = vq->priv_data;
226 struct cx231xx_buffer *buf = container_of(vb, struct cx231xx_buffer, vb); 225 struct cx231xx_buffer *buf =
227 struct cx231xx *dev = fh->dev; 226 container_of(vb, struct cx231xx_buffer, vb);
228 int rc = 0, urb_init = 0; 227 struct cx231xx *dev = fh->dev;
229 u32 height = 0; 228 int rc = 0, urb_init = 0;
229 u32 height = 0;
230 230
231 height = ((dev->norm & V4L2_STD_625_50) ? 231 height = ((dev->norm & V4L2_STD_625_50) ?
232 PAL_VBI_LINES : NTSC_VBI_LINES) ; 232 PAL_VBI_LINES : NTSC_VBI_LINES);
233 buf->vb.size = ( (dev->width << 1) * height ); 233 buf->vb.size = ((dev->width << 1) * height);
234 234
235 if (0 != buf->vb.baddr && buf->vb.bsize < buf->vb.size) 235 if (0 != buf->vb.baddr && buf->vb.bsize < buf->vb.size)
236 return -EINVAL; 236 return -EINVAL;
237 237
238 buf->vb.width = dev->width; 238 buf->vb.width = dev->width;
239 buf->vb.height = height; 239 buf->vb.height = height;
240 buf->vb.field = field; 240 buf->vb.field = field;
241 buf->vb.field = V4L2_FIELD_SEQ_TB; 241 buf->vb.field = V4L2_FIELD_SEQ_TB;
242 242
243 if (VIDEOBUF_NEEDS_INIT == buf->vb.state) { 243 if (VIDEOBUF_NEEDS_INIT == buf->vb.state) {
244 rc = videobuf_iolock(vq, &buf->vb, NULL); 244 rc = videobuf_iolock(vq, &buf->vb, NULL);
@@ -251,8 +251,9 @@ vbi_buffer_prepare(struct videobuf_queue *vq, struct videobuf_buffer *vb,
251 251
252 if (urb_init) { 252 if (urb_init) {
253 rc = cx231xx_init_vbi_isoc(dev, CX231XX_NUM_VBI_PACKETS, 253 rc = cx231xx_init_vbi_isoc(dev, CX231XX_NUM_VBI_PACKETS,
254 CX231XX_NUM_VBI_BUFS, dev->vbi_mode.alt_max_pkt_size[0], 254 CX231XX_NUM_VBI_BUFS,
255 cx231xx_isoc_vbi_copy); 255 dev->vbi_mode.alt_max_pkt_size[0],
256 cx231xx_isoc_vbi_copy);
256 if (rc < 0) 257 if (rc < 0)
257 goto fail; 258 goto fail;
258 } 259 }
@@ -260,7 +261,7 @@ vbi_buffer_prepare(struct videobuf_queue *vq, struct videobuf_buffer *vb,
260 buf->vb.state = VIDEOBUF_PREPARED; 261 buf->vb.state = VIDEOBUF_PREPARED;
261 return 0; 262 return 0;
262 263
263fail: 264 fail:
264 free_buffer(vq, buf); 265 free_buffer(vq, buf);
265 return rc; 266 return rc;
266} 267}
@@ -268,10 +269,11 @@ fail:
268static void 269static void
269vbi_buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb) 270vbi_buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb)
270{ 271{
271 struct cx231xx_buffer *buf = container_of(vb, struct cx231xx_buffer, vb); 272 struct cx231xx_buffer *buf =
272 struct cx231xx_fh *fh = vq->priv_data; 273 container_of(vb, struct cx231xx_buffer, vb);
273 struct cx231xx *dev = fh->dev; 274 struct cx231xx_fh *fh = vq->priv_data;
274 struct cx231xx_dmaqueue *vidq = &dev->vbi_mode.vidq; 275 struct cx231xx *dev = fh->dev;
276 struct cx231xx_dmaqueue *vidq = &dev->vbi_mode.vidq;
275 277
276 buf->vb.state = VIDEOBUF_QUEUED; 278 buf->vb.state = VIDEOBUF_QUEUED;
277 list_add_tail(&buf->vb.queue, &vidq->active); 279 list_add_tail(&buf->vb.queue, &vidq->active);
@@ -279,29 +281,27 @@ vbi_buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb)
279} 281}
280 282
281static void vbi_buffer_release(struct videobuf_queue *vq, 283static void vbi_buffer_release(struct videobuf_queue *vq,
282 struct videobuf_buffer *vb) 284 struct videobuf_buffer *vb)
283{ 285{
284 struct cx231xx_buffer *buf = container_of(vb, struct cx231xx_buffer, vb); 286 struct cx231xx_buffer *buf =
285 /* 287 container_of(vb, struct cx231xx_buffer, vb);
286 struct cx231xx_fh *fh = vq->priv_data; 288 /*
287 struct cx231xx *dev = (struct cx231xx *)fh->dev; 289 struct cx231xx_fh *fh = vq->priv_data;
290 struct cx231xx *dev = (struct cx231xx *)fh->dev;
288 291
289 cx231xx_info(DRIVER_NAME "cx231xx: called vbi_buffer_release\n"); 292 cx231xx_info(DRIVER_NAME "cx231xx: called vbi_buffer_release\n");
290 */ 293 */
291 294
292 free_buffer(vq, buf); 295 free_buffer(vq, buf);
293} 296}
294 297
295
296struct videobuf_queue_ops cx231xx_vbi_qops = { 298struct videobuf_queue_ops cx231xx_vbi_qops = {
297 .buf_setup = vbi_buffer_setup, 299 .buf_setup = vbi_buffer_setup,
298 .buf_prepare = vbi_buffer_prepare, 300 .buf_prepare = vbi_buffer_prepare,
299 .buf_queue = vbi_buffer_queue, 301 .buf_queue = vbi_buffer_queue,
300 .buf_release = vbi_buffer_release, 302 .buf_release = vbi_buffer_release,
301}; 303};
302 304
303
304
305/* ------------------------------------------------------------------ 305/* ------------------------------------------------------------------
306 URB control 306 URB control
307 ------------------------------------------------------------------*/ 307 ------------------------------------------------------------------*/
@@ -311,23 +311,24 @@ struct videobuf_queue_ops cx231xx_vbi_qops = {
311 */ 311 */
312static void cx231xx_irq_vbi_callback(struct urb *urb) 312static void cx231xx_irq_vbi_callback(struct urb *urb)
313{ 313{
314 struct cx231xx_dmaqueue *dma_q = urb->context; 314 struct cx231xx_dmaqueue *dma_q = urb->context;
315 struct cx231xx_video_mode *vmode = container_of(dma_q, struct cx231xx_video_mode, vidq); 315 struct cx231xx_video_mode *vmode =
316 struct cx231xx *dev = container_of(vmode, struct cx231xx, vbi_mode); 316 container_of(dma_q, struct cx231xx_video_mode, vidq);
317 struct cx231xx *dev = container_of(vmode, struct cx231xx, vbi_mode);
317 int rc; 318 int rc;
318 319
319 320 switch (urb->status) {
320 switch (urb->status) { 321 case 0: /* success */
321 case 0: /* success */ 322 case -ETIMEDOUT: /* NAK */
322 case -ETIMEDOUT: /* NAK */ 323 break;
323 break; 324 case -ECONNRESET: /* kill */
324 case -ECONNRESET: /* kill */ 325 case -ENOENT:
325 case -ENOENT: 326 case -ESHUTDOWN:
326 case -ESHUTDOWN: 327 return;
327 return; 328 default: /* error */
328 default: /* error */ 329 cx231xx_err(DRIVER_NAME "urb completition error %d.\n",
329 cx231xx_err(DRIVER_NAME "urb completition error %d.\n", urb->status); 330 urb->status);
330 break; 331 break;
331 } 332 }
332 333
333 /* Copy data from URB */ 334 /* Copy data from URB */
@@ -341,7 +342,7 @@ static void cx231xx_irq_vbi_callback(struct urb *urb)
341 urb->status = usb_submit_urb(urb, GFP_ATOMIC); 342 urb->status = usb_submit_urb(urb, GFP_ATOMIC);
342 if (urb->status) { 343 if (urb->status) {
343 cx231xx_err(DRIVER_NAME "urb resubmit failed (error=%i)\n", 344 cx231xx_err(DRIVER_NAME "urb resubmit failed (error=%i)\n",
344 urb->status); 345 urb->status);
345 } 346 }
346} 347}
347 348
@@ -353,21 +354,23 @@ void cx231xx_uninit_vbi_isoc(struct cx231xx *dev)
353 struct urb *urb; 354 struct urb *urb;
354 int i; 355 int i;
355 356
356 cx231xx_info(DRIVER_NAME "cx231xx: called cx231xx_uninit_vbi_isoc\n"); 357 cx231xx_info(DRIVER_NAME "cx231xx: called cx231xx_uninit_vbi_isoc\n");
357 358
358 dev->vbi_mode.isoc_ctl.nfields = -1; 359 dev->vbi_mode.isoc_ctl.nfields = -1;
359 for (i = 0; i < dev->vbi_mode.isoc_ctl.num_bufs; i++) { 360 for (i = 0; i < dev->vbi_mode.isoc_ctl.num_bufs; i++) {
360 urb = dev->vbi_mode.isoc_ctl.urb[i]; 361 urb = dev->vbi_mode.isoc_ctl.urb[i];
361 if (urb) { 362 if (urb) {
362 if (!irqs_disabled()) 363 if (!irqs_disabled())
363 usb_kill_urb(urb); 364 usb_kill_urb(urb);
364 else 365 else
365 usb_unlink_urb(urb); 366 usb_unlink_urb(urb);
366 367
367 if (dev->vbi_mode.isoc_ctl.transfer_buffer[i]) { 368 if (dev->vbi_mode.isoc_ctl.transfer_buffer[i]) {
368 369
369 kfree(dev->vbi_mode.isoc_ctl.transfer_buffer[i]); 370 kfree(dev->vbi_mode.isoc_ctl.
370 dev->vbi_mode.isoc_ctl.transfer_buffer[i] = NULL; 371 transfer_buffer[i]);
372 dev->vbi_mode.isoc_ctl.transfer_buffer[i] =
373 NULL;
371 } 374 }
372 usb_free_urb(urb); 375 usb_free_urb(urb);
373 dev->vbi_mode.isoc_ctl.urb[i] = NULL; 376 dev->vbi_mode.isoc_ctl.urb[i] = NULL;
@@ -384,14 +387,16 @@ void cx231xx_uninit_vbi_isoc(struct cx231xx *dev)
384 387
385 cx231xx_capture_start(dev, 0, Vbi); 388 cx231xx_capture_start(dev, 0, Vbi);
386} 389}
390
387EXPORT_SYMBOL_GPL(cx231xx_uninit_vbi_isoc); 391EXPORT_SYMBOL_GPL(cx231xx_uninit_vbi_isoc);
388 392
389/* 393/*
390 * Allocate URBs and start IRQ 394 * Allocate URBs and start IRQ
391 */ 395 */
392int cx231xx_init_vbi_isoc(struct cx231xx *dev, int max_packets, 396int cx231xx_init_vbi_isoc(struct cx231xx *dev, int max_packets,
393 int num_bufs, int max_pkt_size, 397 int num_bufs, int max_pkt_size,
394 int (*isoc_copy) (struct cx231xx *dev, struct urb *urb)) 398 int (*isoc_copy) (struct cx231xx * dev,
399 struct urb * urb))
395{ 400{
396 struct cx231xx_dmaqueue *dma_q = &dev->vbi_mode.vidq; 401 struct cx231xx_dmaqueue *dma_q = &dev->vbi_mode.vidq;
397 int i; 402 int i;
@@ -404,31 +409,33 @@ int cx231xx_init_vbi_isoc(struct cx231xx *dev, int max_packets,
404 /* De-allocates all pending stuff */ 409 /* De-allocates all pending stuff */
405 cx231xx_uninit_vbi_isoc(dev); 410 cx231xx_uninit_vbi_isoc(dev);
406 411
407 /* clear if any halt */ 412 /* clear if any halt */
408 usb_clear_halt(dev->udev, usb_rcvbulkpipe(dev->udev, dev->vbi_mode.end_point_addr)); 413 usb_clear_halt(dev->udev,
409 414 usb_rcvbulkpipe(dev->udev,
415 dev->vbi_mode.end_point_addr));
410 416
411 dev->vbi_mode.isoc_ctl.isoc_copy = isoc_copy; 417 dev->vbi_mode.isoc_ctl.isoc_copy = isoc_copy;
412 dev->vbi_mode.isoc_ctl.num_bufs = num_bufs; 418 dev->vbi_mode.isoc_ctl.num_bufs = num_bufs;
413 dma_q->pos = 0; 419 dma_q->pos = 0;
414 dma_q->is_partial_line = 0; 420 dma_q->is_partial_line = 0;
415 dma_q->last_sav = 0; 421 dma_q->last_sav = 0;
416 dma_q->current_field = -1; 422 dma_q->current_field = -1;
417 dma_q->bytes_left_in_line = dev->width << 1; 423 dma_q->bytes_left_in_line = dev->width << 1;
418 dma_q->lines_per_field = ((dev->norm & V4L2_STD_625_50) ? 424 dma_q->lines_per_field = ((dev->norm & V4L2_STD_625_50) ?
419 PAL_VBI_LINES : NTSC_VBI_LINES) ; 425 PAL_VBI_LINES : NTSC_VBI_LINES);
420 dma_q->lines_completed = 0; 426 dma_q->lines_completed = 0;
421 for(i = 0; i < 8 ; i++) 427 for (i = 0; i < 8; i++)
422 dma_q->partial_buf[i] = 0; 428 dma_q->partial_buf[i] = 0;
423 429
424 dev->vbi_mode.isoc_ctl.urb = kzalloc(sizeof(void *)*num_bufs, GFP_KERNEL); 430 dev->vbi_mode.isoc_ctl.urb =
431 kzalloc(sizeof(void *) * num_bufs, GFP_KERNEL);
425 if (!dev->vbi_mode.isoc_ctl.urb) { 432 if (!dev->vbi_mode.isoc_ctl.urb) {
426 cx231xx_errdev("cannot alloc memory for usb buffers\n"); 433 cx231xx_errdev("cannot alloc memory for usb buffers\n");
427 return -ENOMEM; 434 return -ENOMEM;
428 } 435 }
429 436
430 dev->vbi_mode.isoc_ctl.transfer_buffer = kzalloc(sizeof(void *)*num_bufs, 437 dev->vbi_mode.isoc_ctl.transfer_buffer =
431 GFP_KERNEL); 438 kzalloc(sizeof(void *) * num_bufs, GFP_KERNEL);
432 if (!dev->vbi_mode.isoc_ctl.transfer_buffer) { 439 if (!dev->vbi_mode.isoc_ctl.transfer_buffer) {
433 cx231xx_errdev("cannot allocate memory for usbtransfer\n"); 440 cx231xx_errdev("cannot allocate memory for usbtransfer\n");
434 kfree(dev->vbi_mode.isoc_ctl.urb); 441 kfree(dev->vbi_mode.isoc_ctl.urb);
@@ -445,27 +452,29 @@ int cx231xx_init_vbi_isoc(struct cx231xx *dev, int max_packets,
445 452
446 urb = usb_alloc_urb(0, GFP_KERNEL); 453 urb = usb_alloc_urb(0, GFP_KERNEL);
447 if (!urb) { 454 if (!urb) {
448 cx231xx_err(DRIVER_NAME ": cannot alloc isoc_ctl.urb %i\n", i); 455 cx231xx_err(DRIVER_NAME
456 ": cannot alloc isoc_ctl.urb %i\n", i);
449 cx231xx_uninit_vbi_isoc(dev); 457 cx231xx_uninit_vbi_isoc(dev);
450 return -ENOMEM; 458 return -ENOMEM;
451 } 459 }
452 dev->vbi_mode.isoc_ctl.urb[i] = urb; 460 dev->vbi_mode.isoc_ctl.urb[i] = urb;
453 urb->transfer_flags = 0; 461 urb->transfer_flags = 0;
454 462
455 dev->vbi_mode.isoc_ctl.transfer_buffer[i] = kzalloc(sb_size, GFP_KERNEL); 463 dev->vbi_mode.isoc_ctl.transfer_buffer[i] =
464 kzalloc(sb_size, GFP_KERNEL);
456 if (!dev->vbi_mode.isoc_ctl.transfer_buffer[i]) { 465 if (!dev->vbi_mode.isoc_ctl.transfer_buffer[i]) {
457 cx231xx_err(DRIVER_NAME ": unable to allocate %i bytes for transfer" 466 cx231xx_err(DRIVER_NAME
458 " buffer %i%s\n", 467 ": unable to allocate %i bytes for transfer"
459 sb_size, i, 468 " buffer %i%s\n", sb_size, i,
460 in_interrupt()?" while in int":""); 469 in_interrupt()? " while in int" : "");
461 cx231xx_uninit_vbi_isoc(dev); 470 cx231xx_uninit_vbi_isoc(dev);
462 return -ENOMEM; 471 return -ENOMEM;
463 } 472 }
464 473
465 pipe = usb_rcvbulkpipe(dev->udev, dev->vbi_mode.end_point_addr); 474 pipe = usb_rcvbulkpipe(dev->udev, dev->vbi_mode.end_point_addr);
466 usb_fill_bulk_urb(urb, dev->udev, pipe, 475 usb_fill_bulk_urb(urb, dev->udev, pipe,
467 dev->vbi_mode.isoc_ctl.transfer_buffer[i], sb_size, 476 dev->vbi_mode.isoc_ctl.transfer_buffer[i],
468 cx231xx_irq_vbi_callback, dma_q); 477 sb_size, cx231xx_irq_vbi_callback, dma_q);
469 } 478 }
470 479
471 init_waitqueue_head(&dma_q->wq); 480 init_waitqueue_head(&dma_q->wq);
@@ -474,55 +483,58 @@ int cx231xx_init_vbi_isoc(struct cx231xx *dev, int max_packets,
474 for (i = 0; i < dev->vbi_mode.isoc_ctl.num_bufs; i++) { 483 for (i = 0; i < dev->vbi_mode.isoc_ctl.num_bufs; i++) {
475 rc = usb_submit_urb(dev->vbi_mode.isoc_ctl.urb[i], GFP_ATOMIC); 484 rc = usb_submit_urb(dev->vbi_mode.isoc_ctl.urb[i], GFP_ATOMIC);
476 if (rc) { 485 if (rc) {
477 cx231xx_err(DRIVER_NAME ": submit of urb %i failed (error=%i)\n", i, 486 cx231xx_err(DRIVER_NAME
478 rc); 487 ": submit of urb %i failed (error=%i)\n", i,
488 rc);
479 cx231xx_uninit_vbi_isoc(dev); 489 cx231xx_uninit_vbi_isoc(dev);
480 return rc; 490 return rc;
481 } 491 }
482 } 492 }
483 493
484 cx231xx_capture_start(dev, 1, Vbi); 494 cx231xx_capture_start(dev, 1, Vbi);
485 495
486 return 0; 496 return 0;
487} 497}
488EXPORT_SYMBOL_GPL(cx231xx_init_vbi_isoc);
489 498
499EXPORT_SYMBOL_GPL(cx231xx_init_vbi_isoc);
490 500
491u32 cx231xx_get_vbi_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q, 501u32 cx231xx_get_vbi_line(struct cx231xx * dev, struct cx231xx_dmaqueue * dma_q,
492 u8 sav_eav, u8 *p_buffer, u32 buffer_size) 502 u8 sav_eav, u8 * p_buffer, u32 buffer_size)
493{ 503{
494 u32 bytes_copied = 0; 504 u32 bytes_copied = 0;
495 int current_field = -1; 505 int current_field = -1;
496 506
497 switch(sav_eav) { 507 switch (sav_eav) {
498 508
499 case SAV_VBI_FIELD1: 509 case SAV_VBI_FIELD1:
500 current_field = 1; 510 current_field = 1;
501 break; 511 break;
502 512
503 case SAV_VBI_FIELD2: 513 case SAV_VBI_FIELD2:
504 current_field = 2; 514 current_field = 2;
505 break; 515 break;
506 default: 516 default:
507 break; 517 break;
508 } 518 }
509 519
510 if(current_field < 0 ) 520 if (current_field < 0)
511 return bytes_copied; 521 return bytes_copied;
512 522
513 dma_q->last_sav = sav_eav; 523 dma_q->last_sav = sav_eav;
514 524
515 bytes_copied = cx231xx_copy_vbi_line(dev, dma_q, p_buffer, buffer_size, current_field); 525 bytes_copied =
526 cx231xx_copy_vbi_line(dev, dma_q, p_buffer, buffer_size,
527 current_field);
516 528
517 return bytes_copied; 529 return bytes_copied;
518} 530}
519 531
520/* 532/*
521 * Announces that a buffer were filled and request the next 533 * Announces that a buffer were filled and request the next
522 */ 534 */
523static inline void vbi_buffer_filled(struct cx231xx *dev, 535static inline void vbi_buffer_filled(struct cx231xx *dev,
524 struct cx231xx_dmaqueue *dma_q, 536 struct cx231xx_dmaqueue *dma_q,
525 struct cx231xx_buffer *buf) 537 struct cx231xx_buffer *buf)
526{ 538{
527 /* Advice that buffer was filled */ 539 /* Advice that buffer was filled */
528 /* cx231xx_info(DRIVER_NAME "[%p/%d] wakeup\n", buf, buf->vb.i); */ 540 /* cx231xx_info(DRIVER_NAME "[%p/%d] wakeup\n", buf, buf->vb.i); */
@@ -537,80 +549,83 @@ static inline void vbi_buffer_filled(struct cx231xx *dev,
537 wake_up(&buf->vb.done); 549 wake_up(&buf->vb.done);
538} 550}
539 551
540u32 cx231xx_copy_vbi_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q, 552u32 cx231xx_copy_vbi_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q,
541 u8 *p_line, u32 length, int field_number) 553 u8 * p_line, u32 length, int field_number)
542{ 554{
543 u32 bytes_to_copy; 555 u32 bytes_to_copy;
544 struct cx231xx_buffer *buf; 556 struct cx231xx_buffer *buf;
545 u32 _line_size = dev->width * 2; 557 u32 _line_size = dev->width * 2;
546 558
547 if( dma_q->current_field != field_number ) { 559 if (dma_q->current_field != field_number) {
548 cx231xx_reset_vbi_buffer(dev, dma_q); 560 cx231xx_reset_vbi_buffer(dev, dma_q);
549 } 561 }
550 562
551 /* get the buffer pointer */ 563 /* get the buffer pointer */
552 buf = dev->vbi_mode.isoc_ctl.buf; 564 buf = dev->vbi_mode.isoc_ctl.buf;
553 565
554 /* Remember the field number for next time */ 566 /* Remember the field number for next time */
555 dma_q->current_field = field_number; 567 dma_q->current_field = field_number;
556 568
557 bytes_to_copy = dma_q->bytes_left_in_line; 569 bytes_to_copy = dma_q->bytes_left_in_line;
558 if(bytes_to_copy > length) 570 if (bytes_to_copy > length)
559 bytes_to_copy = length; 571 bytes_to_copy = length;
560 572
561 if(dma_q->lines_completed >= dma_q->lines_per_field) { 573 if (dma_q->lines_completed >= dma_q->lines_per_field) {
562 dma_q->bytes_left_in_line -= bytes_to_copy; 574 dma_q->bytes_left_in_line -= bytes_to_copy;
563 dma_q->is_partial_line = (dma_q->bytes_left_in_line == 0) ? 0 : 1; 575 dma_q->is_partial_line =
564 return 0; 576 (dma_q->bytes_left_in_line == 0) ? 0 : 1;
565 } 577 return 0;
578 }
566 579
567 dma_q->is_partial_line = 1; 580 dma_q->is_partial_line = 1;
568 581
569 /* If we don't have a buffer, just return the number of bytes we would 582 /* If we don't have a buffer, just return the number of bytes we would
570 have copied if we had a buffer. */ 583 have copied if we had a buffer. */
571 if(!buf) { 584 if (!buf) {
572 dma_q->bytes_left_in_line -= bytes_to_copy; 585 dma_q->bytes_left_in_line -= bytes_to_copy;
573 dma_q->is_partial_line = (dma_q->bytes_left_in_line == 0) ? 0 : 1; 586 dma_q->is_partial_line =
574 return bytes_to_copy; 587 (dma_q->bytes_left_in_line == 0) ? 0 : 1;
575 } 588 return bytes_to_copy;
589 }
576 590
577 /* copy the data to video buffer */ 591 /* copy the data to video buffer */
578 cx231xx_do_vbi_copy(dev, dma_q, p_line, bytes_to_copy); 592 cx231xx_do_vbi_copy(dev, dma_q, p_line, bytes_to_copy);
579 593
580 dma_q->pos += bytes_to_copy; 594 dma_q->pos += bytes_to_copy;
581 dma_q->bytes_left_in_line -= bytes_to_copy; 595 dma_q->bytes_left_in_line -= bytes_to_copy;
582 596
583 if(dma_q->bytes_left_in_line == 0) { 597 if (dma_q->bytes_left_in_line == 0) {
584 598
585 dma_q->bytes_left_in_line = _line_size; 599 dma_q->bytes_left_in_line = _line_size;
586 dma_q->lines_completed++; 600 dma_q->lines_completed++;
587 dma_q->is_partial_line = 0; 601 dma_q->is_partial_line = 0;
588 602
589 if(cx231xx_is_vbi_buffer_done(dev, dma_q) && buf ) { 603 if (cx231xx_is_vbi_buffer_done(dev, dma_q) && buf) {
590 604
591 vbi_buffer_filled(dev, dma_q, buf); 605 vbi_buffer_filled(dev, dma_q, buf);
592 606
593 dma_q->pos = 0; 607 dma_q->pos = 0;
594 buf = NULL; 608 buf = NULL;
595 dma_q->lines_completed = 0; 609 dma_q->lines_completed = 0;
596 } 610 }
597 } 611 }
598 612
599 return bytes_to_copy; 613 return bytes_to_copy;
600} 614}
601 615
602/* 616/*
603 * video-buf generic routine to get the next available buffer 617 * video-buf generic routine to get the next available buffer
604 */ 618 */
605static inline void get_next_vbi_buf(struct cx231xx_dmaqueue *dma_q, 619static inline void get_next_vbi_buf(struct cx231xx_dmaqueue *dma_q,
606 struct cx231xx_buffer **buf) 620 struct cx231xx_buffer **buf)
607{ 621{
608 struct cx231xx_video_mode *vmode = container_of(dma_q, struct cx231xx_video_mode, vidq); 622 struct cx231xx_video_mode *vmode =
609 struct cx231xx *dev = container_of(vmode, struct cx231xx, vbi_mode); 623 container_of(dma_q, struct cx231xx_video_mode, vidq);
624 struct cx231xx *dev = container_of(vmode, struct cx231xx, vbi_mode);
610 char *outp; 625 char *outp;
611 626
612 if (list_empty(&dma_q->active)) { 627 if (list_empty(&dma_q->active)) {
613 cx231xx_err(DRIVER_NAME ": No active queue to serve\n"); 628 cx231xx_err(DRIVER_NAME ": No active queue to serve\n");
614 dev->vbi_mode.isoc_ctl.buf = NULL; 629 dev->vbi_mode.isoc_ctl.buf = NULL;
615 *buf = NULL; 630 *buf = NULL;
616 return; 631 return;
@@ -628,66 +643,70 @@ static inline void get_next_vbi_buf(struct cx231xx_dmaqueue *dma_q,
628 return; 643 return;
629} 644}
630 645
631 646void cx231xx_reset_vbi_buffer(struct cx231xx *dev,
632void cx231xx_reset_vbi_buffer(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q) 647 struct cx231xx_dmaqueue *dma_q)
633{ 648{
634 struct cx231xx_buffer *buf; 649 struct cx231xx_buffer *buf;
635 650
636 buf = dev->vbi_mode.isoc_ctl.buf; 651 buf = dev->vbi_mode.isoc_ctl.buf;
637 652
638 if(buf == NULL) { 653 if (buf == NULL) {
639 654
640 /* first try to get the buffer */ 655 /* first try to get the buffer */
641 get_next_vbi_buf(dma_q, &buf); 656 get_next_vbi_buf(dma_q, &buf);
642 657
643 dma_q->pos = 0; 658 dma_q->pos = 0;
644 dma_q->current_field = -1; 659 dma_q->current_field = -1;
645 } 660 }
646 661
647 dma_q->bytes_left_in_line = dev->width << 1; 662 dma_q->bytes_left_in_line = dev->width << 1;
648 dma_q->lines_completed = 0; 663 dma_q->lines_completed = 0;
649} 664}
650 665
651int cx231xx_do_vbi_copy(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q, 666int cx231xx_do_vbi_copy(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q,
652 u8 *p_buffer, u32 bytes_to_copy) 667 u8 * p_buffer, u32 bytes_to_copy)
653{ 668{
654 u8 *p_out_buffer = NULL; 669 u8 *p_out_buffer = NULL;
655 u32 current_line_bytes_copied = 0; 670 u32 current_line_bytes_copied = 0;
656 struct cx231xx_buffer *buf; 671 struct cx231xx_buffer *buf;
657 u32 _line_size = dev->width << 1; 672 u32 _line_size = dev->width << 1;
658 void *startwrite; 673 void *startwrite;
659 int offset, lencopy; 674 int offset, lencopy;
660 675
661 buf = dev->vbi_mode.isoc_ctl.buf; 676 buf = dev->vbi_mode.isoc_ctl.buf;
662 677
663 if (buf == NULL) { 678 if (buf == NULL) {
664 return -1; 679 return -1;
665 } 680 }
666 681
667 p_out_buffer = videobuf_to_vmalloc(&buf->vb); 682 p_out_buffer = videobuf_to_vmalloc(&buf->vb);
668 683
669 if(dma_q->bytes_left_in_line != _line_size ) { 684 if (dma_q->bytes_left_in_line != _line_size) {
670 current_line_bytes_copied = _line_size - dma_q->bytes_left_in_line; 685 current_line_bytes_copied =
671 } 686 _line_size - dma_q->bytes_left_in_line;
687 }
672 688
673 offset = ( dma_q->lines_completed * _line_size ) + current_line_bytes_copied; 689 offset =
690 (dma_q->lines_completed * _line_size) + current_line_bytes_copied;
674 691
675 /* prepare destination address */ 692 /* prepare destination address */
676 startwrite = p_out_buffer + offset; 693 startwrite = p_out_buffer + offset;
677 694
678 lencopy = dma_q->bytes_left_in_line > bytes_to_copy ? bytes_to_copy : dma_q->bytes_left_in_line; 695 lencopy =
696 dma_q->bytes_left_in_line >
697 bytes_to_copy ? bytes_to_copy : dma_q->bytes_left_in_line;
679 698
680 memcpy(startwrite, p_buffer, lencopy); 699 memcpy(startwrite, p_buffer, lencopy);
681 700
682 return 0; 701 return 0;
683} 702}
684 703
685 704u8 cx231xx_is_vbi_buffer_done(struct cx231xx * dev,
686u8 cx231xx_is_vbi_buffer_done(struct cx231xx *dev,struct cx231xx_dmaqueue *dma_q) 705 struct cx231xx_dmaqueue * dma_q)
687{ 706{
688 u32 height = 0; 707 u32 height = 0;
689 708
690 height = ((dev->norm & V4L2_STD_625_50) ? 709 height = ((dev->norm & V4L2_STD_625_50) ?
691 PAL_VBI_LINES : NTSC_VBI_LINES) ; 710 PAL_VBI_LINES : NTSC_VBI_LINES);
692 return (dma_q->lines_completed == height)?1:0; 711 return (dma_q->lines_completed == height) ? 1 : 0;
693} 712}
diff --git a/drivers/media/video/cx231xx/cx231xx-vbi.h b/drivers/media/video/cx231xx/cx231xx-vbi.h
index 2a9e4a1668bf..c0d89b1e2725 100644
--- a/drivers/media/video/cx231xx/cx231xx-vbi.h
+++ b/drivers/media/video/cx231xx/cx231xx-vbi.h
@@ -2,7 +2,7 @@
2 cx231xx_vbi.h - driver for Conexant Cx23100/101/102 USB video capture devices 2 cx231xx_vbi.h - driver for Conexant Cx23100/101/102 USB video capture devices
3 3
4 Copyright (C) 2008 <srinivasa.deevi at conexant dot com> 4 Copyright (C) 2008 <srinivasa.deevi at conexant dot com>
5 Based on cx88 driver 5 Based on cx88 driver
6 6
7 This program is free software; you can redistribute it and/or modify 7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by 8 it under the terms of the GNU General Public License as published by
@@ -24,8 +24,7 @@
24 24
25extern struct videobuf_queue_ops cx231xx_vbi_qops; 25extern struct videobuf_queue_ops cx231xx_vbi_qops;
26 26
27 27#define NTSC_VBI_START_LINE 10 /* line 10 - 21 */
28#define NTSC_VBI_START_LINE 10 /* line 10 - 21 */
29#define NTSC_VBI_END_LINE 21 28#define NTSC_VBI_END_LINE 21
30#define NTSC_VBI_LINES (NTSC_VBI_END_LINE - NTSC_VBI_START_LINE + 1) 29#define NTSC_VBI_LINES (NTSC_VBI_END_LINE - NTSC_VBI_START_LINE + 1)
31 30
@@ -41,21 +40,24 @@ extern struct videobuf_queue_ops cx231xx_vbi_qops;
41 40
42/* stream functions */ 41/* stream functions */
43int cx231xx_init_vbi_isoc(struct cx231xx *dev, int max_packets, 42int cx231xx_init_vbi_isoc(struct cx231xx *dev, int max_packets,
44 int num_bufs, int max_pkt_size, 43 int num_bufs, int max_pkt_size,
45 int (*isoc_copy) (struct cx231xx *dev, struct urb *urb)); 44 int (*isoc_copy) (struct cx231xx * dev,
45 struct urb * urb));
46 46
47void cx231xx_uninit_vbi_isoc(struct cx231xx *dev); 47void cx231xx_uninit_vbi_isoc(struct cx231xx *dev);
48 48
49/* vbi data copy functions */ 49/* vbi data copy functions */
50u32 cx231xx_get_vbi_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q, 50u32 cx231xx_get_vbi_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q,
51 u8 sav_eav, u8 *p_buffer, u32 buffer_size); 51 u8 sav_eav, u8 * p_buffer, u32 buffer_size);
52u32 cx231xx_copy_vbi_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q, 52u32 cx231xx_copy_vbi_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q,
53 u8 *p_line, u32 length, int field_number); 53 u8 * p_line, u32 length, int field_number);
54void cx231xx_reset_vbi_buffer(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q); 54void cx231xx_reset_vbi_buffer(struct cx231xx *dev,
55 struct cx231xx_dmaqueue *dma_q);
55 56
56int cx231xx_do_vbi_copy(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q, 57int cx231xx_do_vbi_copy(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q,
57 u8 *p_buffer, u32 bytes_to_copy); 58 u8 * p_buffer, u32 bytes_to_copy);
58 59
59u8 cx231xx_is_vbi_buffer_done(struct cx231xx *dev,struct cx231xx_dmaqueue *dma_q); 60u8 cx231xx_is_vbi_buffer_done(struct cx231xx *dev,
61 struct cx231xx_dmaqueue *dma_q);
60 62
61#endif 63#endif
diff --git a/drivers/media/video/cx231xx/cx231xx-video.c b/drivers/media/video/cx231xx/cx231xx-video.c
index 3eb5626ead1d..18919e0f0194 100644
--- a/drivers/media/video/cx231xx/cx231xx-video.c
+++ b/drivers/media/video/cx231xx/cx231xx-video.c
@@ -2,9 +2,9 @@
2 cx231xx-video.c - driver for Conexant Cx23100/101/102 USB video capture devices 2 cx231xx-video.c - driver for Conexant Cx23100/101/102 USB video capture devices
3 3
4 Copyright (C) 2008 <srinivasa.deevi at conexant dot com> 4 Copyright (C) 2008 <srinivasa.deevi at conexant dot com>
5 Based on em28xx driver 5 Based on em28xx driver
6 Based on cx23885 driver 6 Based on cx23885 driver
7 Based on cx88 driver 7 Based on cx88 driver
8 8
9 This program is free software; you can redistribute it and/or modify 9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by 10 it under the terms of the GNU General Public License as published by
@@ -21,7 +21,6 @@
21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */ 22 */
23 23
24
25#include <linux/init.h> 24#include <linux/init.h>
26#include <linux/list.h> 25#include <linux/list.h>
27#include <linux/module.h> 26#include <linux/module.h>
@@ -44,11 +43,9 @@
44#include "cx231xx.h" 43#include "cx231xx.h"
45#include "cx231xx-vbi.h" 44#include "cx231xx-vbi.h"
46 45
47
48#define DRIVER_AUTHOR "Srinivasa Deevi <srinivasa.deevi@conexant.com>" 46#define DRIVER_AUTHOR "Srinivasa Deevi <srinivasa.deevi@conexant.com>"
49#define DRIVER_DESC "Conexant cx231xx based USB video device driver" 47#define DRIVER_DESC "Conexant cx231xx based USB video device driver"
50 48
51
52#define cx231xx_videodbg(fmt, arg...) do {\ 49#define cx231xx_videodbg(fmt, arg...) do {\
53 if (video_debug) \ 50 if (video_debug) \
54 printk(KERN_INFO "%s %s :"fmt, \ 51 printk(KERN_INFO "%s %s :"fmt, \
@@ -70,138 +67,133 @@ MODULE_AUTHOR(DRIVER_AUTHOR);
70MODULE_DESCRIPTION(DRIVER_DESC); 67MODULE_DESCRIPTION(DRIVER_DESC);
71MODULE_LICENSE("GPL"); 68MODULE_LICENSE("GPL");
72 69
73
74
75static unsigned int card[] = {[0 ... (CX231XX_MAXBOARDS - 1)] = UNSET }; 70static unsigned int card[] = {[0 ... (CX231XX_MAXBOARDS - 1)] = UNSET };
76static unsigned int video_nr[] = {[0 ... (CX231XX_MAXBOARDS - 1)] = UNSET }; 71static unsigned int video_nr[] = {[0 ... (CX231XX_MAXBOARDS - 1)] = UNSET };
77static unsigned int vbi_nr[] = {[0 ... (CX231XX_MAXBOARDS - 1)] = UNSET }; 72static unsigned int vbi_nr[] = {[0 ... (CX231XX_MAXBOARDS - 1)] = UNSET };
78static unsigned int radio_nr[] = {[0 ... (CX231XX_MAXBOARDS - 1)] = UNSET }; 73static unsigned int radio_nr[] = {[0 ... (CX231XX_MAXBOARDS - 1)] = UNSET };
79 74
80module_param_array(card, int, NULL, 0444); 75module_param_array(card, int, NULL, 0444);
81module_param_array(video_nr, int, NULL, 0444); 76module_param_array(video_nr, int, NULL, 0444);
82module_param_array(vbi_nr, int, NULL, 0444); 77module_param_array(vbi_nr, int, NULL, 0444);
83module_param_array(radio_nr, int, NULL, 0444); 78module_param_array(radio_nr, int, NULL, 0444);
84 79
85MODULE_PARM_DESC(card, "card type"); 80MODULE_PARM_DESC(card, "card type");
86MODULE_PARM_DESC(video_nr, "video device numbers"); 81MODULE_PARM_DESC(video_nr, "video device numbers");
87MODULE_PARM_DESC(vbi_nr, "vbi device numbers"); 82MODULE_PARM_DESC(vbi_nr, "vbi device numbers");
88MODULE_PARM_DESC(radio_nr, "radio device numbers"); 83MODULE_PARM_DESC(radio_nr, "radio device numbers");
89 84
90static unsigned int video_debug; 85static unsigned int video_debug;
91module_param(video_debug, int, 0644); 86module_param(video_debug, int, 0644);
92MODULE_PARM_DESC(video_debug, "enable debug messages [video]"); 87MODULE_PARM_DESC(video_debug, "enable debug messages [video]");
93 88
94
95
96/* supported video standards */ 89/* supported video standards */
97static struct cx231xx_fmt format[] = { 90static struct cx231xx_fmt format[] = {
98 { 91 {
99 .name = "16bpp YUY2, 4:2:2, packed", 92 .name = "16bpp YUY2, 4:2:2, packed",
100 .fourcc = V4L2_PIX_FMT_YUYV, 93 .fourcc = V4L2_PIX_FMT_YUYV,
101 .depth = 16, 94 .depth = 16,
102 .reg = 0, 95 .reg = 0,
103 }, 96 },
104}; 97};
105 98
106
107/* supported controls */ 99/* supported controls */
108/* Common to all boards */ 100/* Common to all boards */
109 101
110/* ------------------------------------------------------------------- */ 102/* ------------------------------------------------------------------- */
111 103
112static const struct v4l2_queryctrl no_ctl = { 104static const struct v4l2_queryctrl no_ctl = {
113 .name = "42", 105 .name = "42",
114 .flags = V4L2_CTRL_FLAG_DISABLED, 106 .flags = V4L2_CTRL_FLAG_DISABLED,
115}; 107};
116 108
117static struct cx231xx_ctrl cx231xx_ctls[] = { 109static struct cx231xx_ctrl cx231xx_ctls[] = {
118 /* --- video --- */ 110 /* --- video --- */
119 { 111 {
120 .v = { 112 .v = {
121 .id = V4L2_CID_BRIGHTNESS, 113 .id = V4L2_CID_BRIGHTNESS,
122 .name = "Brightness", 114 .name = "Brightness",
123 .minimum = 0x00, 115 .minimum = 0x00,
124 .maximum = 0xff, 116 .maximum = 0xff,
125 .step = 1, 117 .step = 1,
126 .default_value = 0x7f, 118 .default_value = 0x7f,
127 .type = V4L2_CTRL_TYPE_INTEGER, 119 .type = V4L2_CTRL_TYPE_INTEGER,
128 }, 120 },
129 .off = 128, 121 .off = 128,
130 .reg = LUMA_CTRL, 122 .reg = LUMA_CTRL,
131 .mask = 0x00ff, 123 .mask = 0x00ff,
132 .shift = 0, 124 .shift = 0,
133 }, { 125 }, {
134 .v = { 126 .v = {
135 .id = V4L2_CID_CONTRAST, 127 .id = V4L2_CID_CONTRAST,
136 .name = "Contrast", 128 .name = "Contrast",
137 .minimum = 0, 129 .minimum = 0,
138 .maximum = 0xff, 130 .maximum = 0xff,
139 .step = 1, 131 .step = 1,
140 .default_value = 0x3f, 132 .default_value = 0x3f,
141 .type = V4L2_CTRL_TYPE_INTEGER, 133 .type = V4L2_CTRL_TYPE_INTEGER,
142 }, 134 },
143 .off = 0, 135 .off = 0,
144 .reg = LUMA_CTRL, 136 .reg = LUMA_CTRL,
145 .mask = 0xff00, 137 .mask = 0xff00,
146 .shift = 8, 138 .shift = 8,
147 }, { 139 }, {
148 .v = { 140 .v = {
149 .id = V4L2_CID_HUE, 141 .id = V4L2_CID_HUE,
150 .name = "Hue", 142 .name = "Hue",
151 .minimum = 0, 143 .minimum = 0,
152 .maximum = 0xff, 144 .maximum = 0xff,
153 .step = 1, 145 .step = 1,
154 .default_value = 0x7f, 146 .default_value = 0x7f,
155 .type = V4L2_CTRL_TYPE_INTEGER, 147 .type = V4L2_CTRL_TYPE_INTEGER,
156 }, 148 },
157 .off = 128, 149 .off = 128,
158 .reg = CHROMA_CTRL, 150 .reg = CHROMA_CTRL,
159 .mask = 0xff0000, 151 .mask = 0xff0000,
160 .shift = 16, 152 .shift = 16,
161 }, { 153 }, {
162 /* strictly, this only describes only U saturation. 154 /* strictly, this only describes only U saturation.
163 * V saturation is handled specially through code. 155 * V saturation is handled specially through code.
164 */ 156 */
165 .v = { 157 .v = {
166 .id = V4L2_CID_SATURATION, 158 .id = V4L2_CID_SATURATION,
167 .name = "Saturation", 159 .name = "Saturation",
168 .minimum = 0, 160 .minimum = 0,
169 .maximum = 0xff, 161 .maximum = 0xff,
170 .step = 1, 162 .step = 1,
171 .default_value = 0x7f, 163 .default_value = 0x7f,
172 .type = V4L2_CTRL_TYPE_INTEGER, 164 .type = V4L2_CTRL_TYPE_INTEGER,
173 }, 165 },
174 .off = 0, 166 .off = 0,
175 .reg = CHROMA_CTRL, 167 .reg = CHROMA_CTRL,
176 .mask = 0x00ff, 168 .mask = 0x00ff,
177 .shift = 0, 169 .shift = 0,
178 }, { 170 }, {
179 /* --- audio --- */ 171 /* --- audio --- */
180 .v = { 172 .v = {
181 .id = V4L2_CID_AUDIO_MUTE, 173 .id = V4L2_CID_AUDIO_MUTE,
182 .name = "Mute", 174 .name = "Mute",
183 .minimum = 0, 175 .minimum = 0,
184 .maximum = 1, 176 .maximum = 1,
185 .default_value = 1, 177 .default_value = 1,
186 .type = V4L2_CTRL_TYPE_BOOLEAN, 178 .type = V4L2_CTRL_TYPE_BOOLEAN,
187 }, 179 },
188 .reg = PATH1_CTL1, 180 .reg = PATH1_CTL1,
189 .mask = (0x1f << 24), 181 .mask = (0x1f << 24),
190 .shift = 24, 182 .shift = 24,
191 }, { 183 }, {
192 .v = { 184 .v = {
193 .id = V4L2_CID_AUDIO_VOLUME, 185 .id = V4L2_CID_AUDIO_VOLUME,
194 .name = "Volume", 186 .name = "Volume",
195 .minimum = 0, 187 .minimum = 0,
196 .maximum = 0x3f, 188 .maximum = 0x3f,
197 .step = 1, 189 .step = 1,
198 .default_value = 0x3f, 190 .default_value = 0x3f,
199 .type = V4L2_CTRL_TYPE_INTEGER, 191 .type = V4L2_CTRL_TYPE_INTEGER,
200 }, 192 },
201 .reg = PATH1_VOL_CTL, 193 .reg = PATH1_VOL_CTL,
202 .mask = 0xff, 194 .mask = 0xff,
203 .shift = 0, 195 .shift = 0,
204 } 196 }
205}; 197};
206static const int CX231XX_CTLS = ARRAY_SIZE(cx231xx_ctls); 198static const int CX231XX_CTLS = ARRAY_SIZE(cx231xx_ctls);
207 199
@@ -224,7 +216,6 @@ static const u32 *ctrl_classes[] = {
224 NULL 216 NULL
225}; 217};
226 218
227
228/* ------------------------------------------------------------------ 219/* ------------------------------------------------------------------
229 Video buffer and parser functions 220 Video buffer and parser functions
230 ------------------------------------------------------------------*/ 221 ------------------------------------------------------------------*/
@@ -233,8 +224,8 @@ static const u32 *ctrl_classes[] = {
233 * Announces that a buffer were filled and request the next 224 * Announces that a buffer were filled and request the next
234 */ 225 */
235static inline void buffer_filled(struct cx231xx *dev, 226static inline void buffer_filled(struct cx231xx *dev,
236 struct cx231xx_dmaqueue *dma_q, 227 struct cx231xx_dmaqueue *dma_q,
237 struct cx231xx_buffer *buf) 228 struct cx231xx_buffer *buf)
238{ 229{
239 /* Advice that buffer was filled */ 230 /* Advice that buffer was filled */
240 cx231xx_isocdbg("[%p/%d] wakeup\n", buf, buf->vb.i); 231 cx231xx_isocdbg("[%p/%d] wakeup\n", buf, buf->vb.i);
@@ -248,9 +239,7 @@ static inline void buffer_filled(struct cx231xx *dev,
248 wake_up(&buf->vb.done); 239 wake_up(&buf->vb.done);
249} 240}
250 241
251 242static inline void print_err_status(struct cx231xx *dev, int packet, int status)
252static inline void print_err_status(struct cx231xx *dev,
253 int packet, int status)
254{ 243{
255 char *errmsg = "Unknown"; 244 char *errmsg = "Unknown";
256 245
@@ -281,10 +270,10 @@ static inline void print_err_status(struct cx231xx *dev,
281 break; 270 break;
282 } 271 }
283 if (packet < 0) { 272 if (packet < 0) {
284 cx231xx_isocdbg("URB status %d [%s].\n", status, errmsg); 273 cx231xx_isocdbg("URB status %d [%s].\n", status, errmsg);
285 } else { 274 } else {
286 cx231xx_isocdbg("URB packet %d, status %d [%s].\n", 275 cx231xx_isocdbg("URB packet %d, status %d [%s].\n",
287 packet, status, errmsg); 276 packet, status, errmsg);
288 } 277 }
289} 278}
290 279
@@ -292,14 +281,14 @@ static inline void print_err_status(struct cx231xx *dev,
292 * video-buf generic routine to get the next available buffer 281 * video-buf generic routine to get the next available buffer
293 */ 282 */
294static inline void get_next_buf(struct cx231xx_dmaqueue *dma_q, 283static inline void get_next_buf(struct cx231xx_dmaqueue *dma_q,
295 struct cx231xx_buffer **buf) 284 struct cx231xx_buffer **buf)
296{ 285{
297 struct cx231xx_video_mode *vmode = container_of(dma_q, struct cx231xx_video_mode, vidq); 286 struct cx231xx_video_mode *vmode =
298 struct cx231xx *dev = container_of(vmode, struct cx231xx, video_mode); 287 container_of(dma_q, struct cx231xx_video_mode, vidq);
288 struct cx231xx *dev = container_of(vmode, struct cx231xx, video_mode);
299 289
300 char *outp; 290 char *outp;
301 291
302
303 if (list_empty(&dma_q->active)) { 292 if (list_empty(&dma_q->active)) {
304 cx231xx_isocdbg("No active queue to serve\n"); 293 cx231xx_isocdbg("No active queue to serve\n");
305 dev->video_mode.isoc_ctl.buf = NULL; 294 dev->video_mode.isoc_ctl.buf = NULL;
@@ -324,13 +313,13 @@ static inline void get_next_buf(struct cx231xx_dmaqueue *dma_q,
324 */ 313 */
325static inline int cx231xx_isoc_copy(struct cx231xx *dev, struct urb *urb) 314static inline int cx231xx_isoc_copy(struct cx231xx *dev, struct urb *urb)
326{ 315{
327 struct cx231xx_buffer *buf; 316 struct cx231xx_buffer *buf;
328 struct cx231xx_dmaqueue *dma_q = urb->context; 317 struct cx231xx_dmaqueue *dma_q = urb->context;
329 unsigned char *outp = NULL; 318 unsigned char *outp = NULL;
330 int i, rc = 1; 319 int i, rc = 1;
331 unsigned char *p_buffer; 320 unsigned char *p_buffer;
332 u32 bytes_parsed = 0, buffer_size = 0; 321 u32 bytes_parsed = 0, buffer_size = 0;
333 u8 sav_eav = 0; 322 u8 sav_eav = 0;
334 323
335 if (!dev) 324 if (!dev)
336 return 0; 325 return 0;
@@ -357,342 +346,347 @@ static inline int cx231xx_isoc_copy(struct cx231xx *dev, struct urb *urb)
357 continue; 346 continue;
358 } 347 }
359 348
360 if (urb->iso_frame_desc[i].actual_length <= 0) { 349 if (urb->iso_frame_desc[i].actual_length <= 0) {
361 /* cx231xx_isocdbg("packet %d is empty",i); - spammy */ 350 /* cx231xx_isocdbg("packet %d is empty",i); - spammy */
362 continue; 351 continue;
363 } 352 }
364 if (urb->iso_frame_desc[i].actual_length > 353 if (urb->iso_frame_desc[i].actual_length >
365 dev->video_mode.max_pkt_size) { 354 dev->video_mode.max_pkt_size) {
366 cx231xx_isocdbg("packet bigger than packet size"); 355 cx231xx_isocdbg("packet bigger than packet size");
367 continue; 356 continue;
368 } 357 }
369 358
370 /* get buffer pointer and length */ 359 /* get buffer pointer and length */
371 p_buffer = urb->transfer_buffer + urb->iso_frame_desc[i].offset; 360 p_buffer = urb->transfer_buffer + urb->iso_frame_desc[i].offset;
372 buffer_size = urb->iso_frame_desc[i].actual_length; 361 buffer_size = urb->iso_frame_desc[i].actual_length;
373 bytes_parsed = 0; 362 bytes_parsed = 0;
374 363
375 if(dma_q->is_partial_line) 364 if (dma_q->is_partial_line) {
376 { 365 /* Handle the case where we were working on a partial line */
377 /* Handle the case where we were working on a partial line */ 366 sav_eav = dma_q->last_sav;
378 sav_eav = dma_q->last_sav; 367 } else {
379 } else { 368 /* Check for a SAV/EAV overlapping the buffer boundary */
380 /* Check for a SAV/EAV overlapping the buffer boundary */ 369 sav_eav =
381 sav_eav = cx231xx_find_boundary_SAV_EAV(p_buffer, dma_q->partial_buf, &bytes_parsed); 370 cx231xx_find_boundary_SAV_EAV(p_buffer,
382 } 371 dma_q->partial_buf,
383 372 &bytes_parsed);
384 sav_eav &= 0xF0; 373 }
385 /* Get the first line if we have some portion of an SAV/EAV from the last buffer
386 or a partial line */
387 if(sav_eav) {
388 bytes_parsed += cx231xx_get_video_line(dev, dma_q,
389 sav_eav, /* SAV/EAV */
390 p_buffer + bytes_parsed, /* p_buffer */
391 buffer_size - bytes_parsed); /* buffer size */
392 }
393
394 /* Now parse data that is completely in this buffer */
395 /* dma_q->is_partial_line = 0; */
396
397 while(bytes_parsed < buffer_size)
398 {
399 u32 bytes_used = 0;
400
401 sav_eav = cx231xx_find_next_SAV_EAV(
402 p_buffer + bytes_parsed, /* p_buffer */
403 buffer_size - bytes_parsed, /* buffer size */
404 &bytes_used); /* Receives bytes used to get SAV/EAV */
405
406 bytes_parsed += bytes_used;
407
408 sav_eav &= 0xF0;
409 if(sav_eav && (bytes_parsed < buffer_size))
410 {
411 bytes_parsed += cx231xx_get_video_line(dev, dma_q,
412 sav_eav, /* SAV/EAV */
413 p_buffer + bytes_parsed, /* p_buffer */
414 buffer_size - bytes_parsed); /* buffer size */
415 }
416 }
417
418 /* Save the last four bytes of the buffer so we can check the buffer boundary
419 condition next time */
420 memcpy(dma_q->partial_buf, p_buffer + buffer_size - 4, 4);
421 bytes_parsed = 0;
422 374
423 } 375 sav_eav &= 0xF0;
424 return rc; 376 /* Get the first line if we have some portion of an SAV/EAV from the last buffer
425} 377 or a partial line */
378 if (sav_eav) {
379 bytes_parsed += cx231xx_get_video_line(dev, dma_q, sav_eav, /* SAV/EAV */
380 p_buffer + bytes_parsed, /* p_buffer */
381 buffer_size - bytes_parsed); /* buffer size */
382 }
426 383
427u8 cx231xx_find_boundary_SAV_EAV(u8 *p_buffer, u8 *partial_buf, u32 *p_bytes_used) 384 /* Now parse data that is completely in this buffer */
428{ 385 /* dma_q->is_partial_line = 0; */
429 u32 bytes_used;
430 u8 boundary_bytes[8];
431 u8 sav_eav = 0;
432 386
433 *p_bytes_used = 0; 387 while (bytes_parsed < buffer_size) {
388 u32 bytes_used = 0;
434 389
435 /* Create an array of the last 4 bytes of the last buffer and the first 390 sav_eav = cx231xx_find_next_SAV_EAV(p_buffer + bytes_parsed, /* p_buffer */
436 4 bytes of the current buffer. */ 391 buffer_size - bytes_parsed, /* buffer size */
392 &bytes_used); /* Receives bytes used to get SAV/EAV */
437 393
438 memcpy(boundary_bytes, partial_buf, 4); 394 bytes_parsed += bytes_used;
439 memcpy(boundary_bytes + 4, p_buffer, 4);
440 395
441 /* Check for the SAV/EAV in the boundary buffer */ 396 sav_eav &= 0xF0;
442 sav_eav = cx231xx_find_next_SAV_EAV((u8*)&boundary_bytes, 8, &bytes_used); 397 if (sav_eav && (bytes_parsed < buffer_size)) {
398 bytes_parsed += cx231xx_get_video_line(dev, dma_q, sav_eav, /* SAV/EAV */
399 p_buffer + bytes_parsed, /* p_buffer */
400 buffer_size - bytes_parsed); /* buffer size */
401 }
402 }
443 403
444 if(sav_eav) { 404 /* Save the last four bytes of the buffer so we can check the buffer boundary
445 /* found a boundary SAV/EAV. Updates the bytes used to reflect 405 condition next time */
446 only those used in the new buffer */ 406 memcpy(dma_q->partial_buf, p_buffer + buffer_size - 4, 4);
447 *p_bytes_used = bytes_used - 4; 407 bytes_parsed = 0;
448 }
449 408
450 return sav_eav; 409 }
410 return rc;
451} 411}
452 412
453u8 cx231xx_find_next_SAV_EAV(u8 *p_buffer, u32 buffer_size, u32 *p_bytes_used) 413u8 cx231xx_find_boundary_SAV_EAV(u8 * p_buffer, u8 * partial_buf,
414 u32 * p_bytes_used)
454{ 415{
455 u32 i; 416 u32 bytes_used;
456 u8 sav_eav = 0; 417 u8 boundary_bytes[8];
418 u8 sav_eav = 0;
419
420 *p_bytes_used = 0;
457 421
458 /* Don't search if the buffer size is less than 4. It causes a page fault since 422 /* Create an array of the last 4 bytes of the last buffer and the first
459 buffer_size - 4 evaluates to a large number in that case. */ 423 4 bytes of the current buffer. */
460 if(buffer_size < 4) {
461 *p_bytes_used = buffer_size;
462 return 0;
463 }
464 424
465 for(i = 0;i < (buffer_size - 3); i++) { 425 memcpy(boundary_bytes, partial_buf, 4);
426 memcpy(boundary_bytes + 4, p_buffer, 4);
466 427
467 if((p_buffer[i] == 0xFF) && 428 /* Check for the SAV/EAV in the boundary buffer */
468 (p_buffer[i+1] == 0x00) && 429 sav_eav =
469 (p_buffer[i+2] == 0x00)) { 430 cx231xx_find_next_SAV_EAV((u8 *) & boundary_bytes, 8, &bytes_used);
470 431
471 *p_bytes_used = i+4; 432 if (sav_eav) {
472 sav_eav = p_buffer[i+3]; 433 /* found a boundary SAV/EAV. Updates the bytes used to reflect
473 return sav_eav; 434 only those used in the new buffer */
474 } 435 *p_bytes_used = bytes_used - 4;
475 } 436 }
476 437
477 *p_bytes_used = buffer_size; 438 return sav_eav;
478 return 0;
479} 439}
480 440
441u8 cx231xx_find_next_SAV_EAV(u8 * p_buffer, u32 buffer_size, u32 * p_bytes_used)
442{
443 u32 i;
444 u8 sav_eav = 0;
481 445
446 /* Don't search if the buffer size is less than 4. It causes a page fault since
447 buffer_size - 4 evaluates to a large number in that case. */
448 if (buffer_size < 4) {
449 *p_bytes_used = buffer_size;
450 return 0;
451 }
482 452
453 for (i = 0; i < (buffer_size - 3); i++) {
483 454
484u32 cx231xx_get_video_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q, 455 if ((p_buffer[i] == 0xFF) &&
485 u8 sav_eav, u8 *p_buffer, u32 buffer_size) 456 (p_buffer[i + 1] == 0x00) && (p_buffer[i + 2] == 0x00)) {
486{
487 u32 bytes_copied = 0;
488 int current_field = -1;
489 457
458 *p_bytes_used = i + 4;
459 sav_eav = p_buffer[i + 3];
460 return sav_eav;
461 }
462 }
490 463
491 switch(sav_eav) { 464 *p_bytes_used = buffer_size;
492 case SAV_ACTIVE_VIDEO_FIELD1: 465 return 0;
493 /* looking for skipped line which occurred in PAL 720x480 mode. In this case, 466}
494 there will be no active data contained between the SAV and EAV */
495 if ( (buffer_size > 3) &&
496 (p_buffer[0] == 0xFF) && (p_buffer[1] == 0x00) && (p_buffer[2] == 0x00) &&
497 ( (p_buffer[3] == EAV_ACTIVE_VIDEO_FIELD1) || (p_buffer[3] == EAV_ACTIVE_VIDEO_FIELD2) ||
498 (p_buffer[3] == EAV_VBLANK_FIELD1) || (p_buffer[3] == EAV_VBLANK_FIELD2)
499 )
500 )
501 {
502 return bytes_copied;
503 }
504 current_field = 1;
505 break;
506 467
507 case SAV_ACTIVE_VIDEO_FIELD2: 468u32 cx231xx_get_video_line(struct cx231xx * dev,
508 /* looking for skipped line which occurred in PAL 720x480 mode. In this case, 469 struct cx231xx_dmaqueue * dma_q, u8 sav_eav,
509 there will be no active data contained between the SAV and EAV */ 470 u8 * p_buffer, u32 buffer_size)
510 if ( (buffer_size > 3) && 471{
511 (p_buffer[0] == 0xFF) && (p_buffer[1] == 0x00) && (p_buffer[2] == 0x00) && 472 u32 bytes_copied = 0;
512 ( (p_buffer[3] == EAV_ACTIVE_VIDEO_FIELD1) || (p_buffer[3] == EAV_ACTIVE_VIDEO_FIELD2) || 473 int current_field = -1;
513 (p_buffer[3] == EAV_VBLANK_FIELD1) || (p_buffer[3] == EAV_VBLANK_FIELD2) 474
514 ) 475 switch (sav_eav) {
515 ) 476 case SAV_ACTIVE_VIDEO_FIELD1:
516 { 477 /* looking for skipped line which occurred in PAL 720x480 mode. In this case,
517 return bytes_copied; 478 there will be no active data contained between the SAV and EAV */
518 } 479 if ((buffer_size > 3) &&
519 current_field = 2; 480 (p_buffer[0] == 0xFF) && (p_buffer[1] == 0x00)
520 break; 481 && (p_buffer[2] == 0x00)
521 } 482 && ((p_buffer[3] == EAV_ACTIVE_VIDEO_FIELD1)
483 || (p_buffer[3] == EAV_ACTIVE_VIDEO_FIELD2)
484 || (p_buffer[3] == EAV_VBLANK_FIELD1)
485 || (p_buffer[3] == EAV_VBLANK_FIELD2)
486 )
487 ) {
488 return bytes_copied;
489 }
490 current_field = 1;
491 break;
522 492
523 dma_q->last_sav = sav_eav; 493 case SAV_ACTIVE_VIDEO_FIELD2:
494 /* looking for skipped line which occurred in PAL 720x480 mode. In this case,
495 there will be no active data contained between the SAV and EAV */
496 if ((buffer_size > 3) &&
497 (p_buffer[0] == 0xFF) && (p_buffer[1] == 0x00)
498 && (p_buffer[2] == 0x00)
499 && ((p_buffer[3] == EAV_ACTIVE_VIDEO_FIELD1)
500 || (p_buffer[3] == EAV_ACTIVE_VIDEO_FIELD2)
501 || (p_buffer[3] == EAV_VBLANK_FIELD1)
502 || (p_buffer[3] == EAV_VBLANK_FIELD2)
503 )
504 ) {
505 return bytes_copied;
506 }
507 current_field = 2;
508 break;
509 }
524 510
525 bytes_copied = cx231xx_copy_video_line(dev, dma_q, p_buffer, buffer_size, current_field); 511 dma_q->last_sav = sav_eav;
526 512
527 return bytes_copied; 513 bytes_copied =
514 cx231xx_copy_video_line(dev, dma_q, p_buffer, buffer_size,
515 current_field);
516
517 return bytes_copied;
528} 518}
529 519
530u32 cx231xx_copy_video_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q, 520u32 cx231xx_copy_video_line(struct cx231xx * dev,
531 u8 *p_line, u32 length, int field_number) 521 struct cx231xx_dmaqueue * dma_q, u8 * p_line,
522 u32 length, int field_number)
532{ 523{
533 u32 bytes_to_copy; 524 u32 bytes_to_copy;
534 struct cx231xx_buffer *buf; 525 struct cx231xx_buffer *buf;
535 u32 _line_size = dev->width * 2; 526 u32 _line_size = dev->width * 2;
536
537 if( dma_q->current_field != field_number ) {
538 cx231xx_reset_video_buffer(dev, dma_q);
539 }
540 527
541 /* get the buffer pointer */ 528 if (dma_q->current_field != field_number) {
542 buf = dev->video_mode.isoc_ctl.buf; 529 cx231xx_reset_video_buffer(dev, dma_q);
530 }
543 531
544 /* Remember the field number for next time */ 532 /* get the buffer pointer */
545 dma_q->current_field = field_number; 533 buf = dev->video_mode.isoc_ctl.buf;
546 534
547 bytes_to_copy = dma_q->bytes_left_in_line; 535 /* Remember the field number for next time */
548 if(bytes_to_copy > length) 536 dma_q->current_field = field_number;
549 bytes_to_copy = length;
550 537
538 bytes_to_copy = dma_q->bytes_left_in_line;
539 if (bytes_to_copy > length)
540 bytes_to_copy = length;
551 541
552 if(dma_q->lines_completed >= dma_q->lines_per_field) { 542 if (dma_q->lines_completed >= dma_q->lines_per_field) {
553 dma_q->bytes_left_in_line -= bytes_to_copy; 543 dma_q->bytes_left_in_line -= bytes_to_copy;
554 dma_q->is_partial_line = (dma_q->bytes_left_in_line == 0) ? 0 : 1; 544 dma_q->is_partial_line =
555 return 0; 545 (dma_q->bytes_left_in_line == 0) ? 0 : 1;
556 } 546 return 0;
547 }
557 548
558 dma_q->is_partial_line = 1; 549 dma_q->is_partial_line = 1;
559 550
560 /* If we don't have a buffer, just return the number of bytes we would 551 /* If we don't have a buffer, just return the number of bytes we would
561 have copied if we had a buffer. */ 552 have copied if we had a buffer. */
562 if(!buf) 553 if (!buf) {
563 { 554 dma_q->bytes_left_in_line -= bytes_to_copy;
564 dma_q->bytes_left_in_line -= bytes_to_copy; 555 dma_q->is_partial_line =
565 dma_q->is_partial_line = (dma_q->bytes_left_in_line == 0) ? 0 : 1; 556 (dma_q->bytes_left_in_line == 0) ? 0 : 1;
566 return bytes_to_copy; 557 return bytes_to_copy;
567 } 558 }
568 559
569 /* copy the data to video buffer */ 560 /* copy the data to video buffer */
570 cx231xx_do_copy(dev, dma_q, p_line, bytes_to_copy); 561 cx231xx_do_copy(dev, dma_q, p_line, bytes_to_copy);
571 562
572 dma_q->pos += bytes_to_copy; 563 dma_q->pos += bytes_to_copy;
573 dma_q->bytes_left_in_line -= bytes_to_copy; 564 dma_q->bytes_left_in_line -= bytes_to_copy;
574 565
575 if(dma_q->bytes_left_in_line == 0) { 566 if (dma_q->bytes_left_in_line == 0) {
576 567
577 dma_q->bytes_left_in_line = _line_size; 568 dma_q->bytes_left_in_line = _line_size;
578 dma_q->lines_completed++; 569 dma_q->lines_completed++;
579 dma_q->is_partial_line = 0; 570 dma_q->is_partial_line = 0;
580 571
581 if(cx231xx_is_buffer_done(dev, dma_q) && buf) { 572 if (cx231xx_is_buffer_done(dev, dma_q) && buf) {
582 573
583 buffer_filled(dev, dma_q, buf); 574 buffer_filled(dev, dma_q, buf);
584 575
585 dma_q->pos = 0; 576 dma_q->pos = 0;
586 buf = NULL; 577 buf = NULL;
587 dma_q->lines_completed = 0; 578 dma_q->lines_completed = 0;
588 } 579 }
589 } 580 }
590 581
591 return bytes_to_copy; 582 return bytes_to_copy;
592} 583}
593 584
594void cx231xx_reset_video_buffer(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q) 585void cx231xx_reset_video_buffer(struct cx231xx *dev,
586 struct cx231xx_dmaqueue *dma_q)
595{ 587{
596 struct cx231xx_buffer *buf; 588 struct cx231xx_buffer *buf;
597 589
598 /* handle the switch from field 1 to field 2 */ 590 /* handle the switch from field 1 to field 2 */
599 if(dma_q->current_field == 1) { 591 if (dma_q->current_field == 1) {
600 if(dma_q->lines_completed >= dma_q->lines_per_field ) { 592 if (dma_q->lines_completed >= dma_q->lines_per_field) {
601 dma_q->field1_done = 1; 593 dma_q->field1_done = 1;
602 } else { 594 } else {
603 dma_q->field1_done = 0; 595 dma_q->field1_done = 0;
604 } 596 }
605 } 597 }
606 598
607 buf = dev->video_mode.isoc_ctl.buf; 599 buf = dev->video_mode.isoc_ctl.buf;
608 600
609 if(buf == NULL) { 601 if (buf == NULL) {
610 u8* outp = NULL; 602 u8 *outp = NULL;
611 /* first try to get the buffer */ 603 /* first try to get the buffer */
612 get_next_buf(dma_q, &buf); 604 get_next_buf(dma_q, &buf);
613 605
614 if(buf) 606 if (buf)
615 outp = videobuf_to_vmalloc(&buf->vb); 607 outp = videobuf_to_vmalloc(&buf->vb);
616 608
617 dma_q->pos = 0; 609 dma_q->pos = 0;
618 dma_q->field1_done = 0; 610 dma_q->field1_done = 0;
619 dma_q->current_field = -1; 611 dma_q->current_field = -1;
620 } 612 }
621 613
622 /* reset the counters */ 614 /* reset the counters */
623 dma_q->bytes_left_in_line = dev->width << 1; 615 dma_q->bytes_left_in_line = dev->width << 1;
624 dma_q->lines_completed = 0; 616 dma_q->lines_completed = 0;
625} 617}
626 618
627int cx231xx_do_copy(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q, 619int cx231xx_do_copy(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q,
628 u8 *p_buffer, u32 bytes_to_copy) 620 u8 * p_buffer, u32 bytes_to_copy)
629{ 621{
630 u8 *p_out_buffer = NULL; 622 u8 *p_out_buffer = NULL;
631 u32 current_line_bytes_copied = 0; 623 u32 current_line_bytes_copied = 0;
632 struct cx231xx_buffer *buf; 624 struct cx231xx_buffer *buf;
633 u32 _line_size = dev->width << 1; 625 u32 _line_size = dev->width << 1;
634 void *startwrite; 626 void *startwrite;
635 int offset, lencopy; 627 int offset, lencopy;
636 628
637 buf = dev->video_mode.isoc_ctl.buf; 629 buf = dev->video_mode.isoc_ctl.buf;
638 630
639 if (buf == NULL) 631 if (buf == NULL)
640 return -1; 632 return -1;
641 633
642 p_out_buffer = videobuf_to_vmalloc(&buf->vb); 634 p_out_buffer = videobuf_to_vmalloc(&buf->vb);
643 635
644 current_line_bytes_copied = _line_size - dma_q->bytes_left_in_line; 636 current_line_bytes_copied = _line_size - dma_q->bytes_left_in_line;
645 637
646 /* Offset field 2 one line from the top of the buffer */ 638 /* Offset field 2 one line from the top of the buffer */
647 offset = (dma_q->current_field == 1)? 0: _line_size; 639 offset = (dma_q->current_field == 1) ? 0 : _line_size;
648 640
649 /* Offset for field 2 */ 641 /* Offset for field 2 */
650 startwrite = p_out_buffer + offset; 642 startwrite = p_out_buffer + offset;
651 643
652 /* lines already completed in the current field */ 644 /* lines already completed in the current field */
653 startwrite += (dma_q->lines_completed * _line_size * 2); 645 startwrite += (dma_q->lines_completed * _line_size * 2);
654 646
655 /* bytes already completed in the current line */ 647 /* bytes already completed in the current line */
656 startwrite += current_line_bytes_copied; 648 startwrite += current_line_bytes_copied;
657 649
658 lencopy = dma_q->bytes_left_in_line > bytes_to_copy ? bytes_to_copy : dma_q->bytes_left_in_line; 650 lencopy =
651 dma_q->bytes_left_in_line >
652 bytes_to_copy ? bytes_to_copy : dma_q->bytes_left_in_line;
659 653
660 if( (u8*)(startwrite +lencopy) > (u8*)(p_out_buffer+ buf->vb.size) ) { 654 if ((u8 *) (startwrite + lencopy) >
661 return 0; 655 (u8 *) (p_out_buffer + buf->vb.size)) {
662 } 656 return 0;
657 }
663 658
664 /* The below copies the UYVY data straight into video buffer */ 659 /* The below copies the UYVY data straight into video buffer */
665 cx231xx_swab( (u16*)p_buffer, (u16*)startwrite, (u16)lencopy); 660 cx231xx_swab((u16 *) p_buffer, (u16 *) startwrite, (u16) lencopy);
666 661
667 return 0; 662 return 0;
668} 663}
669 664
670void cx231xx_swab(u16 *from, u16 *to, u16 len) 665void cx231xx_swab(u16 * from, u16 * to, u16 len)
671{ 666{
672 u16 i; 667 u16 i;
673 668
674 if( len <= 0) 669 if (len <= 0)
675 return; 670 return;
676 671
677 for(i = 0; i < len/2; i++) { 672 for (i = 0; i < len / 2; i++) {
678 to[i] = (from[i] << 8) | (from[i] >> 8); 673 to[i] = (from[i] << 8) | (from[i] >> 8);
679 } 674 }
680} 675}
681 676
682u8 cx231xx_is_buffer_done(struct cx231xx *dev,struct cx231xx_dmaqueue *dma_q) 677u8 cx231xx_is_buffer_done(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q)
683{ 678{
684 u8 buffer_complete = 0; 679 u8 buffer_complete = 0;
685 680
686 /* Dual field stream */ 681 /* Dual field stream */
687 buffer_complete = 682 buffer_complete =
688 ((dma_q->current_field == 2) && 683 ((dma_q->current_field == 2) &&
689 (dma_q->lines_completed >= dma_q->lines_per_field) && 684 (dma_q->lines_completed >= dma_q->lines_per_field) &&
690 dma_q->field1_done); 685 dma_q->field1_done);
691 686
692 return buffer_complete; 687 return buffer_complete;
693} 688}
694 689
695
696/* ------------------------------------------------------------------ 690/* ------------------------------------------------------------------
697 Videobuf operations 691 Videobuf operations
698 ------------------------------------------------------------------*/ 692 ------------------------------------------------------------------*/
@@ -701,10 +695,11 @@ static int
701buffer_setup(struct videobuf_queue *vq, unsigned int *count, unsigned int *size) 695buffer_setup(struct videobuf_queue *vq, unsigned int *count, unsigned int *size)
702{ 696{
703 struct cx231xx_fh *fh = vq->priv_data; 697 struct cx231xx_fh *fh = vq->priv_data;
704 struct cx231xx *dev = fh->dev; 698 struct cx231xx *dev = fh->dev;
705 struct v4l2_frequency f; 699 struct v4l2_frequency f;
706 700
707 *size = ( fh->dev->width * fh->dev->height * dev->format->depth + 7) >> 3; 701 *size =
702 (fh->dev->width * fh->dev->height * dev->format->depth + 7) >> 3;
708 if (0 == *count) 703 if (0 == *count)
709 *count = CX231XX_DEF_BUF; 704 *count = CX231XX_DEF_BUF;
710 705
@@ -714,7 +709,7 @@ buffer_setup(struct videobuf_queue *vq, unsigned int *count, unsigned int *size)
714 /* Ask tuner to go to analog mode */ 709 /* Ask tuner to go to analog mode */
715 memset(&f, 0, sizeof(f)); 710 memset(&f, 0, sizeof(f));
716 f.frequency = dev->ctl_freq; 711 f.frequency = dev->ctl_freq;
717 f.type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV; 712 f.type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
718 713
719 cx231xx_i2c_call_clients(&dev->i2c_bus[1], VIDIOC_S_FREQUENCY, &f); 714 cx231xx_i2c_call_clients(&dev->i2c_bus[1], VIDIOC_S_FREQUENCY, &f);
720 715
@@ -724,8 +719,8 @@ buffer_setup(struct videobuf_queue *vq, unsigned int *count, unsigned int *size)
724/* This is called *without* dev->slock held; please keep it that way */ 719/* This is called *without* dev->slock held; please keep it that way */
725static void free_buffer(struct videobuf_queue *vq, struct cx231xx_buffer *buf) 720static void free_buffer(struct videobuf_queue *vq, struct cx231xx_buffer *buf)
726{ 721{
727 struct cx231xx_fh *fh = vq->priv_data; 722 struct cx231xx_fh *fh = vq->priv_data;
728 struct cx231xx *dev = fh->dev; 723 struct cx231xx *dev = fh->dev;
729 unsigned long flags = 0; 724 unsigned long flags = 0;
730 if (in_interrupt()) 725 if (in_interrupt())
731 BUG(); 726 BUG();
@@ -738,7 +733,7 @@ static void free_buffer(struct videobuf_queue *vq, struct cx231xx_buffer *buf)
738 This should be safe; by the time we get here, the buffer isn't 733 This should be safe; by the time we get here, the buffer isn't
739 queued anymore. If we ever start marking the buffers as 734 queued anymore. If we ever start marking the buffers as
740 VIDEOBUF_ACTIVE, it won't be, though. 735 VIDEOBUF_ACTIVE, it won't be, though.
741 */ 736 */
742 spin_lock_irqsave(&dev->video_mode.slock, flags); 737 spin_lock_irqsave(&dev->video_mode.slock, flags);
743 if (dev->video_mode.isoc_ctl.buf == buf) 738 if (dev->video_mode.isoc_ctl.buf == buf)
744 dev->video_mode.isoc_ctl.buf = NULL; 739 dev->video_mode.isoc_ctl.buf = NULL;
@@ -750,22 +745,24 @@ static void free_buffer(struct videobuf_queue *vq, struct cx231xx_buffer *buf)
750 745
751static int 746static int
752buffer_prepare(struct videobuf_queue *vq, struct videobuf_buffer *vb, 747buffer_prepare(struct videobuf_queue *vq, struct videobuf_buffer *vb,
753 enum v4l2_field field) 748 enum v4l2_field field)
754{ 749{
755 struct cx231xx_fh *fh = vq->priv_data; 750 struct cx231xx_fh *fh = vq->priv_data;
756 struct cx231xx_buffer *buf = container_of(vb, struct cx231xx_buffer, vb); 751 struct cx231xx_buffer *buf =
757 struct cx231xx *dev = fh->dev; 752 container_of(vb, struct cx231xx_buffer, vb);
758 int rc = 0, urb_init = 0; 753 struct cx231xx *dev = fh->dev;
754 int rc = 0, urb_init = 0;
759 755
760 /* The only currently supported format is 16 bits/pixel */ 756 /* The only currently supported format is 16 bits/pixel */
761 buf->vb.size = (fh->dev->width * fh->dev->height * dev->format->depth + 7) >> 3; 757 buf->vb.size =
758 (fh->dev->width * fh->dev->height * dev->format->depth + 7) >> 3;
762 759
763 if (0 != buf->vb.baddr && buf->vb.bsize < buf->vb.size) 760 if (0 != buf->vb.baddr && buf->vb.bsize < buf->vb.size)
764 return -EINVAL; 761 return -EINVAL;
765 762
766 buf->vb.width = dev->width; 763 buf->vb.width = dev->width;
767 buf->vb.height = dev->height; 764 buf->vb.height = dev->height;
768 buf->vb.field = field; 765 buf->vb.field = field;
769 766
770 if (VIDEOBUF_NEEDS_INIT == buf->vb.state) { 767 if (VIDEOBUF_NEEDS_INIT == buf->vb.state) {
771 rc = videobuf_iolock(vq, &buf->vb, NULL); 768 rc = videobuf_iolock(vq, &buf->vb, NULL);
@@ -778,8 +775,9 @@ buffer_prepare(struct videobuf_queue *vq, struct videobuf_buffer *vb,
778 775
779 if (urb_init) { 776 if (urb_init) {
780 rc = cx231xx_init_isoc(dev, CX231XX_NUM_PACKETS, 777 rc = cx231xx_init_isoc(dev, CX231XX_NUM_PACKETS,
781 CX231XX_NUM_BUFS, dev->video_mode.max_pkt_size, 778 CX231XX_NUM_BUFS,
782 cx231xx_isoc_copy); 779 dev->video_mode.max_pkt_size,
780 cx231xx_isoc_copy);
783 if (rc < 0) 781 if (rc < 0)
784 goto fail; 782 goto fail;
785 } 783 }
@@ -787,18 +785,18 @@ buffer_prepare(struct videobuf_queue *vq, struct videobuf_buffer *vb,
787 buf->vb.state = VIDEOBUF_PREPARED; 785 buf->vb.state = VIDEOBUF_PREPARED;
788 return 0; 786 return 0;
789 787
790fail: 788 fail:
791 free_buffer(vq, buf); 789 free_buffer(vq, buf);
792 return rc; 790 return rc;
793} 791}
794 792
795static void 793static void buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb)
796buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb)
797{ 794{
798 struct cx231xx_buffer *buf = container_of(vb, struct cx231xx_buffer, vb); 795 struct cx231xx_buffer *buf =
799 struct cx231xx_fh *fh = vq->priv_data; 796 container_of(vb, struct cx231xx_buffer, vb);
800 struct cx231xx *dev = fh->dev; 797 struct cx231xx_fh *fh = vq->priv_data;
801 struct cx231xx_dmaqueue *vidq = &dev->video_mode.vidq; 798 struct cx231xx *dev = fh->dev;
799 struct cx231xx_dmaqueue *vidq = &dev->video_mode.vidq;
802 800
803 buf->vb.state = VIDEOBUF_QUEUED; 801 buf->vb.state = VIDEOBUF_QUEUED;
804 list_add_tail(&buf->vb.queue, &vidq->active); 802 list_add_tail(&buf->vb.queue, &vidq->active);
@@ -806,11 +804,12 @@ buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb)
806} 804}
807 805
808static void buffer_release(struct videobuf_queue *vq, 806static void buffer_release(struct videobuf_queue *vq,
809 struct videobuf_buffer *vb) 807 struct videobuf_buffer *vb)
810{ 808{
811 struct cx231xx_buffer *buf = container_of(vb, struct cx231xx_buffer, vb); 809 struct cx231xx_buffer *buf =
812 struct cx231xx_fh *fh = vq->priv_data; 810 container_of(vb, struct cx231xx_buffer, vb);
813 struct cx231xx *dev = (struct cx231xx *)fh->dev; 811 struct cx231xx_fh *fh = vq->priv_data;
812 struct cx231xx *dev = (struct cx231xx *)fh->dev;
814 813
815 cx231xx_isocdbg("cx231xx: called buffer_release\n"); 814 cx231xx_isocdbg("cx231xx: called buffer_release\n");
816 815
@@ -818,15 +817,14 @@ static void buffer_release(struct videobuf_queue *vq,
818} 817}
819 818
820static struct videobuf_queue_ops cx231xx_video_qops = { 819static struct videobuf_queue_ops cx231xx_video_qops = {
821 .buf_setup = buffer_setup, 820 .buf_setup = buffer_setup,
822 .buf_prepare = buffer_prepare, 821 .buf_prepare = buffer_prepare,
823 .buf_queue = buffer_queue, 822 .buf_queue = buffer_queue,
824 .buf_release = buffer_release, 823 .buf_release = buffer_release,
825}; 824};
826 825
827/********************* v4l2 interface **************************************/ 826/********************* v4l2 interface **************************************/
828 827
829
830void video_mux(struct cx231xx *dev, int index) 828void video_mux(struct cx231xx *dev, int index)
831{ 829{
832 830
@@ -837,40 +835,41 @@ void video_mux(struct cx231xx *dev, int index)
837 dev->video_input = index; 835 dev->video_input = index;
838 dev->ctl_ainput = INPUT(index)->amux; 836 dev->ctl_ainput = INPUT(index)->amux;
839 837
840 cx231xx_set_video_input_mux(dev,index); 838 cx231xx_set_video_input_mux(dev, index);
841 839
842 cx231xx_i2c_call_clients(&dev->i2c_bus[0], VIDIOC_INT_S_VIDEO_ROUTING, &route); 840 cx231xx_i2c_call_clients(&dev->i2c_bus[0], VIDIOC_INT_S_VIDEO_ROUTING,
841 &route);
843 842
844 cx231xx_set_audio_input(dev, dev->ctl_ainput ); 843 cx231xx_set_audio_input(dev, dev->ctl_ainput);
845 844
846 cx231xx_info("video_mux : %d\n", index); 845 cx231xx_info("video_mux : %d\n", index);
847 846
848 /* do mode control overrides if required */ 847 /* do mode control overrides if required */
849 cx231xx_do_mode_ctrl_overrides(dev); 848 cx231xx_do_mode_ctrl_overrides(dev);
850} 849}
851 850
852/* Usage lock check functions */ 851/* Usage lock check functions */
853static int res_get(struct cx231xx_fh *fh) 852static int res_get(struct cx231xx_fh *fh)
854{ 853{
855 struct cx231xx *dev = fh->dev; 854 struct cx231xx *dev = fh->dev;
856 int rc = 0; 855 int rc = 0;
857 856
858 /* This instance already has stream_on */ 857 /* This instance already has stream_on */
859 if (fh->stream_on) 858 if (fh->stream_on)
860 return rc; 859 return rc;
861 860
862 if(fh->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) { 861 if (fh->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) {
863 if (dev->stream_on) 862 if (dev->stream_on)
864 return -EBUSY; 863 return -EBUSY;
865 dev->stream_on = 1; 864 dev->stream_on = 1;
866 } else if(fh->type == V4L2_BUF_TYPE_VBI_CAPTURE) { 865 } else if (fh->type == V4L2_BUF_TYPE_VBI_CAPTURE) {
867 if (dev->vbi_stream_on) 866 if (dev->vbi_stream_on)
868 return -EBUSY; 867 return -EBUSY;
869 dev->vbi_stream_on = 1; 868 dev->vbi_stream_on = 1;
870 } else 869 } else
871 return -EINVAL; 870 return -EINVAL;
872 871
873 fh->stream_on = 1; 872 fh->stream_on = 1;
874 873
875 return rc; 874 return rc;
876} 875}
@@ -882,14 +881,14 @@ static int res_check(struct cx231xx_fh *fh)
882 881
883static void res_free(struct cx231xx_fh *fh) 882static void res_free(struct cx231xx_fh *fh)
884{ 883{
885 struct cx231xx *dev = fh->dev; 884 struct cx231xx *dev = fh->dev;
886 885
887 fh->stream_on = 0; 886 fh->stream_on = 0;
888 887
889 if(fh->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) 888 if (fh->type == V4L2_BUF_TYPE_VIDEO_CAPTURE)
890 dev->stream_on = 0; 889 dev->stream_on = 0;
891 if(fh->type == V4L2_BUF_TYPE_VBI_CAPTURE) 890 if (fh->type == V4L2_BUF_TYPE_VBI_CAPTURE)
892 dev->vbi_stream_on = 0; 891 dev->vbi_stream_on = 0;
893} 892}
894 893
895static int check_dev(struct cx231xx *dev) 894static int check_dev(struct cx231xx *dev)
@@ -901,18 +900,18 @@ static int check_dev(struct cx231xx *dev)
901 900
902 if (dev->state & DEV_MISCONFIGURED) { 901 if (dev->state & DEV_MISCONFIGURED) {
903 cx231xx_errdev("v4l2 ioctl: device is misconfigured; " 902 cx231xx_errdev("v4l2 ioctl: device is misconfigured; "
904 "close and open it again\n"); 903 "close and open it again\n");
905 return -EIO; 904 return -EIO;
906 } 905 }
907 return 0; 906 return 0;
908} 907}
909 908
910void get_scale(struct cx231xx *dev, 909void get_scale(struct cx231xx *dev,
911 unsigned int width, unsigned int height, 910 unsigned int width, unsigned int height,
912 unsigned int *hscale, unsigned int *vscale) 911 unsigned int *hscale, unsigned int *vscale)
913{ 912{
914 unsigned int maxw = norm_maxw(dev); 913 unsigned int maxw = norm_maxw(dev);
915 unsigned int maxh = norm_maxh(dev); 914 unsigned int maxh = norm_maxh(dev);
916 915
917 *hscale = (((unsigned long)maxw) << 12) / width - 4096L; 916 *hscale = (((unsigned long)maxw) << 12) / width - 4096L;
918 if (*hscale >= 0x4000) 917 if (*hscale >= 0x4000)
@@ -922,8 +921,8 @@ void get_scale(struct cx231xx *dev,
922 if (*vscale >= 0x4000) 921 if (*vscale >= 0x4000)
923 *vscale = 0x3fff; 922 *vscale = 0x3fff;
924 923
925 dev->hscale = *hscale; 924 dev->hscale = *hscale;
926 dev->vscale = *vscale; 925 dev->vscale = *vscale;
927 926
928} 927}
929 928
@@ -932,10 +931,10 @@ void get_scale(struct cx231xx *dev,
932 ------------------------------------------------------------------*/ 931 ------------------------------------------------------------------*/
933 932
934static int vidioc_g_fmt_vid_cap(struct file *file, void *priv, 933static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
935 struct v4l2_format *f) 934 struct v4l2_format *f)
936{ 935{
937 struct cx231xx_fh *fh = priv; 936 struct cx231xx_fh *fh = priv;
938 struct cx231xx *dev = fh->dev; 937 struct cx231xx *dev = fh->dev;
939 938
940 mutex_lock(&dev->lock); 939 mutex_lock(&dev->lock);
941 940
@@ -943,7 +942,7 @@ static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
943 f->fmt.pix.height = dev->height; 942 f->fmt.pix.height = dev->height;
944 f->fmt.pix.pixelformat = dev->format->fourcc;; 943 f->fmt.pix.pixelformat = dev->format->fourcc;;
945 f->fmt.pix.bytesperline = (dev->width * dev->format->depth + 7) >> 3;; 944 f->fmt.pix.bytesperline = (dev->width * dev->format->depth + 7) >> 3;;
946 f->fmt.pix.sizeimage = f->fmt.pix.bytesperline * dev->height; 945 f->fmt.pix.sizeimage = f->fmt.pix.bytesperline * dev->height;
947 f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M; 946 f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
948 947
949 f->fmt.pix.field = V4L2_FIELD_INTERLACED; 948 f->fmt.pix.field = V4L2_FIELD_INTERLACED;
@@ -964,21 +963,21 @@ static struct cx231xx_fmt *format_by_fourcc(unsigned int fourcc)
964} 963}
965 964
966static int vidioc_try_fmt_vid_cap(struct file *file, void *priv, 965static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
967 struct v4l2_format *f) 966 struct v4l2_format *f)
968{ 967{
969 struct cx231xx_fh *fh = priv; 968 struct cx231xx_fh *fh = priv;
970 struct cx231xx *dev = fh->dev; 969 struct cx231xx *dev = fh->dev;
971 int width = f->fmt.pix.width; 970 int width = f->fmt.pix.width;
972 int height = f->fmt.pix.height; 971 int height = f->fmt.pix.height;
973 unsigned int maxw = norm_maxw(dev); 972 unsigned int maxw = norm_maxw(dev);
974 unsigned int maxh = norm_maxh(dev); 973 unsigned int maxh = norm_maxh(dev);
975 unsigned int hscale, vscale; 974 unsigned int hscale, vscale;
976 struct cx231xx_fmt *fmt; 975 struct cx231xx_fmt *fmt;
977 976
978 fmt = format_by_fourcc(f->fmt.pix.pixelformat); 977 fmt = format_by_fourcc(f->fmt.pix.pixelformat);
979 if (!fmt) { 978 if (!fmt) {
980 cx231xx_videodbg("Fourcc format (%08x) invalid.\n", 979 cx231xx_videodbg("Fourcc format (%08x) invalid.\n",
981 f->fmt.pix.pixelformat); 980 f->fmt.pix.pixelformat);
982 return -EINVAL; 981 return -EINVAL;
983 } 982 }
984 983
@@ -1013,23 +1012,22 @@ static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
1013} 1012}
1014 1013
1015static int vidioc_s_fmt_vid_cap(struct file *file, void *priv, 1014static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
1016 struct v4l2_format *f) 1015 struct v4l2_format *f)
1017{ 1016{
1018 struct cx231xx_fh *fh = priv; 1017 struct cx231xx_fh *fh = priv;
1019 struct cx231xx *dev = fh->dev; 1018 struct cx231xx *dev = fh->dev;
1020 int rc; 1019 int rc;
1021 struct cx231xx_fmt *fmt; 1020 struct cx231xx_fmt *fmt;
1022 1021
1023 rc = check_dev(dev); 1022 rc = check_dev(dev);
1024 if (rc < 0) 1023 if (rc < 0)
1025 return rc; 1024 return rc;
1026 1025
1027
1028 mutex_lock(&dev->lock); 1026 mutex_lock(&dev->lock);
1029 1027
1030 vidioc_try_fmt_vid_cap(file, priv, f); 1028 vidioc_try_fmt_vid_cap(file, priv, f);
1031 1029
1032 fmt = format_by_fourcc(f->fmt.pix.pixelformat); 1030 fmt = format_by_fourcc(f->fmt.pix.pixelformat);
1033 if (!fmt) { 1031 if (!fmt) {
1034 rc = -EINVAL; 1032 rc = -EINVAL;
1035 goto out; 1033 goto out;
@@ -1050,23 +1048,23 @@ static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
1050 /* set new image size */ 1048 /* set new image size */
1051 dev->width = f->fmt.pix.width; 1049 dev->width = f->fmt.pix.width;
1052 dev->height = f->fmt.pix.height; 1050 dev->height = f->fmt.pix.height;
1053 dev->format = fmt; 1051 dev->format = fmt;
1054 get_scale(dev, dev->width, dev->height, &dev->hscale, &dev->vscale); 1052 get_scale(dev, dev->width, dev->height, &dev->hscale, &dev->vscale);
1055 1053
1056 cx231xx_i2c_call_clients(&dev->i2c_bus[0], VIDIOC_S_FMT, f); 1054 cx231xx_i2c_call_clients(&dev->i2c_bus[0], VIDIOC_S_FMT, f);
1057 1055
1058 /* Set the correct alternate setting for this resolution */ 1056 /* Set the correct alternate setting for this resolution */
1059 cx231xx_resolution_set(dev); 1057 cx231xx_resolution_set(dev);
1060 1058
1061out: 1059 out:
1062 mutex_unlock(&dev->lock); 1060 mutex_unlock(&dev->lock);
1063 return rc; 1061 return rc;
1064} 1062}
1065 1063
1066static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *id) 1064static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id * id)
1067{ 1065{
1068 struct cx231xx_fh *fh = priv; 1066 struct cx231xx_fh *fh = priv;
1069 struct cx231xx *dev = fh->dev; 1067 struct cx231xx *dev = fh->dev;
1070 1068
1071 *id = dev->norm; 1069 *id = dev->norm;
1072 return 0; 1070 return 0;
@@ -1074,21 +1072,20 @@ static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *id)
1074 1072
1075static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id * norm) 1073static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id * norm)
1076{ 1074{
1077 struct cx231xx_fh *fh = priv; 1075 struct cx231xx_fh *fh = priv;
1078 struct cx231xx *dev = fh->dev; 1076 struct cx231xx *dev = fh->dev;
1079 struct v4l2_format f; 1077 struct v4l2_format f;
1080 int rc; 1078 int rc;
1081 1079
1082 rc = check_dev(dev); 1080 rc = check_dev(dev);
1083 if (rc < 0) 1081 if (rc < 0)
1084 return rc; 1082 return rc;
1085 1083
1086 cx231xx_info("vidioc_s_std : 0x%x\n", (unsigned int)*norm); 1084 cx231xx_info("vidioc_s_std : 0x%x\n", (unsigned int)*norm);
1087 1085
1088 mutex_lock(&dev->lock); 1086 mutex_lock(&dev->lock);
1089 dev->norm = *norm; 1087 dev->norm = *norm;
1090 1088
1091
1092 /* Adjusts width/height, if needed */ 1089 /* Adjusts width/height, if needed */
1093 f.fmt.pix.width = dev->width; 1090 f.fmt.pix.width = dev->width;
1094 f.fmt.pix.height = dev->height; 1091 f.fmt.pix.height = dev->height;
@@ -1103,29 +1100,29 @@ static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id * norm)
1103 1100
1104 mutex_unlock(&dev->lock); 1101 mutex_unlock(&dev->lock);
1105 1102
1106 cx231xx_resolution_set(dev); 1103 cx231xx_resolution_set(dev);
1107 1104
1108 /* do mode control overrides */ 1105 /* do mode control overrides */
1109 cx231xx_do_mode_ctrl_overrides(dev); 1106 cx231xx_do_mode_ctrl_overrides(dev);
1110 1107
1111 return 0; 1108 return 0;
1112} 1109}
1113 1110
1114static const char *iname[] = { 1111static const char *iname[] = {
1115 [CX231XX_VMUX_COMPOSITE1] = "Composite1", 1112 [CX231XX_VMUX_COMPOSITE1] = "Composite1",
1116 [CX231XX_VMUX_SVIDEO] = "S-Video", 1113 [CX231XX_VMUX_SVIDEO] = "S-Video",
1117 [CX231XX_VMUX_TELEVISION] = "Television", 1114 [CX231XX_VMUX_TELEVISION] = "Television",
1118 [CX231XX_VMUX_CABLE] = "Cable TV", 1115 [CX231XX_VMUX_CABLE] = "Cable TV",
1119 [CX231XX_VMUX_DVB] = "DVB", 1116 [CX231XX_VMUX_DVB] = "DVB",
1120 [CX231XX_VMUX_DEBUG] = "for debug only", 1117 [CX231XX_VMUX_DEBUG] = "for debug only",
1121}; 1118};
1122 1119
1123static int vidioc_enum_input(struct file *file, void *priv, 1120static int vidioc_enum_input(struct file *file, void *priv,
1124 struct v4l2_input *i) 1121 struct v4l2_input *i)
1125{ 1122{
1126 struct cx231xx_fh *fh = priv; 1123 struct cx231xx_fh *fh = priv;
1127 struct cx231xx *dev = fh->dev; 1124 struct cx231xx *dev = fh->dev;
1128 unsigned int n; 1125 unsigned int n;
1129 1126
1130 n = i->index; 1127 n = i->index;
1131 if (n >= MAX_CX231XX_INPUT) 1128 if (n >= MAX_CX231XX_INPUT)
@@ -1139,7 +1136,7 @@ static int vidioc_enum_input(struct file *file, void *priv,
1139 strcpy(i->name, iname[INPUT(n)->type]); 1136 strcpy(i->name, iname[INPUT(n)->type]);
1140 1137
1141 if ((CX231XX_VMUX_TELEVISION == INPUT(n)->type) || 1138 if ((CX231XX_VMUX_TELEVISION == INPUT(n)->type) ||
1142 (CX231XX_VMUX_CABLE == INPUT(n)->type)) 1139 (CX231XX_VMUX_CABLE == INPUT(n)->type))
1143 i->type = V4L2_INPUT_TYPE_TUNER; 1140 i->type = V4L2_INPUT_TYPE_TUNER;
1144 1141
1145 i->std = dev->vdev->tvnorms; 1142 i->std = dev->vdev->tvnorms;
@@ -1149,8 +1146,8 @@ static int vidioc_enum_input(struct file *file, void *priv,
1149 1146
1150static int vidioc_g_input(struct file *file, void *priv, unsigned int *i) 1147static int vidioc_g_input(struct file *file, void *priv, unsigned int *i)
1151{ 1148{
1152 struct cx231xx_fh *fh = priv; 1149 struct cx231xx_fh *fh = priv;
1153 struct cx231xx *dev = fh->dev; 1150 struct cx231xx *dev = fh->dev;
1154 1151
1155 *i = dev->video_input; 1152 *i = dev->video_input;
1156 1153
@@ -1159,9 +1156,9 @@ static int vidioc_g_input(struct file *file, void *priv, unsigned int *i)
1159 1156
1160static int vidioc_s_input(struct file *file, void *priv, unsigned int i) 1157static int vidioc_s_input(struct file *file, void *priv, unsigned int i)
1161{ 1158{
1162 struct cx231xx_fh *fh = priv; 1159 struct cx231xx_fh *fh = priv;
1163 struct cx231xx *dev = fh->dev; 1160 struct cx231xx *dev = fh->dev;
1164 int rc; 1161 int rc;
1165 1162
1166 rc = check_dev(dev); 1163 rc = check_dev(dev);
1167 if (rc < 0) 1164 if (rc < 0)
@@ -1182,8 +1179,8 @@ static int vidioc_s_input(struct file *file, void *priv, unsigned int i)
1182 1179
1183static int vidioc_g_audio(struct file *file, void *priv, struct v4l2_audio *a) 1180static int vidioc_g_audio(struct file *file, void *priv, struct v4l2_audio *a)
1184{ 1181{
1185 struct cx231xx_fh *fh = priv; 1182 struct cx231xx_fh *fh = priv;
1186 struct cx231xx *dev = fh->dev; 1183 struct cx231xx *dev = fh->dev;
1187 1184
1188 switch (a->index) { 1185 switch (a->index) {
1189 case CX231XX_AMUX_VIDEO: 1186 case CX231XX_AMUX_VIDEO:
@@ -1204,35 +1201,34 @@ static int vidioc_g_audio(struct file *file, void *priv, struct v4l2_audio *a)
1204 1201
1205static int vidioc_s_audio(struct file *file, void *priv, struct v4l2_audio *a) 1202static int vidioc_s_audio(struct file *file, void *priv, struct v4l2_audio *a)
1206{ 1203{
1207 struct cx231xx_fh *fh = priv; 1204 struct cx231xx_fh *fh = priv;
1208 struct cx231xx *dev = fh->dev; 1205 struct cx231xx *dev = fh->dev;
1209 int status = 0; 1206 int status = 0;
1210
1211 1207
1212 /* Doesn't allow manual routing */ 1208 /* Doesn't allow manual routing */
1213 if (a->index != dev->ctl_ainput) 1209 if (a->index != dev->ctl_ainput)
1214 return -EINVAL; 1210 return -EINVAL;
1215 1211
1216 dev->ctl_ainput = INPUT(a->index)->amux; 1212 dev->ctl_ainput = INPUT(a->index)->amux;
1217 status = cx231xx_set_audio_input(dev, dev->ctl_ainput); 1213 status = cx231xx_set_audio_input(dev, dev->ctl_ainput);
1218 1214
1219 return status; 1215 return status;
1220} 1216}
1221 1217
1222static int vidioc_queryctrl(struct file *file, void *priv, 1218static int vidioc_queryctrl(struct file *file, void *priv,
1223 struct v4l2_queryctrl *qc) 1219 struct v4l2_queryctrl *qc)
1224{ 1220{
1225 struct cx231xx_fh *fh = priv; 1221 struct cx231xx_fh *fh = priv;
1226 struct cx231xx *dev = fh->dev; 1222 struct cx231xx *dev = fh->dev;
1227 int id = qc->id; 1223 int id = qc->id;
1228 int i; 1224 int i;
1229 int rc; 1225 int rc;
1230 1226
1231 rc = check_dev(dev); 1227 rc = check_dev(dev);
1232 if (rc < 0) 1228 if (rc < 0)
1233 return rc; 1229 return rc;
1234 1230
1235 qc->id = v4l2_ctrl_next(ctrl_classes, qc->id); 1231 qc->id = v4l2_ctrl_next(ctrl_classes, qc->id);
1236 if (unlikely(qc->id == 0)) 1232 if (unlikely(qc->id == 0))
1237 return -EINVAL; 1233 return -EINVAL;
1238 1234
@@ -1240,8 +1236,7 @@ static int vidioc_queryctrl(struct file *file, void *priv,
1240 1236
1241 qc->id = id; 1237 qc->id = id;
1242 1238
1243 if (qc->id < V4L2_CID_BASE || 1239 if (qc->id < V4L2_CID_BASE || qc->id >= V4L2_CID_LASTP1)
1244 qc->id >= V4L2_CID_LASTP1)
1245 return -EINVAL; 1240 return -EINVAL;
1246 1241
1247 for (i = 0; i < CX231XX_CTLS; i++) 1242 for (i = 0; i < CX231XX_CTLS; i++)
@@ -1255,7 +1250,7 @@ static int vidioc_queryctrl(struct file *file, void *priv,
1255 *qc = cx231xx_ctls[i].v; 1250 *qc = cx231xx_ctls[i].v;
1256 1251
1257 mutex_lock(&dev->lock); 1252 mutex_lock(&dev->lock);
1258 cx231xx_i2c_call_clients(&dev->i2c_bus[0], VIDIOC_QUERYCTRL, qc); 1253 cx231xx_i2c_call_clients(&dev->i2c_bus[0], VIDIOC_QUERYCTRL, qc);
1259 mutex_unlock(&dev->lock); 1254 mutex_unlock(&dev->lock);
1260 1255
1261 if (qc->type) 1256 if (qc->type)
@@ -1265,11 +1260,11 @@ static int vidioc_queryctrl(struct file *file, void *priv,
1265} 1260}
1266 1261
1267static int vidioc_g_ctrl(struct file *file, void *priv, 1262static int vidioc_g_ctrl(struct file *file, void *priv,
1268 struct v4l2_control *ctrl) 1263 struct v4l2_control *ctrl)
1269{ 1264{
1270 struct cx231xx_fh *fh = priv; 1265 struct cx231xx_fh *fh = priv;
1271 struct cx231xx *dev = fh->dev; 1266 struct cx231xx *dev = fh->dev;
1272 int rc; 1267 int rc;
1273 1268
1274 rc = check_dev(dev); 1269 rc = check_dev(dev);
1275 if (rc < 0) 1270 if (rc < 0)
@@ -1284,11 +1279,11 @@ static int vidioc_g_ctrl(struct file *file, void *priv,
1284} 1279}
1285 1280
1286static int vidioc_s_ctrl(struct file *file, void *priv, 1281static int vidioc_s_ctrl(struct file *file, void *priv,
1287 struct v4l2_control *ctrl) 1282 struct v4l2_control *ctrl)
1288{ 1283{
1289 struct cx231xx_fh *fh = priv; 1284 struct cx231xx_fh *fh = priv;
1290 struct cx231xx *dev = fh->dev; 1285 struct cx231xx *dev = fh->dev;
1291 int rc; 1286 int rc;
1292 1287
1293 rc = check_dev(dev); 1288 rc = check_dev(dev);
1294 if (rc < 0) 1289 if (rc < 0)
@@ -1302,12 +1297,11 @@ static int vidioc_s_ctrl(struct file *file, void *priv,
1302 return rc; 1297 return rc;
1303} 1298}
1304 1299
1305static int vidioc_g_tuner(struct file *file, void *priv, 1300static int vidioc_g_tuner(struct file *file, void *priv, struct v4l2_tuner *t)
1306 struct v4l2_tuner *t)
1307{ 1301{
1308 struct cx231xx_fh *fh = priv; 1302 struct cx231xx_fh *fh = priv;
1309 struct cx231xx *dev = fh->dev; 1303 struct cx231xx *dev = fh->dev;
1310 int rc; 1304 int rc;
1311 1305
1312 rc = check_dev(dev); 1306 rc = check_dev(dev);
1313 if (rc < 0) 1307 if (rc < 0)
@@ -1318,20 +1312,19 @@ static int vidioc_g_tuner(struct file *file, void *priv,
1318 1312
1319 strcpy(t->name, "Tuner"); 1313 strcpy(t->name, "Tuner");
1320 1314
1321 t->type = V4L2_TUNER_ANALOG_TV; 1315 t->type = V4L2_TUNER_ANALOG_TV;
1322 t->capability = V4L2_TUNER_CAP_NORM; 1316 t->capability = V4L2_TUNER_CAP_NORM;
1323 t->rangehigh = 0xffffffffUL; 1317 t->rangehigh = 0xffffffffUL;
1324 t->signal = 0xffff ; /* LOCKED */ 1318 t->signal = 0xffff; /* LOCKED */
1325 1319
1326 return 0; 1320 return 0;
1327} 1321}
1328 1322
1329static int vidioc_s_tuner(struct file *file, void *priv, 1323static int vidioc_s_tuner(struct file *file, void *priv, struct v4l2_tuner *t)
1330 struct v4l2_tuner *t)
1331{ 1324{
1332 struct cx231xx_fh *fh = priv; 1325 struct cx231xx_fh *fh = priv;
1333 struct cx231xx *dev = fh->dev; 1326 struct cx231xx *dev = fh->dev;
1334 int rc; 1327 int rc;
1335 1328
1336 rc = check_dev(dev); 1329 rc = check_dev(dev);
1337 if (rc < 0) 1330 if (rc < 0)
@@ -1350,28 +1343,28 @@ static int vidioc_s_tuner(struct file *file, void *priv,
1350} 1343}
1351 1344
1352static int vidioc_g_frequency(struct file *file, void *priv, 1345static int vidioc_g_frequency(struct file *file, void *priv,
1353 struct v4l2_frequency *f) 1346 struct v4l2_frequency *f)
1354{ 1347{
1355 struct cx231xx_fh *fh = priv; 1348 struct cx231xx_fh *fh = priv;
1356 struct cx231xx *dev = fh->dev; 1349 struct cx231xx *dev = fh->dev;
1357 1350
1358 mutex_lock(&dev->lock); 1351 mutex_lock(&dev->lock);
1359 f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV; 1352 f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
1360 f->frequency = dev->ctl_freq; 1353 f->frequency = dev->ctl_freq;
1361 1354
1362 cx231xx_i2c_call_clients(&dev->i2c_bus[1], VIDIOC_G_FREQUENCY, f); 1355 cx231xx_i2c_call_clients(&dev->i2c_bus[1], VIDIOC_G_FREQUENCY, f);
1363 1356
1364 mutex_unlock(&dev->lock); 1357 mutex_unlock(&dev->lock);
1365 1358
1366 return 0; 1359 return 0;
1367} 1360}
1368 1361
1369static int vidioc_s_frequency(struct file *file, void *priv, 1362static int vidioc_s_frequency(struct file *file, void *priv,
1370 struct v4l2_frequency *f) 1363 struct v4l2_frequency *f)
1371{ 1364{
1372 struct cx231xx_fh *fh = priv; 1365 struct cx231xx_fh *fh = priv;
1373 struct cx231xx *dev = fh->dev; 1366 struct cx231xx *dev = fh->dev;
1374 int rc; 1367 int rc;
1375 1368
1376 rc = check_dev(dev); 1369 rc = check_dev(dev);
1377 if (rc < 0) 1370 if (rc < 0)
@@ -1385,106 +1378,121 @@ static int vidioc_s_frequency(struct file *file, void *priv,
1385 if (unlikely(1 == fh->radio && f->type != V4L2_TUNER_RADIO)) 1378 if (unlikely(1 == fh->radio && f->type != V4L2_TUNER_RADIO))
1386 return -EINVAL; 1379 return -EINVAL;
1387 1380
1388 /* set pre channel change settings in DIF first */ 1381 /* set pre channel change settings in DIF first */
1389 rc = cx231xx_tuner_pre_channel_change(dev); 1382 rc = cx231xx_tuner_pre_channel_change(dev);
1390 1383
1391 mutex_lock(&dev->lock); 1384 mutex_lock(&dev->lock);
1392 1385
1393 dev->ctl_freq = f->frequency; 1386 dev->ctl_freq = f->frequency;
1394 1387
1395 if(dev->tuner_type == TUNER_XC5000) { 1388 if (dev->tuner_type == TUNER_XC5000) {
1396 if( dev->cx231xx_set_analog_freq != NULL ) { 1389 if (dev->cx231xx_set_analog_freq != NULL) {
1397 dev->cx231xx_set_analog_freq(dev, f->frequency ); 1390 dev->cx231xx_set_analog_freq(dev, f->frequency);
1398 } 1391 }
1399 } else { 1392 } else {
1400 cx231xx_i2c_call_clients(&dev->i2c_bus[1], VIDIOC_S_FREQUENCY, f); 1393 cx231xx_i2c_call_clients(&dev->i2c_bus[1], VIDIOC_S_FREQUENCY,
1394 f);
1401 } 1395 }
1402 1396
1403 mutex_unlock(&dev->lock); 1397 mutex_unlock(&dev->lock);
1404 1398
1405 /* set post channel change settings in DIF first */ 1399 /* set post channel change settings in DIF first */
1406 rc = cx231xx_tuner_post_channel_change(dev); 1400 rc = cx231xx_tuner_post_channel_change(dev);
1407 1401
1408 cx231xx_info("Set New FREQUENCY to %d\n",f->frequency); 1402 cx231xx_info("Set New FREQUENCY to %d\n", f->frequency);
1409 1403
1410 return rc; 1404 return rc;
1411} 1405}
1412 1406
1413#ifdef CONFIG_VIDEO_ADV_DEBUG 1407#ifdef CONFIG_VIDEO_ADV_DEBUG
1414 1408
1415
1416/* 1409/*
1417 -R, --list-registers=type=<host/i2cdrv/i2caddr>,chip=<chip>[,min=<addr>,max=<addr>] 1410 -R, --list-registers=type=<host/i2cdrv/i2caddr>,chip=<chip>[,min=<addr>,max=<addr>]
1418 dump registers from <min> to <max> [VIDIOC_DBG_G_REGISTER] 1411 dump registers from <min> to <max> [VIDIOC_DBG_G_REGISTER]
1419 -r, --set-register=type=<host/i2cdrv/i2caddr>,chip=<chip>,reg=<addr>,val=<val> 1412 -r, --set-register=type=<host/i2cdrv/i2caddr>,chip=<chip>,reg=<addr>,val=<val>
1420 set the register [VIDIOC_DBG_S_REGISTER] 1413 set the register [VIDIOC_DBG_S_REGISTER]
1421 1414
1422 if type == host, then <chip> is the hosts chip ID (default 0) 1415 if type == host, then <chip> is the hosts chip ID (default 0)
1423 if type == i2cdrv (default), then <chip> is the I2C driver name or ID 1416 if type == i2cdrv (default), then <chip> is the I2C driver name or ID
1424 if type == i2caddr, then <chip> is the 7-bit I2C address 1417 if type == i2caddr, then <chip> is the 7-bit I2C address
1425*/ 1418*/
1426 1419
1427
1428static int vidioc_g_register(struct file *file, void *priv, 1420static int vidioc_g_register(struct file *file, void *priv,
1429 struct v4l2_dbg_register *reg) 1421 struct v4l2_dbg_register *reg)
1430{ 1422{
1431 struct cx231xx_fh *fh = priv; 1423 struct cx231xx_fh *fh = priv;
1432 struct cx231xx *dev = fh->dev; 1424 struct cx231xx *dev = fh->dev;
1433 int ret = 0; 1425 int ret = 0;
1434 u8 value[4] ={0,0,0,0}; 1426 u8 value[4] = { 0, 0, 0, 0 };
1435 u32 data = 0; 1427 u32 data = 0;
1436 1428
1437 switch (reg->match.type) { 1429 switch (reg->match.type) {
1438 case V4L2_CHIP_MATCH_HOST: 1430 case V4L2_CHIP_MATCH_HOST:
1439 switch(reg->match.addr) { 1431 switch (reg->match.addr) {
1440 case 0: /* Cx231xx - internal registers */ 1432 case 0: /* Cx231xx - internal registers */
1441 ret = cx231xx_read_ctrl_reg(dev,VRT_GET_REGISTER, (u16) reg->reg, value, 4); 1433 ret =
1442 reg->val = value[0] | value[1] << 8 | value[2] << 16 | value[3] << 24; 1434 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER,
1443 break; 1435 (u16) reg->reg, value, 4);
1444 case 1: /* Colibri - read byte */ 1436 reg->val =
1445 ret = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS, (u16) reg->reg, 2, &data, 1); 1437 value[0] | value[1] << 8 | value[2] << 16 | value[3]
1446 reg->val = le32_to_cpu(data & 0xff); 1438 << 24;
1447 break; 1439 break;
1448 case 14: /* Colibri - read dword */ 1440 case 1: /* Colibri - read byte */
1449 ret = cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS, (u16) reg->reg, 2, &data, 4); 1441 ret =
1450 reg->val = le32_to_cpu(data); 1442 cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
1451 break; 1443 (u16) reg->reg, 2, &data, 1);
1452 case 2: /* Hammerhead - read byte */ 1444 reg->val = le32_to_cpu(data & 0xff);
1453 ret = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, (u16) reg->reg, 2, &data, 1); 1445 break;
1454 reg->val = le32_to_cpu(data & 0xff); 1446 case 14: /* Colibri - read dword */
1455 break; 1447 ret =
1456 case 24: /* Hammerhead - read dword */ 1448 cx231xx_read_i2c_data(dev, Colibri_DEVICE_ADDRESS,
1457 ret = cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, (u16) reg->reg, 2, &data, 4); 1449 (u16) reg->reg, 2, &data, 4);
1458 reg->val = le32_to_cpu(data); 1450 reg->val = le32_to_cpu(data);
1459 break; 1451 break;
1460 case 3: /* flatiron - read byte */ 1452 case 2: /* Hammerhead - read byte */
1461 ret = cx231xx_read_i2c_data(dev, Flatrion_DEVICE_ADDRESS, (u16) reg->reg, 1, &data, 1); 1453 ret =
1462 reg->val = le32_to_cpu(data & 0xff); 1454 cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1463 break; 1455 (u16) reg->reg, 2, &data, 1);
1464 case 34: /* flatiron - read dword */ 1456 reg->val = le32_to_cpu(data & 0xff);
1465 ret = cx231xx_read_i2c_data(dev, Flatrion_DEVICE_ADDRESS, (u16) reg->reg, 1, &data, 4); 1457 break;
1466 reg->val = le32_to_cpu(data); 1458 case 24: /* Hammerhead - read dword */
1467 break; 1459 ret =
1468 } 1460 cx231xx_read_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS,
1469 return ret < 0?ret:0; 1461 (u16) reg->reg, 2, &data, 4);
1470 1462 reg->val = le32_to_cpu(data);
1471 case V4L2_CHIP_MATCH_I2C_DRIVER: 1463 break;
1472 cx231xx_i2c_call_clients(&dev->i2c_bus[0], VIDIOC_DBG_G_REGISTER, reg); 1464 case 3: /* flatiron - read byte */
1473 return 0; 1465 ret =
1474 case V4L2_CHIP_MATCH_I2C_ADDR: 1466 cx231xx_read_i2c_data(dev, Flatrion_DEVICE_ADDRESS,
1475 /* Not supported yet */ 1467 (u16) reg->reg, 1, &data, 1);
1476 return -EINVAL; 1468 reg->val = le32_to_cpu(data & 0xff);
1477 default: 1469 break;
1478 if (!v4l2_chip_match_host(&reg->match)) 1470 case 34: /* flatiron - read dword */
1479 return -EINVAL; 1471 ret =
1480 } 1472 cx231xx_read_i2c_data(dev, Flatrion_DEVICE_ADDRESS,
1473 (u16) reg->reg, 1, &data, 4);
1474 reg->val = le32_to_cpu(data);
1475 break;
1476 }
1477 return ret < 0 ? ret : 0;
1481 1478
1479 case V4L2_CHIP_MATCH_I2C_DRIVER:
1480 cx231xx_i2c_call_clients(&dev->i2c_bus[0],
1481 VIDIOC_DBG_G_REGISTER, reg);
1482 return 0;
1483 case V4L2_CHIP_MATCH_I2C_ADDR:
1484 /* Not supported yet */
1485 return -EINVAL;
1486 default:
1487 if (!v4l2_chip_match_host(&reg->match))
1488 return -EINVAL;
1489 }
1482 1490
1483 mutex_lock(&dev->lock); 1491 mutex_lock(&dev->lock);
1484 1492
1485 cx231xx_i2c_call_clients(&dev->i2c_bus[0], VIDIOC_DBG_G_REGISTER, reg); 1493 cx231xx_i2c_call_clients(&dev->i2c_bus[0], VIDIOC_DBG_G_REGISTER, reg);
1486 1494
1487 mutex_unlock(&dev->lock); 1495 mutex_unlock(&dev->lock);
1488 1496
1489 return ret; 1497 return ret;
1490} 1498}
@@ -1492,70 +1500,97 @@ static int vidioc_g_register(struct file *file, void *priv,
1492static int vidioc_s_register(struct file *file, void *priv, 1500static int vidioc_s_register(struct file *file, void *priv,
1493 struct v4l2_dbg_register *reg) 1501 struct v4l2_dbg_register *reg)
1494{ 1502{
1495 struct cx231xx_fh *fh = priv; 1503 struct cx231xx_fh *fh = priv;
1496 struct cx231xx *dev = fh->dev; 1504 struct cx231xx *dev = fh->dev;
1497 int ret = 0; 1505 int ret = 0;
1498 __le64 buf; 1506 __le64 buf;
1499 u32 value; 1507 u32 value;
1500 u8 data[4] ={0,0,0,0}; 1508 u8 data[4] = { 0, 0, 0, 0 };
1501 1509
1502 buf = cpu_to_le64(reg->val); 1510 buf = cpu_to_le64(reg->val);
1503 1511
1504 switch (reg->match.type) { 1512 switch (reg->match.type) {
1505 case V4L2_CHIP_MATCH_HOST: 1513 case V4L2_CHIP_MATCH_HOST:
1506 { 1514 {
1507 value = (u32) buf & 0xffffffff; 1515 value = (u32) buf & 0xffffffff;
1508 1516
1509 switch(reg->match.addr) { 1517 switch (reg->match.addr) {
1510 case 0: /* cx231xx internal registers */ 1518 case 0: /* cx231xx internal registers */
1511 data[0]=(u8)value; 1519 data[0] = (u8) value;
1512 data[1]=(u8)(value>>8); 1520 data[1] = (u8) (value >> 8);
1513 data[2]=(u8)(value>>16); 1521 data[2] = (u8) (value >> 16);
1514 data[3]=(u8)(value>>24); 1522 data[3] = (u8) (value >> 24);
1515 ret = cx231xx_write_ctrl_reg(dev,VRT_SET_REGISTER, (u16) reg->reg, data, 4); 1523 ret =
1516 break; 1524 cx231xx_write_ctrl_reg(dev,
1517 case 1: /* Colibri - read byte */ 1525 VRT_SET_REGISTER,
1518 ret = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, (u16) reg->reg, 2, value, 1); 1526 (u16) reg->reg, data,
1519 break; 1527 4);
1520 case 14: /* Colibri - read dword */ 1528 break;
1521 ret = cx231xx_write_i2c_data(dev, Colibri_DEVICE_ADDRESS, (u16) reg->reg, 2, value, 4); 1529 case 1: /* Colibri - read byte */
1522 break; 1530 ret =
1523 case 2: /* Hammerhead - read byte */ 1531 cx231xx_write_i2c_data(dev,
1524 ret = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, (u16) reg->reg, 2, value, 1); 1532 Colibri_DEVICE_ADDRESS,
1525 break; 1533 (u16) reg->reg, 2,
1526 case 24: /* Hammerhead - read dword */ 1534 value, 1);
1527 ret = cx231xx_write_i2c_data(dev, HAMMERHEAD_I2C_ADDRESS, (u16) reg->reg, 2, value, 4); 1535 break;
1528 break; 1536 case 14: /* Colibri - read dword */
1529 case 3: /* flatiron - read byte */ 1537 ret =
1530 ret = cx231xx_write_i2c_data(dev, Flatrion_DEVICE_ADDRESS, (u16) reg->reg, 1, value, 1); 1538 cx231xx_write_i2c_data(dev,
1531 break; 1539 Colibri_DEVICE_ADDRESS,
1532 case 34: /* flatiron - read dword */ 1540 (u16) reg->reg, 2,
1533 ret = cx231xx_write_i2c_data(dev, Flatrion_DEVICE_ADDRESS, (u16) reg->reg, 1, value, 4); 1541 value, 4);
1534 break; 1542 break;
1535 } 1543 case 2: /* Hammerhead - read byte */
1536 } 1544 ret =
1537 return ret < 0?ret:0; 1545 cx231xx_write_i2c_data(dev,
1538 1546 HAMMERHEAD_I2C_ADDRESS,
1539 default: 1547 (u16) reg->reg, 2,
1540 break; 1548 value, 1);
1541 } 1549 break;
1550 case 24: /* Hammerhead - read dword */
1551 ret =
1552 cx231xx_write_i2c_data(dev,
1553 HAMMERHEAD_I2C_ADDRESS,
1554 (u16) reg->reg, 2,
1555 value, 4);
1556 break;
1557 case 3: /* flatiron - read byte */
1558 ret =
1559 cx231xx_write_i2c_data(dev,
1560 Flatrion_DEVICE_ADDRESS,
1561 (u16) reg->reg, 1,
1562 value, 1);
1563 break;
1564 case 34: /* flatiron - read dword */
1565 ret =
1566 cx231xx_write_i2c_data(dev,
1567 Flatrion_DEVICE_ADDRESS,
1568 (u16) reg->reg, 1,
1569 value, 4);
1570 break;
1571 }
1572 }
1573 return ret < 0 ? ret : 0;
1574
1575 default:
1576 break;
1577 }
1542 1578
1543 mutex_lock(&dev->lock); 1579 mutex_lock(&dev->lock);
1544 1580
1545 cx231xx_i2c_call_clients(&dev->i2c_bus[0], VIDIOC_DBG_S_REGISTER, reg); 1581 cx231xx_i2c_call_clients(&dev->i2c_bus[0], VIDIOC_DBG_S_REGISTER, reg);
1546 1582
1547 mutex_unlock(&dev->lock); 1583 mutex_unlock(&dev->lock);
1548 1584
1549 return ret; 1585 return ret;
1550} 1586}
1551#endif 1587#endif
1552 1588
1553
1554static int vidioc_cropcap(struct file *file, void *priv, 1589static int vidioc_cropcap(struct file *file, void *priv,
1555 struct v4l2_cropcap *cc) 1590 struct v4l2_cropcap *cc)
1556{ 1591{
1557 struct cx231xx_fh *fh = priv; 1592 struct cx231xx_fh *fh = priv;
1558 struct cx231xx *dev = fh->dev; 1593 struct cx231xx *dev = fh->dev;
1559 1594
1560 if (cc->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) 1595 if (cc->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
1561 return -EINVAL; 1596 return -EINVAL;
@@ -1572,17 +1607,17 @@ static int vidioc_cropcap(struct file *file, void *priv,
1572} 1607}
1573 1608
1574static int vidioc_streamon(struct file *file, void *priv, 1609static int vidioc_streamon(struct file *file, void *priv,
1575 enum v4l2_buf_type type) 1610 enum v4l2_buf_type type)
1576{ 1611{
1577 struct cx231xx_fh *fh = priv; 1612 struct cx231xx_fh *fh = priv;
1578 struct cx231xx *dev = fh->dev; 1613 struct cx231xx *dev = fh->dev;
1579 int rc; 1614 int rc;
1580 1615
1581 rc = check_dev(dev); 1616 rc = check_dev(dev);
1582 if (rc < 0) 1617 if (rc < 0)
1583 return rc; 1618 return rc;
1584 1619
1585 mutex_lock(&dev->lock); 1620 mutex_lock(&dev->lock);
1586 rc = res_get(fh); 1621 rc = res_get(fh);
1587 1622
1588 if (likely(rc >= 0)) 1623 if (likely(rc >= 0))
@@ -1594,52 +1629,51 @@ static int vidioc_streamon(struct file *file, void *priv,
1594} 1629}
1595 1630
1596static int vidioc_streamoff(struct file *file, void *priv, 1631static int vidioc_streamoff(struct file *file, void *priv,
1597 enum v4l2_buf_type type) 1632 enum v4l2_buf_type type)
1598{ 1633{
1599 struct cx231xx_fh *fh = priv; 1634 struct cx231xx_fh *fh = priv;
1600 struct cx231xx *dev = fh->dev; 1635 struct cx231xx *dev = fh->dev;
1601 int rc; 1636 int rc;
1602 1637
1603 rc = check_dev(dev); 1638 rc = check_dev(dev);
1604 if (rc < 0) 1639 if (rc < 0)
1605 return rc; 1640 return rc;
1606 1641
1607 if ( (fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) || 1642 if ((fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) ||
1608 (fh->type != V4L2_BUF_TYPE_VBI_CAPTURE) ) 1643 (fh->type != V4L2_BUF_TYPE_VBI_CAPTURE))
1609 return -EINVAL; 1644 return -EINVAL;
1610 if (type != fh->type) 1645 if (type != fh->type)
1611 return -EINVAL; 1646 return -EINVAL;
1612 1647
1613 mutex_lock(&dev->lock); 1648 mutex_lock(&dev->lock);
1614 1649
1615 videobuf_streamoff(&fh->vb_vidq); 1650 videobuf_streamoff(&fh->vb_vidq);
1616 res_free(fh); 1651 res_free(fh);
1617 1652
1618 mutex_unlock(&dev->lock); 1653 mutex_unlock(&dev->lock);
1619 1654
1620 return 0; 1655 return 0;
1621} 1656}
1622 1657
1623static int vidioc_querycap(struct file *file, void *priv, 1658static int vidioc_querycap(struct file *file, void *priv,
1624 struct v4l2_capability *cap) 1659 struct v4l2_capability *cap)
1625{ 1660{
1626 struct cx231xx_fh *fh = priv; 1661 struct cx231xx_fh *fh = priv;
1627 struct cx231xx *dev = fh->dev; 1662 struct cx231xx *dev = fh->dev;
1628 1663
1629 strlcpy(cap->driver, "cx231xx", sizeof(cap->driver)); 1664 strlcpy(cap->driver, "cx231xx", sizeof(cap->driver));
1630 strlcpy(cap->card, cx231xx_boards[dev->model].name, sizeof(cap->card)); 1665 strlcpy(cap->card, cx231xx_boards[dev->model].name, sizeof(cap->card));
1631 strlcpy(cap->bus_info, dev_name(&dev->udev->dev), sizeof(cap->bus_info)); 1666 strlcpy(cap->bus_info, dev_name(&dev->udev->dev),
1667 sizeof(cap->bus_info));
1632 1668
1633 cap->version = CX231XX_VERSION_CODE; 1669 cap->version = CX231XX_VERSION_CODE;
1634 1670
1635 cap->capabilities = 1671 cap->capabilities = V4L2_CAP_VBI_CAPTURE |
1636 V4L2_CAP_VBI_CAPTURE |
1637#if 0 1672#if 0
1638 V4L2_CAP_SLICED_VBI_CAPTURE | 1673 V4L2_CAP_SLICED_VBI_CAPTURE |
1639#endif 1674#endif
1640 V4L2_CAP_VIDEO_CAPTURE | 1675 V4L2_CAP_VIDEO_CAPTURE |
1641 V4L2_CAP_AUDIO | 1676 V4L2_CAP_AUDIO | V4L2_CAP_READWRITE | V4L2_CAP_STREAMING;
1642 V4L2_CAP_READWRITE | V4L2_CAP_STREAMING;
1643 1677
1644 if (dev->tuner_type != TUNER_ABSENT) 1678 if (dev->tuner_type != TUNER_ABSENT)
1645 cap->capabilities |= V4L2_CAP_TUNER; 1679 cap->capabilities |= V4L2_CAP_TUNER;
@@ -1647,10 +1681,10 @@ static int vidioc_querycap(struct file *file, void *priv,
1647 return 0; 1681 return 0;
1648} 1682}
1649 1683
1650static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv, 1684static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
1651 struct v4l2_fmtdesc *f) 1685 struct v4l2_fmtdesc *f)
1652{ 1686{
1653 if (unlikely(f->index >= ARRAY_SIZE(format))) 1687 if (unlikely(f->index >= ARRAY_SIZE(format)))
1654 return -EINVAL; 1688 return -EINVAL;
1655 1689
1656 strlcpy(f->description, format[f->index].name, sizeof(f->description)); 1690 strlcpy(f->description, format[f->index].name, sizeof(f->description));
@@ -1661,11 +1695,11 @@ static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
1661 1695
1662/* Sliced VBI ioctls */ 1696/* Sliced VBI ioctls */
1663static int vidioc_g_fmt_sliced_vbi_cap(struct file *file, void *priv, 1697static int vidioc_g_fmt_sliced_vbi_cap(struct file *file, void *priv,
1664 struct v4l2_format *f) 1698 struct v4l2_format *f)
1665{ 1699{
1666 struct cx231xx_fh *fh = priv; 1700 struct cx231xx_fh *fh = priv;
1667 struct cx231xx *dev = fh->dev; 1701 struct cx231xx *dev = fh->dev;
1668 int rc; 1702 int rc;
1669 1703
1670 rc = check_dev(dev); 1704 rc = check_dev(dev);
1671 if (rc < 0) 1705 if (rc < 0)
@@ -1685,11 +1719,11 @@ static int vidioc_g_fmt_sliced_vbi_cap(struct file *file, void *priv,
1685} 1719}
1686 1720
1687static int vidioc_try_set_sliced_vbi_cap(struct file *file, void *priv, 1721static int vidioc_try_set_sliced_vbi_cap(struct file *file, void *priv,
1688 struct v4l2_format *f) 1722 struct v4l2_format *f)
1689{ 1723{
1690 struct cx231xx_fh *fh = priv; 1724 struct cx231xx_fh *fh = priv;
1691 struct cx231xx *dev = fh->dev; 1725 struct cx231xx *dev = fh->dev;
1692 int rc; 1726 int rc;
1693 1727
1694 rc = check_dev(dev); 1728 rc = check_dev(dev);
1695 if (rc < 0) 1729 if (rc < 0)
@@ -1705,26 +1739,25 @@ static int vidioc_try_set_sliced_vbi_cap(struct file *file, void *priv,
1705 return 0; 1739 return 0;
1706} 1740}
1707 1741
1708
1709/* RAW VBI ioctls */ 1742/* RAW VBI ioctls */
1710 1743
1711static int vidioc_g_fmt_vbi_cap(struct file *file, void *priv, 1744static int vidioc_g_fmt_vbi_cap(struct file *file, void *priv,
1712 struct v4l2_format *f) 1745 struct v4l2_format *f)
1713{ 1746{
1714 struct cx231xx_fh *fh = priv; 1747 struct cx231xx_fh *fh = priv;
1715 struct cx231xx *dev = fh->dev; 1748 struct cx231xx *dev = fh->dev;
1716 1749
1717 f->fmt.vbi.sampling_rate = (dev->norm & V4L2_STD_625_50) ? 1750 f->fmt.vbi.sampling_rate = (dev->norm & V4L2_STD_625_50) ?
1718 35468950:28636363; 1751 35468950 : 28636363;
1719 f->fmt.vbi.samples_per_line = VBI_LINE_LENGTH; 1752 f->fmt.vbi.samples_per_line = VBI_LINE_LENGTH;
1720 f->fmt.vbi.sample_format = V4L2_PIX_FMT_GREY; 1753 f->fmt.vbi.sample_format = V4L2_PIX_FMT_GREY;
1721 f->fmt.vbi.offset = 64 * 4; 1754 f->fmt.vbi.offset = 64 * 4;
1722 f->fmt.vbi.start[0] = (dev->norm & V4L2_STD_625_50) ? 1755 f->fmt.vbi.start[0] = (dev->norm & V4L2_STD_625_50) ?
1723 PAL_VBI_START_LINE : NTSC_VBI_START_LINE; 1756 PAL_VBI_START_LINE : NTSC_VBI_START_LINE;
1724 f->fmt.vbi.count[0] = (dev->norm & V4L2_STD_625_50) ? 1757 f->fmt.vbi.count[0] = (dev->norm & V4L2_STD_625_50) ?
1725 PAL_VBI_LINES : NTSC_VBI_LINES; 1758 PAL_VBI_LINES : NTSC_VBI_LINES;
1726 f->fmt.vbi.start[1] = (dev->norm & V4L2_STD_625_50) ? 1759 f->fmt.vbi.start[1] = (dev->norm & V4L2_STD_625_50) ?
1727 PAL_VBI_START_LINE+312 : NTSC_VBI_START_LINE + 263; 1760 PAL_VBI_START_LINE + 312 : NTSC_VBI_START_LINE + 263;
1728 f->fmt.vbi.count[1] = f->fmt.vbi.count[0]; 1761 f->fmt.vbi.count[1] = f->fmt.vbi.count[0];
1729 1762
1730 return 0; 1763 return 0;
@@ -1732,29 +1765,29 @@ static int vidioc_g_fmt_vbi_cap(struct file *file, void *priv,
1732} 1765}
1733 1766
1734static int vidioc_try_fmt_vbi_cap(struct file *file, void *priv, 1767static int vidioc_try_fmt_vbi_cap(struct file *file, void *priv,
1735 struct v4l2_format *f) 1768 struct v4l2_format *f)
1736{ 1769{
1737 struct cx231xx_fh *fh = priv; 1770 struct cx231xx_fh *fh = priv;
1738 struct cx231xx *dev = fh->dev; 1771 struct cx231xx *dev = fh->dev;
1739 1772
1740 if (dev->vbi_stream_on && !fh->stream_on) { 1773 if (dev->vbi_stream_on && !fh->stream_on) {
1741 cx231xx_errdev("%s device in use by another fh\n", __func__); 1774 cx231xx_errdev("%s device in use by another fh\n", __func__);
1742 return -EBUSY; 1775 return -EBUSY;
1743 } 1776 }
1744 1777
1745 f->type = V4L2_BUF_TYPE_VBI_CAPTURE; 1778 f->type = V4L2_BUF_TYPE_VBI_CAPTURE;
1746 f->fmt.vbi.sampling_rate = (dev->norm & V4L2_STD_625_50) ? 1779 f->fmt.vbi.sampling_rate = (dev->norm & V4L2_STD_625_50) ?
1747 35468950:28636363; 1780 35468950 : 28636363;
1748 f->fmt.vbi.samples_per_line = VBI_LINE_LENGTH; 1781 f->fmt.vbi.samples_per_line = VBI_LINE_LENGTH;
1749 f->fmt.vbi.sample_format = V4L2_PIX_FMT_GREY; 1782 f->fmt.vbi.sample_format = V4L2_PIX_FMT_GREY;
1750 f->fmt.vbi.offset = 244; 1783 f->fmt.vbi.offset = 244;
1751 f->fmt.vbi.flags = 0; 1784 f->fmt.vbi.flags = 0;
1752 f->fmt.vbi.start[0] = (dev->norm & V4L2_STD_625_50) ? 1785 f->fmt.vbi.start[0] = (dev->norm & V4L2_STD_625_50) ?
1753 PAL_VBI_START_LINE : NTSC_VBI_START_LINE; 1786 PAL_VBI_START_LINE : NTSC_VBI_START_LINE;
1754 f->fmt.vbi.count[0] = (dev->norm & V4L2_STD_625_50) ? 1787 f->fmt.vbi.count[0] = (dev->norm & V4L2_STD_625_50) ?
1755 PAL_VBI_LINES : NTSC_VBI_LINES; 1788 PAL_VBI_LINES : NTSC_VBI_LINES;
1756 f->fmt.vbi.start[1] = (dev->norm & V4L2_STD_625_50) ? 1789 f->fmt.vbi.start[1] = (dev->norm & V4L2_STD_625_50) ?
1757 PAL_VBI_START_LINE+312 : NTSC_VBI_START_LINE + 263; 1790 PAL_VBI_START_LINE + 312 : NTSC_VBI_START_LINE + 263;
1758 f->fmt.vbi.count[1] = f->fmt.vbi.count[0]; 1791 f->fmt.vbi.count[1] = f->fmt.vbi.count[0];
1759 1792
1760 return 0; 1793 return 0;
@@ -1764,9 +1797,9 @@ static int vidioc_try_fmt_vbi_cap(struct file *file, void *priv,
1764static int vidioc_reqbufs(struct file *file, void *priv, 1797static int vidioc_reqbufs(struct file *file, void *priv,
1765 struct v4l2_requestbuffers *rb) 1798 struct v4l2_requestbuffers *rb)
1766{ 1799{
1767 struct cx231xx_fh *fh = priv; 1800 struct cx231xx_fh *fh = priv;
1768 struct cx231xx *dev = fh->dev; 1801 struct cx231xx *dev = fh->dev;
1769 int rc; 1802 int rc;
1770 1803
1771 rc = check_dev(dev); 1804 rc = check_dev(dev);
1772 if (rc < 0) 1805 if (rc < 0)
@@ -1775,12 +1808,11 @@ static int vidioc_reqbufs(struct file *file, void *priv,
1775 return (videobuf_reqbufs(&fh->vb_vidq, rb)); 1808 return (videobuf_reqbufs(&fh->vb_vidq, rb));
1776} 1809}
1777 1810
1778static int vidioc_querybuf(struct file *file, void *priv, 1811static int vidioc_querybuf(struct file *file, void *priv, struct v4l2_buffer *b)
1779 struct v4l2_buffer *b)
1780{ 1812{
1781 struct cx231xx_fh *fh = priv; 1813 struct cx231xx_fh *fh = priv;
1782 struct cx231xx *dev = fh->dev; 1814 struct cx231xx *dev = fh->dev;
1783 int rc; 1815 int rc;
1784 1816
1785 rc = check_dev(dev); 1817 rc = check_dev(dev);
1786 if (rc < 0) 1818 if (rc < 0)
@@ -1791,9 +1823,9 @@ static int vidioc_querybuf(struct file *file, void *priv,
1791 1823
1792static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *b) 1824static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *b)
1793{ 1825{
1794 struct cx231xx_fh *fh = priv; 1826 struct cx231xx_fh *fh = priv;
1795 struct cx231xx *dev = fh->dev; 1827 struct cx231xx *dev = fh->dev;
1796 int rc; 1828 int rc;
1797 1829
1798 rc = check_dev(dev); 1830 rc = check_dev(dev);
1799 if (rc < 0) 1831 if (rc < 0)
@@ -1804,33 +1836,31 @@ static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *b)
1804 1836
1805static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *b) 1837static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *b)
1806{ 1838{
1807 struct cx231xx_fh *fh = priv; 1839 struct cx231xx_fh *fh = priv;
1808 struct cx231xx *dev = fh->dev; 1840 struct cx231xx *dev = fh->dev;
1809 int rc; 1841 int rc;
1810 1842
1811 rc = check_dev(dev); 1843 rc = check_dev(dev);
1812 if (rc < 0) 1844 if (rc < 0)
1813 return rc; 1845 return rc;
1814 1846
1815 return (videobuf_dqbuf(&fh->vb_vidq, b, 1847 return (videobuf_dqbuf(&fh->vb_vidq, b, file->f_flags & O_NONBLOCK));
1816 file->f_flags & O_NONBLOCK));
1817} 1848}
1818 1849
1819#ifdef CONFIG_VIDEO_V4L1_COMPAT 1850#ifdef CONFIG_VIDEO_V4L1_COMPAT
1820static int vidiocgmbuf(struct file *file, void *priv, struct video_mbuf *mbuf) 1851static int vidiocgmbuf(struct file *file, void *priv, struct video_mbuf *mbuf)
1821{ 1852{
1822 struct cx231xx_fh *fh = priv; 1853 struct cx231xx_fh *fh = priv;
1823 1854
1824 return videobuf_cgmbuf(&fh->vb_vidq, mbuf, 8); 1855 return videobuf_cgmbuf(&fh->vb_vidq, mbuf, 8);
1825} 1856}
1826#endif 1857#endif
1827 1858
1828
1829/* ----------------------------------------------------------- */ 1859/* ----------------------------------------------------------- */
1830/* RADIO ESPECIFIC IOCTLS */ 1860/* RADIO ESPECIFIC IOCTLS */
1831/* ----------------------------------------------------------- */ 1861/* ----------------------------------------------------------- */
1832 1862
1833static int radio_querycap(struct file *file, void *priv, 1863static int radio_querycap(struct file *file, void *priv,
1834 struct v4l2_capability *cap) 1864 struct v4l2_capability *cap)
1835{ 1865{
1836 struct cx231xx *dev = ((struct cx231xx_fh *)priv)->dev; 1866 struct cx231xx *dev = ((struct cx231xx_fh *)priv)->dev;
@@ -1844,8 +1874,7 @@ static int radio_querycap(struct file *file, void *priv,
1844 return 0; 1874 return 0;
1845} 1875}
1846 1876
1847static int radio_g_tuner(struct file *file, void *priv, 1877static int radio_g_tuner(struct file *file, void *priv, struct v4l2_tuner *t)
1848 struct v4l2_tuner *t)
1849{ 1878{
1850 struct cx231xx *dev = ((struct cx231xx_fh *)priv)->dev; 1879 struct cx231xx *dev = ((struct cx231xx_fh *)priv)->dev;
1851 1880
@@ -1855,15 +1884,14 @@ static int radio_g_tuner(struct file *file, void *priv,
1855 strcpy(t->name, "Radio"); 1884 strcpy(t->name, "Radio");
1856 t->type = V4L2_TUNER_RADIO; 1885 t->type = V4L2_TUNER_RADIO;
1857 1886
1858 mutex_lock(&dev->lock); 1887 mutex_lock(&dev->lock);
1859 cx231xx_i2c_call_clients(&dev->i2c_bus[1], VIDIOC_G_TUNER, t); 1888 cx231xx_i2c_call_clients(&dev->i2c_bus[1], VIDIOC_G_TUNER, t);
1860 mutex_unlock(&dev->lock); 1889 mutex_unlock(&dev->lock);
1861 1890
1862 return 0; 1891 return 0;
1863} 1892}
1864 1893
1865static int radio_enum_input(struct file *file, void *priv, 1894static int radio_enum_input(struct file *file, void *priv, struct v4l2_input *i)
1866 struct v4l2_input *i)
1867{ 1895{
1868 if (i->index != 0) 1896 if (i->index != 0)
1869 return -EINVAL; 1897 return -EINVAL;
@@ -1882,23 +1910,21 @@ static int radio_g_audio(struct file *file, void *priv, struct v4l2_audio *a)
1882 return 0; 1910 return 0;
1883} 1911}
1884 1912
1885static int radio_s_tuner(struct file *file, void *priv, 1913static int radio_s_tuner(struct file *file, void *priv, struct v4l2_tuner *t)
1886 struct v4l2_tuner *t)
1887{ 1914{
1888 struct cx231xx *dev = ((struct cx231xx_fh *)priv)->dev; 1915 struct cx231xx *dev = ((struct cx231xx_fh *)priv)->dev;
1889 1916
1890 if (0 != t->index) 1917 if (0 != t->index)
1891 return -EINVAL; 1918 return -EINVAL;
1892 1919
1893 mutex_lock(&dev->lock); 1920 mutex_lock(&dev->lock);
1894 cx231xx_i2c_call_clients(&dev->i2c_bus[1], VIDIOC_S_TUNER, t); 1921 cx231xx_i2c_call_clients(&dev->i2c_bus[1], VIDIOC_S_TUNER, t);
1895 mutex_unlock(&dev->lock); 1922 mutex_unlock(&dev->lock);
1896 1923
1897 return 0; 1924 return 0;
1898} 1925}
1899 1926
1900static int radio_s_audio(struct file *file, void *fh, 1927static int radio_s_audio(struct file *file, void *fh, struct v4l2_audio *a)
1901 struct v4l2_audio *a)
1902{ 1928{
1903 return 0; 1929 return 0;
1904} 1930}
@@ -1913,8 +1939,7 @@ static int radio_queryctrl(struct file *file, void *priv,
1913{ 1939{
1914 int i; 1940 int i;
1915 1941
1916 if (c->id < V4L2_CID_BASE || 1942 if (c->id < V4L2_CID_BASE || c->id >= V4L2_CID_LASTP1)
1917 c->id >= V4L2_CID_LASTP1)
1918 return -EINVAL; 1943 return -EINVAL;
1919 if (c->id == V4L2_CID_AUDIO_MUTE) { 1944 if (c->id == V4L2_CID_AUDIO_MUTE) {
1920 for (i = 0; i < CX231XX_CTLS; i++) 1945 for (i = 0; i < CX231XX_CTLS; i++)
@@ -1932,25 +1957,26 @@ static int radio_queryctrl(struct file *file, void *priv,
1932 */ 1957 */
1933static int cx231xx_v4l2_open(struct file *filp) 1958static int cx231xx_v4l2_open(struct file *filp)
1934{ 1959{
1935 int minor = video_devdata(filp)->minor; 1960 int minor = video_devdata(filp)->minor;
1936 int errCode = 0, radio = 0; 1961 int errCode = 0, radio = 0;
1937 struct cx231xx *dev = NULL; 1962 struct cx231xx *dev = NULL;
1938 struct cx231xx_fh *fh; 1963 struct cx231xx_fh *fh;
1939 enum v4l2_buf_type fh_type = 0; 1964 enum v4l2_buf_type fh_type = 0;
1940 1965
1941 dev = cx231xx_get_device(minor, &fh_type, &radio); 1966 dev = cx231xx_get_device(minor, &fh_type, &radio);
1942 if (NULL == dev) 1967 if (NULL == dev)
1943 return -ENODEV; 1968 return -ENODEV;
1944 1969
1945 mutex_lock(&dev->lock); 1970 mutex_lock(&dev->lock);
1946 1971
1947 cx231xx_videodbg("open minor=%d type=%s users=%d\n", 1972 cx231xx_videodbg("open minor=%d type=%s users=%d\n",
1948 minor, v4l2_type_names[fh_type], dev->users); 1973 minor, v4l2_type_names[fh_type], dev->users);
1949 1974
1950#if 0 1975#if 0
1951 errCode = cx231xx_set_mode(dev, CX231XX_ANALOG_MODE); 1976 errCode = cx231xx_set_mode(dev, CX231XX_ANALOG_MODE);
1952 if (errCode < 0) { 1977 if (errCode < 0) {
1953 cx231xx_errdev("Device locked on digital mode. Can't open analog\n"); 1978 cx231xx_errdev
1979 ("Device locked on digital mode. Can't open analog\n");
1954 mutex_unlock(&dev->lock); 1980 mutex_unlock(&dev->lock);
1955 return -EBUSY; 1981 return -EBUSY;
1956 } 1982 }
@@ -1973,25 +1999,24 @@ static int cx231xx_v4l2_open(struct file *filp)
1973 dev->hscale = 0; 1999 dev->hscale = 0;
1974 dev->vscale = 0; 2000 dev->vscale = 0;
1975 2001
1976 2002 /* Power up in Analog TV mode */
1977 /* Power up in Analog TV mode */ 2003 cx231xx_set_power_mode(dev, POLARIS_AVMODE_ANALOGT_TV);
1978 cx231xx_set_power_mode(dev, POLARIS_AVMODE_ANALOGT_TV);
1979 2004
1980#if 0 2005#if 0
1981 cx231xx_set_mode(dev, CX231XX_ANALOG_MODE); 2006 cx231xx_set_mode(dev, CX231XX_ANALOG_MODE);
1982#endif 2007#endif
1983 cx231xx_resolution_set(dev); 2008 cx231xx_resolution_set(dev);
1984 2009
1985 /* set video alternate setting */ 2010 /* set video alternate setting */
1986 cx231xx_set_video_alternate(dev); 2011 cx231xx_set_video_alternate(dev);
1987 2012
1988 /* Needed, since GPIO might have disabled power of 2013 /* Needed, since GPIO might have disabled power of
1989 some i2c device */ 2014 some i2c device */
1990 cx231xx_config_i2c(dev); 2015 cx231xx_config_i2c(dev);
1991 2016
1992 /* device needs to be initialized before isoc transfer */ 2017 /* device needs to be initialized before isoc transfer */
1993 dev->video_input = dev->video_input > 2 ? 2: dev->video_input; 2018 dev->video_input = dev->video_input > 2 ? 2 : dev->video_input;
1994 video_mux(dev, dev->video_input ); 2019 video_mux(dev, dev->video_input);
1995 2020
1996 } 2021 }
1997 if (fh->radio) { 2022 if (fh->radio) {
@@ -1999,26 +2024,25 @@ static int cx231xx_v4l2_open(struct file *filp)
1999 2024
2000 /* cx231xx_start_radio(dev); */ 2025 /* cx231xx_start_radio(dev); */
2001 2026
2002 cx231xx_i2c_call_clients(&dev->i2c_bus[1], AUDC_SET_RADIO, NULL); 2027 cx231xx_i2c_call_clients(&dev->i2c_bus[1], AUDC_SET_RADIO,
2028 NULL);
2003 } 2029 }
2004 2030
2005 dev->users++; 2031 dev->users++;
2006 2032
2007 if (fh->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) { 2033 if (fh->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) {
2008 videobuf_queue_vmalloc_init(&fh->vb_vidq, &cx231xx_video_qops, 2034 videobuf_queue_vmalloc_init(&fh->vb_vidq, &cx231xx_video_qops, NULL, &dev->video_mode.slock, fh->type, V4L2_FIELD_INTERLACED, /* V4L2_FIELD_SEQ_TB, */
2009 NULL, &dev->video_mode.slock, fh->type, V4L2_FIELD_INTERLACED, /* V4L2_FIELD_SEQ_TB, */ 2035 sizeof(struct cx231xx_buffer), fh);
2010 sizeof(struct cx231xx_buffer), fh); 2036 }
2011 }
2012 2037
2013 if (fh->type == V4L2_BUF_TYPE_VBI_CAPTURE) { 2038 if (fh->type == V4L2_BUF_TYPE_VBI_CAPTURE) {
2014 2039
2015 /* Set the required alternate setting VBI interface works in Bulk mode only */ 2040 /* Set the required alternate setting VBI interface works in Bulk mode only */
2016 cx231xx_set_alt_setting(dev, INDEX_VANC, 0); 2041 cx231xx_set_alt_setting(dev, INDEX_VANC, 0);
2017 2042
2018 videobuf_queue_vmalloc_init(&fh->vb_vidq, &cx231xx_vbi_qops, 2043 videobuf_queue_vmalloc_init(&fh->vb_vidq, &cx231xx_vbi_qops, NULL, &dev->vbi_mode.slock, fh->type, V4L2_FIELD_SEQ_TB, /* V4L2_FIELD_INTERLACED, */
2019 NULL, &dev->vbi_mode.slock, fh->type, V4L2_FIELD_SEQ_TB, /* V4L2_FIELD_INTERLACED, */ 2044 sizeof(struct cx231xx_buffer), fh);
2020 sizeof(struct cx231xx_buffer), fh); 2045 }
2021 }
2022 2046
2023 mutex_unlock(&dev->lock); 2047 mutex_unlock(&dev->lock);
2024 2048
@@ -2044,7 +2068,7 @@ void cx231xx_release_analog_resources(struct cx231xx *dev)
2044 } 2068 }
2045 if (dev->vbi_dev) { 2069 if (dev->vbi_dev) {
2046 cx231xx_info("V4L2 device /dev/vbi%d deregistered\n", 2070 cx231xx_info("V4L2 device /dev/vbi%d deregistered\n",
2047 dev->vbi_dev->num); 2071 dev->vbi_dev->num);
2048 if (-1 != dev->vbi_dev->minor) 2072 if (-1 != dev->vbi_dev->minor)
2049 video_unregister_device(dev->vbi_dev); 2073 video_unregister_device(dev->vbi_dev);
2050 else 2074 else
@@ -2053,7 +2077,7 @@ void cx231xx_release_analog_resources(struct cx231xx *dev)
2053 } 2077 }
2054 if (dev->vdev) { 2078 if (dev->vdev) {
2055 cx231xx_info("V4L2 device /dev/video%d deregistered\n", 2079 cx231xx_info("V4L2 device /dev/video%d deregistered\n",
2056 dev->vdev->num); 2080 dev->vdev->num);
2057 if (-1 != dev->vdev->minor) 2081 if (-1 != dev->vdev->minor)
2058 video_unregister_device(dev->vdev); 2082 video_unregister_device(dev->vdev);
2059 else 2083 else
@@ -2069,44 +2093,44 @@ void cx231xx_release_analog_resources(struct cx231xx *dev)
2069 */ 2093 */
2070static int cx231xx_v4l2_close(struct file *filp) 2094static int cx231xx_v4l2_close(struct file *filp)
2071{ 2095{
2072 struct cx231xx_fh *fh = filp->private_data; 2096 struct cx231xx_fh *fh = filp->private_data;
2073 struct cx231xx *dev = fh->dev; 2097 struct cx231xx *dev = fh->dev;
2074 2098
2075 cx231xx_videodbg("users=%d\n", dev->users); 2099 cx231xx_videodbg("users=%d\n", dev->users);
2076 2100
2077 mutex_lock(&dev->lock); 2101 mutex_lock(&dev->lock);
2078 2102
2079 if (res_check(fh)) 2103 if (res_check(fh))
2080 res_free(fh); 2104 res_free(fh);
2081 2105
2082 if (fh->type == V4L2_BUF_TYPE_VBI_CAPTURE) { 2106 if (fh->type == V4L2_BUF_TYPE_VBI_CAPTURE) {
2083 videobuf_stop(&fh->vb_vidq); 2107 videobuf_stop(&fh->vb_vidq);
2084 videobuf_mmap_free(&fh->vb_vidq); 2108 videobuf_mmap_free(&fh->vb_vidq);
2085 2109
2086 /* the device is already disconnect, 2110 /* the device is already disconnect,
2087 free the remaining resources */ 2111 free the remaining resources */
2088 if (dev->state & DEV_DISCONNECTED) { 2112 if (dev->state & DEV_DISCONNECTED) {
2089 cx231xx_release_resources(dev); 2113 cx231xx_release_resources(dev);
2090 mutex_unlock(&dev->lock); 2114 mutex_unlock(&dev->lock);
2091 kfree(dev); 2115 kfree(dev);
2092 return 0; 2116 return 0;
2093 } 2117 }
2094 2118
2095 /* do this before setting alternate! */ 2119 /* do this before setting alternate! */
2096 cx231xx_uninit_vbi_isoc(dev); 2120 cx231xx_uninit_vbi_isoc(dev);
2097 2121
2098 /* set alternate 0 */ 2122 /* set alternate 0 */
2099 if( !dev->vbi_or_sliced_cc_mode) { 2123 if (!dev->vbi_or_sliced_cc_mode) {
2100 cx231xx_set_alt_setting(dev, INDEX_VANC, 0); 2124 cx231xx_set_alt_setting(dev, INDEX_VANC, 0);
2101 } else { 2125 } else {
2102 cx231xx_set_alt_setting(dev, INDEX_HANC, 0); 2126 cx231xx_set_alt_setting(dev, INDEX_HANC, 0);
2103 } 2127 }
2104 2128
2105 kfree(fh); 2129 kfree(fh);
2106 dev->users--; 2130 dev->users--;
2107 wake_up_interruptible_nr(&dev->open, 1); 2131 wake_up_interruptible_nr(&dev->open, 1);
2108 mutex_unlock(&dev->lock); 2132 mutex_unlock(&dev->lock);
2109 return 0; 2133 return 0;
2110 } 2134 }
2111 2135
2112 if (dev->users == 1) { 2136 if (dev->users == 1) {
@@ -2122,8 +2146,9 @@ static int cx231xx_v4l2_close(struct file *filp)
2122 return 0; 2146 return 0;
2123 } 2147 }
2124 2148
2125 /* Save some power by putting tuner to sleep */ 2149 /* Save some power by putting tuner to sleep */
2126 cx231xx_i2c_call_clients(&dev->i2c_bus[1], TUNER_SET_STANDBY, NULL); 2150 cx231xx_i2c_call_clients(&dev->i2c_bus[1], TUNER_SET_STANDBY,
2151 NULL);
2127 2152
2128 /* do this before setting alternate! */ 2153 /* do this before setting alternate! */
2129 cx231xx_uninit_isoc(dev); 2154 cx231xx_uninit_isoc(dev);
@@ -2144,8 +2169,8 @@ static int cx231xx_v4l2_close(struct file *filp)
2144 * will allocate buffers when called for the first time 2169 * will allocate buffers when called for the first time
2145 */ 2170 */
2146static ssize_t 2171static ssize_t
2147cx231xx_v4l2_read(struct file *filp, char __user *buf, size_t count, 2172cx231xx_v4l2_read(struct file *filp, char __user * buf, size_t count,
2148 loff_t *pos) 2173 loff_t * pos)
2149{ 2174{
2150 struct cx231xx_fh *fh = filp->private_data; 2175 struct cx231xx_fh *fh = filp->private_data;
2151 struct cx231xx *dev = fh->dev; 2176 struct cx231xx *dev = fh->dev;
@@ -2155,8 +2180,8 @@ cx231xx_v4l2_read(struct file *filp, char __user *buf, size_t count,
2155 if (rc < 0) 2180 if (rc < 0)
2156 return rc; 2181 return rc;
2157 2182
2158 if ( (fh->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) || 2183 if ((fh->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) ||
2159 (fh->type == V4L2_BUF_TYPE_VBI_CAPTURE) ) { 2184 (fh->type == V4L2_BUF_TYPE_VBI_CAPTURE)) {
2160 mutex_lock(&dev->lock); 2185 mutex_lock(&dev->lock);
2161 rc = res_get(fh); 2186 rc = res_get(fh);
2162 mutex_unlock(&dev->lock); 2187 mutex_unlock(&dev->lock);
@@ -2165,7 +2190,7 @@ cx231xx_v4l2_read(struct file *filp, char __user *buf, size_t count,
2165 return rc; 2190 return rc;
2166 2191
2167 return videobuf_read_stream(&fh->vb_vidq, buf, count, pos, 0, 2192 return videobuf_read_stream(&fh->vb_vidq, buf, count, pos, 0,
2168 filp->f_flags & O_NONBLOCK); 2193 filp->f_flags & O_NONBLOCK);
2169 } 2194 }
2170 return 0; 2195 return 0;
2171} 2196}
@@ -2191,10 +2216,10 @@ static unsigned int cx231xx_v4l2_poll(struct file *filp, poll_table * wait)
2191 if (unlikely(rc < 0)) 2216 if (unlikely(rc < 0))
2192 return POLLERR; 2217 return POLLERR;
2193 2218
2194 if ( (V4L2_BUF_TYPE_VIDEO_CAPTURE == fh->type) || 2219 if ((V4L2_BUF_TYPE_VIDEO_CAPTURE == fh->type) ||
2195 (V4L2_BUF_TYPE_VBI_CAPTURE == fh->type) ) 2220 (V4L2_BUF_TYPE_VBI_CAPTURE == fh->type))
2196 return videobuf_poll_stream(filp, &fh->vb_vidq, wait); 2221 return videobuf_poll_stream(filp, &fh->vb_vidq, wait);
2197 else 2222 else
2198 return POLLERR; 2223 return POLLERR;
2199} 2224}
2200 2225
@@ -2203,15 +2228,15 @@ static unsigned int cx231xx_v4l2_poll(struct file *filp, poll_table * wait)
2203 */ 2228 */
2204static int cx231xx_v4l2_mmap(struct file *filp, struct vm_area_struct *vma) 2229static int cx231xx_v4l2_mmap(struct file *filp, struct vm_area_struct *vma)
2205{ 2230{
2206 struct cx231xx_fh *fh = filp->private_data; 2231 struct cx231xx_fh *fh = filp->private_data;
2207 struct cx231xx *dev = fh->dev; 2232 struct cx231xx *dev = fh->dev;
2208 int rc; 2233 int rc;
2209 2234
2210 rc = check_dev(dev); 2235 rc = check_dev(dev);
2211 if (rc < 0) 2236 if (rc < 0)
2212 return rc; 2237 return rc;
2213 2238
2214 mutex_lock(&dev->lock); 2239 mutex_lock(&dev->lock);
2215 rc = res_get(fh); 2240 rc = res_get(fh);
2216 mutex_unlock(&dev->lock); 2241 mutex_unlock(&dev->lock);
2217 2242
@@ -2221,114 +2246,112 @@ static int cx231xx_v4l2_mmap(struct file *filp, struct vm_area_struct *vma)
2221 rc = videobuf_mmap_mapper(&fh->vb_vidq, vma); 2246 rc = videobuf_mmap_mapper(&fh->vb_vidq, vma);
2222 2247
2223 cx231xx_videodbg("vma start=0x%08lx, size=%ld, ret=%d\n", 2248 cx231xx_videodbg("vma start=0x%08lx, size=%ld, ret=%d\n",
2224 (unsigned long)vma->vm_start, 2249 (unsigned long)vma->vm_start,
2225 (unsigned long)vma->vm_end-(unsigned long)vma->vm_start, 2250 (unsigned long)vma->vm_end -
2226 rc); 2251 (unsigned long)vma->vm_start, rc);
2227 2252
2228 return rc; 2253 return rc;
2229} 2254}
2230 2255
2231static const struct v4l2_file_operations cx231xx_v4l_fops = { 2256static const struct v4l2_file_operations cx231xx_v4l_fops = {
2232 .owner = THIS_MODULE, 2257 .owner = THIS_MODULE,
2233 .open = cx231xx_v4l2_open, 2258 .open = cx231xx_v4l2_open,
2234 .release = cx231xx_v4l2_close, 2259 .release = cx231xx_v4l2_close,
2235 .read = cx231xx_v4l2_read, 2260 .read = cx231xx_v4l2_read,
2236 .poll = cx231xx_v4l2_poll, 2261 .poll = cx231xx_v4l2_poll,
2237 .mmap = cx231xx_v4l2_mmap, 2262 .mmap = cx231xx_v4l2_mmap,
2238 .ioctl = video_ioctl2, 2263 .ioctl = video_ioctl2,
2239}; 2264};
2240 2265
2241static const struct v4l2_ioctl_ops video_ioctl_ops = { 2266static const struct v4l2_ioctl_ops video_ioctl_ops = {
2242 .vidioc_querycap = vidioc_querycap, 2267 .vidioc_querycap = vidioc_querycap,
2243 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap, 2268 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
2244 .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap, 2269 .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
2245 .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap, 2270 .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
2246 .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap, 2271 .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
2247 .vidioc_g_fmt_vbi_cap = vidioc_g_fmt_vbi_cap, 2272 .vidioc_g_fmt_vbi_cap = vidioc_g_fmt_vbi_cap,
2248 .vidioc_try_fmt_vbi_cap = vidioc_try_fmt_vbi_cap, 2273 .vidioc_try_fmt_vbi_cap = vidioc_try_fmt_vbi_cap,
2249 .vidioc_s_fmt_vbi_cap = vidioc_try_fmt_vbi_cap, 2274 .vidioc_s_fmt_vbi_cap = vidioc_try_fmt_vbi_cap,
2250 .vidioc_g_audio = vidioc_g_audio, 2275 .vidioc_g_audio = vidioc_g_audio,
2251 .vidioc_s_audio = vidioc_s_audio, 2276 .vidioc_s_audio = vidioc_s_audio,
2252 .vidioc_cropcap = vidioc_cropcap, 2277 .vidioc_cropcap = vidioc_cropcap,
2253 .vidioc_g_fmt_sliced_vbi_cap = vidioc_g_fmt_sliced_vbi_cap, 2278 .vidioc_g_fmt_sliced_vbi_cap = vidioc_g_fmt_sliced_vbi_cap,
2254 .vidioc_try_fmt_sliced_vbi_cap = vidioc_try_set_sliced_vbi_cap, 2279 .vidioc_try_fmt_sliced_vbi_cap = vidioc_try_set_sliced_vbi_cap,
2255 .vidioc_reqbufs = vidioc_reqbufs, 2280 .vidioc_reqbufs = vidioc_reqbufs,
2256 .vidioc_querybuf = vidioc_querybuf, 2281 .vidioc_querybuf = vidioc_querybuf,
2257 .vidioc_qbuf = vidioc_qbuf, 2282 .vidioc_qbuf = vidioc_qbuf,
2258 .vidioc_dqbuf = vidioc_dqbuf, 2283 .vidioc_dqbuf = vidioc_dqbuf,
2259 .vidioc_s_std = vidioc_s_std, 2284 .vidioc_s_std = vidioc_s_std,
2260 .vidioc_g_std = vidioc_g_std, 2285 .vidioc_g_std = vidioc_g_std,
2261 .vidioc_enum_input = vidioc_enum_input, 2286 .vidioc_enum_input = vidioc_enum_input,
2262 .vidioc_g_input = vidioc_g_input, 2287 .vidioc_g_input = vidioc_g_input,
2263 .vidioc_s_input = vidioc_s_input, 2288 .vidioc_s_input = vidioc_s_input,
2264 .vidioc_queryctrl = vidioc_queryctrl, 2289 .vidioc_queryctrl = vidioc_queryctrl,
2265 .vidioc_g_ctrl = vidioc_g_ctrl, 2290 .vidioc_g_ctrl = vidioc_g_ctrl,
2266 .vidioc_s_ctrl = vidioc_s_ctrl, 2291 .vidioc_s_ctrl = vidioc_s_ctrl,
2267 .vidioc_streamon = vidioc_streamon, 2292 .vidioc_streamon = vidioc_streamon,
2268 .vidioc_streamoff = vidioc_streamoff, 2293 .vidioc_streamoff = vidioc_streamoff,
2269 .vidioc_g_tuner = vidioc_g_tuner, 2294 .vidioc_g_tuner = vidioc_g_tuner,
2270 .vidioc_s_tuner = vidioc_s_tuner, 2295 .vidioc_s_tuner = vidioc_s_tuner,
2271 .vidioc_g_frequency = vidioc_g_frequency, 2296 .vidioc_g_frequency = vidioc_g_frequency,
2272 .vidioc_s_frequency = vidioc_s_frequency, 2297 .vidioc_s_frequency = vidioc_s_frequency,
2273#ifdef CONFIG_VIDEO_ADV_DEBUG 2298#ifdef CONFIG_VIDEO_ADV_DEBUG
2274 .vidioc_g_register = vidioc_g_register, 2299 .vidioc_g_register = vidioc_g_register,
2275 .vidioc_s_register = vidioc_s_register, 2300 .vidioc_s_register = vidioc_s_register,
2276#endif 2301#endif
2277#ifdef CONFIG_VIDEO_V4L1_COMPAT 2302#ifdef CONFIG_VIDEO_V4L1_COMPAT
2278 .vidiocgmbuf = vidiocgmbuf, 2303 .vidiocgmbuf = vidiocgmbuf,
2279#endif 2304#endif
2280}; 2305};
2281 2306
2282static struct video_device cx231xx_vbi_template; 2307static struct video_device cx231xx_vbi_template;
2283 2308
2284static const struct video_device cx231xx_video_template = { 2309static const struct video_device cx231xx_video_template = {
2285 .fops = &cx231xx_v4l_fops, 2310 .fops = &cx231xx_v4l_fops,
2286 .release = video_device_release, 2311 .release = video_device_release,
2287 .ioctl_ops = &video_ioctl_ops, 2312 .ioctl_ops = &video_ioctl_ops,
2288 .minor = -1, 2313 .minor = -1,
2289 .tvnorms = V4L2_STD_ALL, 2314 .tvnorms = V4L2_STD_ALL,
2290 .current_norm = V4L2_STD_PAL, 2315 .current_norm = V4L2_STD_PAL,
2291}; 2316};
2292 2317
2293static const struct v4l2_file_operations radio_fops = { 2318static const struct v4l2_file_operations radio_fops = {
2294 .owner = THIS_MODULE, 2319 .owner = THIS_MODULE,
2295 .open = cx231xx_v4l2_open, 2320 .open = cx231xx_v4l2_open,
2296 .release = cx231xx_v4l2_close, 2321 .release = cx231xx_v4l2_close,
2297 .ioctl = video_ioctl2, 2322 .ioctl = video_ioctl2,
2298}; 2323};
2299 2324
2300static const struct v4l2_ioctl_ops radio_ioctl_ops = { 2325static const struct v4l2_ioctl_ops radio_ioctl_ops = {
2301 .vidioc_querycap = radio_querycap, 2326 .vidioc_querycap = radio_querycap,
2302 .vidioc_g_tuner = radio_g_tuner, 2327 .vidioc_g_tuner = radio_g_tuner,
2303 .vidioc_enum_input = radio_enum_input, 2328 .vidioc_enum_input = radio_enum_input,
2304 .vidioc_g_audio = radio_g_audio, 2329 .vidioc_g_audio = radio_g_audio,
2305 .vidioc_s_tuner = radio_s_tuner, 2330 .vidioc_s_tuner = radio_s_tuner,
2306 .vidioc_s_audio = radio_s_audio, 2331 .vidioc_s_audio = radio_s_audio,
2307 .vidioc_s_input = radio_s_input, 2332 .vidioc_s_input = radio_s_input,
2308 .vidioc_queryctrl = radio_queryctrl, 2333 .vidioc_queryctrl = radio_queryctrl,
2309 .vidioc_g_ctrl = vidioc_g_ctrl, 2334 .vidioc_g_ctrl = vidioc_g_ctrl,
2310 .vidioc_s_ctrl = vidioc_s_ctrl, 2335 .vidioc_s_ctrl = vidioc_s_ctrl,
2311 .vidioc_g_frequency = vidioc_g_frequency, 2336 .vidioc_g_frequency = vidioc_g_frequency,
2312 .vidioc_s_frequency = vidioc_s_frequency, 2337 .vidioc_s_frequency = vidioc_s_frequency,
2313#ifdef CONFIG_VIDEO_ADV_DEBUG 2338#ifdef CONFIG_VIDEO_ADV_DEBUG
2314 .vidioc_g_register = vidioc_g_register, 2339 .vidioc_g_register = vidioc_g_register,
2315 .vidioc_s_register = vidioc_s_register, 2340 .vidioc_s_register = vidioc_s_register,
2316#endif 2341#endif
2317}; 2342};
2318 2343
2319static struct video_device cx231xx_radio_template = { 2344static struct video_device cx231xx_radio_template = {
2320 .name = "cx231xx-radio", 2345 .name = "cx231xx-radio",
2321 .fops = &radio_fops, 2346 .fops = &radio_fops,
2322 .ioctl_ops = &radio_ioctl_ops, 2347 .ioctl_ops = &radio_ioctl_ops,
2323 .minor = -1, 2348 .minor = -1,
2324}; 2349};
2325 2350
2326/******************************** usb interface ******************************/ 2351/******************************** usb interface ******************************/
2327 2352
2328 2353static struct video_device *cx231xx_vdev_init(struct cx231xx *dev, const struct video_device
2329static struct video_device *cx231xx_vdev_init(struct cx231xx *dev, 2354 *template, const char *type_name)
2330 const struct video_device *template,
2331 const char *type_name)
2332{ 2355{
2333 struct video_device *vfd; 2356 struct video_device *vfd;
2334 2357
@@ -2336,13 +2359,12 @@ static struct video_device *cx231xx_vdev_init(struct cx231xx *dev,
2336 if (NULL == vfd) 2359 if (NULL == vfd)
2337 return NULL; 2360 return NULL;
2338 *vfd = *template; 2361 *vfd = *template;
2339 vfd->minor = -1; 2362 vfd->minor = -1;
2340 vfd->parent = &dev->udev->dev; 2363 vfd->parent = &dev->udev->dev;
2341 vfd->release = video_device_release; 2364 vfd->release = video_device_release;
2342 vfd->debug = video_debug; 2365 vfd->debug = video_debug;
2343 2366
2344 snprintf(vfd->name, sizeof(vfd->name), "%s %s", 2367 snprintf(vfd->name, sizeof(vfd->name), "%s %s", dev->name, type_name);
2345 dev->name, type_name);
2346 2368
2347 return vfd; 2369 return vfd;
2348} 2370}
@@ -2351,15 +2373,16 @@ int cx231xx_register_analog_devices(struct cx231xx *dev)
2351{ 2373{
2352 int ret; 2374 int ret;
2353 2375
2354 cx231xx_info("%s()\n", __func__); 2376 cx231xx_info("%s()\n", __func__);
2355 2377
2356 cx231xx_info("%s: v4l2 driver version %d.%d.%d\n", 2378 cx231xx_info("%s: v4l2 driver version %d.%d.%d\n",
2357 dev->name, 2379 dev->name,
2358 (CX231XX_VERSION_CODE >> 16) & 0xff, 2380 (CX231XX_VERSION_CODE >> 16) & 0xff,
2359 (CX231XX_VERSION_CODE >> 8) & 0xff, CX231XX_VERSION_CODE & 0xff); 2381 (CX231XX_VERSION_CODE >> 8) & 0xff,
2382 CX231XX_VERSION_CODE & 0xff);
2360 2383
2361 /* set default norm */ 2384 /* set default norm */
2362 /*dev->norm = cx231xx_video_template.current_norm;*/ 2385 /*dev->norm = cx231xx_video_template.current_norm; */
2363 dev->width = norm_maxw(dev); 2386 dev->width = norm_maxw(dev);
2364 dev->height = norm_maxh(dev); 2387 dev->height = norm_maxh(dev);
2365 dev->interlaced = 0; 2388 dev->interlaced = 0;
@@ -2375,7 +2398,7 @@ int cx231xx_register_analog_devices(struct cx231xx *dev)
2375 dev->volume = 0x1f; 2398 dev->volume = 0x1f;
2376 2399
2377 /* enable vbi capturing */ 2400 /* enable vbi capturing */
2378 /* write code here... */ 2401 /* write code here... */
2379 2402
2380 /* allocate and fill video video_device struct */ 2403 /* allocate and fill video video_device struct */
2381 dev->vdev = cx231xx_vdev_init(dev, &cx231xx_video_template, "video"); 2404 dev->vdev = cx231xx_vdev_init(dev, &cx231xx_video_template, "video");
@@ -2386,37 +2409,38 @@ int cx231xx_register_analog_devices(struct cx231xx *dev)
2386 2409
2387 /* register v4l2 video video_device */ 2410 /* register v4l2 video video_device */
2388 ret = video_register_device(dev->vdev, VFL_TYPE_GRABBER, 2411 ret = video_register_device(dev->vdev, VFL_TYPE_GRABBER,
2389 video_nr[dev->devno]); 2412 video_nr[dev->devno]);
2390 if (ret) { 2413 if (ret) {
2391 cx231xx_errdev("unable to register video device (error=%i).\n", ret); 2414 cx231xx_errdev("unable to register video device (error=%i).\n",
2415 ret);
2392 return ret; 2416 return ret;
2393 } 2417 }
2394 2418
2395 cx231xx_info("%s/0: registered device video%d [v4l2]\n", 2419 cx231xx_info("%s/0: registered device video%d [v4l2]\n",
2396 dev->name, dev->vdev->num); 2420 dev->name, dev->vdev->num);
2397
2398 /* Initialize VBI template */
2399 memcpy( &cx231xx_vbi_template, &cx231xx_video_template,
2400 sizeof(cx231xx_vbi_template) );
2401 strcpy(cx231xx_vbi_template.name,"cx231xx-vbi");
2402 2421
2422 /* Initialize VBI template */
2423 memcpy(&cx231xx_vbi_template, &cx231xx_video_template,
2424 sizeof(cx231xx_vbi_template));
2425 strcpy(cx231xx_vbi_template.name, "cx231xx-vbi");
2403 2426
2404 /* Allocate and fill vbi video_device struct */ 2427 /* Allocate and fill vbi video_device struct */
2405 dev->vbi_dev = cx231xx_vdev_init(dev, &cx231xx_vbi_template, "vbi"); 2428 dev->vbi_dev = cx231xx_vdev_init(dev, &cx231xx_vbi_template, "vbi");
2406 2429
2407 /* register v4l2 vbi video_device */ 2430 /* register v4l2 vbi video_device */
2408 ret = video_register_device(dev->vbi_dev, VFL_TYPE_VBI, 2431 ret = video_register_device(dev->vbi_dev, VFL_TYPE_VBI,
2409 vbi_nr[dev->devno]); 2432 vbi_nr[dev->devno]);
2410 if (ret < 0) { 2433 if (ret < 0) {
2411 cx231xx_errdev("unable to register vbi device\n"); 2434 cx231xx_errdev("unable to register vbi device\n");
2412 return ret; 2435 return ret;
2413 } 2436 }
2414 2437
2415 cx231xx_info("%s/0: registered device vbi%d\n", 2438 cx231xx_info("%s/0: registered device vbi%d\n",
2416 dev->name, dev->vbi_dev->num); 2439 dev->name, dev->vbi_dev->num);
2417 2440
2418 if (cx231xx_boards[dev->model].radio.type == CX231XX_RADIO) { 2441 if (cx231xx_boards[dev->model].radio.type == CX231XX_RADIO) {
2419 dev->radio_dev = cx231xx_vdev_init(dev, &cx231xx_radio_template, "radio"); 2442 dev->radio_dev =
2443 cx231xx_vdev_init(dev, &cx231xx_radio_template, "radio");
2420 if (!dev->radio_dev) { 2444 if (!dev->radio_dev) {
2421 cx231xx_errdev("cannot allocate video_device.\n"); 2445 cx231xx_errdev("cannot allocate video_device.\n");
2422 return -ENODEV; 2446 return -ENODEV;
@@ -2428,13 +2452,11 @@ int cx231xx_register_analog_devices(struct cx231xx *dev)
2428 return ret; 2452 return ret;
2429 } 2453 }
2430 cx231xx_info("Registered radio device as /dev/radio%d\n", 2454 cx231xx_info("Registered radio device as /dev/radio%d\n",
2431 dev->radio_dev->num); 2455 dev->radio_dev->num);
2432 } 2456 }
2433 2457
2434 cx231xx_info("V4L2 device registered as /dev/video%d and /dev/vbi%d\n", 2458 cx231xx_info("V4L2 device registered as /dev/video%d and /dev/vbi%d\n",
2435 dev->vdev->num, dev->vbi_dev->num); 2459 dev->vdev->num, dev->vbi_dev->num);
2436 2460
2437 return 0; 2461 return 0;
2438} 2462}
2439
2440
diff --git a/drivers/media/video/cx231xx/cx231xx.h b/drivers/media/video/cx231xx/cx231xx.h
index 5fef87fbbcec..1f6c5be65a55 100644
--- a/drivers/media/video/cx231xx/cx231xx.h
+++ b/drivers/media/video/cx231xx/cx231xx.h
@@ -2,7 +2,7 @@
2 cx231xx.h - driver for Conexant Cx23100/101/102 USB video capture devices 2 cx231xx.h - driver for Conexant Cx23100/101/102 USB video capture devices
3 3
4 Copyright (C) 2008 <srinivasa.deevi at conexant dot com> 4 Copyright (C) 2008 <srinivasa.deevi at conexant dot com>
5 Based on em28xx driver 5 Based on em28xx driver
6 6
7 This program is free software; you can redistribute it and/or modify 7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by 8 it under the terms of the GNU General Public License as published by
@@ -65,7 +65,7 @@
65 65
66/* Params for validated field */ 66/* Params for validated field */
67#define CX231XX_BOARD_NOT_VALIDATED 1 67#define CX231XX_BOARD_NOT_VALIDATED 1
68#define CX231XX_BOARD_VALIDATED 0 68#define CX231XX_BOARD_VALIDATED 0
69 69
70/* maximum number of cx231xx boards */ 70/* maximum number of cx231xx boards */
71#define CX231XX_MAXBOARDS 8 71#define CX231XX_MAXBOARDS 8
@@ -82,17 +82,14 @@
82 */ 82 */
83#define CX231XX_NUM_PACKETS 40 83#define CX231XX_NUM_PACKETS 40
84 84
85
86/* default alternate; 0 means choose the best */ 85/* default alternate; 0 means choose the best */
87#define CX231XX_PINOUT 0 86#define CX231XX_PINOUT 0
88 87
89#define CX231XX_INTERLACED_DEFAULT 1 88#define CX231XX_INTERLACED_DEFAULT 1
90 89
91
92/* time to wait when stopping the isoc transfer */ 90/* time to wait when stopping the isoc transfer */
93#define CX231XX_URB_TIMEOUT msecs_to_jiffies(CX231XX_NUM_BUFS * CX231XX_NUM_PACKETS) 91#define CX231XX_URB_TIMEOUT msecs_to_jiffies(CX231XX_NUM_BUFS * CX231XX_NUM_PACKETS)
94 92
95
96enum cx231xx_mode { 93enum cx231xx_mode {
97 CX231XX_SUSPEND, 94 CX231XX_SUSPEND,
98 CX231XX_ANALOG_MODE, 95 CX231XX_ANALOG_MODE,
@@ -113,47 +110,45 @@ enum cx231xx_stream_state {
113struct cx231xx; 110struct cx231xx;
114 111
115struct cx231xx_usb_isoc_ctl { 112struct cx231xx_usb_isoc_ctl {
116 /* max packet size of isoc transaction */ 113 /* max packet size of isoc transaction */
117 int max_pkt_size; 114 int max_pkt_size;
118 115
119 /* number of allocated urbs */ 116 /* number of allocated urbs */
120 int num_bufs; 117 int num_bufs;
121 118
122 /* urb for isoc transfers */ 119 /* urb for isoc transfers */
123 struct urb **urb; 120 struct urb **urb;
124 121
125 /* transfer buffers for isoc transfer */ 122 /* transfer buffers for isoc transfer */
126 char **transfer_buffer; 123 char **transfer_buffer;
127 124
128 /* Last buffer command and region */ 125 /* Last buffer command and region */
129 u8 cmd; 126 u8 cmd;
130 int pos, size, pktsize; 127 int pos, size, pktsize;
131 128
132 /* Last field: ODD or EVEN? */ 129 /* Last field: ODD or EVEN? */
133 int field; 130 int field;
134 131
135 /* Stores incomplete commands */ 132 /* Stores incomplete commands */
136 u32 tmp_buf; 133 u32 tmp_buf;
137 int tmp_buf_len; 134 int tmp_buf_len;
138 135
139 /* Stores already requested buffers */ 136 /* Stores already requested buffers */
140 struct cx231xx_buffer *buf; 137 struct cx231xx_buffer *buf;
141 138
142 /* Stores the number of received fields */ 139 /* Stores the number of received fields */
143 int nfields; 140 int nfields;
144 141
145 /* isoc urb callback */ 142 /* isoc urb callback */
146 int (*isoc_copy) (struct cx231xx *dev, struct urb *urb); 143 int (*isoc_copy) (struct cx231xx * dev, struct urb * urb);
147 144
148}; 145};
149 146
150
151
152struct cx231xx_fmt { 147struct cx231xx_fmt {
153 char *name; 148 char *name;
154 u32 fourcc; /* v4l2 format id */ 149 u32 fourcc; /* v4l2 format id */
155 int depth; 150 int depth;
156 int reg; 151 int reg;
157}; 152};
158 153
159/* buffer for one video frame */ 154/* buffer for one video frame */
@@ -167,24 +162,23 @@ struct cx231xx_buffer {
167}; 162};
168 163
169struct cx231xx_dmaqueue { 164struct cx231xx_dmaqueue {
170 struct list_head active; 165 struct list_head active;
171 struct list_head queued; 166 struct list_head queued;
172 167
173 wait_queue_head_t wq; 168 wait_queue_head_t wq;
174 169
175 /* Counters to control buffer fill */ 170 /* Counters to control buffer fill */
176 int pos; 171 int pos;
177 u8 is_partial_line; 172 u8 is_partial_line;
178 u8 partial_buf[8]; 173 u8 partial_buf[8];
179 u8 last_sav; 174 u8 last_sav;
180 int current_field; 175 int current_field;
181 u32 bytes_left_in_line; 176 u32 bytes_left_in_line;
182 u32 lines_completed; 177 u32 lines_completed;
183 u8 field1_done; 178 u8 field1_done;
184 u32 lines_per_field; 179 u32 lines_per_field;
185}; 180};
186 181
187
188/* inputs */ 182/* inputs */
189 183
190#define MAX_CX231XX_INPUT 4 184#define MAX_CX231XX_INPUT 4
@@ -193,35 +187,35 @@ enum cx231xx_itype {
193 CX231XX_VMUX_COMPOSITE1 = 1, 187 CX231XX_VMUX_COMPOSITE1 = 1,
194 CX231XX_VMUX_SVIDEO, 188 CX231XX_VMUX_SVIDEO,
195 CX231XX_VMUX_TELEVISION, 189 CX231XX_VMUX_TELEVISION,
196 CX231XX_VMUX_CABLE, 190 CX231XX_VMUX_CABLE,
197 CX231XX_RADIO, 191 CX231XX_RADIO,
198 CX231XX_VMUX_DVB, 192 CX231XX_VMUX_DVB,
199 CX231XX_VMUX_DEBUG 193 CX231XX_VMUX_DEBUG
200}; 194};
201 195
202enum cx231xx_v_input { 196enum cx231xx_v_input {
203 CX231XX_VIN_1_1 = 0x1, 197 CX231XX_VIN_1_1 = 0x1,
204 CX231XX_VIN_2_1, 198 CX231XX_VIN_2_1,
205 CX231XX_VIN_3_1, 199 CX231XX_VIN_3_1,
206 CX231XX_VIN_4_1, 200 CX231XX_VIN_4_1,
207 CX231XX_VIN_1_2 = 0x01, 201 CX231XX_VIN_1_2 = 0x01,
208 CX231XX_VIN_2_2, 202 CX231XX_VIN_2_2,
209 CX231XX_VIN_3_2, 203 CX231XX_VIN_3_2,
210 CX231XX_VIN_1_3 = 0x1, 204 CX231XX_VIN_1_3 = 0x1,
211 CX231XX_VIN_2_3, 205 CX231XX_VIN_2_3,
212 CX231XX_VIN_3_3, 206 CX231XX_VIN_3_3,
213}; 207};
214 208
215/* cx231xx has two audio inputs: tuner and line in */ 209/* cx231xx has two audio inputs: tuner and line in */
216enum cx231xx_amux { 210enum cx231xx_amux {
217 /* This is the only entry for cx231xx tuner input */ 211 /* This is the only entry for cx231xx tuner input */
218 CX231XX_AMUX_VIDEO, /* cx231xx tuner*/ 212 CX231XX_AMUX_VIDEO, /* cx231xx tuner */
219 CX231XX_AMUX_LINE_IN, /* Line In */ 213 CX231XX_AMUX_LINE_IN, /* Line In */
220}; 214};
221 215
222struct cx231xx_reg_seq { 216struct cx231xx_reg_seq {
223 unsigned char bit; 217 unsigned char bit;
224 unsigned char val; 218 unsigned char val;
225 int sleep; 219 int sleep;
226}; 220};
227 221
@@ -239,41 +233,40 @@ enum cx231xx_decoder {
239 CX231XX_AVDECODER 233 CX231XX_AVDECODER
240}; 234};
241 235
242typedef enum _I2C_MASTER_PORT 236typedef enum _I2C_MASTER_PORT {
243{ 237 I2C_0 = 0,
244 I2C_0 =0, 238 I2C_1 = 1,
245 I2C_1 =1, 239 I2C_2 = 2,
246 I2C_2 =2, 240 I2C_3 = 3
247 I2C_3 =3 241} CX231XX_I2C_MASTER_PORT;
248}CX231XX_I2C_MASTER_PORT;
249 242
250struct cx231xx_board { 243struct cx231xx_board {
251 char *name; 244 char *name;
252 int vchannels; 245 int vchannels;
253 int tuner_type; 246 int tuner_type;
254 int tuner_addr; 247 int tuner_addr;
255 v4l2_std_id norm; /* tv norm */ 248 v4l2_std_id norm; /* tv norm */
256 249
257 /* demod related */ 250 /* demod related */
258 int demod_addr; 251 int demod_addr;
259 u8 demod_xfer_mode; /* 0 - Serial; 1 - parallel */ 252 u8 demod_xfer_mode; /* 0 - Serial; 1 - parallel */
260 253
261 /* GPIO Pins */ 254 /* GPIO Pins */
262 struct cx231xx_reg_seq *dvb_gpio; 255 struct cx231xx_reg_seq *dvb_gpio;
263 struct cx231xx_reg_seq *suspend_gpio; 256 struct cx231xx_reg_seq *suspend_gpio;
264 struct cx231xx_reg_seq *tuner_gpio; 257 struct cx231xx_reg_seq *tuner_gpio;
265 u8 tuner_sif_gpio; 258 u8 tuner_sif_gpio;
266 u8 tuner_scl_gpio; 259 u8 tuner_scl_gpio;
267 u8 tuner_sda_gpio; 260 u8 tuner_sda_gpio;
268 261
269 /* PIN ctrl */ 262 /* PIN ctrl */
270 u32 ctl_pin_status_mask; 263 u32 ctl_pin_status_mask;
271 u8 agc_analog_digital_select_gpio; 264 u8 agc_analog_digital_select_gpio;
272 u32 gpio_pin_status_mask; 265 u32 gpio_pin_status_mask;
273 266
274 /* i2c masters */ 267 /* i2c masters */
275 u8 tuner_i2c_master; 268 u8 tuner_i2c_master;
276 u8 demod_i2c_master; 269 u8 demod_i2c_master;
277 270
278 unsigned int max_range_640_480:1; 271 unsigned int max_range_640_480:1;
279 unsigned int has_dvb:1; 272 unsigned int has_dvb:1;
@@ -283,9 +276,9 @@ struct cx231xx_board {
283 276
284 enum cx231xx_decoder decoder; 277 enum cx231xx_decoder decoder;
285 278
286 struct cx231xx_input input[MAX_CX231XX_INPUT]; 279 struct cx231xx_input input[MAX_CX231XX_INPUT];
287 struct cx231xx_input radio; 280 struct cx231xx_input radio;
288 IR_KEYTAB_TYPE *ir_codes; 281 IR_KEYTAB_TYPE *ir_codes;
289}; 282};
290 283
291/* device states */ 284/* device states */
@@ -295,22 +288,20 @@ enum cx231xx_dev_state {
295 DEV_MISCONFIGURED = 0x04, 288 DEV_MISCONFIGURED = 0x04,
296}; 289};
297 290
298enum AFE_MODE 291enum AFE_MODE {
299{ 292 AFE_MODE_LOW_IF,
300 AFE_MODE_LOW_IF, 293 AFE_MODE_BASEBAND,
301 AFE_MODE_BASEBAND, 294 AFE_MODE_EU_HI_IF,
302 AFE_MODE_EU_HI_IF, 295 AFE_MODE_US_HI_IF,
303 AFE_MODE_US_HI_IF, 296 AFE_MODE_JAPAN_HI_IF
304 AFE_MODE_JAPAN_HI_IF
305}; 297};
306 298
307enum AUDIO_INPUT 299enum AUDIO_INPUT {
308{ 300 AUDIO_INPUT_MUTE,
309 AUDIO_INPUT_MUTE, 301 AUDIO_INPUT_LINE,
310 AUDIO_INPUT_LINE, 302 AUDIO_INPUT_TUNER_TV,
311 AUDIO_INPUT_TUNER_TV, 303 AUDIO_INPUT_SPDIF,
312 AUDIO_INPUT_SPDIF, 304 AUDIO_INPUT_TUNER_FM
313 AUDIO_INPUT_TUNER_FM
314}; 305};
315 306
316#define CX231XX_AUDIO_BUFS 5 307#define CX231XX_AUDIO_BUFS 5
@@ -319,7 +310,6 @@ enum AUDIO_INPUT
319#define CX231XX_STOP_AUDIO 0 310#define CX231XX_STOP_AUDIO 0
320#define CX231XX_START_AUDIO 1 311#define CX231XX_START_AUDIO 1
321 312
322
323/* cx231xx extensions */ 313/* cx231xx extensions */
324#define CX231XX_AUDIO 0x10 314#define CX231XX_AUDIO 0x10
325#define CX231XX_DVB 0x20 315#define CX231XX_DVB 0x20
@@ -330,169 +320,167 @@ struct cx231xx_audio {
330 struct urb *urb[CX231XX_AUDIO_BUFS]; 320 struct urb *urb[CX231XX_AUDIO_BUFS];
331 struct usb_device *udev; 321 struct usb_device *udev;
332 unsigned int capture_transfer_done; 322 unsigned int capture_transfer_done;
333 struct snd_pcm_substream *capture_pcm_substream; 323 struct snd_pcm_substream *capture_pcm_substream;
334 324
335 unsigned int hwptr_done_capture; 325 unsigned int hwptr_done_capture;
336 struct snd_card *sndcard; 326 struct snd_card *sndcard;
337 327
338 int users, shutdown; 328 int users, shutdown;
339 enum cx231xx_stream_state capture_stream; 329 enum cx231xx_stream_state capture_stream;
340 spinlock_t slock; 330 spinlock_t slock;
341 331
342 int alt; /* alternate */ 332 int alt; /* alternate */
343 int max_pkt_size; /* max packet size of isoc transaction */ 333 int max_pkt_size; /* max packet size of isoc transaction */
344 int num_alt; /* Number of alternative settings */ 334 int num_alt; /* Number of alternative settings */
345 unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */ 335 unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */
346 u16 end_point_addr; 336 u16 end_point_addr;
347}; 337};
348 338
349struct cx231xx; 339struct cx231xx;
350 340
351struct cx231xx_fh { 341struct cx231xx_fh {
352 struct cx231xx *dev; 342 struct cx231xx *dev;
353 unsigned int stream_on:1; /* Locks streams */ 343 unsigned int stream_on:1; /* Locks streams */
354 int radio; 344 int radio;
355 345
356 struct videobuf_queue vb_vidq; 346 struct videobuf_queue vb_vidq;
357 347
358 enum v4l2_buf_type type; 348 enum v4l2_buf_type type;
359}; 349};
360 350
361/**********************************************************************************/ 351/**********************************************************************************/
362/* set/get i2c */ 352/* set/get i2c */
363#define I2C_SPEED_1M 0x0 /* 00--1Mb/s, 01-400kb/s, 10--100kb/s, 11--5Mb/s */ 353#define I2C_SPEED_1M 0x0 /* 00--1Mb/s, 01-400kb/s, 10--100kb/s, 11--5Mb/s */
364#define I2C_SPEED_400K 0x1 /* 00--1Mb/s, 01-400kb/s, 10--100kb/s, 11--5Mb/s */ 354#define I2C_SPEED_400K 0x1 /* 00--1Mb/s, 01-400kb/s, 10--100kb/s, 11--5Mb/s */
365#define I2C_SPEED_100K 0x2 /* 00--1Mb/s, 01-400kb/s, 10--100kb/s, 11--5Mb/s */ 355#define I2C_SPEED_100K 0x2 /* 00--1Mb/s, 01-400kb/s, 10--100kb/s, 11--5Mb/s */
366#define I2C_SPEED_5M 0x3 /* 00--1Mb/s, 01-400kb/s, 10--100kb/s, 11--5Mb/s */ 356#define I2C_SPEED_5M 0x3 /* 00--1Mb/s, 01-400kb/s, 10--100kb/s, 11--5Mb/s */
367 357
368#define I2C_STOP 0x0 /* 0-- STOP transaction */ 358#define I2C_STOP 0x0 /* 0-- STOP transaction */
369#define I2C_NOSTOP 0x1 /* 1-- do not transmit STOP at end of transaction */ 359#define I2C_NOSTOP 0x1 /* 1-- do not transmit STOP at end of transaction */
370#define I2C_SYNC 0x1 /* 1--alllow slave to insert clock wait states */ 360#define I2C_SYNC 0x1 /* 1--alllow slave to insert clock wait states */
371 361
372struct cx231xx_i2c { 362struct cx231xx_i2c {
373 struct cx231xx *dev; 363 struct cx231xx *dev;
374 364
375 int nr; 365 int nr;
376 366
377 /* i2c i/o */ 367 /* i2c i/o */
378 struct i2c_adapter i2c_adap; 368 struct i2c_adapter i2c_adap;
379 struct i2c_algo_bit_data i2c_algo; 369 struct i2c_algo_bit_data i2c_algo;
380 struct i2c_client i2c_client; 370 struct i2c_client i2c_client;
381 u32 i2c_rc; 371 u32 i2c_rc;
382 372
383 /* different settings for each bus */ 373 /* different settings for each bus */
384 u8 i2c_period; 374 u8 i2c_period;
385 u8 i2c_nostop; 375 u8 i2c_nostop;
386 u8 i2c_reserve; 376 u8 i2c_reserve;
387}; 377};
388 378
389struct cx231xx_i2c_xfer_data{ 379struct cx231xx_i2c_xfer_data {
390 u8 dev_addr; 380 u8 dev_addr;
391 u8 direction; /* 1 - IN, 0 - OUT */ 381 u8 direction; /* 1 - IN, 0 - OUT */
392 u8 saddr_len; /* sub address len */ 382 u8 saddr_len; /* sub address len */
393 u16 saddr_dat; /* sub addr data */ 383 u16 saddr_dat; /* sub addr data */
394 u8 buf_size; /* buffer size */ 384 u8 buf_size; /* buffer size */
395 u8* p_buffer; /* pointer to the buffer */ 385 u8 *p_buffer; /* pointer to the buffer */
396}; 386};
397 387
398typedef struct _VENDOR_REQUEST_IN 388typedef struct _VENDOR_REQUEST_IN {
399{ 389 u8 bRequest;
400 u8 bRequest; 390 u16 wValue;
401 u16 wValue; 391 u16 wIndex;
402 u16 wIndex; 392 u16 wLength;
403 u16 wLength; 393 u8 direction;
404 u8 direction; 394 u8 bData;
405 u8 bData; 395 u8 *pBuff;
406 u8 *pBuff;
407} VENDOR_REQUEST_IN, *PVENDOR_REQUEST_IN; 396} VENDOR_REQUEST_IN, *PVENDOR_REQUEST_IN;
408 397
409struct cx231xx_ctrl { 398struct cx231xx_ctrl {
410 struct v4l2_queryctrl v; 399 struct v4l2_queryctrl v;
411 u32 off; 400 u32 off;
412 u32 reg; 401 u32 reg;
413 u32 mask; 402 u32 mask;
414 u32 shift; 403 u32 shift;
415}; 404};
416 405
417typedef enum{ 406typedef enum {
418 Raw_Video = 0, 407 Raw_Video = 0,
419 Audio, 408 Audio,
420 Vbi, /* VANC */ 409 Vbi, /* VANC */
421 Sliced_cc, /* HANC */ 410 Sliced_cc, /* HANC */
422 TS1_serial_mode, 411 TS1_serial_mode,
423 TS2, 412 TS2,
424 TS1_parallel_mode 413 TS1_parallel_mode
425}TRANSFER_TYPE; 414} TRANSFER_TYPE;
426 415
427struct cx231xx_video_mode { 416struct cx231xx_video_mode {
428 /* Isoc control struct */ 417 /* Isoc control struct */
429 struct cx231xx_dmaqueue vidq; 418 struct cx231xx_dmaqueue vidq;
430 struct cx231xx_usb_isoc_ctl isoc_ctl; 419 struct cx231xx_usb_isoc_ctl isoc_ctl;
431 spinlock_t slock; 420 spinlock_t slock;
432 421
433 /* usb transfer */ 422 /* usb transfer */
434 int alt; /* alternate */ 423 int alt; /* alternate */
435 int max_pkt_size; /* max packet size of isoc transaction */ 424 int max_pkt_size; /* max packet size of isoc transaction */
436 int num_alt; /* Number of alternative settings */ 425 int num_alt; /* Number of alternative settings */
437 unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */ 426 unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */
438 u16 end_point_addr; 427 u16 end_point_addr;
439}; 428};
440 429
441
442/* main device struct */ 430/* main device struct */
443struct cx231xx { 431struct cx231xx {
444 /* generic device properties */ 432 /* generic device properties */
445 char name[30]; /* name (including minor) of the device */ 433 char name[30]; /* name (including minor) of the device */
446 int model; /* index in the device_data struct */ 434 int model; /* index in the device_data struct */
447 int devno; /* marks the number of this device */ 435 int devno; /* marks the number of this device */
448 436
449 struct cx231xx_board board; 437 struct cx231xx_board board;
450 438
451 unsigned int stream_on:1; /* Locks streams */ 439 unsigned int stream_on:1; /* Locks streams */
452 unsigned int vbi_stream_on:1; /* Locks streams for VBI */ 440 unsigned int vbi_stream_on:1; /* Locks streams for VBI */
453 unsigned int has_audio_class:1; 441 unsigned int has_audio_class:1;
454 unsigned int has_alsa_audio:1; 442 unsigned int has_alsa_audio:1;
455 443
456 struct cx231xx_fmt *format; 444 struct cx231xx_fmt *format;
457 445
458 struct cx231xx_IR *ir; 446 struct cx231xx_IR *ir;
459 447
460 struct list_head devlist; 448 struct list_head devlist;
461 449
462 int tuner_type; /* type of the tuner */ 450 int tuner_type; /* type of the tuner */
463 int tuner_addr; /* tuner address */ 451 int tuner_addr; /* tuner address */
464 452
465 /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */ 453 /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
466 struct cx231xx_i2c i2c_bus[3]; 454 struct cx231xx_i2c i2c_bus[3];
467 unsigned int xc_fw_load_done:1; 455 unsigned int xc_fw_load_done:1;
468 struct mutex gpio_i2c_lock; 456 struct mutex gpio_i2c_lock;
469 457
470 /* video for linux */ 458 /* video for linux */
471 int users; /* user count for exclusive use */ 459 int users; /* user count for exclusive use */
472 struct video_device *vdev; /* video for linux device struct */ 460 struct video_device *vdev; /* video for linux device struct */
473 v4l2_std_id norm; /* selected tv norm */ 461 v4l2_std_id norm; /* selected tv norm */
474 int ctl_freq; /* selected frequency */ 462 int ctl_freq; /* selected frequency */
475 unsigned int ctl_ainput; /* selected audio input */ 463 unsigned int ctl_ainput; /* selected audio input */
476 int mute; 464 int mute;
477 int volume; 465 int volume;
478 466
479 /* frame properties */ 467 /* frame properties */
480 int width; /* current frame width */ 468 int width; /* current frame width */
481 int height; /* current frame height */ 469 int height; /* current frame height */
482 unsigned hscale; /* horizontal scale factor (see datasheet) */ 470 unsigned hscale; /* horizontal scale factor (see datasheet) */
483 unsigned vscale; /* vertical scale factor (see datasheet) */ 471 unsigned vscale; /* vertical scale factor (see datasheet) */
484 int interlaced; /* 1=interlace fileds, 0=just top fileds */ 472 int interlaced; /* 1=interlace fileds, 0=just top fileds */
485 473
486 struct cx231xx_audio adev; 474 struct cx231xx_audio adev;
487 475
488 /* states */ 476 /* states */
489 enum cx231xx_dev_state state; 477 enum cx231xx_dev_state state;
490 478
491 struct work_struct request_module_wk; 479 struct work_struct request_module_wk;
492 480
493 /* locks */ 481 /* locks */
494 struct mutex lock; 482 struct mutex lock;
495 struct mutex ctrl_urb_lock; /* protects urb_buf */ 483 struct mutex ctrl_urb_lock; /* protects urb_buf */
496 struct list_head inqueue, outqueue; 484 struct list_head inqueue, outqueue;
497 wait_queue_head_t open, wait_frame, wait_stream; 485 wait_queue_head_t open, wait_frame, wait_stream;
498 struct video_device *vbi_dev; 486 struct video_device *vbi_dev;
@@ -500,54 +488,56 @@ struct cx231xx {
500 488
501 unsigned char eedata[256]; 489 unsigned char eedata[256];
502 490
503 struct cx231xx_video_mode video_mode; 491 struct cx231xx_video_mode video_mode;
504 struct cx231xx_video_mode vbi_mode; 492 struct cx231xx_video_mode vbi_mode;
505 struct cx231xx_video_mode sliced_cc_mode; 493 struct cx231xx_video_mode sliced_cc_mode;
506 struct cx231xx_video_mode ts1_mode; 494 struct cx231xx_video_mode ts1_mode;
507
508 struct usb_device *udev; /* the usb device */
509 char urb_buf[URB_MAX_CTRL_SIZE];/* urb control msg buffer */
510 495
496 struct usb_device *udev; /* the usb device */
497 char urb_buf[URB_MAX_CTRL_SIZE]; /* urb control msg buffer */
511 498
512 /* helper funcs that call usb_control_msg */ 499 /* helper funcs that call usb_control_msg */
513 int (*cx231xx_read_ctrl_reg) (struct cx231xx *dev, u8 req, u16 reg, 500 int (*cx231xx_read_ctrl_reg) (struct cx231xx * dev, u8 req, u16 reg,
514 char *buf, int len);
515 int (*cx231xx_write_ctrl_reg)(struct cx231xx *dev, u8 req, u16 reg,
516 char *buf, int len); 501 char *buf, int len);
517 int (*cx231xx_send_usb_command)(struct cx231xx_i2c *i2c_bus, 502 int (*cx231xx_write_ctrl_reg) (struct cx231xx * dev, u8 req, u16 reg,
518 struct cx231xx_i2c_xfer_data *req_data); 503 char *buf, int len);
519 int (*cx231xx_gpio_i2c_read)(struct cx231xx *dev, u8 dev_addr, u8 *buf ,u8 len); 504 int (*cx231xx_send_usb_command) (struct cx231xx_i2c * i2c_bus,
520 int (*cx231xx_gpio_i2c_write)(struct cx231xx *dev, u8 dev_addr, u8 *buf ,u8 len); 505 struct cx231xx_i2c_xfer_data *
521 506 req_data);
522 int (*cx231xx_set_analog_freq)(struct cx231xx *dev, u32 freq ) ; 507 int (*cx231xx_gpio_i2c_read) (struct cx231xx * dev, u8 dev_addr,
523 int (*cx231xx_reset_analog_tuner)(struct cx231xx *dev) ; 508 u8 * buf, u8 len);
509 int (*cx231xx_gpio_i2c_write) (struct cx231xx * dev, u8 dev_addr,
510 u8 * buf, u8 len);
511
512 int (*cx231xx_set_analog_freq) (struct cx231xx * dev, u32 freq);
513 int (*cx231xx_reset_analog_tuner) (struct cx231xx * dev);
524 514
525 enum cx231xx_mode mode; 515 enum cx231xx_mode mode;
526 516
527 struct cx231xx_dvb *dvb; 517 struct cx231xx_dvb *dvb;
528 518
529 /* Cx231xx supported PCB config's */ 519 /* Cx231xx supported PCB config's */
530 struct pcb_config current_pcb_config; 520 struct pcb_config current_pcb_config;
531 u8 current_scenario_idx; 521 u8 current_scenario_idx;
532 u8 interface_count; 522 u8 interface_count;
533 u8 max_iad_interface_count; 523 u8 max_iad_interface_count;
534 524
535 /* GPIO related register direction and values */ 525 /* GPIO related register direction and values */
536 u32 gpio_dir; 526 u32 gpio_dir;
537 u32 gpio_val; 527 u32 gpio_val;
538 528
539 /* Power Modes */ 529 /* Power Modes */
540 int power_mode; 530 int power_mode;
541 531
542 /* colibri parameters */ 532 /* colibri parameters */
543 enum AFE_MODE colibri_mode; 533 enum AFE_MODE colibri_mode;
544 u32 colibri_ref_count; 534 u32 colibri_ref_count;
545 535
546 /* video related parameters */ 536 /* video related parameters */
547 u32 video_input; 537 u32 video_input;
548 u32 active_mode; 538 u32 active_mode;
549 u8 vbi_or_sliced_cc_mode; /* 0 - vbi ; 1 - sliced cc mode */ 539 u8 vbi_or_sliced_cc_mode; /* 0 - vbi ; 1 - sliced cc mode */
550 enum cx231xx_std_mode std_mode; /* 0 - Air; 1 - cable */ 540 enum cx231xx_std_mode std_mode; /* 0 - Air; 1 - cable */
551 541
552}; 542};
553 543
@@ -555,29 +545,31 @@ struct cx231xx_ops {
555 struct list_head next; 545 struct list_head next;
556 char *name; 546 char *name;
557 int id; 547 int id;
558 int (*init)(struct cx231xx *); 548 int (*init) (struct cx231xx *);
559 int (*fini)(struct cx231xx *); 549 int (*fini) (struct cx231xx *);
560}; 550};
561 551
562/* call back functions in dvb module */ 552/* call back functions in dvb module */
563int cx231xx_set_analog_freq(struct cx231xx *dev, u32 freq ) ; 553int cx231xx_set_analog_freq(struct cx231xx *dev, u32 freq);
564int cx231xx_reset_analog_tuner(struct cx231xx *dev) ; 554int cx231xx_reset_analog_tuner(struct cx231xx *dev);
565 555
566/* Provided by cx231xx-i2c.c */ 556/* Provided by cx231xx-i2c.c */
567void cx231xx_i2c_call_clients(struct cx231xx_i2c *bus, unsigned int cmd, void *arg); 557void cx231xx_i2c_call_clients(struct cx231xx_i2c *bus, unsigned int cmd,
558 void *arg);
568void cx231xx_do_i2c_scan(struct cx231xx *dev, struct i2c_client *c); 559void cx231xx_do_i2c_scan(struct cx231xx *dev, struct i2c_client *c);
569int cx231xx_i2c_register(struct cx231xx_i2c *bus); 560int cx231xx_i2c_register(struct cx231xx_i2c *bus);
570int cx231xx_i2c_unregister(struct cx231xx_i2c *bus); 561int cx231xx_i2c_unregister(struct cx231xx_i2c *bus);
571 562
572/* Internal block control functions */ 563/* Internal block control functions */
573int cx231xx_read_i2c_data(struct cx231xx *dev, u8 dev_addr, 564int cx231xx_read_i2c_data(struct cx231xx *dev, u8 dev_addr,
574 u16 saddr, u8 saddr_len, u32 *data, u8 data_len); 565 u16 saddr, u8 saddr_len, u32 * data, u8 data_len);
575int cx231xx_write_i2c_data(struct cx231xx *dev, u8 dev_addr, 566int cx231xx_write_i2c_data(struct cx231xx *dev, u8 dev_addr,
576 u16 saddr, u8 saddr_len, u32 data, u8 data_len); 567 u16 saddr, u8 saddr_len, u32 data, u8 data_len);
577int cx231xx_reg_mask_write(struct cx231xx *dev, u8 dev_addr, u8 size, u16 register_address, 568int cx231xx_reg_mask_write(struct cx231xx *dev, u8 dev_addr, u8 size,
578 u8 bit_start,u8 bit_end, u32 value); 569 u16 register_address, u8 bit_start, u8 bit_end,
570 u32 value);
579int cx231xx_read_modify_write_i2c_dword(struct cx231xx *dev, u8 dev_addr, 571int cx231xx_read_modify_write_i2c_dword(struct cx231xx *dev, u8 dev_addr,
580 u16 saddr, u32 mask, u32 value); 572 u16 saddr, u32 mask, u32 value);
581u32 cx231xx_set_field(u32 field_mask, u32 data); 573u32 cx231xx_set_field(u32 field_mask, u32 data);
582 574
583/* Colibri related functions */ 575/* Colibri related functions */
@@ -596,23 +588,26 @@ int cx231xx_flatiron_set_audio_input(struct cx231xx *dev, u8 audio_input);
596 588
597/* DIF related functions */ 589/* DIF related functions */
598int cx231xx_dif_configure_C2HH_for_low_IF(struct cx231xx *dev, u32 mode, 590int cx231xx_dif_configure_C2HH_for_low_IF(struct cx231xx *dev, u32 mode,
599 u32 function_mode, u32 standard); 591 u32 function_mode, u32 standard);
600int cx231xx_dif_set_standard(struct cx231xx *dev, u32 standard); 592int cx231xx_dif_set_standard(struct cx231xx *dev, u32 standard);
601int cx231xx_tuner_pre_channel_change(struct cx231xx *dev); 593int cx231xx_tuner_pre_channel_change(struct cx231xx *dev);
602int cx231xx_tuner_post_channel_change(struct cx231xx *dev); 594int cx231xx_tuner_post_channel_change(struct cx231xx *dev);
603 595
604/* video parser functions */ 596/* video parser functions */
605u8 cx231xx_find_next_SAV_EAV(u8 *p_buffer, u32 buffer_size, u32 *p_bytes_used); 597u8 cx231xx_find_next_SAV_EAV(u8 * p_buffer, u32 buffer_size,
606u8 cx231xx_find_boundary_SAV_EAV(u8 *p_buffer, u8 *partial_buf, u32 *p_bytes_used); 598 u32 * p_bytes_used);
599u8 cx231xx_find_boundary_SAV_EAV(u8 * p_buffer, u8 * partial_buf,
600 u32 * p_bytes_used);
607int cx231xx_do_copy(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q, 601int cx231xx_do_copy(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q,
608 u8 *p_buffer, u32 bytes_to_copy); 602 u8 * p_buffer, u32 bytes_to_copy);
609void cx231xx_reset_video_buffer(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q); 603void cx231xx_reset_video_buffer(struct cx231xx *dev,
610u8 cx231xx_is_buffer_done(struct cx231xx *dev,struct cx231xx_dmaqueue *dma_q); 604 struct cx231xx_dmaqueue *dma_q);
611u32 cx231xx_copy_video_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q, 605u8 cx231xx_is_buffer_done(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q);
612 u8 *p_line, u32 length, int field_number); 606u32 cx231xx_copy_video_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q,
613u32 cx231xx_get_video_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q, 607 u8 * p_line, u32 length, int field_number);
614 u8 sav_eav, u8 *p_buffer, u32 buffer_size); 608u32 cx231xx_get_video_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q,
615void cx231xx_swab(u16 *from, u16 *to, u16 len); 609 u8 sav_eav, u8 * p_buffer, u32 buffer_size);
610void cx231xx_swab(u16 * from, u16 * to, u16 len);
616 611
617/* Provided by cx231xx-core.c */ 612/* Provided by cx231xx-core.c */
618 613
@@ -622,46 +617,49 @@ void cx231xx_release_buffers(struct cx231xx *dev);
622 617
623/* read from control pipe */ 618/* read from control pipe */
624int cx231xx_read_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg, 619int cx231xx_read_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg,
625 char *buf, int len); 620 char *buf, int len);
626 621
627/* write to control pipe */ 622/* write to control pipe */
628int cx231xx_write_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg, 623int cx231xx_write_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg,
629 char *buf, int len); 624 char *buf, int len);
630int cx231xx_mode_register(struct cx231xx *dev, u16 address, u32 mode); 625int cx231xx_mode_register(struct cx231xx *dev, u16 address, u32 mode);
631 626
632int cx231xx_send_vendor_cmd(struct cx231xx *dev, VENDOR_REQUEST_IN *ven_req); 627int cx231xx_send_vendor_cmd(struct cx231xx *dev, VENDOR_REQUEST_IN * ven_req);
633int cx231xx_send_usb_command(struct cx231xx_i2c *i2c_bus, 628int cx231xx_send_usb_command(struct cx231xx_i2c *i2c_bus,
634 struct cx231xx_i2c_xfer_data *req_data); 629 struct cx231xx_i2c_xfer_data *req_data);
635 630
636/* Gpio related functions */ 631/* Gpio related functions */
637int cx231xx_send_gpio_cmd(struct cx231xx *dev, u32 gpio_bit, u8* gpio_val, 632int cx231xx_send_gpio_cmd(struct cx231xx *dev, u32 gpio_bit, u8 * gpio_val,
638 u8 len, u8 request, u8 direction); 633 u8 len, u8 request, u8 direction);
639int cx231xx_set_gpio_bit(struct cx231xx *dev, u32 gpio_bit, u8* gpio_val); 634int cx231xx_set_gpio_bit(struct cx231xx *dev, u32 gpio_bit, u8 * gpio_val);
640int cx231xx_get_gpio_bit(struct cx231xx *dev, u32 gpio_bit, u8* gpio_val); 635int cx231xx_get_gpio_bit(struct cx231xx *dev, u32 gpio_bit, u8 * gpio_val);
641int cx231xx_set_gpio_value(struct cx231xx *dev, int pin_number, int pin_value); 636int cx231xx_set_gpio_value(struct cx231xx *dev, int pin_number, int pin_value);
642int cx231xx_set_gpio_direction(struct cx231xx *dev, int pin_number, int pin_value); 637int cx231xx_set_gpio_direction(struct cx231xx *dev, int pin_number,
638 int pin_value);
643 639
644int cx231xx_gpio_i2c_start(struct cx231xx *dev); 640int cx231xx_gpio_i2c_start(struct cx231xx *dev);
645int cx231xx_gpio_i2c_end(struct cx231xx *dev); 641int cx231xx_gpio_i2c_end(struct cx231xx *dev);
646int cx231xx_gpio_i2c_write_byte(struct cx231xx *dev, u8 data); 642int cx231xx_gpio_i2c_write_byte(struct cx231xx *dev, u8 data);
647int cx231xx_gpio_i2c_read_byte(struct cx231xx *dev, u8 *buf); 643int cx231xx_gpio_i2c_read_byte(struct cx231xx *dev, u8 * buf);
648int cx231xx_gpio_i2c_read_ack(struct cx231xx *dev); 644int cx231xx_gpio_i2c_read_ack(struct cx231xx *dev);
649int cx231xx_gpio_i2c_write_ack(struct cx231xx *dev); 645int cx231xx_gpio_i2c_write_ack(struct cx231xx *dev);
650int cx231xx_gpio_i2c_write_nak(struct cx231xx *dev); 646int cx231xx_gpio_i2c_write_nak(struct cx231xx *dev);
651 647
652int cx231xx_gpio_i2c_read(struct cx231xx *dev, u8 dev_addr, u8 *buf ,u8 len); 648int cx231xx_gpio_i2c_read(struct cx231xx *dev, u8 dev_addr, u8 * buf, u8 len);
653int cx231xx_gpio_i2c_write(struct cx231xx *dev, u8 dev_addr, u8 *buf ,u8 len); 649int cx231xx_gpio_i2c_write(struct cx231xx *dev, u8 dev_addr, u8 * buf, u8 len);
654 650
655/* audio related functions */ 651/* audio related functions */
656int cx231xx_set_audio_decoder_input(struct cx231xx *dev, enum AUDIO_INPUT audio_input); 652int cx231xx_set_audio_decoder_input(struct cx231xx *dev,
653 enum AUDIO_INPUT audio_input);
657 654
658int cx231xx_capture_start(struct cx231xx *dev, int start, u8 media_type); 655int cx231xx_capture_start(struct cx231xx *dev, int start, u8 media_type);
659int cx231xx_resolution_set(struct cx231xx *dev); 656int cx231xx_resolution_set(struct cx231xx *dev);
660int cx231xx_set_video_alternate(struct cx231xx *dev); 657int cx231xx_set_video_alternate(struct cx231xx *dev);
661int cx231xx_set_alt_setting(struct cx231xx *dev, u8 index, u8 alt); 658int cx231xx_set_alt_setting(struct cx231xx *dev, u8 index, u8 alt);
662int cx231xx_init_isoc(struct cx231xx *dev, int max_packets, 659int cx231xx_init_isoc(struct cx231xx *dev, int max_packets,
663 int num_bufs, int max_pkt_size, 660 int num_bufs, int max_pkt_size,
664 int (*isoc_copy) (struct cx231xx *dev, struct urb *urb)); 661 int (*isoc_copy) (struct cx231xx * dev,
662 struct urb * urb));
665void cx231xx_uninit_isoc(struct cx231xx *dev); 663void cx231xx_uninit_isoc(struct cx231xx *dev);
666int cx231xx_set_mode(struct cx231xx *dev, enum cx231xx_mode set_mode); 664int cx231xx_set_mode(struct cx231xx *dev, enum cx231xx_mode set_mode);
667int cx231xx_gpio_set(struct cx231xx *dev, struct cx231xx_reg_seq *gpio); 665int cx231xx_gpio_set(struct cx231xx *dev, struct cx231xx_reg_seq *gpio);
@@ -673,7 +671,7 @@ int cx231xx_register_analog_devices(struct cx231xx *dev);
673void cx231xx_remove_from_devlist(struct cx231xx *dev); 671void cx231xx_remove_from_devlist(struct cx231xx *dev);
674void cx231xx_add_into_devlist(struct cx231xx *dev); 672void cx231xx_add_into_devlist(struct cx231xx *dev);
675struct cx231xx *cx231xx_get_device(int minor, 673struct cx231xx *cx231xx_get_device(int minor,
676 enum v4l2_buf_type *fh_type, int *has_radio); 674 enum v4l2_buf_type *fh_type, int *has_radio);
677void cx231xx_init_extension(struct cx231xx *dev); 675void cx231xx_init_extension(struct cx231xx *dev);
678void cx231xx_close_extension(struct cx231xx *dev); 676void cx231xx_close_extension(struct cx231xx *dev);
679 677
@@ -695,7 +693,8 @@ int cx231xx_power_suspend(struct cx231xx *dev);
695 693
696/* chip specific control functions */ 694/* chip specific control functions */
697int cx231xx_init_ctrl_pin_status(struct cx231xx *dev); 695int cx231xx_init_ctrl_pin_status(struct cx231xx *dev);
698int cx231xx_set_agc_analog_digital_mux_select(struct cx231xx *dev, u8 analog_or_digital); 696int cx231xx_set_agc_analog_digital_mux_select(struct cx231xx *dev,
697 u8 analog_or_digital);
699int cx231xx_enable_i2c_for_tuner(struct cx231xx *dev, u8 I2CIndex); 698int cx231xx_enable_i2c_for_tuner(struct cx231xx *dev, u8 I2CIndex);
700 699
701/* video audio decoder related functions */ 700/* video audio decoder related functions */
@@ -705,8 +704,8 @@ int cx231xx_set_decoder_video_input(struct cx231xx *dev, u8 pin_type, u8 input);
705int cx231xx_do_mode_ctrl_overrides(struct cx231xx *dev); 704int cx231xx_do_mode_ctrl_overrides(struct cx231xx *dev);
706int cx231xx_set_audio_input(struct cx231xx *dev, u8 input); 705int cx231xx_set_audio_input(struct cx231xx *dev, u8 input);
707void get_scale(struct cx231xx *dev, 706void get_scale(struct cx231xx *dev,
708 unsigned int width, unsigned int height, 707 unsigned int width, unsigned int height,
709 unsigned int *hscale, unsigned int *vscale); 708 unsigned int *hscale, unsigned int *vscale);
710 709
711/* Provided by cx231xx-video.c */ 710/* Provided by cx231xx-video.c */
712int cx231xx_register_extension(struct cx231xx_ops *dev); 711int cx231xx_register_extension(struct cx231xx_ops *dev);
@@ -743,7 +742,6 @@ int cx231xx_ir_fini(struct cx231xx *dev);
743 printk(KERN_WARNING "%s: "fmt,\ 742 printk(KERN_WARNING "%s: "fmt,\
744 dev->name , ##arg); } while (0) 743 dev->name , ##arg); } while (0)
745 744
746
747static inline unsigned int norm_maxw(struct cx231xx *dev) 745static inline unsigned int norm_maxw(struct cx231xx *dev)
748{ 746{
749 if (dev->board.max_range_640_480) 747 if (dev->board.max_range_640_480)
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-01 17:37:00 -0500