diff options
| author | Jaswinder Singh Rajput <jaswinder@kernel.org> | 2009-07-01 08:19:38 -0400 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2009-07-01 09:23:43 -0400 |
| commit | 44973998a111dfda09b952aa0f27cad326a97793 (patch) | |
| tree | 5a3235ebd5dd024a4422de3318cc969703990d48 | |
| parent | a70c352a37671fe1ebcbd317b439aa4760f4ccb7 (diff) | |
x86: Remove double declaration of MSR_P6_EVNTSEL0 and MSR_P6_EVNTSEL1
MSR_P6_EVNTSEL0 and MSR_P6_EVNTSEL1 is already declared in msr-index.h.
Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>
LKML-Reference: <1246450778.6940.8.camel@hpdv5.satnam>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
| -rw-r--r-- | arch/x86/include/asm/msr-index.h | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 1692fb5050e3..6be7fc254b59 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h | |||
| @@ -246,10 +246,6 @@ | |||
| 246 | #define MSR_IA32_MISC_ENABLE_TURBO_DISABLE (1ULL << 38) | 246 | #define MSR_IA32_MISC_ENABLE_TURBO_DISABLE (1ULL << 38) |
| 247 | #define MSR_IA32_MISC_ENABLE_IP_PREF_DISABLE (1ULL << 39) | 247 | #define MSR_IA32_MISC_ENABLE_IP_PREF_DISABLE (1ULL << 39) |
| 248 | 248 | ||
| 249 | /* Intel Model 6 */ | ||
| 250 | #define MSR_P6_EVNTSEL0 0x00000186 | ||
| 251 | #define MSR_P6_EVNTSEL1 0x00000187 | ||
| 252 | |||
| 253 | /* P4/Xeon+ specific */ | 249 | /* P4/Xeon+ specific */ |
| 254 | #define MSR_IA32_MCG_EAX 0x00000180 | 250 | #define MSR_IA32_MCG_EAX 0x00000180 |
| 255 | #define MSR_IA32_MCG_EBX 0x00000181 | 251 | #define MSR_IA32_MCG_EBX 0x00000181 |